From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wi0-f175.google.com (mail-wi0-f175.google.com [209.85.212.175]) by dpdk.org (Postfix) with ESMTP id F31328D9A for ; Tue, 27 Oct 2015 19:10:29 +0100 (CET) Received: by wijp11 with SMTP id p11so226368270wij.0 for ; Tue, 27 Oct 2015 11:10:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind_com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:organization:user-agent :in-reply-to:references:mime-version:content-transfer-encoding :content-type; bh=KezN0TNWZgJawdBZeDcSDJpEnAyAf9ikqL7P5O2je0g=; b=bZJKfXAVYgUJSUeMkeLCcOaKmfy9G17RKaXipHAESJ9y8H3DIqP87sqzqWUAybI1w4 ikuQgODuUmDt4FzictMhYTSc3PWx+KatGfycdFgx+PCcMY8x0ryyaoQjoXfZQ4hY1Sg1 1+iAublsSL/He0SniN09ij+MUze++cRndmuZj5N7g9UVuElXs5Y6BqBGjtcwWjo5cmji BpkVs5N49pUtoW4WBecpPTBic/wqya38ZWLScGr9ExGzkaQNEWOCaszJiqF87ApvuHjT y2T9y+Rv4boAXHPJDcK3FhaYXl/YdPCmq8+f7kTU4tQI6Us8hTYP/9CQRv82IEeYO/PS jgVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding:content-type; bh=KezN0TNWZgJawdBZeDcSDJpEnAyAf9ikqL7P5O2je0g=; b=mNudElnI44nFqbz0PHxmZRiIjucAwC+P28tjdzTr7SB3gy6j1kAC55aia2YOnrRrxU eevcCYluR862KILZG2tMCUKC4iNwiU2q5WhNg4o5O2CmgOFc5I6FI6ZGZucRndyCPsWn WjN3/0B/4m1Gph4cxaADaZyAxsuUE2y0Iqaikj21nZAxo50EIsgIq6x2p9Emmd0tpb7+ yBj2IFMyD/CHuJN2YD8if1VQtgxfZrjbkPA5xDToXoosoW4o2uqBFrICvNpGSjrCwH7W rPXsWs2jn4pmUMBHFtr2Z+VnpyBYSg/LAAQdv70RMhlxcFCXEiZf9nKryzR185Vi4eIm ubxA== X-Gm-Message-State: ALoCoQnFGUbzXmZ3AjDd1NmHsHMkM5g1BbblizUdBc73BrxFPDq1iuIdHlFpELpFn2lzUpL96xQY X-Received: by 10.180.198.142 with SMTP id jc14mr28766502wic.64.1445969429674; Tue, 27 Oct 2015 11:10:29 -0700 (PDT) Received: from xps13.localnet (136-92-190-109.dsl.ovh.fr. [109.190.92.136]) by smtp.gmail.com with ESMTPSA id j3sm15075511wib.13.2015.10.27.11.10.28 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Oct 2015 11:10:29 -0700 (PDT) From: Thomas Monjalon To: Vlad Zolotarov , Konstantin Ananyev , helin.zhang@intel.com Date: Tue, 27 Oct 2015 19:09:19 +0100 Message-ID: <1764015.lv7zT9MUyf@xps13> Organization: 6WIND User-Agent: KMail/4.14.10 (Linux/4.1.6-1-ARCH; KDE/4.14.11; x86_64; ; ) In-Reply-To: <55DAD1C9.3010802@cloudius-systems.com> References: <1440085070-13989-1-git-send-email-vladz@cloudius-systems.com> <55DAD1C9.3010802@cloudius-systems.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Cc: dev@dpdk.org, jeffrey.t.kirsher@intel.com, jesse.brandeburg@intel.com Subject: Re: [dpdk-dev] [PATCH v4] ixgbe_pmd: enforce RS bit on every EOP descriptor for devices newer than 82598 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Oct 2015 18:10:30 -0000 Any Follow-up to this discussion? Should we mark this patch as rejected? 2015-08-24 11:11, Vlad Zolotarov: > On 08/20/15 18:37, Vlad Zolotarov wrote: > > According to 82599 and x540 HW specifications RS bit *must* be > > set in the last descriptor of *every* packet. > > > > Before this patch there were 3 types of Tx callbacks that were setting > > RS bit every tx_rs_thresh descriptors. This patch introduces a set of > > new callbacks, one for each type mentioned above, that will set the RS > > bit in every EOP descriptor. > > > > ixgbe_set_tx_function() will set the appropriate Tx callback according > > to the device family. > > [+Jesse and Jeff] > > I've started to look at the i40e PMD and it has the same RS bit > deferring logic > as ixgbe PMD has (surprise, surprise!.. ;)). To recall, i40e PMD uses a > descriptor write-back > completion mode. > > From the HW Spec it's unclear if RS bit should be set on *every* descriptor > with EOP bit. However I noticed that Linux driver, before it moved to > HEAD write-back mode, was setting RS > bit on every EOP descriptor. > > So, here is a question to Intel guys: could u, pls., clarify this point? > > Thanks in advance, > vlad