From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E04DC42B8C; Wed, 24 May 2023 13:06:48 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 75C29406BC; Wed, 24 May 2023 13:06:48 +0200 (CEST) Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) by mails.dpdk.org (Postfix) with ESMTP id DF2E04067E for ; Wed, 24 May 2023 13:06:46 +0200 (CEST) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.west.internal (Postfix) with ESMTP id CB6173200CCF; Wed, 24 May 2023 07:06:42 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Wed, 24 May 2023 07:06:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to; s=fm1; t= 1684926402; x=1685012802; bh=aOfMJTN7RSizaSdZzyoeZqbkA99hLKGyqMI 6ghpIvpo=; b=OkMmBOvdMIpeb7zHgXAp+wi40YwB1aQD/DZkFGmJc23Hl/LKc7H Bci98ud2GS/Ni8gArPj6vFPur9CCxl3Mk7RXrJmoafEhnMpyam0cMPlxLZ62bmZI qv1s7EbFKwV/Q/v3XCeQ01+u16KlcGJTgyuRRDz9DhAkOY+d6LzJJtUr8id2DZf/ p1by4OwXffKx26EsJS+nhZ/bFf74hsE9xUJdCQy78nWGS5pTr7O871WyA2SMvhz4 QM0hkB/wt9kVEXIkXuMYNIyOAMf2rJZnIApefGGNFRugR6j9T1N16QVrZavoX3w+ ygBmcIirgE7QqufTo+13HjovT1UGzKSUCBA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t= 1684926402; x=1685012802; bh=aOfMJTN7RSizaSdZzyoeZqbkA99hLKGyqMI 6ghpIvpo=; b=MSPXjlCPBLgY1+9QonM3eWiNUJW0uthmS6zE216RdR0LAS4hpg/ VHlxvl0Vft6Ygv1ql62uj2rsqY+S5uW/D5UwXrcFC2Ou98maqkMiKd4hoyDlPhdZ HZyf0q3wFcAYuhyPBWwtQ/uh4BYLCwm3xCqBAwkbfG09OY4LBa7LnN7KjEKzN0+Z KcHi7I7lKM+Sp4Ned/b/iCEPpy6qhRggw8dFHx7Uv6o52k//4FPqPCQwbDIqyEa0 zuXybxysme/n4EeVtd465lb+pyRJxY+U6PKV7PwtU3pNeHEnSmNTq6oLQLjHs3jy 5jaswujE82eDCLSzx/5Yu8IWFL0uNZJa3FQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrfeejhedgfeegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhm rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc ggtffrrghtthgvrhhnpedtjeeiieefhedtfffgvdelteeufeefheeujefgueetfedttdei kefgkeduhedtgfenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfh hrohhmpehthhhomhgrshesmhhonhhjrghlohhnrdhnvght X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 24 May 2023 07:06:41 -0400 (EDT) From: Thomas Monjalon To: Nipun Gupta Cc: dev@dpdk.org, david.marchand@redhat.com, ferruh.yigit@amd.com, harpreet.anand@amd.com, nikhil.agarwal@amd.com Subject: Re: [PATCH v4 3/4] bus/cdx: add support for MSI Date: Wed, 24 May 2023 13:06:39 +0200 Message-ID: <18120073.sWSEgdgrri@thomas> In-Reply-To: <20230508111812.2655-4-nipun.gupta@amd.com> References: <20230124140746.594066-1-nipun.gupta@amd.com> <20230508111812.2655-1-nipun.gupta@amd.com> <20230508111812.2655-4-nipun.gupta@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 08/05/2023 13:18, Nipun Gupta: > MSI's are exposed to the devices using VFIO (vfio-cdx). This > patch uses the same to add support for MSI for the devices on > the cdx bus. > > A couple of API's have been introduced in the EAL interrupt > framework: > - rte_intr_irq_count_set: This API is used to set the total > interrupts on the interrupt handle. This would be provided > by VFIO (irq.count) for VFIO enabled devices. > - rte_intr_irq_count_get: This API returns the total number > interrupts which were set. [...] > --- a/lib/eal/common/eal_interrupts.h > +++ b/lib/eal/common/eal_interrupts.h > @@ -16,6 +16,7 @@ struct rte_intr_handle { > }; > uint32_t alloc_flags; /**< flags passed at allocation */ > enum rte_intr_handle_type type; /**< handle type */ > + uint32_t irq_count; /**< IRQ count provided via VFIO */ Why only via VFIO? [...] > +/** > + * @internal > + * Set the irq count field of interrupt handle with user > + * provided irq count value. > + * > + * @param intr_handle > + * pointer to the interrupt handle. > + * @param irq_count > + * IRQ count Please write IRQ all uppercase consistently. Same for CDX. > + rte_intr_irq_count_get; > + rte_intr_irq_count_set; Adding a new API in EAL deserves a separate commit with a different audience. It looks like it has been hidden from EAL reviewers eyes so far.