From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id AB061271 for ; Tue, 16 Jan 2018 01:17:10 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 3B5D120D1A; Mon, 15 Jan 2018 19:17:10 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Mon, 15 Jan 2018 19:17:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=mesmtp; bh=fStZsqB1yMCHSeG69VA/ANYGDs qY6TWCH8/3XnKC64U=; b=BZE8ANAv8rj230D5VcC84BKtAOcPRfyKR4pgKmy8rW BKu03zn7W4bC9cHlzqD9aCpJ6D6mIbHTrLSbqr9JY6gOwgZ9p2HosKhKtJRNoD9N IgCYnJvFm1o9FIBIY+QmMcO7wOERWQSzPx5CVGA6gHlUgETZswpD+NEsp9VwHppG I= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=fStZsq B1yMCHSeG69VA/ANYGDsqY6TWCH8/3XnKC64U=; b=Qonywd0YfKuC3PlclSmhJS xcLoVJoEKtXavrhf/ihiTQdA7qXwxvA9x52tEZTPTdwNCQuYVsmH/TBx2VA6ae38 /nQvguYTBM1orI/UJxrPykWDHfdGyJ+l0JPul+q9TWri0kjlWPVnzEAebA4N6sGu Q6sBb/tmGb3ZwmQonH/xDv3O5fZHFm8Ko1HZdb1/OWfGyiS3/0VyZJM1QOEqoeO8 inuehAc5ozwlVaxbffJZBIV1GGFkQujrqgO987yCGFYjs9TWlT+CIRJnsX6+RNg4 8eCE9zD2cPd12qUcE6YNpyz6sixhKnGWvsRrl4eYZypESG5cBHZ8DHvPNpLPR3zg == X-ME-Sender: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id DD49024235; Mon, 15 Jan 2018 19:17:09 -0500 (EST) From: Thomas Monjalon To: Konstantin Ananyev Cc: dev@dpdk.org, jerin.jacob@caviumnetworks.com Date: Tue, 16 Jan 2018 01:16:38 +0100 Message-ID: <1920273.q5HlxWAJJN@xps> In-Reply-To: <1516028680-2342-2-git-send-email-konstantin.ananyev@intel.com> References: <1513611253-8785-2-git-send-email-konstantin.ananyev@intel.com> <1516028680-2342-2-git-send-email-konstantin.ananyev@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v3 1/2] test/test: introduce new test-case for rte_smp_mb() X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Jan 2018 00:17:10 -0000 15/01/2018 16:04, Konstantin Ananyev: > Simple functional test for rte_smp_mb() implementations. > Also when executed on a single lcore could be used as rough > estimation how many cycles particular implementation of rte_smp_mb() > might take. > > Signed-off-by: Konstantin Ananyev > --- > test/test/Makefile | 1 + > test/test/test_barrier.c | 286 +++++++++++++++++++++++++++++++++++++++++++++++ I will add F: test/test/test_barrier.c in MAINTAINERS, when applying. > +static inline void > +store_load_barrier(uint32_t utype) > +{ > + if (utype == USE_MB) > + rte_mb(); > + else if (utype == USE_SMP_MB) > + rte_smp_mb(); > + else > + RTE_VERIFY(0); > +} It does not compile on ARM64. I have sent a fix for ARM64 barrier macros: https://dpdk.org/patch/33762