From: Bruce Richardson <bruce.richardson@intel.com>
To: Olivier Matz <olivier.matz@6wind.com>
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH] ixgbe: change assignation of bitfields to fix clang compilation
Date: Mon, 1 Dec 2014 10:52:50 +0000 [thread overview]
Message-ID: <20141201105250.GA4856@bricha3-MOBL3> (raw)
In-Reply-To: <1417430173-24502-1-git-send-email-olivier.matz@6wind.com>
On Mon, Dec 01, 2014 at 11:36:13AM +0100, Olivier Matz wrote:
> Commit 1224decaa44b3dba58e0a524fd0383969929c575 changed the way
> the bitfields are assigned in ixgbe, example:
>
> tx_offload_mask.l2_len = ~0;
>
> This result in a compilation error with clang:
>
> error: implicit truncation from 'int' to bitfield
> changes value from -1 to 127 [-Werror,-Wbitfield-constant-conversion]
>
> Replacing the '=' with a '|=' fixes the issue.
>
> Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
> lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
> index 8559ef6..5c36bff 100644
> --- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
> +++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
> @@ -381,7 +381,7 @@ ixgbe_set_xmit_ctx(struct igb_tx_queue* txq,
> mss_l4len_idx |= (ctx_idx << IXGBE_ADVTXD_IDX_SHIFT);
>
> if (ol_flags & PKT_TX_VLAN_PKT) {
> - tx_offload_mask.vlan_tci = ~0;
> + tx_offload_mask.vlan_tci |= ~0;
> }
>
> /* check if TCP segmentation required for this packet */
> @@ -391,17 +391,17 @@ ixgbe_set_xmit_ctx(struct igb_tx_queue* txq,
> IXGBE_ADVTXD_TUCMD_L4T_TCP |
> IXGBE_ADVTXD_DTYP_CTXT | IXGBE_ADVTXD_DCMD_DEXT;
>
> - tx_offload_mask.l2_len = ~0;
> - tx_offload_mask.l3_len = ~0;
> - tx_offload_mask.l4_len = ~0;
> - tx_offload_mask.tso_segsz = ~0;
> + tx_offload_mask.l2_len |= ~0;
> + tx_offload_mask.l3_len |= ~0;
> + tx_offload_mask.l4_len |= ~0;
> + tx_offload_mask.tso_segsz |= ~0;
> mss_l4len_idx |= tx_offload.tso_segsz << IXGBE_ADVTXD_MSS_SHIFT;
> mss_l4len_idx |= tx_offload.l4_len << IXGBE_ADVTXD_L4LEN_SHIFT;
> } else { /* no TSO, check if hardware checksum is needed */
> if (ol_flags & PKT_TX_IP_CKSUM) {
> type_tucmd_mlhl = IXGBE_ADVTXD_TUCMD_IPV4;
> - tx_offload_mask.l2_len = ~0;
> - tx_offload_mask.l3_len = ~0;
> + tx_offload_mask.l2_len |= ~0;
> + tx_offload_mask.l3_len |= ~0;
> }
>
> switch (ol_flags & PKT_TX_L4_MASK) {
> @@ -409,23 +409,23 @@ ixgbe_set_xmit_ctx(struct igb_tx_queue* txq,
> type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_UDP |
> IXGBE_ADVTXD_DTYP_CTXT | IXGBE_ADVTXD_DCMD_DEXT;
> mss_l4len_idx |= sizeof(struct udp_hdr) << IXGBE_ADVTXD_L4LEN_SHIFT;
> - tx_offload_mask.l2_len = ~0;
> - tx_offload_mask.l3_len = ~0;
> + tx_offload_mask.l2_len |= ~0;
> + tx_offload_mask.l3_len |= ~0;
> break;
> case PKT_TX_TCP_CKSUM:
> type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP |
> IXGBE_ADVTXD_DTYP_CTXT | IXGBE_ADVTXD_DCMD_DEXT;
> mss_l4len_idx |= sizeof(struct tcp_hdr) << IXGBE_ADVTXD_L4LEN_SHIFT;
> - tx_offload_mask.l2_len = ~0;
> - tx_offload_mask.l3_len = ~0;
> - tx_offload_mask.l4_len = ~0;
> + tx_offload_mask.l2_len |= ~0;
> + tx_offload_mask.l3_len |= ~0;
> + tx_offload_mask.l4_len |= ~0;
> break;
> case PKT_TX_SCTP_CKSUM:
> type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_SCTP |
> IXGBE_ADVTXD_DTYP_CTXT | IXGBE_ADVTXD_DCMD_DEXT;
> mss_l4len_idx |= sizeof(struct sctp_hdr) << IXGBE_ADVTXD_L4LEN_SHIFT;
> - tx_offload_mask.l2_len = ~0;
> - tx_offload_mask.l3_len = ~0;
> + tx_offload_mask.l2_len |= ~0;
> + tx_offload_mask.l3_len |= ~0;
> break;
> default:
> type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_RSV |
> --
> 2.1.0
>
next prev parent reply other threads:[~2014-12-01 10:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-01 10:36 Olivier Matz
2014-12-01 10:52 ` Bruce Richardson [this message]
2014-12-01 11:20 ` Thomas Monjalon
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