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BLUPR0701MB1714; 5:HOguBSGddXLc9iaIfirEF/AQujtYp1eVysv2E+rA09yC8CCC2+Z/elX3vYe9xjdh2ictH4VOdEmm1KXmBf8af9tJgZCOSn1h4miocJxGpJkR0Bo8Iv9nc6xkt83fz6ba6lIg3vIGYFqUONcjKJkWmQ==; 24:TNxK3rOafpHUZPPuYlm64mvIi8tqNnm7MDaUtI161AUHGoBp56g9wojbzYZyIuj3tVFz/Bcr9e7Vsykh6grGvx7jA0fQ1ovnp2hYix15wKU= SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jan 2016 15:11:07.8459 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR0701MB1714 Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v3 1/4] eal: Introduce new cache macro definitions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 06 Jan 2016 15:11:11 -0000 On Mon, Jan 04, 2016 at 02:15:53PM +0100, Olivier MATZ wrote: > Hi Jerin, Hi Olivier, > > Please see some comments below. > > On 12/14/2015 05:32 AM, Jerin Jacob wrote: > > - RTE_CACHE_MIN_LINE_SIZE(Supported minimum cache line size) > > - __rte_cache_min_aligned(Force minimum cache line alignment) > > - RTE_CACHE_LINE_SIZE_LOG2(Express cache line size in terms of log2) > > > > Signed-off-by: Jerin Jacob > > Suggested-by: Konstantin Ananyev > > --- > > lib/librte_eal/common/include/rte_memory.h | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/lib/librte_eal/common/include/rte_memory.h b/lib/librte_eal/common/include/rte_memory.h > > index 9c9e40f..b67a76f 100644 > > --- a/lib/librte_eal/common/include/rte_memory.h > > +++ b/lib/librte_eal/common/include/rte_memory.h > > @@ -77,11 +77,27 @@ enum rte_page_sizes { > > (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE)) > > /**< Return the first cache-aligned value greater or equal to size. */ > > > > +/**< Cache line size in terms of log2 */ > > +#if RTE_CACHE_LINE_SIZE == 64 > > +#define RTE_CACHE_LINE_SIZE_LOG2 6 > > +#elif RTE_CACHE_LINE_SIZE == 128 > > +#define RTE_CACHE_LINE_SIZE_LOG2 7 > > +#else > > +#error "Unsupported cache line size" > > +#endif > > + > > +#define RTE_CACHE_MIN_LINE_SIZE 64 /**< Minimum Cache line size. */ > > + > > I think RTE_CACHE_LINE_MIN_SIZE or RTE_MIN_CACHE_LINE_SIZE would > be clearer than RTE_CACHE_MIN_LINE_SIZE. OK. I will resend the next version with RTE_CACHE_LINE_MIN_SIZE > > > /** > > * Force alignment to cache line. > > */ > > #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE) > > > > +/** > > + * Force minimum cache line alignment. > > + */ > > +#define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_MIN_LINE_SIZE) > > I'm not really convinced that __rte_cache_min_aligned is straightforward > for someone reading the code that it means "aligned to the minimum cache > line size supported by the dpdk". > > In the two cases you are using this macro (mbuf structure and queue > info), I'm wondering if using __attribute__((aligned(64))) wouldn't be > clearer? > - for mbuf, it could be a local define, like MBUF_ALIGN_SIZE > - for queue info, using 64 makes sense as it's used to reserve space > for future use > > What do you think? IMO, it makes sense to keep "__rte_cache_min_aligned" as it will useful for forcing the minimum alignment requirements in DPDK in future structures. Thoughts? > > > Regards, > Olivier