From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.mhcomputing.net (master.mhcomputing.net [74.208.228.170]) by dpdk.org (Postfix) with ESMTP id F3B158E5E for ; Thu, 14 Jan 2016 08:11:44 +0100 (CET) Received: by mail.mhcomputing.net (Postfix, from userid 1000) id CBB6B214; Thu, 14 Jan 2016 02:11:42 -0500 (EST) Date: Thu, 14 Jan 2016 02:11:42 -0500 From: Matthew Hall To: "Zhang, Helin" Message-ID: <20160114071142.GA15131@mhcomputing.net> References: <20151206000839.GA23450@mhcomputing.net> <5688D2EE.5010700@mhcomputing.net> <20160114070355.GA14958@mhcomputing.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160114070355.GA14958@mhcomputing.net> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] librte_power w/ intel_pstate cpufreq governor X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Jan 2016 07:11:45 -0000 On Thu, Jan 14, 2016 at 02:03:55AM -0500, Matthew Hall wrote: > Yes, let me know how I could help. I don't know very much yet. My machine is > Skylake Core i7-6700k. Unfortunately I think I am in trouble here, because > there is no whitepaper on the Intel website for Intel Speed Shift technology > at all. This is the closest thing I could find: http://wccftech.com/idf15-intel-skylake-analysis-cpu-gpu-microarchitecture-ddr4-memory-impact/4/ Some copy of a presentation from Intel IDF15. Can somebody at Intel help me to find more papers or the right instruction or architecture manuals for HWP (Hardware P-State) feature? Matthew.