From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bon0061.outbound.protection.outlook.com [157.56.111.61]) by dpdk.org (Postfix) with ESMTP id E23BE3195 for ; Mon, 8 Feb 2016 09:59:47 +0100 (CET) Authentication-Results: 6wind.com; dkim=none (message not signed) header.d=none;6wind.com; dmarc=none action=none header.from=caviumnetworks.com; Received: from localhost.localdomain (122.167.181.96) by CY1PR0701MB1725.namprd07.prod.outlook.com (10.163.21.14) with Microsoft SMTP Server (TLS) id 15.1.403.16; Mon, 8 Feb 2016 08:59:42 +0000 Date: Mon, 8 Feb 2016 14:29:20 +0530 From: Jerin Jacob To: Thomas Monjalon Message-ID: <20160208085917.GA10260@localhost.localdomain> References: <1454453993-3903-1-git-send-email-thomas.monjalon@6wind.com> <1454797033-24057-1-git-send-email-thomas.monjalon@6wind.com> <1454797033-24057-3-git-send-email-thomas.monjalon@6wind.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1454797033-24057-3-git-send-email-thomas.monjalon@6wind.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-Originating-IP: [122.167.181.96] X-ClientProxiedBy: MA1PR01CA0014.INDPRD01.PROD.OUTLOOK.COM (25.164.117.21) To CY1PR0701MB1725.namprd07.prod.outlook.com (25.163.21.14) X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1725; 2:UNKj7bsqW3NR3sbLpKHjP3QaR114u5Zzcr7nL4p9nOIwlnqAnzhIeFqx/EWVBNTlkMhUkU74LxhlfXuTAwTHjMBc69v1MWVDl5Wwff/Kxe1jLNRta9nEbs1wxVBTxb+Ce1czlVHQ0NpEWTpa7Xmf8Q==; 3:zkOv4Gv7QGU6RKp/IZf7lj6No+iqtR+P0kKI4yuxoRJypPxAQoepDzp9BuAI8peWB7GlW8dGTO3gOTsKd/mapmuFfyk8N8UEtETK40XBLn6e/pliNwAf2DgL+j+v+PZY; 25:ogSIUxTiRmakpSr15Zqs27pMsdut58Y/mQK4OOmqd/EGE6fi1fFkmPUW+udx7iUE4os3fJIt9imMhz1k92RYg6BtX+XOyK2yPSZ8MfNGzIFznxSXQDYlWE+XAtqsIZ076g31xUkr/Xqem10pRwZ30rSiwyhT0eG0WO5m1WNgGZyunHOHr+QEiJ5pCb5TQXbPIK2I5udA++810r++KnsTQn3CYNMTczVumfpEnKazCw4w1cJvDYeT1mg6WINZZkdVOmP1EnIpyIbkqvXMcGlFRLxSmFlX+2e7GyXkhjksUzhAfUJdq6RTvGzf6EWlBCLn X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR0701MB1725; X-MS-Office365-Filtering-Correlation-Id: f4c38991-f8c8-4148-c9b4-08d330663098 X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1725; 20:k3JNrN1j0zc9CNorNa4cpdbRGr2OUh6O3Q43RSnjwGEjQWwTgpyhKf5sKPt7mDMadYZ6JHrhN80xdNOYMvbvdaQs96ucT50Ih5TD2Dj1YS05fDoafu84MO4chiPKunth6AdtvGcc85QwLPFiizR3Sy97SlonmYkZNysXqvWSjOC4EMr5DFWs9dH6YYCE4IarR6RVzisQ8oKU6u3s2/dPIc8kY4YItZRcC3Jeq4AGODku/pTsbuqNDnQWOogYSutAGJ9YNbu/QjcnWNFk+stOinW75fJ/vxTCS/kP0l7bvgcxKjXzZkWpYOJS/R5Q6HA3HEy7hQqZXQXPBgxhpcsTCwCAEZR9bTuueygIqBQikOV9bs0SCUdyTYr91qnkRxkzFMtgFcHmiTbDsDgAI+22LlaTLTuRGIBjsswYu42BVw1NFf4CXhavlvxX+b3ZCfOZYkCbzTyP84KslQ1dnkPAgpTWfeuCdGt1BmNZB32iN3UkoOcxZsHKodYsxfA8Anr5n8mPz4LSzQPZLSMIkhjTSb9La84rCT6P2l2nHcn6+xv1SzoAaL6Hg8XowmiA0XGTm16sO9C4YW946uKWALGGTaUbvUKUnA9L1DL1vcO1LqU= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(5005006)(8121501046)(3002001)(10201501046); SRVR:CY1PR0701MB1725; BCL:0; PCL:0; RULEID:; SRVR:CY1PR0701MB1725; X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1725; 4:ttPN/vFq8RePjYF+U95VTR4NLB2d9A5l5lKAoNBzncE0OTgJeLSr/VEdW27SSO3tMXxDwunkXwQF8ZnXkDOGiNPUvu5RGja5X3lmpqpjsy2Jd4wKyErX/s+K1P2I7R1N/Dc4LyimJ8gfL47QWyxaBcB3AkQLscJDIYtU8anbufS1Jf3oJVBp4PsHIXFbKfvlIBDDzqE9knGQomfDPETrvIRyTfVLGJi19LQr4o0xihto28m+zgUbE/xUd8WOWC60rlxv/g5mq/O3acbYs9RBFn0+YdsoVPOXDgMdtH3rmUehdFdV9nKhR3+dfE4UL/OCLTj8SG6OKlXlWcvhB3LXWABHPCkePghGTz0L2Mk9kXvvqWAxULwPcsjuVK4p7g4G X-Forefront-PRVS: 084674B2CF X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(6009001)(6069001)(24454002)(50986999)(47776003)(46406003)(3846002)(23726003)(4001350100001)(76176999)(5004730100002)(61506002)(66066001)(77096005)(54356999)(50466002)(83506001)(5001960100002)(110136002)(586003)(1076002)(5008740100001)(6116002)(1096002)(189998001)(19580395003)(19580405001)(2906002)(97756001)(92566002)(4326007)(86362001)(575784001)(2950100001)(87976001)(33656002)(40100003)(122386002)(42186005)(7099028); DIR:OUT; SFP:1101; SCL:1; SRVR:CY1PR0701MB1725; H:localhost.localdomain; FPR:; SPF:None; MLV:sfv; LANG:en; X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; CY1PR0701MB1725; 23:McZqTQK2QK2LB0ZtnHQPxDA4Gr2FP1zn+ofLg+r?= =?us-ascii?Q?mfJygUlk5jKGzzhGEes0b526WpSqcqewZU/JcyuDPn87MKH64lkqxkntxTJ2?= =?us-ascii?Q?q08YX8byojOcKpcJs8a6rrr9MxI9CDf3rWVD4UO+L4RFSddCgfgtZUjbxDDH?= =?us-ascii?Q?X5jN8RsbqSrIxMJFahF89eZVQ/TUn6ZV7T6UkvzUNuzH1cQODPRC+u4X3NI1?= =?us-ascii?Q?mTGjcRIpiJC7QX9JkbORmbVf761RRZ/qS5qCRo9Xp87v6UwO4WhoTV0NKUkh?= =?us-ascii?Q?sAD1IDpYjDGrxK/BQ+0AAAQj2aoZD9tBM0+uJD9sjzQdVswYwLEcnfrZV7au?= =?us-ascii?Q?yjQ28iGKU56PKIDvd2zAVz7LPdhxrzUf85nLcWzuxLHETwqU59qedsJuaEG5?= =?us-ascii?Q?vQo/0rtkHayuZ6sqj/hd54Cm98THMaBU4qsgD4mRyHTDY8uF86bg0gb2kOWD?= =?us-ascii?Q?8+4v17s+Fv7i9C2g1lHMP/lGEXmZKg4FU+cjed7V2veofFcuGDOA+b29uyMc?= =?us-ascii?Q?N7r+n/H5PCllWH4A5QkeiWiWpr3X/LrAD5/GRvq09nlwtz4Hf8Do3IPU19zH?= =?us-ascii?Q?2OkmpWnI6Y4E9rM7Uc3C+lVM6wIvTbiatwgl/01r4Q1eJFcQleoQf6iHEH4m?= =?us-ascii?Q?VfvWV/hUn8jyBW1epWkl2JMC9EUmze0SkYouc5fW2lv9+4IIdIIZXM2kgyq1?= =?us-ascii?Q?P/TM5KzJb6z3Th2mMIZbKGMJLS5d0kKwzJMfxqFbeTqqOToSa0T4VaJGWqc8?= =?us-ascii?Q?RKGNIgwxFpFCctmVsIpOw0T0i6+RSnMsfHaZguSym6kR8z74IKnG9J+MKSQU?= =?us-ascii?Q?WrkwiLRZnaj8jBDO+QQ6x4sDTN2fM6TzTFxr5b/z00FREiNm01YLkfs65Uj1?= =?us-ascii?Q?TWOmUaKWdzVJdWxFaole1Xom2rNaBfdHH3kCrWw26tWbpNrQVzPa8/cxzbXh?= =?us-ascii?Q?/iMMIl65DqBDKCp3qWyv9d6YDLUa1LhQ8lxQl3sambfnSWkvnmEprso+yyAW?= =?us-ascii?Q?hWCd5U2CAixrgbK4mvRC9k0YdWr8jZ9wP9vcOLsx4nUfz3a4ldWNzpLUerqD?= =?us-ascii?Q?uNwzSkrA=3D?= X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1725; 5:hk8B4qMfpBPPfUl2dzN+0bRMBt6BW2bg3uzkgQR5JAUcVLvWuyOuWMtPao4xfmNm435nooshtLFfrKxTaJx3l6So4T8aAX5Ch/b9oE1A47IUUnUYVpCGp3N+SaFWOx+D9NewAXRolNORAJe40yxdDw==; 24:ZMbhtm86pfvGOUN3Ja/PQQYWhBHbYxRcYRKmfCipPNLsGLEeAgRqKfJVZseV0tTYn+5YYGSDwJc9m3tit0Vzy8lO7PeDpMsUhPllm1RFtyM= SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2016 08:59:42.4019 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0701MB1725 Cc: dev@dpdk.org, viktorin@rehivetech.com Subject: Re: [dpdk-dev] [PATCH v2 2/5] eal: move CPU flag functions out of headers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Feb 2016 08:59:48 -0000 On Sat, Feb 06, 2016 at 11:17:10PM +0100, Thomas Monjalon wrote: > The patch c344eab3ee has moved the hardware definition of CPU flags. > Now the functions checking these hardware flags are also moved. > The function rte_cpu_get_flag_enabled() is no more inline. > > The benefits are: > - remove rte_cpu_feature_table from the ABI (recently added) > - hide hardware details from the API > - allow to adapt structures per arch (done in next patch) > > Signed-off-by: Thomas Monjalon arm64 specific changes looks good. Acked-by: Jerin Jacob > --- > MAINTAINERS | 4 + > app/test/test_hash_scaling.c | 2 + > lib/librte_eal/bsdapp/eal/rte_eal_version.map | 1 - > lib/librte_eal/common/arch/arm/rte_cpuflags.c | 125 ++++++++++++++++++--- > lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c | 79 +++++++++++++ > lib/librte_eal/common/arch/tile/rte_cpuflags.c | 11 ++ > lib/librte_eal/common/arch/x86/rte_cpuflags.c | 83 ++++++++++++++ > lib/librte_eal/common/eal_common_cpuflags.c | 3 + > .../common/include/arch/arm/rte_cpuflags_32.h | 80 +------------ > .../common/include/arch/arm/rte_cpuflags_64.h | 81 +------------ > .../common/include/arch/ppc_64/rte_cpuflags.h | 66 +---------- > .../common/include/arch/tile/rte_cpuflags.h | 31 +---- > .../common/include/arch/x86/rte_cpuflags.h | 68 +---------- > .../common/include/generic/rte_cpuflags.h | 50 +-------- > lib/librte_eal/linuxapp/eal/rte_eal_version.map | 1 - > 15 files changed, 300 insertions(+), 385 deletions(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index b90aeea..628bc05 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -131,6 +131,7 @@ F: doc/guides/sample_app_ug/multi_process.rst > ARM v7 > M: Jan Viktorin > M: Jianbo Liu > +F: lib/librte_eal/common/arch/arm/ > F: lib/librte_eal/common/include/arch/arm/ > > ARM v8 > @@ -141,16 +142,19 @@ F: lib/librte_acl/acl_run_neon.* > > EZchip TILE-Gx > M: Zhigang Lu > +F: lib/librte_eal/common/arch/tile/ > F: lib/librte_eal/common/include/arch/tile/ > F: drivers/net/mpipe/ > > IBM POWER > M: Chao Zhu > +F: lib/librte_eal/common/arch/ppc_64/ > F: lib/librte_eal/common/include/arch/ppc_64/ > > Intel x86 > M: Bruce Richardson > M: Konstantin Ananyev > +F: lib/librte_eal/common/arch/x86/ > F: lib/librte_eal/common/include/arch/x86/ > > Linux EAL (with overlaps) > diff --git a/app/test/test_hash_scaling.c b/app/test/test_hash_scaling.c > index 744e5e3..1c4c75d 100644 > --- a/app/test/test_hash_scaling.c > +++ b/app/test/test_hash_scaling.c > @@ -31,6 +31,8 @@ > * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > */ > > +#include > + > #include > #include > #include > diff --git a/lib/librte_eal/bsdapp/eal/rte_eal_version.map b/lib/librte_eal/bsdapp/eal/rte_eal_version.map > index 9bea0e2..1a96203 100644 > --- a/lib/librte_eal/bsdapp/eal/rte_eal_version.map > +++ b/lib/librte_eal/bsdapp/eal/rte_eal_version.map > @@ -142,6 +142,5 @@ DPDK_2.3 { > rte_cpu_get_flag_name; > rte_eal_pci_map_device; > rte_eal_pci_unmap_device; > - rte_cpu_feature_table; > > } DPDK_2.2; > diff --git a/lib/librte_eal/common/arch/arm/rte_cpuflags.c b/lib/librte_eal/common/arch/arm/rte_cpuflags.c > index 62e0791..cd7a7b1 100644 > --- a/lib/librte_eal/common/arch/arm/rte_cpuflags.c > +++ b/lib/librte_eal/common/arch/arm/rte_cpuflags.c > @@ -2,6 +2,7 @@ > * BSD LICENSE > * > * Copyright (C) Cavium networks Ltd. 2015. > + * Copyright(c) 2015 RehiveTech. All rights reserved. > * > * Redistribution and use in source and binary forms, with or without > * modification, are permitted provided that the following conditions > @@ -32,19 +33,51 @@ > > #include "rte_cpuflags.h" > > -#ifdef RTE_ARCH_64 > -const struct feature_entry rte_cpu_feature_table[] = { > - FEAT_DEF(FP, 0x00000001, 0, REG_HWCAP, 0) > - FEAT_DEF(NEON, 0x00000001, 0, REG_HWCAP, 1) > - FEAT_DEF(EVTSTRM, 0x00000001, 0, REG_HWCAP, 2) > - FEAT_DEF(AES, 0x00000001, 0, REG_HWCAP, 3) > - FEAT_DEF(PMULL, 0x00000001, 0, REG_HWCAP, 4) > - FEAT_DEF(SHA1, 0x00000001, 0, REG_HWCAP, 5) > - FEAT_DEF(SHA2, 0x00000001, 0, REG_HWCAP, 6) > - FEAT_DEF(CRC32, 0x00000001, 0, REG_HWCAP, 7) > - FEAT_DEF(AARCH64, 0x00000001, 0, REG_PLATFORM, 1) > +#include > +#include > +#include > +#include > +#include > + > +#ifndef AT_HWCAP > +#define AT_HWCAP 16 > +#endif > + > +#ifndef AT_HWCAP2 > +#define AT_HWCAP2 26 > +#endif > + > +#ifndef AT_PLATFORM > +#define AT_PLATFORM 15 > +#endif > + > +enum cpu_register_t { > + REG_HWCAP = 0, > + REG_HWCAP2, > + REG_PLATFORM, > +}; > + > +typedef uint32_t cpuid_registers_t[4]; > + > +/** > + * Struct to hold a processor feature entry > + */ > +struct feature_entry { > + uint32_t leaf; /**< cpuid leaf */ > + uint32_t subleaf; /**< cpuid subleaf */ > + uint32_t reg; /**< cpuid register */ > + uint32_t bit; /**< cpuid register bit */ > +#define CPU_FLAG_NAME_MAX_LEN 64 > + char name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */ > }; > -#else > + > +#define FEAT_DEF(name, leaf, subleaf, reg, bit) \ > + [RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name }, > + > +#ifdef RTE_ARCH_ARMv7 > +#define PLATFORM_STR "v7l" > +typedef Elf32_auxv_t _Elfx_auxv_t; > + > const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(SWP, 0x00000001, 0, REG_HWCAP, 0) > FEAT_DEF(HALF, 0x00000001, 0, REG_HWCAP, 1) > @@ -75,7 +108,73 @@ const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(CRC32, 0x00000001, 0, REG_HWCAP2, 4) > FEAT_DEF(V7L, 0x00000001, 0, REG_PLATFORM, 0) > }; > -#endif > + > +#elif defined RTE_ARCH_ARM64 > +#define PLATFORM_STR "aarch64" > +typedef Elf64_auxv_t _Elfx_auxv_t; > + > +const struct feature_entry rte_cpu_feature_table[] = { > + FEAT_DEF(FP, 0x00000001, 0, REG_HWCAP, 0) > + FEAT_DEF(NEON, 0x00000001, 0, REG_HWCAP, 1) > + FEAT_DEF(EVTSTRM, 0x00000001, 0, REG_HWCAP, 2) > + FEAT_DEF(AES, 0x00000001, 0, REG_HWCAP, 3) > + FEAT_DEF(PMULL, 0x00000001, 0, REG_HWCAP, 4) > + FEAT_DEF(SHA1, 0x00000001, 0, REG_HWCAP, 5) > + FEAT_DEF(SHA2, 0x00000001, 0, REG_HWCAP, 6) > + FEAT_DEF(CRC32, 0x00000001, 0, REG_HWCAP, 7) > + FEAT_DEF(AARCH64, 0x00000001, 0, REG_PLATFORM, 1) > +}; > +#endif /* RTE_ARCH */ > + > +/* > + * Read AUXV software register and get cpu features for ARM > + */ > +static void > +rte_cpu_get_features(__attribute__((unused)) uint32_t leaf, > + __attribute__((unused)) uint32_t subleaf, cpuid_registers_t out) > +{ > + int auxv_fd; > + _Elfx_auxv_t auxv; > + > + auxv_fd = open("/proc/self/auxv", O_RDONLY); > + assert(auxv_fd); > + while (read(auxv_fd, &auxv, sizeof(auxv)) == sizeof(auxv)) { > + if (auxv.a_type == AT_HWCAP) { > + out[REG_HWCAP] = auxv.a_un.a_val; > + } else if (auxv.a_type == AT_HWCAP2) { > + out[REG_HWCAP2] = auxv.a_un.a_val; > + } else if (auxv.a_type == AT_PLATFORM) { > + if (!strcmp((const char *)auxv.a_un.a_val, PLATFORM_STR)) > + out[REG_PLATFORM] = 0x0001; > + } > + } > +} > + > +/* > + * Checks if a particular flag is available on current machine. > + */ > +int > +rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature) > +{ > + const struct feature_entry *feat; > + cpuid_registers_t regs = {0}; > + > + if (feature >= RTE_CPUFLAG_NUMFLAGS) > + /* Flag does not match anything in the feature tables */ > + return -ENOENT; > + > + feat = &rte_cpu_feature_table[feature]; > + > + if (!feat->leaf) > + /* This entry in the table wasn't filled out! */ > + return -EFAULT; > + > + /* get the cpuid leaf containing the desired feature */ > + rte_cpu_get_features(feat->leaf, feat->subleaf, regs); > + > + /* check if the feature is enabled */ > + return (regs[feat->reg] >> feat->bit) & 1; > +} > > const char * > rte_cpu_get_flag_name(enum rte_cpu_flag_t feature) > diff --git a/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c > index a270ccc..b7e0b72 100644 > --- a/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c > +++ b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c > @@ -32,6 +32,38 @@ > > #include "rte_cpuflags.h" > > +#include > +#include > +#include > +#include > + > +/* Symbolic values for the entries in the auxiliary table */ > +#define AT_HWCAP 16 > +#define AT_HWCAP2 26 > + > +/* software based registers */ > +enum cpu_register_t { > + REG_HWCAP = 0, > + REG_HWCAP2, > +}; > + > +typedef uint32_t cpuid_registers_t[4]; > + > +/** > + * Struct to hold a processor feature entry > + */ > +struct feature_entry { > + uint32_t leaf; /**< cpuid leaf */ > + uint32_t subleaf; /**< cpuid subleaf */ > + uint32_t reg; /**< cpuid register */ > + uint32_t bit; /**< cpuid register bit */ > +#define CPU_FLAG_NAME_MAX_LEN 64 > + char name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */ > +}; > + > +#define FEAT_DEF(name, leaf, subleaf, reg, bit) \ > + [RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name }, > + > const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(PPC_LE, 0x00000001, 0, REG_HWCAP, 0) > FEAT_DEF(TRUE_LE, 0x00000001, 0, REG_HWCAP, 1) > @@ -69,6 +101,53 @@ const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(ARCH_2_07, 0x00000001, 0, REG_HWCAP2, 31) > }; > > +/* > + * Read AUXV software register and get cpu features for Power > + */ > +static void > +rte_cpu_get_features(__attribute__((unused)) uint32_t leaf, > + __attribute__((unused)) uint32_t subleaf, cpuid_registers_t out) > +{ > + int auxv_fd; > + Elf64_auxv_t auxv; > + > + auxv_fd = open("/proc/self/auxv", O_RDONLY); > + assert(auxv_fd); > + while (read(auxv_fd, &auxv, > + sizeof(Elf64_auxv_t)) == sizeof(Elf64_auxv_t)) { > + if (auxv.a_type == AT_HWCAP) > + out[REG_HWCAP] = auxv.a_un.a_val; > + else if (auxv.a_type == AT_HWCAP2) > + out[REG_HWCAP2] = auxv.a_un.a_val; > + } > +} > + > +/* > + * Checks if a particular flag is available on current machine. > + */ > +int > +rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature) > +{ > + const struct feature_entry *feat; > + cpuid_registers_t regs = {0}; > + > + if (feature >= RTE_CPUFLAG_NUMFLAGS) > + /* Flag does not match anything in the feature tables */ > + return -ENOENT; > + > + feat = &rte_cpu_feature_table[feature]; > + > + if (!feat->leaf) > + /* This entry in the table wasn't filled out! */ > + return -EFAULT; > + > + /* get the cpuid leaf containing the desired feature */ > + rte_cpu_get_features(feat->leaf, feat->subleaf, regs); > + > + /* check if the feature is enabled */ > + return (regs[feat->reg] >> feat->bit) & 1; > +} > + > const char * > rte_cpu_get_flag_name(enum rte_cpu_flag_t feature) > { > diff --git a/lib/librte_eal/common/arch/tile/rte_cpuflags.c b/lib/librte_eal/common/arch/tile/rte_cpuflags.c > index 4ca0a7b..a2b6c51 100644 > --- a/lib/librte_eal/common/arch/tile/rte_cpuflags.c > +++ b/lib/librte_eal/common/arch/tile/rte_cpuflags.c > @@ -32,5 +32,16 @@ > > #include "rte_cpuflags.h" > > +#include > + > const struct feature_entry rte_cpu_feature_table[] = { > }; > + > +/* > + * Checks if a particular flag is available on current machine. > + */ > +int > +rte_cpu_get_flag_enabled(__attribute__((unused)) enum rte_cpu_flag_t feature) > +{ > + return -ENOENT; > +} > diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c > index 3346fde..0138257 100644 > --- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c > +++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c > @@ -33,6 +33,34 @@ > > #include "rte_cpuflags.h" > > +#include > +#include > +#include > + > +enum cpu_register_t { > + RTE_REG_EAX = 0, > + RTE_REG_EBX, > + RTE_REG_ECX, > + RTE_REG_EDX, > +}; > + > +typedef uint32_t cpuid_registers_t[4]; > + > +/** > + * Struct to hold a processor feature entry > + */ > +struct feature_entry { > + uint32_t leaf; /**< cpuid leaf */ > + uint32_t subleaf; /**< cpuid subleaf */ > + uint32_t reg; /**< cpuid register */ > + uint32_t bit; /**< cpuid register bit */ > +#define CPU_FLAG_NAME_MAX_LEN 64 > + char name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */ > +}; > + > +#define FEAT_DEF(name, leaf, subleaf, reg, bit) \ > + [RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name }, > + > const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(SSE3, 0x00000001, 0, RTE_REG_ECX, 0) > FEAT_DEF(PCLMULQDQ, 0x00000001, 0, RTE_REG_ECX, 1) > @@ -128,6 +156,61 @@ const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX, 8) > }; > > +/* > + * Execute CPUID instruction and get contents of a specific register > + * > + * This function, when compiled with GCC, will generate architecture-neutral > + * code, as per GCC manual. > + */ > +static void > +rte_cpu_get_features(uint32_t leaf, uint32_t subleaf, cpuid_registers_t out) > +{ > +#if defined(__i386__) && defined(__PIC__) > + /* %ebx is a forbidden register if we compile with -fPIC or -fPIE */ > + asm volatile("movl %%ebx,%0 ; cpuid ; xchgl %%ebx,%0" > + : "=r" (out[RTE_REG_EBX]), > + "=a" (out[RTE_REG_EAX]), > + "=c" (out[RTE_REG_ECX]), > + "=d" (out[RTE_REG_EDX]) > + : "a" (leaf), "c" (subleaf)); > +#else > + asm volatile("cpuid" > + : "=a" (out[RTE_REG_EAX]), > + "=b" (out[RTE_REG_EBX]), > + "=c" (out[RTE_REG_ECX]), > + "=d" (out[RTE_REG_EDX]) > + : "a" (leaf), "c" (subleaf)); > +#endif > +} > + > +int > +rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature) > +{ > + const struct feature_entry *feat; > + cpuid_registers_t regs; > + > + if (feature >= RTE_CPUFLAG_NUMFLAGS) > + /* Flag does not match anything in the feature tables */ > + return -ENOENT; > + > + feat = &rte_cpu_feature_table[feature]; > + > + if (!feat->leaf) > + /* This entry in the table wasn't filled out! */ > + return -EFAULT; > + > + rte_cpu_get_features(feat->leaf & 0xffff0000, 0, regs); > + if (((regs[RTE_REG_EAX] ^ feat->leaf) & 0xffff0000) || > + regs[RTE_REG_EAX] < feat->leaf) > + return 0; > + > + /* get the cpuid leaf containing the desired feature */ > + rte_cpu_get_features(feat->leaf, feat->subleaf, regs); > + > + /* check if the feature is enabled */ > + return (regs[feat->reg] >> feat->bit) & 1; > +} > + > const char * > rte_cpu_get_flag_name(enum rte_cpu_flag_t feature) > { > diff --git a/lib/librte_eal/common/eal_common_cpuflags.c b/lib/librte_eal/common/eal_common_cpuflags.c > index 8c0576d..a4c5a29 100644 > --- a/lib/librte_eal/common/eal_common_cpuflags.c > +++ b/lib/librte_eal/common/eal_common_cpuflags.c > @@ -30,6 +30,9 @@ > * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > */ > + > +#include > + > #include > #include > > diff --git a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h > index 2ec0c2e..eb02d9b 100644 > --- a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h > +++ b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h > @@ -37,35 +37,6 @@ > extern "C" { > #endif > > -#include > -#include > -#include > -#include > -#include > - > -#include "generic/rte_cpuflags.h" > - > -extern const struct feature_entry rte_cpu_feature_table[]; > - > -#ifndef AT_HWCAP > -#define AT_HWCAP 16 > -#endif > - > -#ifndef AT_HWCAP2 > -#define AT_HWCAP2 26 > -#endif > - > -#ifndef AT_PLATFORM > -#define AT_PLATFORM 15 > -#endif > - > -/* software based registers */ > -enum cpu_register_t { > - REG_HWCAP = 0, > - REG_HWCAP2, > - REG_PLATFORM, > -}; > - > /** > * Enumeration of all CPU features supported > */ > @@ -102,56 +73,7 @@ enum rte_cpu_flag_t { > RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ > }; > > -/* > - * Read AUXV software register and get cpu features for ARM > - */ > -static inline void > -rte_cpu_get_features(__attribute__((unused)) uint32_t leaf, > - __attribute__((unused)) uint32_t subleaf, cpuid_registers_t out) > -{ > - int auxv_fd; > - Elf32_auxv_t auxv; > - > - auxv_fd = open("/proc/self/auxv", O_RDONLY); > - assert(auxv_fd); > - while (read(auxv_fd, &auxv, > - sizeof(Elf32_auxv_t)) == sizeof(Elf32_auxv_t)) { > - if (auxv.a_type == AT_HWCAP) > - out[REG_HWCAP] = auxv.a_un.a_val; > - else if (auxv.a_type == AT_HWCAP2) > - out[REG_HWCAP2] = auxv.a_un.a_val; > - else if (auxv.a_type == AT_PLATFORM) { > - if (!strcmp((const char *)auxv.a_un.a_val, "v7l")) > - out[REG_PLATFORM] = 0x0001; > - } > - } > -} > - > -/* > - * Checks if a particular flag is available on current machine. > - */ > -static inline int > -rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature) > -{ > - const struct feature_entry *feat; > - cpuid_registers_t regs = {0}; > - > - if (feature >= RTE_CPUFLAG_NUMFLAGS) > - /* Flag does not match anything in the feature tables */ > - return -ENOENT; > - > - feat = &rte_cpu_feature_table[feature]; > - > - if (!feat->leaf) > - /* This entry in the table wasn't filled out! */ > - return -EFAULT; > - > - /* get the cpuid leaf containing the desired feature */ > - rte_cpu_get_features(feat->leaf, feat->subleaf, regs); > - > - /* check if the feature is enabled */ > - return (regs[feat->reg] >> feat->bit) & 1; > -} > +#include "generic/rte_cpuflags.h" > > #ifdef __cplusplus > } > diff --git a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h > index b36040b..810e8a0 100644 > --- a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h > +++ b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h > @@ -37,35 +37,6 @@ > extern "C" { > #endif > > -#include > -#include > -#include > -#include > -#include > - > -#include "generic/rte_cpuflags.h" > - > -extern const struct feature_entry rte_cpu_feature_table[]; > - > -#ifndef AT_HWCAP > -#define AT_HWCAP 16 > -#endif > - > -#ifndef AT_HWCAP2 > -#define AT_HWCAP2 26 > -#endif > - > -#ifndef AT_PLATFORM > -#define AT_PLATFORM 15 > -#endif > - > -/* software based registers */ > -enum cpu_register_t { > - REG_HWCAP = 0, > - REG_HWCAP2, > - REG_PLATFORM, > -}; > - > /** > * Enumeration of all CPU features supported > */ > @@ -83,57 +54,7 @@ enum rte_cpu_flag_t { > RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ > }; > > -/* > - * Read AUXV software register and get cpu features for ARM > - */ > -static inline void > -rte_cpu_get_features(__attribute__((unused)) uint32_t leaf, > - __attribute__((unused)) uint32_t subleaf, > - cpuid_registers_t out) > -{ > - int auxv_fd; > - Elf64_auxv_t auxv; > - > - auxv_fd = open("/proc/self/auxv", O_RDONLY); > - assert(auxv_fd); > - while (read(auxv_fd, &auxv, > - sizeof(Elf64_auxv_t)) == sizeof(Elf64_auxv_t)) { > - if (auxv.a_type == AT_HWCAP) { > - out[REG_HWCAP] = auxv.a_un.a_val; > - } else if (auxv.a_type == AT_HWCAP2) { > - out[REG_HWCAP2] = auxv.a_un.a_val; > - } else if (auxv.a_type == AT_PLATFORM) { > - if (!strcmp((const char *)auxv.a_un.a_val, "aarch64")) > - out[REG_PLATFORM] = 0x0001; > - } > - } > -} > - > -/* > - * Checks if a particular flag is available on current machine. > - */ > -static inline int > -rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature) > -{ > - const struct feature_entry *feat; > - cpuid_registers_t regs = {0}; > - > - if (feature >= RTE_CPUFLAG_NUMFLAGS) > - /* Flag does not match anything in the feature tables */ > - return -ENOENT; > - > - feat = &rte_cpu_feature_table[feature]; > - > - if (!feat->leaf) > - /* This entry in the table wasn't filled out! */ > - return -EFAULT; > - > - /* get the cpuid leaf containing the desired feature */ > - rte_cpu_get_features(feat->leaf, feat->subleaf, regs); > - > - /* check if the feature is enabled */ > - return (regs[feat->reg] >> feat->bit) & 1; > -} > +#include "generic/rte_cpuflags.h" > > #ifdef __cplusplus > } > diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h > index 85c4c1a..7cc2b3c 100644 > --- a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h > +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h > @@ -37,25 +37,6 @@ > extern "C" { > #endif > > -#include > -#include > -#include > -#include > - > -#include "generic/rte_cpuflags.h" > - > -extern const struct feature_entry rte_cpu_feature_table[]; > - > -/* Symbolic values for the entries in the auxiliary table */ > -#define AT_HWCAP 16 > -#define AT_HWCAP2 26 > - > -/* software based registers */ > -enum cpu_register_t { > - REG_HWCAP = 0, > - REG_HWCAP2, > -}; > - > /** > * Enumeration of all CPU features supported > */ > @@ -98,52 +79,7 @@ enum rte_cpu_flag_t { > RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ > }; > > -/* > - * Read AUXV software register and get cpu features for Power > - */ > -static inline void > -rte_cpu_get_features(__attribute__((unused)) uint32_t leaf, > - __attribute__((unused)) uint32_t subleaf, cpuid_registers_t out) > -{ > - int auxv_fd; > - Elf64_auxv_t auxv; > - > - auxv_fd = open("/proc/self/auxv", O_RDONLY); > - assert(auxv_fd); > - while (read(auxv_fd, &auxv, > - sizeof(Elf64_auxv_t)) == sizeof(Elf64_auxv_t)) { > - if (auxv.a_type == AT_HWCAP) > - out[REG_HWCAP] = auxv.a_un.a_val; > - else if (auxv.a_type == AT_HWCAP2) > - out[REG_HWCAP2] = auxv.a_un.a_val; > - } > -} > - > -/* > - * Checks if a particular flag is available on current machine. > - */ > -static inline int > -rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature) > -{ > - const struct feature_entry *feat; > - cpuid_registers_t regs = {0}; > - > - if (feature >= RTE_CPUFLAG_NUMFLAGS) > - /* Flag does not match anything in the feature tables */ > - return -ENOENT; > - > - feat = &rte_cpu_feature_table[feature]; > - > - if (!feat->leaf) > - /* This entry in the table wasn't filled out! */ > - return -EFAULT; > - > - /* get the cpuid leaf containing the desired feature */ > - rte_cpu_get_features(feat->leaf, feat->subleaf, regs); > - > - /* check if the feature is enabled */ > - return (regs[feat->reg] >> feat->bit) & 1; > -} > +#include "generic/rte_cpuflags.h" > > #ifdef __cplusplus > } > diff --git a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h > index a415857..1849b52 100644 > --- a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h > +++ b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h > @@ -37,18 +37,6 @@ > extern "C" { > #endif > > -#include > -#include > -#include > -#include > - > -#include "generic/rte_cpuflags.h" > - > -/* software based registers */ > -enum cpu_register_t { > - REG_DUMMY = 0 > -}; > - > /** > * Enumeration of all CPU features supported > */ > @@ -56,24 +44,7 @@ enum rte_cpu_flag_t { > RTE_CPUFLAG_NUMFLAGS /**< This should always be the last! */ > }; > > -/* > - * Read AUXV software register and get cpu features for Power > - */ > -static inline void > -rte_cpu_get_features(__attribute__((unused)) uint32_t leaf, > - __attribute__((unused)) uint32_t subleaf, > - __attribute__((unused)) cpuid_registers_t out) > -{ > -} > - > -/* > - * Checks if a particular flag is available on current machine. > - */ > -static inline int > -rte_cpu_get_flag_enabled(__attribute__((unused)) enum rte_cpu_flag_t feature) > -{ > - return -ENOENT; > -} > +#include "generic/rte_cpuflags.h" > > #ifdef __cplusplus > } > diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h > index 120ea24..26204fa 100644 > --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h > +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h > @@ -38,15 +38,6 @@ > extern "C" { > #endif > > -#include > -#include > -#include > -#include > - > -#include "generic/rte_cpuflags.h" > - > -extern const struct feature_entry rte_cpu_feature_table[]; > - > enum rte_cpu_flag_t { > /* (EAX 01h) ECX features*/ > RTE_CPUFLAG_SSE3 = 0, /**< SSE3 */ > @@ -153,64 +144,7 @@ enum rte_cpu_flag_t { > RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */ > }; > > -enum cpu_register_t { > - RTE_REG_EAX = 0, > - RTE_REG_EBX, > - RTE_REG_ECX, > - RTE_REG_EDX, > -}; > - > -static inline void > -rte_cpu_get_features(uint32_t leaf, uint32_t subleaf, cpuid_registers_t out) > -{ > -#if defined(__i386__) && defined(__PIC__) > - /* %ebx is a forbidden register if we compile with -fPIC or -fPIE */ > - asm volatile("movl %%ebx,%0 ; cpuid ; xchgl %%ebx,%0" > - : "=r" (out[RTE_REG_EBX]), > - "=a" (out[RTE_REG_EAX]), > - "=c" (out[RTE_REG_ECX]), > - "=d" (out[RTE_REG_EDX]) > - : "a" (leaf), "c" (subleaf)); > -#else > - > - asm volatile("cpuid" > - : "=a" (out[RTE_REG_EAX]), > - "=b" (out[RTE_REG_EBX]), > - "=c" (out[RTE_REG_ECX]), > - "=d" (out[RTE_REG_EDX]) > - : "a" (leaf), "c" (subleaf)); > - > -#endif > -} > - > -static inline int > -rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature) > -{ > - const struct feature_entry *feat; > - cpuid_registers_t regs; > - > - > - if (feature >= RTE_CPUFLAG_NUMFLAGS) > - /* Flag does not match anything in the feature tables */ > - return -ENOENT; > - > - feat = &rte_cpu_feature_table[feature]; > - > - if (!feat->leaf) > - /* This entry in the table wasn't filled out! */ > - return -EFAULT; > - > - rte_cpu_get_features(feat->leaf & 0xffff0000, 0, regs); > - if (((regs[RTE_REG_EAX] ^ feat->leaf) & 0xffff0000) || > - regs[RTE_REG_EAX] < feat->leaf) > - return 0; > - > - /* get the cpuid leaf containing the desired feature */ > - rte_cpu_get_features(feat->leaf, feat->subleaf, regs); > - > - /* check if the feature is enabled */ > - return (regs[feat->reg] >> feat->bit) & 1; > -} > +#include "generic/rte_cpuflags.h" > > #ifdef __cplusplus > } > diff --git a/lib/librte_eal/common/include/generic/rte_cpuflags.h b/lib/librte_eal/common/include/generic/rte_cpuflags.h > index 3ca2e36..c1da357 100644 > --- a/lib/librte_eal/common/include/generic/rte_cpuflags.h > +++ b/lib/librte_eal/common/include/generic/rte_cpuflags.h > @@ -39,10 +39,7 @@ > * Architecture specific API to determine available CPU features at runtime. > */ > > -#include > -#include > #include > -#include > > /** > * Enumeration of all CPU features supported > @@ -50,49 +47,6 @@ > enum rte_cpu_flag_t; > > /** > - * Enumeration of CPU registers > - */ > -#ifdef __DOXYGEN__ > -enum cpu_register_t; > -#endif > - > -typedef uint32_t cpuid_registers_t[4]; > - > -#define CPU_FLAG_NAME_MAX_LEN 64 > - > -/** > - * Struct to hold a processor feature entry > - */ > -struct feature_entry { > - uint32_t leaf; /**< cpuid leaf */ > - uint32_t subleaf; /**< cpuid subleaf */ > - uint32_t reg; /**< cpuid register */ > - uint32_t bit; /**< cpuid register bit */ > - char name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */ > -}; > - > -#define FEAT_DEF(name, leaf, subleaf, reg, bit) \ > - [RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name }, > - > -/** > - * An array that holds feature entries > - * > - * Defined in arch-specific rte_cpuflags.h. > - */ > -#ifdef __DOXYGEN__ > -static const struct feature_entry cpu_feature_table[]; > -#endif > - > -/** > - * Execute CPUID instruction and get contents of a specific register > - * > - * This function, when compiled with GCC, will generate architecture-neutral > - * code, as per GCC manual. > - */ > -static inline void > -rte_cpu_get_features(uint32_t leaf, uint32_t subleaf, cpuid_registers_t out); > - > -/** > * Get name of CPU flag > * > * @param feature > @@ -114,10 +68,8 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature); > * 0 if flag is not available > * -ENOENT if flag is invalid > */ > -#ifdef __DOXYGEN__ > -static inline int > +int > rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature); > -#endif > > /** > * This function checks that the currently used CPU supports the CPU features > diff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map b/lib/librte_eal/linuxapp/eal/rte_eal_version.map > index 48e8e4f..440fac2 100644 > --- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map > +++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map > @@ -145,6 +145,5 @@ DPDK_2.3 { > rte_cpu_get_flag_name; > rte_eal_pci_map_device; > rte_eal_pci_unmap_device; > - rte_cpu_feature_table; > > } DPDK_2.2; > -- > 2.7.0 >