From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id B44012946 for ; Wed, 16 Mar 2016 12:14:58 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP; 16 Mar 2016 04:14:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,344,1455004800"; d="scan'208";a="925243914" Received: from bricha3-mobl3.ger.corp.intel.com ([10.237.221.44]) by fmsmga001.fm.intel.com with SMTP; 16 Mar 2016 04:14:56 -0700 Received: by (sSMTP sendmail emulation); Wed, 16 Mar 2016 11:14:55 +0025 Date: Wed, 16 Mar 2016 11:14:54 +0000 From: Bruce Richardson To: Jianbo Liu Cc: "Lu, Wenzhuo" , "Zhang, Helin" , "Ananyev, Konstantin" , "dev@dpdk.org" Message-ID: <20160316111454.GB24668@bricha3-MOBL3> References: <1457965558-15331-1-git-send-email-jianbo.liu@linaro.org> <6A0DE07E22DDAD4C9103DF62FEBC09090343BBF2@shsmsx102.ccr.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Shannon Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [dpdk-dev] [PATCH] ixgbe: avoid unnessary break when checking at the tail of rx hwring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Mar 2016 11:14:59 -0000 On Wed, Mar 16, 2016 at 03:51:53PM +0800, Jianbo Liu wrote: > Hi Wenzhuo, > > On 16 March 2016 at 14:06, Lu, Wenzhuo wrote: > > HI Jianbo, > > > > > >> -----Original Message----- > >> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jianbo Liu > >> Sent: Monday, March 14, 2016 10:26 PM > >> To: Zhang, Helin; Ananyev, Konstantin; dev@dpdk.org > >> Cc: Jianbo Liu > >> Subject: [dpdk-dev] [PATCH] ixgbe: avoid unnessary break when checking at the > >> tail of rx hwring > >> > >> When checking rx ring queue, it's possible that loop will break at the tail while > >> there are packets still in the queue header. > > Would you like to give more details about in what scenario this issue will be hit? Thanks. > > > > vPMD will place extra RTE_IXGBE_DESCS_PER_LOOP - 1 number of empty > descriptiors at the end of hwring to avoid overflow when do checking > on rx side. > > For the loop in _recv_raw_pkts_vec(), we check 4 descriptors each > time. If all 4 DD are set, and all 4 packets are received.That's OK in > the middle. > But if come to the end of hwring, and less than 4 descriptors left, we > still need to check 4 descriptors at the same time, so the extra empty > descriptors are checked with them. > This time, the number of received packets is apparently less than 4, > and we break out of the loop because of the condition "var != > RTE_IXGBE_DESCS_PER_LOOP". > So the problem arises. It is possible that there could be more packets > at the hwring beginning that still waiting for being received. > I think this fix can avoid this situation, and at least reduce the > latency for the packets in the header. > Packets are always received in order from the NIC, so no packets ever get left behind or skipped on an RX burst call. /Bruce