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Date: Tue, 22 Mar 2016 16:35:08 +0000
From: Bruce Richardson <bruce.richardson@intel.com>
To: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Cc: dev@dpdk.org
Message-ID: <20160322163507.GB20448@bricha3-MOBL3>
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Subject: Re: [dpdk-dev] [PATCH v3 0/5] Implement missing features in mlx5
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On Thu, Mar 17, 2016 at 04:38:53PM +0100, Adrien Mazarguil wrote:
> This patchset adds to mlx5 a few features available in mlx4 (TX from
> secondary processes) or provided by Verbs (support for HW packet padding,
> TX VLAN insertion).
> 
> Release notes and documentation are updated accordingly.
> 
> Changes in v3:
> - Removed compilation option for TX VLAN insertion, the method to use is now
>   determined at runtime.
> - Modified releases notes slightly.
> 
> Changes in v2:
> - Added support for CRC stripping configuration.
> - Updated packet padding feature macro and made cosmetic changes to its
>   implementation to match CRC stripping's.
> - Updated release notes about packet padding.
> - Updated TX VLAN insertion documentation.
> 
> Olga Shern (2):
>   mlx5: add RX CRC stripping configuration
>   mlx5: add support for HW packet padding
> 
> Or Ami (2):
>   mlx5: add callbacks to support link (up / down) changes
>   mlx5: allow operation in secondary processes
> 
> Yaacov Hazan (1):
>   mlx5: add VLAN insertion offload
>
Applied to dpdk-next-net/rel_16_04.

/Bruce