* [dpdk-dev] [PATCH] ixgbe: configure VLAN TPID
@ 2016-04-21 8:57 Beilei Xing
2016-06-03 2:58 ` [dpdk-dev] [PATCH v2] " Beilei Xing
0 siblings, 1 reply; 8+ messages in thread
From: Beilei Xing @ 2016-04-21 8:57 UTC (permalink / raw)
To: helin.zhang; +Cc: dev, wenzhuo.lu, Beilei Xing
The patch enables configuring the ether types of both inner and
outer VLANs.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
drivers/net/ixgbe/ixgbe_ethdev.c | 29 +++++++++++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 3f1ebc1..c2c4154 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -157,6 +157,8 @@ enum ixgbevf_xcast_modes {
IXGBEVF_XCAST_MODE_ALLMULTI,
};
+#define IXGBE_EXVET_VET_EXT_SHIFT 16
+
static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
static int ixgbe_dev_configure(struct rte_eth_dev *dev);
@@ -1575,11 +1577,34 @@ ixgbe_vlan_tpid_set(struct rte_eth_dev *dev,
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
int ret = 0;
+ uint32_t reg;
+ uint32_t qinq;
+
+ qinq = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ qinq &= IXGBE_DMATXCTL_GDV;
switch (vlan_type) {
case ETH_VLAN_TYPE_INNER:
- /* Only the high 16-bits is valid */
- IXGBE_WRITE_REG(hw, IXGBE_EXVET, tpid << 16);
+ if (qinq) {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ } else {
+ PMD_DRV_LOG(ERR, "not set QinQ on yet\n");
+ ret = -EIO;
+ }
+ break;
+ case ETH_VLAN_TYPE_OUTER:
+ if (qinq) {
+ /* Only the high 16-bits is valid */
+ IXGBE_WRITE_REG(hw, IXGBE_EXVET, (uint32_t)tpid <<
+ IXGBE_EXVET_VET_EXT_SHIFT);
+ } else {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ }
+
break;
default:
ret = -EINVAL;
--
2.5.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH v2] ixgbe: configure VLAN TPID
2016-04-21 8:57 [dpdk-dev] [PATCH] ixgbe: configure VLAN TPID Beilei Xing
@ 2016-06-03 2:58 ` Beilei Xing
2016-06-03 3:33 ` Lu, Wenzhuo
2016-06-14 7:20 ` [dpdk-dev] [PATCH v3] " Beilei Xing
0 siblings, 2 replies; 8+ messages in thread
From: Beilei Xing @ 2016-06-03 2:58 UTC (permalink / raw)
To: wenzhuo.lu; +Cc: dev, Beilei Xing
The patch enables configuring the ether types of both inner and
outer VLANs.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
v2 changes:
Modify return value. since inner tpid is not supported by single vlan,
return -ENOTSUP.
Change meanning of function vlan_tpid_set.
drivers/net/ixgbe/ixgbe_ethdev.c | 30 ++++++++++++++++++++++++++++--
lib/librte_ether/rte_ethdev.h | 4 ++--
2 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index a2b170b..0fe0dc4 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -157,6 +157,8 @@ enum ixgbevf_xcast_modes {
IXGBEVF_XCAST_MODE_ALLMULTI,
};
+#define IXGBE_EXVET_VET_EXT_SHIFT 16
+
static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
static int ixgbe_dev_configure(struct rte_eth_dev *dev);
@@ -1576,11 +1578,35 @@ ixgbe_vlan_tpid_set(struct rte_eth_dev *dev,
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
int ret = 0;
+ uint32_t reg;
+ uint32_t qinq;
+
+ qinq = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ qinq &= IXGBE_DMATXCTL_GDV;
switch (vlan_type) {
case ETH_VLAN_TYPE_INNER:
- /* Only the high 16-bits is valid */
- IXGBE_WRITE_REG(hw, IXGBE_EXVET, tpid << 16);
+ if (qinq) {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ } else {
+ ret = -ENOTSUP;
+ PMD_DRV_LOG(ERR, "Inner type is not supported"
+ " by single vlan\n");
+ }
+ break;
+ case ETH_VLAN_TYPE_OUTER:
+ if (qinq) {
+ /* Only the high 16-bits is valid */
+ IXGBE_WRITE_REG(hw, IXGBE_EXVET, (uint32_t)tpid <<
+ IXGBE_EXVET_VET_EXT_SHIFT);
+ } else {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ }
+
break;
default:
ret = -EINVAL;
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 2757510..57855f4 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1124,7 +1124,7 @@ typedef int (*vlan_filter_set_t)(struct rte_eth_dev *dev,
typedef int (*vlan_tpid_set_t)(struct rte_eth_dev *dev,
enum rte_vlan_type type, uint16_t tpid);
-/**< @internal set the outer VLAN-TPID by an Ethernet device. */
+/**< @internal set the outer/inner VLAN-TPID by an Ethernet device. */
typedef void (*vlan_offload_set_t)(struct rte_eth_dev *dev, int mask);
/**< @internal set VLAN offload function by an Ethernet device. */
@@ -1408,7 +1408,7 @@ struct eth_dev_ops {
/**< Get packet types supported and identified by device*/
mtu_set_t mtu_set; /**< Set MTU. */
vlan_filter_set_t vlan_filter_set; /**< Filter VLAN Setup. */
- vlan_tpid_set_t vlan_tpid_set; /**< Outer VLAN TPID Setup. */
+ vlan_tpid_set_t vlan_tpid_set; /**< Outer/Inner VLAN TPID Setup. */
vlan_strip_queue_set_t vlan_strip_queue_set; /**< VLAN Stripping on queue. */
vlan_offload_set_t vlan_offload_set; /**< Set VLAN Offload. */
vlan_pvid_set_t vlan_pvid_set; /**< Set port based TX VLAN insertion */
--
2.5.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH v2] ixgbe: configure VLAN TPID
2016-06-03 2:58 ` [dpdk-dev] [PATCH v2] " Beilei Xing
@ 2016-06-03 3:33 ` Lu, Wenzhuo
2016-06-14 7:20 ` [dpdk-dev] [PATCH v3] " Beilei Xing
1 sibling, 0 replies; 8+ messages in thread
From: Lu, Wenzhuo @ 2016-06-03 3:33 UTC (permalink / raw)
To: Xing, Beilei; +Cc: dev
Hi,
> -----Original Message-----
> From: Xing, Beilei
> Sent: Friday, June 3, 2016 10:58 AM
> To: Lu, Wenzhuo
> Cc: dev@dpdk.org; Xing, Beilei
> Subject: [PATCH v2] ixgbe: configure VLAN TPID
>
> The patch enables configuring the ether types of both inner and outer VLANs.
>
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH v3] ixgbe: configure VLAN TPID
2016-06-03 2:58 ` [dpdk-dev] [PATCH v2] " Beilei Xing
2016-06-03 3:33 ` Lu, Wenzhuo
@ 2016-06-14 7:20 ` Beilei Xing
2016-06-14 7:53 ` Lu, Wenzhuo
` (2 more replies)
1 sibling, 3 replies; 8+ messages in thread
From: Beilei Xing @ 2016-06-14 7:20 UTC (permalink / raw)
To: wenzhuo.lu; +Cc: dev, Beilei Xing
The patch enables configuring the ether types of both inner and
outer VLANs.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
v3 changes:
Fix inserting vlan tpid issue for Tx.
drivers/net/ixgbe/ixgbe_ethdev.c | 39 +++++++++++++++++++++++++++++++++++++--
lib/librte_ether/rte_ethdev.h | 4 ++--
2 files changed, 39 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index a2b170b..30853fe 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -157,6 +157,9 @@ enum ixgbevf_xcast_modes {
IXGBEVF_XCAST_MODE_ALLMULTI,
};
+#define IXGBE_EXVET_VET_EXT_SHIFT 16
+#define IXGBE_DMATXCTL_VT_MASK 0xFFFF0000
+
static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
static int ixgbe_dev_configure(struct rte_eth_dev *dev);
@@ -1576,11 +1579,43 @@ ixgbe_vlan_tpid_set(struct rte_eth_dev *dev,
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
int ret = 0;
+ uint32_t reg;
+ uint32_t qinq;
+
+ qinq = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ qinq &= IXGBE_DMATXCTL_GDV;
switch (vlan_type) {
case ETH_VLAN_TYPE_INNER:
- /* Only the high 16-bits is valid */
- IXGBE_WRITE_REG(hw, IXGBE_EXVET, tpid << 16);
+ if (qinq) {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ reg = (reg & (~IXGBE_DMATXCTL_VT_MASK))
+ | ((uint32_t)tpid << IXGBE_DMATXCTL_VT_SHIFT);
+ IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg);
+ } else {
+ ret = -ENOTSUP;
+ PMD_DRV_LOG(ERR, "Inner type is not supported"
+ " by single vlan\n");
+ }
+ break;
+ case ETH_VLAN_TYPE_OUTER:
+ if (qinq) {
+ /* Only the high 16-bits is valid */
+ IXGBE_WRITE_REG(hw, IXGBE_EXVET, (uint32_t)tpid <<
+ IXGBE_EXVET_VET_EXT_SHIFT);
+ } else {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ reg = (reg & (~IXGBE_DMATXCTL_VT_MASK))
+ | ((uint32_t)tpid << IXGBE_DMATXCTL_VT_SHIFT);
+ IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg);
+ }
+
break;
default:
ret = -EINVAL;
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 2757510..57855f4 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1124,7 +1124,7 @@ typedef int (*vlan_filter_set_t)(struct rte_eth_dev *dev,
typedef int (*vlan_tpid_set_t)(struct rte_eth_dev *dev,
enum rte_vlan_type type, uint16_t tpid);
-/**< @internal set the outer VLAN-TPID by an Ethernet device. */
+/**< @internal set the outer/inner VLAN-TPID by an Ethernet device. */
typedef void (*vlan_offload_set_t)(struct rte_eth_dev *dev, int mask);
/**< @internal set VLAN offload function by an Ethernet device. */
@@ -1408,7 +1408,7 @@ struct eth_dev_ops {
/**< Get packet types supported and identified by device*/
mtu_set_t mtu_set; /**< Set MTU. */
vlan_filter_set_t vlan_filter_set; /**< Filter VLAN Setup. */
- vlan_tpid_set_t vlan_tpid_set; /**< Outer VLAN TPID Setup. */
+ vlan_tpid_set_t vlan_tpid_set; /**< Outer/Inner VLAN TPID Setup. */
vlan_strip_queue_set_t vlan_strip_queue_set; /**< VLAN Stripping on queue. */
vlan_offload_set_t vlan_offload_set; /**< Set VLAN Offload. */
vlan_pvid_set_t vlan_pvid_set; /**< Set port based TX VLAN insertion */
--
2.5.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH v3] ixgbe: configure VLAN TPID
2016-06-14 7:20 ` [dpdk-dev] [PATCH v3] " Beilei Xing
@ 2016-06-14 7:53 ` Lu, Wenzhuo
2016-06-23 11:18 ` Bruce Richardson
2016-06-23 15:11 ` [dpdk-dev] [PATCH v4] " Beilei Xing
2 siblings, 0 replies; 8+ messages in thread
From: Lu, Wenzhuo @ 2016-06-14 7:53 UTC (permalink / raw)
To: Xing, Beilei; +Cc: dev
Hi,
> -----Original Message-----
> From: Xing, Beilei
> Sent: Tuesday, June 14, 2016 3:21 PM
> To: Lu, Wenzhuo
> Cc: dev@dpdk.org; Xing, Beilei
> Subject: [PATCH v3] ixgbe: configure VLAN TPID
>
> The patch enables configuring the ether types of both inner and outer
> VLANs.
>
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH v3] ixgbe: configure VLAN TPID
2016-06-14 7:20 ` [dpdk-dev] [PATCH v3] " Beilei Xing
2016-06-14 7:53 ` Lu, Wenzhuo
@ 2016-06-23 11:18 ` Bruce Richardson
2016-06-23 15:11 ` [dpdk-dev] [PATCH v4] " Beilei Xing
2 siblings, 0 replies; 8+ messages in thread
From: Bruce Richardson @ 2016-06-23 11:18 UTC (permalink / raw)
To: Beilei Xing; +Cc: wenzhuo.lu, dev
On Tue, Jun 14, 2016 at 03:20:44PM +0800, Beilei Xing wrote:
> The patch enables configuring the ether types of both inner and
> outer VLANs.
>
This patch also changes the behaviour for configuring the ether type of a single
vlan tag (as with the i40e patch we previously discussed). That must also be
reflected in the commit message.
/Bruce
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH v4] ixgbe: configure VLAN TPID
2016-06-14 7:20 ` [dpdk-dev] [PATCH v3] " Beilei Xing
2016-06-14 7:53 ` Lu, Wenzhuo
2016-06-23 11:18 ` Bruce Richardson
@ 2016-06-23 15:11 ` Beilei Xing
2016-06-24 16:34 ` Bruce Richardson
2 siblings, 1 reply; 8+ messages in thread
From: Beilei Xing @ 2016-06-23 15:11 UTC (permalink / raw)
To: wenzhuo.lu; +Cc: dev, Beilei Xing
Previously, a single VLAN header is treated as inner VLAN,
but generally, a single VLAN header is treated as the outer
VLAN header.
The patch fixes the ether type of a single VLAN type, and
enables configuring inner and outer TPID for double VLAN.
Fixes: 19b16e2f6442 ("ethdev: add vlan type when setting ether type")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
v4 changes:
Update commit log.
v3 changes:
Fix inserting vlan tpid issue for Tx.
drivers/net/ixgbe/ixgbe_ethdev.c | 41 +++++++++++++++++++++++++++++++++++++---
lib/librte_ether/rte_ethdev.h | 4 ++--
2 files changed, 40 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index e11a431..a5427b4 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -157,6 +157,9 @@ enum ixgbevf_xcast_modes {
IXGBEVF_XCAST_MODE_ALLMULTI,
};
+#define IXGBE_EXVET_VET_EXT_SHIFT 16
+#define IXGBE_DMATXCTL_VT_MASK 0xFFFF0000
+
static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
static int ixgbe_dev_configure(struct rte_eth_dev *dev);
@@ -1584,15 +1587,47 @@ ixgbe_vlan_tpid_set(struct rte_eth_dev *dev,
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
int ret = 0;
+ uint32_t reg;
+ uint32_t qinq;
+
+ qinq = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ qinq &= IXGBE_DMATXCTL_GDV;
switch (vlan_type) {
case ETH_VLAN_TYPE_INNER:
- /* Only the high 16-bits is valid */
- IXGBE_WRITE_REG(hw, IXGBE_EXVET, tpid << 16);
+ if (qinq) {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ reg = (reg & (~IXGBE_DMATXCTL_VT_MASK))
+ | ((uint32_t)tpid << IXGBE_DMATXCTL_VT_SHIFT);
+ IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg);
+ } else {
+ ret = -ENOTSUP;
+ PMD_DRV_LOG(ERR, "Inner type is not supported"
+ " by single VLAN");
+ }
+ break;
+ case ETH_VLAN_TYPE_OUTER:
+ if (qinq) {
+ /* Only the high 16-bits is valid */
+ IXGBE_WRITE_REG(hw, IXGBE_EXVET, (uint32_t)tpid <<
+ IXGBE_EXVET_VET_EXT_SHIFT);
+ } else {
+ reg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
+ reg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;
+ IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, reg);
+ reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
+ reg = (reg & (~IXGBE_DMATXCTL_VT_MASK))
+ | ((uint32_t)tpid << IXGBE_DMATXCTL_VT_SHIFT);
+ IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg);
+ }
+
break;
default:
ret = -EINVAL;
- PMD_DRV_LOG(ERR, "Unsupported vlan type %d\n", vlan_type);
+ PMD_DRV_LOG(ERR, "Unsupported VLAN type %d", vlan_type);
break;
}
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 45482f1..d04ddec 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1157,7 +1157,7 @@ typedef int (*vlan_filter_set_t)(struct rte_eth_dev *dev,
typedef int (*vlan_tpid_set_t)(struct rte_eth_dev *dev,
enum rte_vlan_type type, uint16_t tpid);
-/**< @internal set the outer VLAN-TPID by an Ethernet device. */
+/**< @internal set the outer/inner VLAN-TPID by an Ethernet device. */
typedef void (*vlan_offload_set_t)(struct rte_eth_dev *dev, int mask);
/**< @internal set VLAN offload function by an Ethernet device. */
@@ -1443,7 +1443,7 @@ struct eth_dev_ops {
/**< Get packet types supported and identified by device*/
mtu_set_t mtu_set; /**< Set MTU. */
vlan_filter_set_t vlan_filter_set; /**< Filter VLAN Setup. */
- vlan_tpid_set_t vlan_tpid_set; /**< Outer VLAN TPID Setup. */
+ vlan_tpid_set_t vlan_tpid_set; /**< Outer/Inner VLAN TPID Setup. */
vlan_strip_queue_set_t vlan_strip_queue_set; /**< VLAN Stripping on queue. */
vlan_offload_set_t vlan_offload_set; /**< Set VLAN Offload. */
vlan_pvid_set_t vlan_pvid_set; /**< Set port based TX VLAN insertion */
--
2.5.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH v4] ixgbe: configure VLAN TPID
2016-06-23 15:11 ` [dpdk-dev] [PATCH v4] " Beilei Xing
@ 2016-06-24 16:34 ` Bruce Richardson
0 siblings, 0 replies; 8+ messages in thread
From: Bruce Richardson @ 2016-06-24 16:34 UTC (permalink / raw)
To: Beilei Xing; +Cc: wenzhuo.lu, dev
On Thu, Jun 23, 2016 at 11:11:58PM +0800, Beilei Xing wrote:
> Previously, a single VLAN header is treated as inner VLAN,
> but generally, a single VLAN header is treated as the outer
> VLAN header.
> The patch fixes the ether type of a single VLAN type, and
> enables configuring inner and outer TPID for double VLAN.
>
> Fixes: 19b16e2f6442 ("ethdev: add vlan type when setting ether type")
>
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Applied to dpdk-next-net/rel_16_07
/Bruce
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2016-06-24 16:34 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2016-04-21 8:57 [dpdk-dev] [PATCH] ixgbe: configure VLAN TPID Beilei Xing
2016-06-03 2:58 ` [dpdk-dev] [PATCH v2] " Beilei Xing
2016-06-03 3:33 ` Lu, Wenzhuo
2016-06-14 7:20 ` [dpdk-dev] [PATCH v3] " Beilei Xing
2016-06-14 7:53 ` Lu, Wenzhuo
2016-06-23 11:18 ` Bruce Richardson
2016-06-23 15:11 ` [dpdk-dev] [PATCH v4] " Beilei Xing
2016-06-24 16:34 ` Bruce Richardson
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