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> > > > #define prefetch(x) rte_prefetch0(x) > > > > -#define IXGBE_PCI_REG(reg) (*((volatile uint32_t *)(reg))) > > +#define IXGBE_PCI_REG(reg) ({ \ > > + uint32_t __val; \ > > + __val = rte_readl(reg); \ > > + __val; \ > > +}) > > > > static inline uint32_t ixgbe_read_addr(volatile void* addr) > > { > > return rte_le_to_cpu_32(IXGBE_PCI_REG(addr)); > > } > > > > -#define IXGBE_PCI_REG_WRITE(reg, value) do { \ > > - IXGBE_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \ > > -} while(0) > > +#define IXGBE_PCI_REG_WRITE(reg, value) ({ \ > > + rte_writel(rte_cpu_to_le_32(value), reg); \ > > +}) > > > > memory barrier operation is put inside IXGBE_PCI_REG_READ/WRITE in > your change, but I found rte_*mb is called before these macros in some > places. > Can you remove all these redundant calls? And please do the same > checking for other drivers. > Ok. Thinking of adding _relaxed_rd/wr style macro agnostic to arch for ixgbe case in particular. Such that for those code incident: x86 case> first default barrier + relaxed call. arm case> first default barrier + relaxed call. Does that make sense to you? If so then will take care in v2. Santosh. > > #define IXGBE_PCI_REG_ADDR(hw, reg) \ > > ((volatile uint32_t *)((char *)(hw)->hw_addr + (reg))) > > -- > > 2.5.5 > >