From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f50.google.com (mail-wm0-f50.google.com [74.125.82.50]) by dpdk.org (Postfix) with ESMTP id 680AB952 for ; Wed, 8 Feb 2017 18:03:33 +0100 (CET) Received: by mail-wm0-f50.google.com with SMTP id r141so194649304wmg.1 for ; Wed, 08 Feb 2017 09:03:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:date:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZUSYvv4HGHt3fv5jIQRLmor7e4LZ7vaJ63JUG1Wp3XE=; b=xHMsIzOAX+SwrrVQrNGHo8v4dE80wZF9JGhWORDlEWjYLNneKrciFDk1kFFma28c6H e2dXQ7SIwjfqhMUMgNR1Y/c5yJTcFdHEj7UFmTDZ2a03YtrlsokA5emltKjSB78t7+1b mUjFm9CkNVNcsKgPeP/15zSCs/MM+FAEDrtnzseioTqreCr9wBwOEwiSxeEdQAPpA75e L1CAyCreqgvUswqVLxf1meYoBvMzgtnFhtjTyqlHQzaPXcOFLW/d5ANmQ+UzEKX1qVrC Mig85CGKX9VCtkWj5q70UOob0ySAElvwJHj2kPxfwmECCR8gYTHI1EPC97RjPMvlBWdi nIsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:date:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZUSYvv4HGHt3fv5jIQRLmor7e4LZ7vaJ63JUG1Wp3XE=; b=l3WIBOPGqCWv740+gisg7GDQCUw6sXvhx4zSoB6H/lJpoUm1S9QsXFfmW+25wQU/5d SToM0dDoDmL4MnIegKGVW/n2plZ9WP7LK9Ts5QL5xe/56GPFmyUI2qvUMZfLxVHP9WHk Zju3hs7wFuuD8dGodPb7SZna38oXJ7ngbamQP9Ztkfsf41fYJO+IJcrOuPq9Y2SHQ8i1 d96KWA9fvCQP5VjSxkv5ZNf2s2Z45zBbsvNYYKLAP94n6p2A7MOmn5GQVg5SA9N/nYQP 1VJk2VPBEzYScbKQ2xrauxYzFkigAGe0WrwYT6ijYEpGPr/FDUZDnpB6N7l4gsf1M4Ow pC9Q== X-Gm-Message-State: AMke39n16gXaXqdEsEAW/DFSj3LVeJSSEe7+Thbz98ijbvBrw2T84HsbhHqVbnTnefiSk5bX X-Received: by 10.28.167.68 with SMTP id q65mr19966938wme.126.1486573412541; Wed, 08 Feb 2017 09:03:32 -0800 (PST) Received: from glumotte.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id g5sm14036038wrd.0.2017.02.08.09.03.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 08 Feb 2017 09:03:32 -0800 (PST) From: Olivier MATZ X-Google-Original-From: Olivier MATZ Date: Wed, 8 Feb 2017 18:03:25 +0100 To: "Dai, Wei" Cc: Laurent Hardy , "Zhang, Helin" , "Ananyev, Konstantin" , "dev@dpdk.org" Message-ID: <20170208180325.6e83f31c@glumotte.dev.6wind.com> In-Reply-To: <49759EB36A64CF4892C1AFEC9231E8D63A359376@PGSMSX106.gar.corp.intel.com> References: <1479403792-11928-1-git-send-email-laurent.hardy@6wind.com> <49759EB36A64CF4892C1AFEC9231E8D63A359376@PGSMSX106.gar.corp.intel.com> X-Mailer: Claws Mail 3.14.1 (GTK+ 2.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] net/ixgbe: ensure link status is updated X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2017 17:03:33 -0000 Hi Wei, On Wed, 8 Feb 2017 15:51:42 +0000, "Dai, Wei" wrote: > > -----Original Message----- > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Laurent Hardy > > Sent: Friday, November 18, 2016 1:30 AM > > To: Zhang, Helin ; Ananyev, Konstantin > > > > Cc: dev@dpdk.org > > Subject: [dpdk-dev] [PATCH] net/ixgbe: ensure link status is updated > > > > In case of link speed set to 1Gb at peer side (with autoneg or with > > defined speed) and cable not plugged-in when device is configured > > and started, then link status is not updated properly with new > > speed as no link setup is triggered. > > > > To avoid this issue, IXGBE_FLAG_NEED_LINK_CONFIG is set to try a > > link setup each time link_update() is triggered and current link > > status is down. When cable is plugged-in, link setup will be > > performed via ixgbe_setup_link(). > > > > Signed-off-by: Laurent Hardy > > --- > > drivers/net/ixgbe/ixgbe_ethdev.c | 20 ++++++++++++++++++++ > > drivers/net/ixgbe/ixgbe_ethdev.h | 1 + > > 2 files changed, 21 insertions(+) > > > > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > > b/drivers/net/ixgbe/ixgbe_ethdev.c > > index 52ebbe4..513d1d5 100644 > > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > > @@ -2095,6 +2095,7 @@ ixgbe_dev_configure(struct rte_eth_dev *dev) > > > > /* set flag to update link status after init */ > > intr->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; > > + intr->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; > > > > /* > > * Initialize to TRUE. If any of Rx queues doesn't meet > > the bulk @@ -3117,8 +3118,12 @@ ixgbe_dev_link_update(struct > > rte_eth_dev *dev, int wait_to_complete) > > struct ixgbe_hw *hw = > > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > > struct rte_eth_link link, old; > > ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_UNKNOWN; > > + struct ixgbe_interrupt *intr = > > + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > > int link_up; > > int diag; > > + u32 speed = 0; > > + bool autoneg = false; > > > > link.link_status = ETH_LINK_DOWN; > > link.link_speed = 0; > > @@ -3128,6 +3133,19 @@ ixgbe_dev_link_update(struct rte_eth_dev > > *dev, int wait_to_complete) > > > > hw->mac.get_link_status = true; > > > > + if (intr->flags & IXGBE_FLAG_NEED_LINK_CONFIG) { > > + speed = hw->phy.autoneg_advertised; > > + if (!speed) { > > + ixgbe_get_link_capabilities(hw, &speed, > > &autoneg); > > + /* setup the highest link when no autoneg > > */ > > + if (!autoneg) { > > + if (speed & > > IXGBE_LINK_SPEED_10GB_FULL) > > + speed = > > IXGBE_LINK_SPEED_10GB_FULL; > > + } > > + } > > + ixgbe_setup_link(hw, speed, true); > > + } > > + > > /* check if it needs to wait to complete, if lsc interrupt > > is enabled */ if (wait_to_complete == 0 || > > dev->data->dev_conf.intr_conf.lsc != 0) diag = ixgbe_check_link(hw, > > &link_speed, &link_up, 0); @@ -3145,10 +3163,12 @@ > > ixgbe_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) > > > > if (link_up == 0) { > > rte_ixgbe_dev_atomic_write_link_status(dev, &link); > > + intr->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; > > if (link.link_status == old.link_status) > > return -1; > > return 0; > > } > > + intr->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; > > link.link_status = ETH_LINK_UP; > > link.link_duplex = ETH_LINK_FULL_DUPLEX; > > > > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h > > b/drivers/net/ixgbe/ixgbe_ethdev.h > > index e060c3d..9d335ba 100644 > > --- a/drivers/net/ixgbe/ixgbe_ethdev.h > > +++ b/drivers/net/ixgbe/ixgbe_ethdev.h > > @@ -43,6 +43,7 @@ > > #define IXGBE_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0) > > #define IXGBE_FLAG_MAILBOX (uint32_t)(1 << 1) > > #define IXGBE_FLAG_PHY_INTERRUPT (uint32_t)(1 << 2) > > +#define IXGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 3) > > Now there is following macro in DPDK 17.02-rc2. > #define IXGBE_FLAG_MACSEC (uint32_t)(1 << 3) > You can redefine it as #define IXGBE_FLAG_NEED_LINK_CONFIG > (uint32_t)(1 << 4) Thanks, I'll send a v2. Do you agree with the rest of the patch? Regards, Olivier