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Therefore just remove the build > > > option and set the structures to be always split. For improved > > > performance use 128B rather than 64B alignment since it stops the producer > > > and consumer data being on adjacent cachelines. > > > > > > Signed-off-by: Bruce Richardson > > > --- > > > config/common_base | 1 - > > > doc/guides/rel_notes/release_17_05.rst | 6 ++++++ > > > lib/librte_ring/rte_ring.c | 2 -- > > > lib/librte_ring/rte_ring.h | 8 ++------ > > > 4 files changed, 8 insertions(+), 9 deletions(-) > > > > > > diff --git a/config/common_base b/config/common_base > > > index aeee13e..099ffda 100644 > > > --- a/config/common_base > > > +++ b/config/common_base > > > @@ -448,7 +448,6 @@ CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y > > > # > > > CONFIG_RTE_LIBRTE_RING=y > > > CONFIG_RTE_LIBRTE_RING_DEBUG=n > > > -CONFIG_RTE_RING_SPLIT_PROD_CONS=n > > > CONFIG_RTE_RING_PAUSE_REP_COUNT=0 > > > > > > # > > > diff --git a/doc/guides/rel_notes/release_17_05.rst b/doc/guides/rel_notes/release_17_05.rst > > > index e25ea9f..ea45e0c 100644 > > > --- a/doc/guides/rel_notes/release_17_05.rst > > > +++ b/doc/guides/rel_notes/release_17_05.rst > > > @@ -110,6 +110,12 @@ API Changes > > > Also, make sure to start the actual text at the margin. > > > ========================================================= > > > > > > +* **Reworked rte_ring library** > > > + > > > + The rte_ring library has been reworked and updated. The following changes > > > + have been made to it: > > > + > > > + * removed the build-time setting ``CONFIG_RTE_RING_SPLIT_PROD_CONS`` > > > > > > ABI Changes > > > ----------- > > > diff --git a/lib/librte_ring/rte_ring.c b/lib/librte_ring/rte_ring.c > > > index ca0a108..4bc6da1 100644 > > > --- a/lib/librte_ring/rte_ring.c > > > +++ b/lib/librte_ring/rte_ring.c > > > @@ -127,10 +127,8 @@ rte_ring_init(struct rte_ring *r, const char *name, unsigned count, > > > /* compilation-time checks */ > > > RTE_BUILD_BUG_ON((sizeof(struct rte_ring) & > > > RTE_CACHE_LINE_MASK) != 0); > > > -#ifdef RTE_RING_SPLIT_PROD_CONS > > > RTE_BUILD_BUG_ON((offsetof(struct rte_ring, cons) & > > > RTE_CACHE_LINE_MASK) != 0); > > > -#endif > > > RTE_BUILD_BUG_ON((offsetof(struct rte_ring, prod) & > > > RTE_CACHE_LINE_MASK) != 0); > > > #ifdef RTE_LIBRTE_RING_DEBUG > > > diff --git a/lib/librte_ring/rte_ring.h b/lib/librte_ring/rte_ring.h > > > index 72ccca5..04fe667 100644 > > > --- a/lib/librte_ring/rte_ring.h > > > +++ b/lib/librte_ring/rte_ring.h > > > @@ -168,7 +168,7 @@ struct rte_ring { > > > uint32_t mask; /**< Mask (size-1) of ring. */ > > > volatile uint32_t head; /**< Producer head. */ > > > volatile uint32_t tail; /**< Producer tail. */ > > > - } prod __rte_cache_aligned; > > > + } prod __rte_aligned(RTE_CACHE_LINE_SIZE * 2); > > > > I think we need to use RTE_CACHE_LINE_MIN_SIZE instead of > > RTE_CACHE_LINE_SIZE for alignment here. PPC and ThunderX1 targets are cache line > > size of 128B > > > Sure. > > However, can you perhaps try a performance test and check to see if > there is a performance difference between the two values before I change > it? In my tests I see improved performance by having an extra blank > cache-line between the producer and consumer data. Sure. Which test are you running to measure the performance difference? Is it app/test/test_ring_perf.c? > > /Bruce