Re: [dpdk-dev] [PATCH] eal: fix 64bit address alignment in 32-bit builds

[Bruce Richardson <bruce.richardson@intel.com>]

On Fri, Apr 28, 2017 at 09:15:51AM +0100, Bruce Richardson wrote:
> On i686 builds, the uint64_t type is 64-bits in size but is aligned to
> 32-bits only. This causes mbuf fields for rearm_data to not be 16-byte
> aligned on 32-bit builds, which causes errors with some vector PMDs which
> expect the rearm data to be aligned as on 64-bit.
> 
> Given that we cannot use the extra space in the data structures anyway, as
> it's already used on 64-bit builds, we can just force alignment of physical
> address structure members to 8-bytes in all cases. This has no effect on
> 64-bit systems, but fixes the updated PMDs on 32-bit.
> 
> Fixes: f4356d7ca168 ("net/i40e: eliminate mbuf write on rearm")
> Fixes: f160666a1073 ("net/ixgbe: eliminate mbuf write on rearm")
> 
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
>  lib/librte_eal/common/include/rte_memory.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/librte_eal/common/include/rte_memory.h b/lib/librte_eal/common/include/rte_memory.h
> index 4aa5d1f..ad14875 100644
> --- a/lib/librte_eal/common/include/rte_memory.h
> +++ b/lib/librte_eal/common/include/rte_memory.h
> @@ -98,7 +98,8 @@ enum rte_page_sizes {
>   */
>  #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
>  
> -typedef uint64_t phys_addr_t; /**< Physical address definition. */
> +/** Physical address definition. */
> +typedef uint64_t phys_addr_t __rte_aligned(sizeof(uint64_t));
>  #define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1)
>  

Note that this is obviously not the only way to fix the issues with the
PMDs, but it seems to me to be the simplest and most logical way to do
so. I've verified with testpmd that 
a) things still work for 64-bit, and
b) the md5sums of the testpmd 64-bit binary do not change before and
after the change, so it really only affects 32-bit builds.

Regards,
/Bruce