From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id B50961E34 for ; Fri, 28 Apr 2017 15:10:34 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Apr 2017 06:10:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,388,1488873600"; d="scan'208";a="1141325570" Received: from sivswdev01.ir.intel.com ([10.237.217.45]) by fmsmga001.fm.intel.com with ESMTP; 28 Apr 2017 06:10:28 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Date: Fri, 28 Apr 2017 14:10:14 +0100 Message-Id: <20170428131014.5137-1-bruce.richardson@intel.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20170428081551.28954-1-bruce.richardson@intel.com> References: <20170428081551.28954-1-bruce.richardson@intel.com> Subject: [dpdk-dev] [PATCH v2] mbuf: fix 64bit address alignment in 32-bit builds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Apr 2017 13:10:35 -0000 On i686 builds, the uin64_t type is 64-bits in size but is aligned to 32-bits only. This causes mbuf fields for rearm_data to not be 16-byte aligned on 32-bit builds, which causes errors with some vector PMDs which expect the rearm data to be aligned as on 64-bit. Given that we cannot use the extra space in the data structures anyway, as it's already used on 64-bit builds, we can just force alignment of the physical address in the mbuf to 8-bytes in all cases. This has no effect on 64-bit systems, but fixes the updated PMDs on 32-bit. Fixes: f4356d7ca168 ("net/i40e: eliminate mbuf write on rearm") Fixes: f160666a1073 ("net/ixgbe: eliminate mbuf write on rearm") Signed-off-by: Bruce Richardson --- v2: change alignment fix from being for all phys_addr_t vars to just the one in the mbuf structure. This is a lower risk fix. Additional patches promised to put in build-checks for alignment in vpmds will be sent separately. --- lib/librte_mbuf/rte_mbuf.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h index 9dd8e80..66f8013 100644 --- a/lib/librte_mbuf/rte_mbuf.h +++ b/lib/librte_mbuf/rte_mbuf.h @@ -403,7 +403,13 @@ struct rte_mbuf { MARKER cacheline0; void *buf_addr; /**< Virtual address of segment buffer. */ - phys_addr_t buf_physaddr; /**< Physical address of segment buffer. */ + /** + * Physical address of segment buffer. + * Force alignment to 8-bytes, so as to ensure we have the exact + * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes + * working on vector drivers easier. + */ + phys_addr_t buf_physaddr __rte_aligned(sizeof(phys_addr_t)); /* next 8 bytes are initialised on RX descriptor rearm */ MARKER64 rearm_data; -- 2.9.3