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Thu, 11 May 2017 14:33:42 +0000 From: Ashwin Sekhar T K To: jerin.jacob@caviumnetworks.com, thomas@monjalon.net, maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com, jianbo.liu@linaro.org, bruce.richardson@intel.com, pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com Cc: dev@dpdk.org, Ashwin Sekhar T K Date: Thu, 11 May 2017 07:33:15 -0700 Message-Id: <20170511143316.45835-6-ashwin.sekhar@caviumnetworks.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20170511143316.45835-1-ashwin.sekhar@caviumnetworks.com> References: <20170510101643.30556-2-ashwin.sekhar@caviumnetworks.com> <20170511143316.45835-1-ashwin.sekhar@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [50.233.148.156] X-ClientProxiedBy: BN6PR13CA0043.namprd13.prod.outlook.com (10.171.172.29) To BY2PR07MB2421.namprd07.prod.outlook.com (10.166.115.13) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 78c842ad-9435-4aee-8bec-08d4987ab9f5 X-Microsoft-Antispam: UriScan:; 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Signed-off-by: Ashwin Sekhar T K Reviewed-by: Jerin Jacob --- lib/librte_eal/common/include/arch/arm/rte_byteorder.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h index 1b312b306..0a29f4bb4 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h +++ b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h @@ -52,7 +52,7 @@ static inline uint16_t rte_arch_bswap16(uint16_t _x) { register uint16_t x = _x; - asm volatile ("rev16 %0,%1" + asm volatile ("rev16 %w0,%w1" : "=r" (x) : "r" (x) ); -- 2.12.2