From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f49.google.com (mail-wm0-f49.google.com [74.125.82.49]) by dpdk.org (Postfix) with ESMTP id BA9797D24 for ; Mon, 29 May 2017 16:05:47 +0200 (CEST) Received: by mail-wm0-f49.google.com with SMTP id m7so20054977wmg.0 for ; Mon, 29 May 2017 07:05:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=06vMZaBQSZYOdm1oCsA/3vFEltr7pIM49q86IE+u3IY=; b=XrVtV7uH8PWOBgb6p/25SinveEIiNQceGcoNGrT5T9wmhdk8VF8KmQULAYYXemFVE/ D1snjYFII0/Ca/HShosSYXjeCjtD33aljtg2ifQ89z74zj8td/vs+Q+eHjSsqxnlfoii PMx5vEoygtxeh4YknTZNtTATzGHgsmBkoJF/vHm/XIsx8BRT7Oy594v9kWegBi8LRKtl FzUFmyray7YeFjx0OzIdEHt+ZTjt1EatHmDIWTTs2NdAWZxVrH5jIE9fo75s+Hgudfmb bqpzynV7+wwkrzR4kC7zs9Zh6WR8rtr0iVvog+VMnJQP1SslC25yhQtwxbs7cdFA7SpY G1tQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=06vMZaBQSZYOdm1oCsA/3vFEltr7pIM49q86IE+u3IY=; b=D2FnRFqM9xHWQOY3xfU8EbJhfp1+4K4dMzCM68HNrG1ANxBD1PfF7xbQxV9NUwhRcT Rj3HTiCcJC8aQVBirUhNUmXMVlbMIgGh8VqPv5wI49vAVJ2VMRyx68TeNTpYnvIBKjAJ BOJDWubB/YmUJ2gdLVoLUuWVI7Fc3OF9hIT+UL6JZEttGSOo9FLmrtC2xdnB687BO2VW WD6kTnKK+EJ+Y8nzI2oWWBPxXeklpl33oFyIvH0/jTV7HK/c8iapE04VGNnRxwTPTGAR 0Xb7lpiXwyt+74RpM6Oqmp054qWLVsS5n3zVTpqrpwg/Szrqv1LsmcvcyIPUN/EAIhqq vd5Q== X-Gm-Message-State: AODbwcCdKmqcNJkxJY6rb5qMhNBXm5FAiJ8KYeCrj+3njzgcFZTsM9LI myscSOjnNBQLQkSwGCRcDw== X-Received: by 10.223.134.153 with SMTP id 25mr10360034wrx.29.1496066747486; Mon, 29 May 2017 07:05:47 -0700 (PDT) Received: from autoinstall.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id c8sm9621520wme.3.2017.05.29.07.05.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 May 2017 07:05:47 -0700 (PDT) Date: Mon, 29 May 2017 16:05:40 +0200 From: =?iso-8859-1?Q?N=E9lio?= Laranjeiro To: Shachar Beiser Cc: "dev@dpdk.org" , Adrien Mazarguil Message-ID: <20170529140540.GC31330@autoinstall.dev.6wind.com> References: <1495954160-983-1-git-send-email-shacharbe@mellanox.com> <1495954160-983-2-git-send-email-shacharbe@mellanox.com> <20170529130746.GB31330@autoinstall.dev.6wind.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [dpdk-dev] [PATCH] net/mlx5: implement drop action in hardware classifier X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 May 2017 14:05:48 -0000 >> From: Nélio Laranjeiro [mailto:nelio.laranjeiro@6wind.com] >> Sent: Monday, May 29, 2017 4:08 PM >> To: Shachar Beiser >> Cc: dev@dpdk.org; Adrien Mazarguil >> Subject: Re: [PATCH] net/mlx5: implement drop action in hardware classifier >> >> On Sun, May 28, 2017 at 06:49:20AM +0000, Shachar Beiser wrote: >> > The current drop action is implemented as a queue tail drop, >> > requiring to instantiate multiple WQs to maintain high drop rate. >> > This commit, implements the drop action in hardware classifier. >> > This enables to reduce the amount of contexts needed for the drop, >> > without affecting the drop rate. >> > >> > Signed-off-by: Shachar Beiser >> > --- >> > drivers/net/mlx5/Makefile | 5 +++++ >> > drivers/net/mlx5/mlx5_flow.c | 43 +++++++++++++++++++++++++++++++++++++++++++ >> > 2 files changed, 48 insertions(+) >> > >> > diff --git a/drivers/net/mlx5/Makefile b/drivers/net/mlx5/Makefile >> > index c079959..daf8013 100644 >> > --- a/drivers/net/mlx5/Makefile >> > +++ b/drivers/net/mlx5/Makefile >> > @@ -101,6 +101,11 @@ mlx5_autoconf.h.new: FORCE >> > mlx5_autoconf.h.new: $(RTE_SDK)/buildtools/auto-config-h.sh >> > $Q $(RM) -f -- '$@' >> > $Q sh -- '$<' '$@' \ >> > + HAVE_VERBS_IBV_EXP_FLOW_SPEC_ACTION_DROP \ >> > + infiniband/verbs_exp.h \ >> > + enum IBV_EXP_FLOW_SPEC_ACTION_DROP \ >> > + $(AUTOCONF_OUTPUT) >> > + $Q sh -- '$<' '$@' \ >> > HAVE_VERBS_IBV_EXP_CQ_COMPRESSED_CQE \ >> > infiniband/verbs_exp.h \ >> > enum IBV_EXP_CQ_COMPRESSED_CQE \ >> > diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c >> > index adcbe3f..e243d39 100644 >> > --- a/drivers/net/mlx5/mlx5_flow.c >> > +++ b/drivers/net/mlx5/mlx5_flow.c >> > @@ -994,6 +994,11 @@ struct mlx5_flow_action { >> > { >> > struct rte_flow *rte_flow; >> > >> > +#ifdef HAVE_VERBS_IBV_EXP_FLOW_SPEC_ACTION_DROP >> > + struct ibv_exp_flow_spec_action_drop *drop; >> > + unsigned int size = sizeof(struct ibv_exp_flow_spec_action_drop); >> > +#endif >> >> Extra empty line before the #ifdef >> >> > + >> > assert(priv->pd); >> > assert(priv->ctx); >> > rte_flow = rte_calloc(__func__, 1, sizeof(*rte_flow), 0); >> > @@ -1007,6 +1012,15 @@ struct mlx5_flow_action { >> > rte_flow->qp = priv->flow_drop_queue->qp; >> > if (!priv->started) >> > return rte_flow; >> > +#ifdef HAVE_VERBS_IBV_EXP_FLOW_SPEC_ACTION_DROP >> > + drop = (void *)((uintptr_t)flow->ibv_attr + flow->offset); >> > + *drop = (struct ibv_exp_flow_spec_action_drop){ >> > + .type = IBV_EXP_FLOW_SPEC_ACTION_DROP, >> > + .size = size, >> > + }; >> > + ++flow->ibv_attr->num_of_specs; >> > + flow->offset += sizeof(struct ibv_exp_flow_spec_action_drop); >> > +#endif >> > rte_flow->ibv_flow = ibv_exp_create_flow(rte_flow->qp, >> > rte_flow->ibv_attr); >> > if (!rte_flow->ibv_flow) { >> >[...] >> >> From what I see by just changing the value of MLX5_DROP_WQ_N when >> HAVE_VERBS_IBV_EXP_FLOW_SPEC_ACTION_DROP (in the same source file) >> limits the patch to this point. >> >> Am I missing something? >> >> Regards, > On Mon, May 29, 2017 at 01:35:57PM +0000, Shachar Beiser wrote: > The current firmware version does not implement queue tail drop > therefore queue allocation is not required by firmware. Unfortunately, > the ibverbs APIs requires to allocate WQ & CQ .In the future this > allocation will be saved . Right now, you are right. What I mean is, in your patch, what you need is the snippet I let above, and at compilation time you can update the MLX5_DROP_WQ_N to 1 (defined at 4 in the same file), this way the remaining code will only create a single CQ/WQ as you expect. This small snippet above plus 3 lines handles the job. Regards, PS: Avoid top answering on this mailing list. -- Nélio Laranjeiro 6WIND