From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f176.google.com (mail-pf0-f176.google.com [209.85.192.176]) by dpdk.org (Postfix) with ESMTP id 954A3567E for ; Wed, 5 Jul 2017 18:55:45 +0200 (CEST) Received: by mail-pf0-f176.google.com with SMTP id q86so132475088pfl.3 for ; Wed, 05 Jul 2017 09:55:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uZUWsXpsPrIxVZnuMbAGmNrOrgrDxffhgVKYnUUm0pQ=; b=ZtV8LcsrxwYIYbQ5J0n/8vOtANiYZAA4W3sgcfBy6e/xoFIeV3eGG3PAj9DRAH3+7g 7vJLye/jkrNgjvzYEcXMqj4q691M+LjwSTAWuuehEF/6EZ3+fmblZhM1980y/5G9qCyD ISxiCoARQQUeJxxb6ZRypW5zRpBkiBXvnImI9rYcTzZl6oek1vfsniME1vYv90PgZYWg Ub75vjJo01Ly82pj898aIv+tTvXC7+0g3DDvkMb65RLSEjZPWda9Juhp8mgogOzx01kZ gUccp618v47np/J3bRVsc/LyOtu3lK/evJ9+KF7E4OsLriucostIOZ8duatyYwE09zfF ++vg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uZUWsXpsPrIxVZnuMbAGmNrOrgrDxffhgVKYnUUm0pQ=; b=uQ7D7uBERyaSkDm+rjJFXgdneXld5bs6Sxla+mkbPeLTyqayKtgvRAr0+YieL5VCuQ Cc/4+ryLczKRXymGqo8dVO8W/SLE437DEXXyBzhkKq8QvqFq44TE0Zra69lYIOp5Emoe +QQMBz8Et1OpYxzvblrWsN3ILvlGyOBSqIJtIcZRHlXCJ9ejTnMjU1sXgnR7/gkOkSA8 KDrs0LQTgcNP5zInzsfjNjHVhhzbbEvOn1tBLxZndE7GXQu1OM7CRXZk+KDL4ix0kM1D rv83dCHsG9efqm4B5SucnpiTBFEqiWd7N91+J5aTsGNsQMwOxHrw/BGpzynp4XoknhMW GSrw== X-Gm-Message-State: AIVw110RfJTZvt+7OOwiEa/uaokXFvzKalSf6FyfBCd37p+jIBmHouHo 1mTSGSD1YgfzeEikbbWpow== X-Received: by 10.99.184.2 with SMTP id p2mr17833581pge.194.1499273744646; Wed, 05 Jul 2017 09:55:44 -0700 (PDT) Received: from xeon-e3.wavecable.com (76-14-207-240.or.wavecable.com. [76.14.207.240]) by smtp.gmail.com with ESMTPSA id o1sm47900914pgq.10.2017.07.05.09.55.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jul 2017 09:55:43 -0700 (PDT) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Stephen Hemminger Date: Wed, 5 Jul 2017 09:55:33 -0700 Message-Id: <20170705165533.20581-4-stephen@networkplumber.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170705165533.20581-1-stephen@networkplumber.org> References: <20170705165533.20581-1-stephen@networkplumber.org> Subject: [dpdk-dev] [PATCH v3 3/3] mlx4,5: handle 32 bit PCI domain X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Jul 2017 16:55:46 -0000 The PCI domain in Azure maybe 32 bits. When device is passed through the domain is synthesize from the internal GUID. The code that parses for PCI address in Mellanox drivers needs to use wider scanf format. Signed-off-by: Stephen Hemminger --- v3 - add MLX4 drivers/net/mlx4/mlx4.c | 2 +- drivers/net/mlx5/mlx5_ethdev.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 16cafae7d741..902a669c923a 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -5239,7 +5239,7 @@ mlx4_ibv_device_to_pci_addr(const struct ibv_device *device, /* Extract information. */ if (sscanf(line, "PCI_SLOT_NAME=" - "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", + "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", &pci_addr->domain, &pci_addr->bus, &pci_addr->devid, diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c index 96bccd5fd201..039335e2e470 100644 --- a/drivers/net/mlx5/mlx5_ethdev.c +++ b/drivers/net/mlx5/mlx5_ethdev.c @@ -1185,7 +1185,7 @@ mlx5_ibv_device_to_pci_addr(const struct ibv_device *device, /* Extract information. */ if (sscanf(line, "PCI_SLOT_NAME=" - "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", + "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", &pci_addr->domain, &pci_addr->bus, &pci_addr->devid, -- 2.11.0