From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f52.google.com (mail-wm0-f52.google.com [74.125.82.52]) by dpdk.org (Postfix) with ESMTP id 2B84B1B5FC for ; Fri, 3 Nov 2017 10:48:13 +0100 (CET) Received: by mail-wm0-f52.google.com with SMTP id p75so251627wmg.3 for ; Fri, 03 Nov 2017 02:48:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=tsMJwCfO26I9wWRzukcx446l7qOZk/bAMAkMc6x2Mnc=; b=hNjt8jRZbiZFe5SmTDOCJggz+B6sGDUN9pXsEq/llNIcUxdlXC8Fj+nqwqDXJn4awD FOjnTutLmZDod57bwTmXeiLwijU2BOGBYNtBA4rEuqaPGDyFPmCLjt9lifaFl+6n2fUc Y13hmfsx0MxS/1xSzFgh4Ut0Nvk1immtPEfPEF449cigkuZ7z5F81enS9FwTqHdDmZxc AiovBTpPuEAbKiKvbJ0oFqkXmykJ3o1bT6z6OCH4KGLUJahMesK64+3asyUSmPWk0Rx0 C48P8Kgb4Jg6Y6myoB1hjFdL3/SaS63Ninr2ZgaCFKRYURLbKx0SqV8CI/U7XxrcrnZ+ 3DuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=tsMJwCfO26I9wWRzukcx446l7qOZk/bAMAkMc6x2Mnc=; b=KMEOa2uU2n0au+G2Qfek7bx4UzZqc0GwR7r0jT96S6FDtu4rRh17Xgz9zgeh/PvwPQ SR4z4m/5RhtT89jfy4zVCWtQiFPh/1Pzt8dbf8GA61a/2tF92tEidc4d4x9QUbJcaD/D kXZPF5nOA4ic9Kz+TNPF2qJT2hCNr22LaRp48QN5TPXQq1vNhKNwJ6AWHSAs/Q9VvKZ0 sZ1IAbZX52Xek8ADgYs4TZ0vS9Bt6jhEbkdAtmbrrc0ggKT+qqTEtHLLlgUYtKnFBOFv 3Vm5n7PcvOt+qP0/G2krTJUHAEkXID1/4b3Fw5To7H8dDJ70fn9mjFQCnZCJpZpXqXof N6Sg== X-Gm-Message-State: AMCzsaUhH6kkUnoq5HiDoAKiW+aQfLU6AqYLOhneQJbhCSqPltTOkSgG iCCgIRrE93/XdgI3KaIBrWY+fA== X-Google-Smtp-Source: ABhQp+RIUycW6snSnXIx2RsATziaQgHFHOs+BtEMvChXA4TNfAlyTwMXDbFLgF1s/jGvG9G6wqPCMw== X-Received: by 10.80.189.205 with SMTP id z13mr8077100edh.184.1509702492768; Fri, 03 Nov 2017 02:48:12 -0700 (PDT) Received: from 6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id s6sm5130633edc.2.2017.11.03.02.48.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 Nov 2017 02:48:11 -0700 (PDT) Date: Fri, 3 Nov 2017 10:48:00 +0100 From: Adrien Mazarguil To: Ferruh Yigit Cc: Matan Azrad , dev@dpdk.org, Ophir Munk Message-ID: <20171103094800.GL24849@6wind.com> References: <1509358049-18854-1-git-send-email-matan@mellanox.com> <1509640971-8637-1-git-send-email-matan@mellanox.com> <3d518b9d-15dd-48b7-ae10-95f9de3c1cf1@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3d518b9d-15dd-48b7-ae10-95f9de3c1cf1@intel.com> Subject: Re: [dpdk-dev] [PATCH v5 0/8] net/mlx4: Tx path improvements X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 Nov 2017 09:48:13 -0000 On Thu, Nov 02, 2017 at 01:41:39PM -0700, Ferruh Yigit wrote: > On 11/2/2017 9:42 AM, Matan Azrad wrote: > > v1: > > This series is a follow-up of the new datapath implementation introduced in RC1. > > It is dedicated to Tx and improves the performance. > > > > v2: > > Change uint32_t be_lkey to rte_be32_t lkey > > > > v3: > > Rebase to 17.11-rc2. > > Remove "net/mlx4: save lkey in big-endian format" patch which degrade performance. > > Merge separate segment cases patches "net/mlx4: improve performance of one Tx segment" and "net/mlx4: separate Tx for multi-segments". > > "net/mlx4: inline more Tx functions" renamed to "net/mlx4: associate MR to MP in a short function". > > Leave bytes counter as old version. > > Add memory barrier improvement patch. > > Remove empty segment support. > > > > v4: > > Remove "net/mlx4: remove empty Tx segment support" patch. > > Add "fix ring wraparound compiler hint" patch. > > Add "fix HW memory optimizations careless" patch. > > Remove unnecessary IO memory barrier in completion function. > > Remove inline declaration of completion function. > > Fix unnecessary empty lines. > > Fix indetations. > > Move max=0 check removal to patch "remove duplicate handling in Tx burst" and rename the patch. > > Add performace improvement in patch "mitigate Tx path memory barriers" > > > > v5: > > Fix compilation issue in debug mode for patch "net/mlx4: associate MR to MP in a short function". > > Add missing includes in "net/mlx4: associate MR to MP in a short function". > > Add cq_uar as volatile too in "net/mlx4: fix HW memory optimizations careless". > > Fix indentation issues in "net/mlx4: separate Tx segment cases". > > > > > > Matan Azrad (7): > > net/mlx4: remove error flows from Tx fast path > > net/mlx4: fix ring wraparound compiler hint > > net/mlx4: merge Tx path functions > > net/mlx4: remove duplicate handling in Tx burst > > net/mlx4: separate Tx segment cases > > net/mlx4: fix HW memory optimizations careless > > net/mlx4: mitigate Tx path memory barriers > > > > Ophir Munk (1): > > net/mlx4: associate MR to MP in a short function > > Patches has been sent and acked, so I already have my answer, but just to double > check, these are not just fixes which normally rc3 should target, there are data > path updates and performance improvements. > > Can you please confirm you want these patches in at rc3 phase? > I will wait for your explicit approval before getting them. Yes, since they address a bunch of remaining performance issues, we'd like them included in v17.11 (otherwise we'll have to backport them for v17.11.1 anyway). Thanks Ferruh. -- Adrien Mazarguil 6WIND