From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-he1eur01on0044.outbound.protection.outlook.com [104.47.0.44]) by dpdk.org (Postfix) with ESMTP id EACE31B24E for ; Thu, 9 Nov 2017 05:57:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=MTxk/D0Fu9lhnhb8OL+DPL/tajaoFzi0wFTJMbgKUr4=; b=AlrsLeo/uT+umhNTztWdNfOY93uC/KqL71fijeXdUFKAoEKAfCnB9eP6XhC9Nd7ZyGBV0QRMBxSQyU3mgPNgL/f5HxxQSBMoCMVvlIrnZjvfospurjFZoYMGsKVq/BVeZGV7FCbPYeIP+H4FUCqPjEfmCxO2R4KSkD7goK5eHuY= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Jianbo.Liu@arm.com; Received: from arm.com (113.29.88.7) by AM5PR0801MB1346.eurprd08.prod.outlook.com (2603:10a6:203:1f::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.218.12; Thu, 9 Nov 2017 04:57:14 +0000 Date: Thu, 9 Nov 2017 12:56:03 +0800 From: Jianbo Liu To: Jia He Cc: Bruce Richardson , jerin.jacob@caviumnetworks.com, dev@dpdk.org, olivier.matz@6wind.com, konstantin.ananyev@intel.com, hemant.agrawal@nxp.com, jia.he@hxt-semitech.com Message-ID: <20171109045601.GA27104@arm.com> References: <1510121832-16439-1-git-send-email-hejianet@gmail.com> <20171108102814.GA7552@bricha3-MOBL3.ger.corp.intel.com> <9086316b-c16b-c42b-2d85-9b01fa2f66e1@gmail.com> <028263d0-44de-bd0c-c495-081588a0ad20@gmail.com> <20171109032145.GA26939@arm.com> MIME-Version: 1.0 Content-Type: text/plain; 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AM5PR0801MB1346; 6:uWh57NmJBB+a3Q31Ynce1rEzmxLiXHVHU/jjtb0Nlq2ABwLc4k+ynYaDqKhEZMscqoYrnEZfdgZeSbnyKjaPv413bY9g4SjAgkha2ZfMzt2zWe7xkKEJ0aQOSoR7gExxGr/YjFT+fBFep0hcaXhnIh2p1z9Nfl15dSB8AMthBPdNlQDwSUxJZjTGFLzXl3NfoWZvaQruPL57sY3Gg/xJh0FGM56JyMl+RyMz9CLA9Yhk4NQKNuokiFhmMoAC4IB6Sq5Gtgb6yI0ROYsPVeoi0I1ja1OuE4Fs1uAdNMDI6Gf8j4rwMo5LaM2cDQ/DFFVDSqehivm+4Q3O/sHSm3MIfYogUos+nek9NkdqDw+ImAQ=; 5:cGw8tGdEvSH9/Ayt6ilrd7v5GWam22XgwPz9xMJVwb869/RKlKheyqp6UthsKDk2lt6p8PvjPc8C0XaRrCHjSi0uspWRWQ/8oA67sFlYY4mf8UidSNOCsa4lDz5tZXuam3MPBVhIuNKOtmb2yqQWm7SfNFCf7i7WsZOHYl8+Rik=; 24:n9Vmn0wdxs5bwHE5y2LFsLoPLWsk+QvAs72iA8gmJN9mkBl6eSL1jrcEe9de2oUA1t9jYOSRSKAjdNUpmiecQc4M55nXMOh1lL1AClYU+DA=; 7:t7qw2qUl/veTaBWiDERW1sLgPKSS1ezvOKhnUIkqs7PxMfP+AEBU080njZW9zjixqDpLfyMjevYRB0/Ti3GwnB0GS1IVPRo8U7DWclEQEM3iORZbXqd9AS/7OhdCDJtXph0w1fYLnOzZ1OXy5qVcaRVtY0HeRAU+mG3vsERbrPhUCUGJFoGsrUa16TFEA2YE0LermAQmPPU8UAfWuv9khskZbZFO5VHSLBcjm9nwGWpzW20uT3fD+FNBG3KPDJwR SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2017 04:57:14.6308 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 868b776d-d072-4a63-16d7-08d5272e59d3 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0801MB1346 Subject: Re: [dpdk-dev] [PATCH 1/3] eal/arm64: remove the braces {} for dmb(), dsb() X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Nov 2017 04:57:21 -0000 The 11/09/2017 12:43, Jia He wrote: > Hi Jianbo > > > On 11/9/2017 11:21 AM, Jianbo Liu Wrote: > >The 11/09/2017 11:14, Jia He wrote: > >> > >>On 11/9/2017 9:22 AM, Jia He Wrote: > >>>Hi Bruce > >>> > >>> > >>>On 11/8/2017 6:28 PM, Bruce Richardson Wrote: > >>>>On Wed, Nov 08, 2017 at 06:17:10AM +0000, Jia He wrote: > >>>>>for the code as follows: > >>>>>if (condition) > >>>>> rte_smp_rmb(); > >>>>>else > >>>>> rte_smp_wmb(); > >>>>>Without this patch, compiler will report this error: > >>>>>error: 'else' without a previous 'if' > >>>>> > >>>>>Signed-off-by: Jia He > >>>>>Signed-off-by: jia.he@hxt-semitech.com > >>>>>--- > >>>>> lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 4 ++-- > >>>>> 1 file changed, 2 insertions(+), 2 deletions(-) > >>>>> > >>>>>diff --git > >>>>>a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h > >>>>>b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h > >>>>>index 0b70d62..38c3393 100644 > >>>>>--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h > >>>>>+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h > >>>>>@@ -43,8 +43,8 @@ extern "C" { > >>>>> #include "generic/rte_atomic.h" > >>>>> -#define dsb(opt) { asm volatile("dsb " #opt : : : "memory"); } > >>>>>-#define dmb(opt) { asm volatile("dmb " #opt : : : "memory"); } > >>>>>+#define dsb(opt) asm volatile("dsb " #opt : : : "memory"); > >>>>>+#define dmb(opt) asm volatile("dmb " #opt : : : "memory"); > >>>>Need to remove the trailing ";" I too I think. > >>>>Alternatively, to keep the braces, the standard practice is to use > >>>>do { ... } while(0) > >>>If trailing ";" is not removed > >>>the code: > >>>if (condition) > >>> rte_smp_rmb(); > >>>else > >>> anything(); > >>> > >Sorry, why not use two different functions as your conditions passed in > >are fixed in the calling functions. > Do you mean to split update_tail() into update_tail_enqueue() and > update_tail_dequeue()? Yes. So it's not need to change dsb/dmb. Jianbo IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.