[dpdk-dev] [PATCH 00/14] DPAA2 PMD fixes and enhancements

[dpdk-dev] [PATCH 00/14] DPAA2 PMD fixes and enhancements

[Hemant Agrawal]

This patch set contains some basic fixes, enhancements and optimzations
for DPAA2 driver.


Ashish Jain (1):
  net/dpaa2: align the frame size in MTU set

Hemant Agrawal (8):
  bus/fslmc: fix the cplusplus macro closure
  drivers: change the deprecated memseg physaddr to iova
  bus/fslmc: add support for dynamic iova for DPAA2 devices
  net/dpaa2: link status check as driver flag
  bus/fslmc: expose platform soc value register
  bus/fslmc: add qman HW fq query count API
  net/dpaa2: add Rx queue count support
  net/dpaa2: add VLAN insert offload

Nipun Gupta (5):
  bus/fslmc: add braces for pointers in macros
  net/dpaa2: add parse function for LX2 device
  net/dpaa2: optimize Rx path packet parsing
  net/dpaa2: optimize Tx path for best case
  net/dpaa2: prefetch the parse results from next fd

 drivers/bus/dpaa/rte_dpaa_bus.h                   |   6 +-
 drivers/bus/fslmc/Makefile                        |   3 +-
 drivers/bus/fslmc/fslmc_bus.c                     |  44 +++++
 drivers/bus/fslmc/fslmc_vfio.c                    |   5 +-
 drivers/bus/fslmc/portal/dpaa2_hw_dpio.c          |  42 ++---
 drivers/bus/fslmc/portal/dpaa2_hw_dpio.h          |   3 +
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h           |  74 +++++---
 drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h |  30 ++++
 drivers/bus/fslmc/qbman/qbman_debug.c             |  66 +++++++
 drivers/bus/fslmc/rte_bus_fslmc_version.map       |  10 ++
 drivers/bus/fslmc/rte_fslmc.h                     |  15 +-
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c       |   1 +
 drivers/crypto/dpaa_sec/dpaa_sec.c                |   8 +-
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h      |  20 +++
 drivers/net/dpaa2/dpaa2_ethdev.c                  |  66 +++++--
 drivers/net/dpaa2/dpaa2_ethdev.h                  |  27 +++
 drivers/net/dpaa2/dpaa2_rxtx.c                    | 207 +++++++++++++++++++---
 17 files changed, 524 insertions(+), 103 deletions(-)
 create mode 100644 drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
 create mode 100644 drivers/bus/fslmc/qbman/qbman_debug.c

-- 
2.7.4

[dpdk-dev] [PATCH 01/14] bus/fslmc: fix the cplusplus macro closure

[Hemant Agrawal]

Fixes: 10f1614f36a6 ("drivers: refactor DPAA2 object definition")

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/rte_fslmc.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/bus/fslmc/rte_fslmc.h b/drivers/bus/fslmc/rte_fslmc.h
index 4c32db6..0814e69 100644
--- a/drivers/bus/fslmc/rte_fslmc.h
+++ b/drivers/bus/fslmc/rte_fslmc.h
@@ -175,10 +175,6 @@ static void dpaa2initfn_ ##nm(void) \
 } \
 RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
 
-#ifdef __cplusplus
-}
-#endif
-
 /**
  * Register a DPAA2 MC Object driver.
  *
@@ -198,4 +194,8 @@ static void dpaa2objinitfn_ ##nm(void) \
 } \
 RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* _RTE_FSLMC_H_ */
-- 
2.7.4

[dpdk-dev] [PATCH 02/14] drivers: change the deprecated memseg physaddr to iova

[Hemant Agrawal]

DPAA and DPAA2 drivers were using memseg physaddr, which
has been deprecated.

Fixes: 7ba49d39f14c ("mem: rename segment address from physical to IOVA")
Cc: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/dpaa/rte_dpaa_bus.h         | 6 +++---
 drivers/bus/fslmc/fslmc_vfio.c          | 2 +-
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 8 ++++----
 drivers/crypto/dpaa_sec/dpaa_sec.c      | 8 ++++----
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/bus/dpaa/rte_dpaa_bus.h b/drivers/bus/dpaa/rte_dpaa_bus.h
index eafc944..bc933af 100644
--- a/drivers/bus/dpaa/rte_dpaa_bus.h
+++ b/drivers/bus/dpaa/rte_dpaa_bus.h
@@ -113,10 +113,10 @@ static inline void *rte_dpaa_mem_ptov(phys_addr_t paddr)
 	int i;
 
 	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr != NULL; i++) {
-		if (paddr >= memseg[i].phys_addr && paddr <
-			memseg[i].phys_addr + memseg[i].len)
+		if (paddr >= memseg[i].iova && paddr <
+			memseg[i].iova + memseg[i].len)
 			return (uint8_t *)(memseg[i].addr) +
-			       (paddr - memseg[i].phys_addr);
+			       (paddr - memseg[i].iova);
 	}
 
 	return NULL;
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 25c87ad..e47215c 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -249,7 +249,7 @@ int rte_fslmc_vfio_dmamap(void)
 		dma_map.size = memseg[i].len;
 		dma_map.vaddr = memseg[i].addr_64;
 #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
-		dma_map.iova = memseg[i].phys_addr;
+		dma_map.iova = memseg[i].iova;
 #else
 		dma_map.iova = dma_map.vaddr;
 #endif
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index c1b842f..ece1a7d 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -284,10 +284,10 @@ static void *dpaa2_mem_ptov(phys_addr_t paddr)
 	int i;
 
 	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
-		if (paddr >= memseg[i].phys_addr &&
-		   (char *)paddr < (char *)memseg[i].phys_addr + memseg[i].len)
+		if (paddr >= memseg[i].iova &&
+		   (char *)paddr < (char *)memseg[i].iova + memseg[i].len)
 			return (void *)(memseg[i].addr_64
-				+ (paddr - memseg[i].phys_addr));
+				+ (paddr - memseg[i].iova));
 	}
 	return NULL;
 }
@@ -301,7 +301,7 @@ static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
 	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
 		if (vaddr >= memseg[i].addr_64 &&
 		    vaddr < memseg[i].addr_64 + memseg[i].len)
-			return memseg[i].phys_addr
+			return memseg[i].iova
 				+ (vaddr - memseg[i].addr_64);
 	}
 	return (phys_addr_t)(NULL);
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 16155b1..438dd3b 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -121,7 +121,7 @@ dpaa_mem_vtop(void *vaddr)
 	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
 		if (vaddr_64 >= memseg[i].addr_64 &&
 		    vaddr_64 < memseg[i].addr_64 + memseg[i].len) {
-			paddr = memseg[i].phys_addr +
+			paddr = memseg[i].iova +
 				(vaddr_64 - memseg[i].addr_64);
 
 			return (rte_iova_t)paddr;
@@ -137,10 +137,10 @@ dpaa_mem_ptov(rte_iova_t paddr)
 	int i;
 
 	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
-		if (paddr >= memseg[i].phys_addr &&
-		    (char *)paddr < (char *)memseg[i].phys_addr + memseg[i].len)
+		if (paddr >= memseg[i].iova &&
+		    (char *)paddr < (char *)memseg[i].iova + memseg[i].len)
 			return (void *)(memseg[i].addr_64 +
-					(paddr - memseg[i].phys_addr));
+					(paddr - memseg[i].iova));
 	}
 	return NULL;
 }
-- 
2.7.4

Re: [dpdk-dev] [PATCH 02/14] drivers: change the deprecated memseg physaddr to iova

[santosh]

On Friday 08 December 2017 10:51 AM, Hemant Agrawal wrote:
> DPAA and DPAA2 drivers were using memseg physaddr, which
> has been deprecated.
>
> Fixes: 7ba49d39f14c ("mem: rename segment address from physical to IOVA")
> Cc: Santosh Shukla <santosh.shukla@caviumnetworks.com>
> Cc: stable@dpdk.org
>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---

LGTM:

Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Thanks.

[dpdk-dev] [PATCH 03/14] bus/fslmc: add support for dynamic iova for DPAA2 devices

[Hemant Agrawal]

This patch add support for dynamic iova detection for DPAA2
devices and use of virtual address in such cases.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/fslmc_bus.c               | 44 +++++++++++++++++++++++++++++
 drivers/bus/fslmc/fslmc_vfio.c              |  5 +++-
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     | 15 ++++++++--
 drivers/bus/fslmc/rte_bus_fslmc_version.map |  7 +++++
 drivers/bus/fslmc/rte_fslmc.h               |  3 ++
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c |  1 +
 drivers/net/dpaa2/dpaa2_ethdev.c            |  1 +
 7 files changed, 73 insertions(+), 3 deletions(-)

diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index 480857e..63c333a 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -51,6 +51,7 @@
 #define VFIO_IOMMU_GROUP_PATH "/sys/kernel/iommu_groups"
 
 struct rte_fslmc_bus rte_fslmc_bus;
+uint8_t dpaa2_virt_mode;
 
 static void
 cleanup_fslmc_device_list(void)
@@ -300,6 +301,9 @@ rte_fslmc_probe(void)
 		}
 	}
 
+	if (rte_eal_iova_mode() == RTE_IOVA_VA)
+		dpaa2_virt_mode = 1;
+
 	return 0;
 }
 
@@ -347,11 +351,51 @@ rte_fslmc_driver_unregister(struct rte_dpaa2_driver *driver)
 }
 
 /*
+ * All device has iova as va
+ */
+static inline int
+fslmc_all_device_support_iova(void)
+{
+	int ret = 0;
+	struct rte_dpaa2_device *dev;
+	struct rte_dpaa2_driver *drv;
+
+	TAILQ_FOREACH(dev, &rte_fslmc_bus.device_list, next) {
+		TAILQ_FOREACH(drv, &rte_fslmc_bus.driver_list, next) {
+			ret = rte_fslmc_match(drv, dev);
+			if (ret)
+				continue;
+			/* if the driver is not supporting IOVA */
+			if (!(drv->drv_flags & RTE_DPAA2_DRV_IOVA_AS_VA))
+				return 0;
+		}
+	}
+	return 1;
+}
+
+/*
  * Get iommu class of DPAA2 devices on the bus.
  */
 static enum rte_iova_mode
 rte_dpaa2_get_iommu_class(void)
 {
+	bool is_vfio_noiommu_enabled = 1;
+	bool has_iova_va;
+
+	if (TAILQ_EMPTY(&rte_fslmc_bus.device_list))
+		return RTE_IOVA_DC;
+
+	/* check if all devices on the bus support Virtual addressing or not */
+	has_iova_va = fslmc_all_device_support_iova();
+
+#ifdef VFIO_PRESENT
+	is_vfio_noiommu_enabled = rte_vfio_noiommu_is_enabled() == true ?
+						true : false;
+#endif
+
+	if (has_iova_va && !is_vfio_noiommu_enabled)
+		return RTE_IOVA_VA;
+
 	return RTE_IOVA_PA;
 }
 
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index e47215c..c0709de 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -249,7 +249,10 @@ int rte_fslmc_vfio_dmamap(void)
 		dma_map.size = memseg[i].len;
 		dma_map.vaddr = memseg[i].addr_64;
 #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
-		dma_map.iova = memseg[i].iova;
+		if (rte_eal_iova_mode() == RTE_IOVA_VA)
+			dma_map.iova = dma_map.vaddr;
+		else
+			dma_map.iova = memseg[i].iova;
 #else
 		dma_map.iova = dma_map.vaddr;
 #endif
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index ece1a7d..7937293 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -276,13 +276,19 @@ enum qbman_fd_format {
 #define DPAA2_EQ_RESP_ALWAYS		1
 
 #ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
+extern uint8_t dpaa2_virt_mode;
 static void *dpaa2_mem_ptov(phys_addr_t paddr) __attribute__((unused));
 /* todo - this is costly, need to write a fast coversion routine */
 static void *dpaa2_mem_ptov(phys_addr_t paddr)
 {
-	const struct rte_memseg *memseg = rte_eal_get_physmem_layout();
+	const struct rte_memseg *memseg;
 	int i;
 
+	if (dpaa2_virt_mode)
+		return (void *)paddr;
+
+	memseg = rte_eal_get_physmem_layout();
+
 	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
 		if (paddr >= memseg[i].iova &&
 		   (char *)paddr < (char *)memseg[i].iova + memseg[i].len)
@@ -295,9 +301,14 @@ static void *dpaa2_mem_ptov(phys_addr_t paddr)
 static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr) __attribute__((unused));
 static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
 {
-	const struct rte_memseg *memseg = rte_eal_get_physmem_layout();
+	const struct rte_memseg *memseg;
 	int i;
 
+	if (dpaa2_virt_mode)
+		return vaddr;
+
+	memseg = rte_eal_get_physmem_layout();
+
 	for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
 		if (vaddr >= memseg[i].addr_64 &&
 		    vaddr < memseg[i].addr_64 + memseg[i].len)
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 51a2ac6..a1e30d6 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -89,3 +89,10 @@ DPDK_17.11 {
 	rte_dpaa2_intr_enable;
 
 } DPDK_17.08;
+
+DPDK_18.02 {
+	global:
+
+	dpaa2_virt_mode;
+
+} DPDK_17.11;
diff --git a/drivers/bus/fslmc/rte_fslmc.h b/drivers/bus/fslmc/rte_fslmc.h
index 0814e69..0c7872d 100644
--- a/drivers/bus/fslmc/rte_fslmc.h
+++ b/drivers/bus/fslmc/rte_fslmc.h
@@ -62,6 +62,9 @@ extern "C" {
 
 #define FSLMC_OBJECT_MAX_LEN 32   /**< Length of each device on bus */
 
+/** Device driver supports IOVA as VA */
+#define RTE_DPAA2_DRV_IOVA_AS_VA 0X0040
+
 struct rte_dpaa2_driver;
 
 /* DPAA2 Device and Driver lists for FSLMC bus */
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 9c64c5d..5e52390 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -2420,6 +2420,7 @@ cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
 }
 
 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
+	.drv_flags = RTE_DPAA2_DRV_IOVA_AS_VA,
 	.drv_type = DPAA2_CRYPTO,
 	.driver = {
 		.name = "DPAA2 SEC PMD"
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 202f84f..38de3d9 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2003,6 +2003,7 @@ rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
 }
 
 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
+	.drv_flags = RTE_DPAA2_DRV_IOVA_AS_VA,
 	.drv_type = DPAA2_ETH,
 	.probe = rte_dpaa2_probe,
 	.remove = rte_dpaa2_remove,
-- 
2.7.4

Re: [dpdk-dev] [PATCH 03/14] bus/fslmc: add support for dynamic iova for DPAA2 devices

[Ferruh Yigit]

On 12/7/2017 9:21 PM, Hemant Agrawal wrote:
> This patch add support for dynamic iova detection for DPAA2
> devices and use of virtual address in such cases.
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
>  drivers/bus/fslmc/fslmc_bus.c               | 44 +++++++++++++++++++++++++++++
>  drivers/bus/fslmc/fslmc_vfio.c              |  5 +++-
>  drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     | 15 ++++++++--
>  drivers/bus/fslmc/rte_bus_fslmc_version.map |  7 +++++
>  drivers/bus/fslmc/rte_fslmc.h               |  3 ++
>  drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c |  1 +

Hi Hemant, Pablo,

It looks like crypto patch can be separated, but in sake of logically grouping,
I am getting this via next-net. Please shout if you have an objection.

Thanks,
ferruh

>  drivers/net/dpaa2/dpaa2_ethdev.c            |  1 +

[dpdk-dev] [PATCH 04/14] net/dpaa2: link status check as driver flag

[Hemant Agrawal]

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
DPDK-809
---
 drivers/bus/fslmc/rte_fslmc.h    | 4 ++++
 drivers/net/dpaa2/dpaa2_ethdev.c | 6 ++++--
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/fslmc/rte_fslmc.h b/drivers/bus/fslmc/rte_fslmc.h
index 0c7872d..fd52e2b 100644
--- a/drivers/bus/fslmc/rte_fslmc.h
+++ b/drivers/bus/fslmc/rte_fslmc.h
@@ -62,6 +62,10 @@ extern "C" {
 
 #define FSLMC_OBJECT_MAX_LEN 32   /**< Length of each device on bus */
 
+
+/** Device driver supports link state interrupt */
+#define RTE_DPAA2_DRV_INTR_LSC	0x0008
+
 /** Device driver supports IOVA as VA */
 #define RTE_DPAA2_DRV_IOVA_AS_VA 0X0040
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 38de3d9..1cd302d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -1872,7 +1872,6 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	}
 
 	eth_dev->dev_ops = &dpaa2_ethdev_ops;
-	eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
 
 	eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
 	eth_dev->tx_pkt_burst = dpaa2_dev_tx;
@@ -1976,6 +1975,9 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 	dpaa2_dev->eth_dev = eth_dev;
 	eth_dev->data->rx_mbuf_alloc_failed = 0;
 
+	if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
+		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
+
 	/* Invoke PMD device initialization function */
 	diag = dpaa2_dev_init(eth_dev);
 	if (diag == 0)
@@ -2003,7 +2005,7 @@ rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
 }
 
 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
-	.drv_flags = RTE_DPAA2_DRV_IOVA_AS_VA,
+	.drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
 	.drv_type = DPAA2_ETH,
 	.probe = rte_dpaa2_probe,
 	.remove = rte_dpaa2_remove,
-- 
2.7.4

[dpdk-dev] [PATCH 05/14] bus/fslmc: expose platform soc value register

[Hemant Agrawal]

This patch expose the dpaa2 soc platform family type.
This is required to make some soc variant specific
decision during configuration and runtime.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_dpio.c    | 42 +++++++++++++++--------------
 drivers/bus/fslmc/portal/dpaa2_hw_dpio.h    |  3 +++
 drivers/bus/fslmc/rte_bus_fslmc_version.map |  1 +
 drivers/net/dpaa2/dpaa2_ethdev.c            | 17 ++++++------
 4 files changed, 35 insertions(+), 28 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index f00070f..a98991a 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -76,6 +76,9 @@ static struct dpio_dev_list dpio_dev_list
 	= TAILQ_HEAD_INITIALIZER(dpio_dev_list); /*!< DPIO device list */
 static uint32_t io_space_count;
 
+/* Variable to store DPAA2 platform type */
+uint32_t dpaa2_svr_family;
+
 /*Stashing Macros default for LS208x*/
 static int dpaa2_core_cluster_base = 0x04;
 static int dpaa2_cluster_sz = 2;
@@ -265,26 +268,6 @@ static int
 dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev, int cpu_id)
 {
 	int sdest, ret;
-	static int first_time;
-
-	/* find the SoC type for the first time */
-	if (!first_time) {
-		struct mc_soc_version mc_plat_info = {0};
-
-		if (mc_get_soc_version(dpio_dev->dpio,
-				       CMD_PRI_LOW, &mc_plat_info)) {
-			PMD_INIT_LOG(ERR, "\tmc_get_soc_version failed\n");
-		} else if ((mc_plat_info.svr & 0xffff0000) == SVR_LS1080A) {
-			dpaa2_core_cluster_base = 0x02;
-			dpaa2_cluster_sz = 4;
-			PMD_INIT_LOG(DEBUG, "\tLS108x (A53) Platform Detected");
-		} else if ((mc_plat_info.svr & 0xffff0000) == SVR_LX2160A) {
-			dpaa2_core_cluster_base = 0x00;
-			dpaa2_cluster_sz = 2;
-			PMD_INIT_LOG(DEBUG, "\tLX2160 Platform Detected");
-		}
-		first_time = 1;
-	}
 
 	/* Set the Stashing Destination */
 	if (cpu_id < 0) {
@@ -499,6 +482,25 @@ dpaa2_create_dpio_device(int vdev_fd,
 		rte_free(dpio_dev);
 	}
 
+	/* find the SoC type for the first time */
+	if (!dpaa2_svr_family) {
+		struct mc_soc_version mc_plat_info = {0};
+
+		if (mc_get_soc_version(dpio_dev->dpio,
+				       CMD_PRI_LOW, &mc_plat_info)) {
+			PMD_INIT_LOG(ERR, "\tmc_get_soc_version failed\n");
+		} else if ((mc_plat_info.svr & 0xffff0000) == SVR_LS1080A) {
+			dpaa2_core_cluster_base = 0x02;
+			dpaa2_cluster_sz = 4;
+			PMD_INIT_LOG(DEBUG, "\tLS108x (A53) Platform Detected");
+		} else if ((mc_plat_info.svr & 0xffff0000) == SVR_LX2160A) {
+			dpaa2_core_cluster_base = 0x00;
+			dpaa2_cluster_sz = 2;
+			PMD_INIT_LOG(DEBUG, "\tLX2160 Platform Detected");
+		}
+		dpaa2_svr_family = (mc_plat_info.svr & 0xffff0000);
+	}
+
 	TAILQ_INSERT_TAIL(&dpio_dev_list, dpio_dev, next);
 	RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpio.%d]\n", object_id);
 
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
index e845340..a3240b2 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
@@ -54,6 +54,9 @@ RTE_DECLARE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io);
 #define DPAA2_PER_LCORE_SEC_DPIO RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev
 #define DPAA2_PER_LCORE_SEC_PORTAL DPAA2_PER_LCORE_SEC_DPIO->sw_portal
 
+/* Variable to store DPAA2 platform type */
+extern uint32_t dpaa2_svr_family;
+
 extern struct dpaa2_io_portal_t dpaa2_io_portal[RTE_MAX_LCORE];
 
 struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id);
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index a1e30d6..f266d6d 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -93,6 +93,7 @@ DPDK_17.11 {
 DPDK_18.02 {
 	global:
 
+	dpaa2_svr_family;
 	dpaa2_virt_mode;
 
 } DPDK_17.11;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 1cd302d..577bd8f 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -418,7 +418,6 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
-	struct mc_soc_version mc_plat_info = {0};
 	struct dpaa2_queue *dpaa2_q;
 	struct dpni_queue cfg;
 	uint8_t options = 0;
@@ -450,18 +449,20 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 
 	/*if ls2088 or rev2 device, enable the stashing */
 
-	if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
-		PMD_INIT_LOG(ERR, "\tmc_get_soc_version failed\n");
-
-	if ((mc_plat_info.svr & 0xffff0000) != SVR_LS2080A) {
+	if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 		options |= DPNI_QUEUE_OPT_FLC;
 		cfg.flc.stash_control = true;
 		cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 		/* 00 00 00 - last 6 bit represent annotation, context stashing,
-		 * data stashing setting 01 01 00 (0x14) to enable
-		 * 1 line data, 1 line annotation
+		 * data stashing setting 01 01 00 (0x14)
+		 * (in following order ->DS AS CS)
+		 * to enable 1 line data, 1 line annotation.
+		 * For LX2, this setting should be 01 00 00 (0x10)
 		 */
-		cfg.flc.value |= 0x14;
+		if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
+			cfg.flc.value |= 0x10;
+		else
+			cfg.flc.value |= 0x14;
 	}
 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 			     dpaa2_q->tc_index, flow_id, options, &cfg);
-- 
2.7.4

[dpdk-dev] [PATCH 06/14] bus/fslmc: add braces for pointers in macros

[Hemant Agrawal]

From: Nipun Gupta <nipun.gupta@nxp.com>

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 43 +++++++++++++++++----------------
 1 file changed, 22 insertions(+), 21 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 7937293..a432b6f 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -199,56 +199,57 @@ enum qbman_fd_format {
 };
 /*Macros to define operations on FD*/
 #define DPAA2_SET_FD_ADDR(fd, addr) do {			\
-	fd->simple.addr_lo = lower_32_bits((uint64_t)(addr));	\
-	fd->simple.addr_hi = upper_32_bits((uint64_t)(addr));	\
+	(fd)->simple.addr_lo = lower_32_bits((uint64_t)(addr));	\
+	(fd)->simple.addr_hi = upper_32_bits((uint64_t)(addr));	\
 } while (0)
-#define DPAA2_SET_FD_LEN(fd, length)	(fd)->simple.len = length
+#define DPAA2_SET_FD_LEN(fd, length)	((fd)->simple.len = length)
 #define DPAA2_SET_FD_BPID(fd, bpid)	((fd)->simple.bpid_offset |= bpid)
-#define DPAA2_SET_FD_IVP(fd)   ((fd->simple.bpid_offset |= 0x00004000))
+#define DPAA2_SET_FD_IVP(fd)   (((fd)->simple.bpid_offset |= 0x00004000))
 #define DPAA2_SET_FD_OFFSET(fd, offset)	\
-	((fd->simple.bpid_offset |= (uint32_t)(offset) << 16))
-#define DPAA2_SET_FD_INTERNAL_JD(fd, len) fd->simple.frc = (0x80000000 | (len))
-#define DPAA2_SET_FD_FRC(fd, frc)	fd->simple.frc = frc
-#define DPAA2_RESET_FD_CTRL(fd)	(fd)->simple.ctrl = 0
+	(((fd)->simple.bpid_offset |= (uint32_t)(offset) << 16))
+#define DPAA2_SET_FD_INTERNAL_JD(fd, len) \
+	((fd)->simple.frc = (0x80000000 | (len)))
+#define DPAA2_SET_FD_FRC(fd, frc)	((fd)->simple.frc = frc)
+#define DPAA2_RESET_FD_CTRL(fd)	 ((fd)->simple.ctrl = 0)
 
 #define	DPAA2_SET_FD_ASAL(fd, asal)	((fd)->simple.ctrl |= (asal << 16))
 #define DPAA2_SET_FD_FLC(fd, addr)	do { \
-	fd->simple.flc_lo = lower_32_bits((uint64_t)(addr));	\
-	fd->simple.flc_hi = upper_32_bits((uint64_t)(addr));	\
+	(fd)->simple.flc_lo = lower_32_bits((uint64_t)(addr));	\
+	(fd)->simple.flc_hi = upper_32_bits((uint64_t)(addr));	\
 } while (0)
-#define DPAA2_SET_FLE_INTERNAL_JD(fle, len) (fle->frc = (0x80000000 | (len)))
+#define DPAA2_SET_FLE_INTERNAL_JD(fle, len) ((fle)->frc = (0x80000000 | (len)))
 #define DPAA2_GET_FLE_ADDR(fle)					\
-	(uint64_t)((((uint64_t)(fle->addr_hi)) << 32) + fle->addr_lo)
+	(uint64_t)((((uint64_t)((fle)->addr_hi)) << 32) + (fle)->addr_lo)
 #define DPAA2_SET_FLE_ADDR(fle, addr) do { \
-	fle->addr_lo = lower_32_bits((uint64_t)addr);     \
-	fle->addr_hi = upper_32_bits((uint64_t)addr);	  \
+	(fle)->addr_lo = lower_32_bits((uint64_t)addr);     \
+	(fle)->addr_hi = upper_32_bits((uint64_t)addr);	  \
 } while (0)
 #define DPAA2_GET_FLE_CTXT(fle)					\
 	(uint64_t)((((uint64_t)((fle)->reserved[1])) << 32) + \
 			(fle)->reserved[0])
 #define DPAA2_FLE_SAVE_CTXT(fle, addr) do { \
-	fle->reserved[0] = lower_32_bits((uint64_t)addr);     \
-	fle->reserved[1] = upper_32_bits((uint64_t)addr);	  \
+	(fle)->reserved[0] = lower_32_bits((uint64_t)addr);     \
+	(fle)->reserved[1] = upper_32_bits((uint64_t)addr);	  \
 } while (0)
 #define DPAA2_SET_FLE_OFFSET(fle, offset) \
 	((fle)->fin_bpid_offset |= (uint32_t)(offset) << 16)
 #define DPAA2_SET_FLE_BPID(fle, bpid) ((fle)->fin_bpid_offset |= (uint64_t)bpid)
 #define DPAA2_GET_FLE_BPID(fle) ((fle)->fin_bpid_offset & 0x000000ff)
-#define DPAA2_SET_FLE_FIN(fle)	(fle->fin_bpid_offset |= (uint64_t)1 << 31)
+#define DPAA2_SET_FLE_FIN(fle)	((fle)->fin_bpid_offset |= (uint64_t)1 << 31)
 #define DPAA2_SET_FLE_IVP(fle)   (((fle)->fin_bpid_offset |= 0x00004000))
 #define DPAA2_SET_FD_COMPOUND_FMT(fd)	\
-	(fd->simple.bpid_offset |= (uint32_t)1 << 28)
+	((fd)->simple.bpid_offset |= (uint32_t)1 << 28)
 #define DPAA2_GET_FD_ADDR(fd)	\
 ((uint64_t)((((uint64_t)((fd)->simple.addr_hi)) << 32) + (fd)->simple.addr_lo))
 
 #define DPAA2_GET_FD_LEN(fd)	((fd)->simple.len)
 #define DPAA2_GET_FD_BPID(fd)	(((fd)->simple.bpid_offset & 0x00003FFF))
-#define DPAA2_GET_FD_IVP(fd)   ((fd->simple.bpid_offset & 0x00004000) >> 14)
+#define DPAA2_GET_FD_IVP(fd)   (((fd)->simple.bpid_offset & 0x00004000) >> 14)
 #define DPAA2_GET_FD_OFFSET(fd)	(((fd)->simple.bpid_offset & 0x0FFF0000) >> 16)
 #define DPAA2_GET_FLE_OFFSET(fle) (((fle)->fin_bpid_offset & 0x0FFF0000) >> 16)
-#define DPAA2_SET_FLE_SG_EXT(fle) (fle->fin_bpid_offset |= (uint64_t)1 << 29)
+#define DPAA2_SET_FLE_SG_EXT(fle) ((fle)->fin_bpid_offset |= (uint64_t)1 << 29)
 #define DPAA2_IS_SET_FLE_SG_EXT(fle)	\
-	((fle->fin_bpid_offset & ((uint64_t)1 << 29)) ? 1 : 0)
+	(((fle)->fin_bpid_offset & ((uint64_t)1 << 29)) ? 1 : 0)
 
 #define DPAA2_INLINE_MBUF_FROM_BUF(buf, meta_data_size) \
 	((struct rte_mbuf *)((uint64_t)(buf) - (meta_data_size)))
-- 
2.7.4

Re: [dpdk-dev] [PATCH 06/14] bus/fslmc: add braces for pointers in macros

[Ferruh Yigit]

On 12/7/2017 9:21 PM, Hemant Agrawal wrote:
> From: Nipun Gupta <nipun.gupta@nxp.com>
> 
> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>

Hi Hemant,

Since patch sent by you, I assume you ack the patch but for further patches, can
you please put explicit ack for the patches that author is not a maintainer?

Thanks,
ferruh

Re: [dpdk-dev] [PATCH 06/14] bus/fslmc: add braces for pointers in macros

[Hemant Agrawal]

On 12/12/2017 6:22 AM, Ferruh Yigit wrote:
> On 12/7/2017 9:21 PM, Hemant Agrawal wrote:
>> From: Nipun Gupta <nipun.gupta@nxp.com>
>>
>> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
>
> Hi Hemant,
>
> Since patch sent by you, I assume you ack the patch but for further patches, can
> you please put explicit ack for the patches that author is not a maintainer?
>
> Thanks,
> ferruh
>
Thanks. I will take care of it.

[dpdk-dev] [PATCH 07/14] bus/fslmc: add qman HW fq query count API

[Hemant Agrawal]

This patch add support for rx query debug API.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/Makefile                        |  3 +-
 drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h | 30 +++++++++++
 drivers/bus/fslmc/qbman/qbman_debug.c             | 66 +++++++++++++++++++++++
 drivers/bus/fslmc/rte_bus_fslmc_version.map       |  2 +
 4 files changed, 100 insertions(+), 1 deletion(-)
 create mode 100644 drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
 create mode 100644 drivers/bus/fslmc/qbman/qbman_debug.c

diff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile
index c08b2af..7ab39cb 100644
--- a/drivers/bus/fslmc/Makefile
+++ b/drivers/bus/fslmc/Makefile
@@ -62,7 +62,8 @@ EXPORT_MAP := rte_bus_fslmc_version.map
 LIBABIVER := 1
 
 SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += \
-        qbman/qbman_portal.c
+        qbman/qbman_portal.c \
+        qbman/qbman_debug.c
 
 SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += \
 	mc/dpmng.c \
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
new file mode 100644
index 0000000..072ad55
--- /dev/null
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
@@ -0,0 +1,30 @@
+/* Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:        BSD-3-Clause
+ */
+struct qbman_swp;
+
+struct qbman_fq_query_np_rslt {
+uint8_t verb;
+	uint8_t rslt;
+	uint8_t st1;
+	uint8_t st2;
+	uint8_t reserved[2];
+	uint16_t od1_sfdr;
+	uint16_t od2_sfdr;
+	uint16_t od3_sfdr;
+	uint16_t ra1_sfdr;
+	uint16_t ra2_sfdr;
+	uint32_t pfdr_hptr;
+	uint32_t pfdr_tptr;
+	uint32_t frm_cnt;
+	uint32_t byte_cnt;
+	uint16_t ics_surp;
+	uint8_t is;
+	uint8_t reserved2[29];
+};
+
+int qbman_fq_query_state(struct qbman_swp *s, uint32_t fqid,
+			 struct qbman_fq_query_np_rslt *r);
+uint32_t qbman_fq_state_frame_count(const struct qbman_fq_query_np_rslt *r);
+uint32_t qbman_fq_state_byte_count(const struct qbman_fq_query_np_rslt *r);
diff --git a/drivers/bus/fslmc/qbman/qbman_debug.c b/drivers/bus/fslmc/qbman/qbman_debug.c
new file mode 100644
index 0000000..591673a
--- /dev/null
+++ b/drivers/bus/fslmc/qbman/qbman_debug.c
@@ -0,0 +1,66 @@
+/* Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:        BSD-3-Clause
+ */
+
+#include "compat.h"
+#include <fsl_qbman_debug.h>
+#include "qbman_portal.h"
+
+/* QBMan portal management command code */
+#define QBMAN_BP_QUERY            0x32
+#define QBMAN_FQ_QUERY            0x44
+#define QBMAN_FQ_QUERY_NP         0x45
+#define QBMAN_WQ_QUERY            0x47
+#define QBMAN_CGR_QUERY           0x51
+#define QBMAN_WRED_QUERY          0x54
+#define QBMAN_CGR_STAT_QUERY      0x55
+#define QBMAN_CGR_STAT_QUERY_CLR  0x56
+
+struct qbman_fq_query_desc {
+	uint8_t verb;
+	uint8_t reserved[3];
+	uint32_t fqid;
+	uint8_t reserved2[57];
+};
+
+int qbman_fq_query_state(struct qbman_swp *s, uint32_t fqid,
+			 struct qbman_fq_query_np_rslt *r)
+{
+	struct qbman_fq_query_desc *p;
+
+	p = (struct qbman_fq_query_desc *)qbman_swp_mc_start(s);
+	if (!p)
+		return -EBUSY;
+
+	p->fqid = fqid;
+	*r = *(struct qbman_fq_query_np_rslt *)qbman_swp_mc_complete(s, p,
+						QBMAN_FQ_QUERY_NP);
+	if (!r) {
+		pr_err("qbman: Query FQID %d NP fields failed, no response\n",
+		       fqid);
+		return -EIO;
+	}
+
+	/* Decode the outcome */
+	QBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_FQ_QUERY_NP);
+
+	/* Determine success or failure */
+	if (r->rslt != QBMAN_MC_RSLT_OK) {
+		pr_err("Query NP fields of FQID 0x%x failed, code=0x%02x\n",
+		       fqid, r->rslt);
+		return -EIO;
+	}
+
+	return 0;
+}
+
+uint32_t qbman_fq_state_frame_count(const struct qbman_fq_query_np_rslt *r)
+{
+	return (r->frm_cnt & 0x00FFFFFF);
+}
+
+uint32_t qbman_fq_state_byte_count(const struct qbman_fq_query_np_rslt *r)
+{
+	return r->byte_cnt;
+}
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index f266d6d..f59fc67 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -95,5 +95,7 @@ DPDK_18.02 {
 
 	dpaa2_svr_family;
 	dpaa2_virt_mode;
+	qbman_fq_query_state;
+	qbman_fq_state_frame_count;
 
 } DPDK_17.11;
-- 
2.7.4

[dpdk-dev] [PATCH 08/14] net/dpaa2: add Rx queue count support

[Hemant Agrawal]

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 577bd8f..3e89d8d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -51,6 +51,7 @@
 #include <dpaa2_hw_dpio.h>
 #include <mc/fsl_dpmng.h>
 #include "dpaa2_ethdev.h"
+#include <fsl_qbman_debug.h>
 
 struct rte_dpaa2_xstats_name_off {
 	char name[RTE_ETH_XSTATS_NAME_SIZE];
@@ -595,6 +596,37 @@ dpaa2_dev_tx_queue_release(void *q __rte_unused)
 	PMD_INIT_FUNC_TRACE();
 }
 
+static uint32_t
+dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+	int32_t ret;
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+	struct dpaa2_queue *dpaa2_q;
+	struct qbman_swp *swp;
+	struct qbman_fq_query_np_rslt state;
+	uint32_t frame_cnt = 0;
+
+	PMD_INIT_FUNC_TRACE();
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			RTE_LOG(ERR, PMD, "Failure in affining portal\n");
+			return -EINVAL;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+
+	dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
+
+	if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
+		frame_cnt = qbman_fq_state_frame_count(&state);
+		RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
+			rx_queue_id, frame_cnt);
+	}
+	return frame_cnt;
+}
+
 static const uint32_t *
 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 {
@@ -1737,6 +1769,7 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
 	.rx_queue_release  = dpaa2_dev_rx_queue_release,
 	.tx_queue_setup    = dpaa2_dev_tx_queue_setup,
 	.tx_queue_release  = dpaa2_dev_tx_queue_release,
+	.rx_queue_count       = dpaa2_dev_rx_queue_count,
 	.flow_ctrl_get	      = dpaa2_flow_ctrl_get,
 	.flow_ctrl_set	      = dpaa2_flow_ctrl_set,
 	.mac_addr_add         = dpaa2_dev_add_mac_addr,
-- 
2.7.4

Re: [dpdk-dev] [PATCH 08/14] net/dpaa2: add Rx queue count support

[Stephen Hemminger]

On Fri, 8 Dec 2017 10:51:21 +0530
Hemant Agrawal <hemant.agrawal@nxp.com> wrote:

> @@ -1737,6 +1769,7 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {

I know this is not part of the patch, but this diff highlighted another thing
to addreess in this family of driver.  The eth_dev_ops should be const if possible
that reduces change of bugs and other  issues.

Re: [dpdk-dev] [PATCH 08/14] net/dpaa2: add Rx queue count support

[Hemant Agrawal]

On 12/12/2017 6:58 AM, Stephen Hemminger wrote:
> On Fri, 8 Dec 2017 10:51:21 +0530
> Hemant Agrawal <hemant.agrawal@nxp.com> wrote:
>
>> @@ -1737,6 +1769,7 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
>
> I know this is not part of the patch, but this diff highlighted another thing
> to addreess in this family of driver.  The eth_dev_ops should be const if possible
> that reduces change of bugs and other  issues.
>
Thanks for the comment.
We will take care of it in next set of revisions.

Regards,
Hemant

[dpdk-dev] [PATCH 09/14] net/dpaa2: align the frame size in MTU set

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Setting correct frame size in dpaa2_dev_mtu_set
api call. Also correcting the correct max frame size
setting in hardware while dev_configure for jumbo frames

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h |  4 ++--
 drivers/net/dpaa2/dpaa2_ethdev.c        | 11 +++++++----
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index a432b6f..9f9ce0b 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -53,8 +53,8 @@
 #define SVR_LS2088A             0x87090000
 #define SVR_LX2160A             0x87360000
 
-#ifndef ETH_VLAN_HLEN
-#define ETH_VLAN_HLEN   4 /** < Vlan Header Length */
+#ifndef VLAN_TAG_SIZE
+#define VLAN_TAG_SIZE   4 /** < Vlan Header Length */
 #endif
 
 #define MAX_TX_RING_SLOTS	8
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 3e89d8d..894c60e 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -347,8 +347,8 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 
 	if (eth_conf->rxmode.jumbo_frame == 1) {
 		if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
-			ret = dpaa2_dev_mtu_set(dev,
-					eth_conf->rxmode.max_rx_pkt_len);
+			ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
+				priv->token, eth_conf->rxmode.max_rx_pkt_len);
 			if (ret) {
 				PMD_INIT_LOG(ERR,
 					     "unable to set mtu. check config\n");
@@ -1000,7 +1000,8 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
-	uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
+	uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
+				+ VLAN_TAG_SIZE;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1018,11 +1019,13 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 	else
 		dev->data->dev_conf.rxmode.jumbo_frame = 0;
 
+	dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
+
 	/* Set the Max Rx frame length as 'mtu' +
 	 * Maximum Ethernet header length
 	 */
 	ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
-					mtu + ETH_VLAN_HLEN);
+					frame_size);
 	if (ret) {
 		PMD_DRV_LOG(ERR, "setting the max frame length failed");
 		return -1;
-- 
2.7.4

[dpdk-dev] [PATCH 10/14] net/dpaa2: add VLAN insert offload

[Hemant Agrawal]

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_rxtx.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 8ecd238..93c2319 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -242,6 +242,12 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
 	/* Resetting the buffer pool id and offset field*/
 	fd->simple.bpid_offset = 0;
 
+	if (unlikely(mbuf->ol_flags & PKT_TX_VLAN_PKT)) {
+		int ret = rte_vlan_insert(&mbuf);
+		if (ret)
+			return ret;
+	}
+
 	temp = rte_pktmbuf_alloc(mbuf->pool);
 	if (temp == NULL) {
 		PMD_TX_LOG(ERR, "No memory to allocate S/G table");
@@ -308,6 +314,12 @@ static void __attribute__ ((noinline)) __attribute__((hot))
 eth_mbuf_to_fd(struct rte_mbuf *mbuf,
 	       struct qbman_fd *fd, uint16_t bpid)
 {
+	if (unlikely(mbuf->ol_flags & PKT_TX_VLAN_PKT)) {
+		if (rte_vlan_insert(&mbuf)) {
+			rte_pktmbuf_free(mbuf);
+			return;
+		}
+	}
 	/*Resetting the buffer pool id and offset field*/
 	fd->simple.bpid_offset = 0;
 
@@ -347,6 +359,12 @@ eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
 	struct rte_mbuf *m;
 	void *mb = NULL;
 
+	if (unlikely(mbuf->ol_flags & PKT_TX_VLAN_PKT)) {
+		int ret = rte_vlan_insert(&mbuf);
+		if (ret)
+			return ret;
+	}
+
 	if (rte_dpaa2_mbuf_alloc_bulk(
 		rte_dpaa2_bpid_info[bpid].bp_list->mp, &mb, 1)) {
 		PMD_TX_LOG(WARNING, "Unable to allocated DPAA2 buffer");
-- 
2.7.4

[dpdk-dev] [PATCH 11/14] net/dpaa2: add parse function for LX2 device

[Hemant Agrawal]

From: Nipun Gupta <nipun.gupta@nxp.com>

Adding support for DPDK packet parsing logic for LX2
platform to accomodate the new FRC format introduced in LX2.

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h |  2 +
 drivers/net/dpaa2/dpaa2_ethdev.h        | 27 ++++++++++
 drivers/net/dpaa2/dpaa2_rxtx.c          | 94 ++++++++++++++++++++++++++++++---
 3 files changed, 116 insertions(+), 7 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 9f9ce0b..c29d7f3 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -209,6 +209,8 @@ enum qbman_fd_format {
 	(((fd)->simple.bpid_offset |= (uint32_t)(offset) << 16))
 #define DPAA2_SET_FD_INTERNAL_JD(fd, len) \
 	((fd)->simple.frc = (0x80000000 | (len)))
+#define DPAA2_GET_FD_FRC_PARSE_SUM(fd)	\
+			((uint16_t)(((fd)->simple.frc & 0xffff0000) >> 16))
 #define DPAA2_SET_FD_FRC(fd, frc)	((fd)->simple.frc = frc)
 #define DPAA2_RESET_FD_CTRL(fd)	 ((fd)->simple.ctrl = 0)
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index b8e94aa..9a9496f 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -76,6 +76,33 @@
 /* Disable RX tail drop, default is enable */
 #define DPAA2_RX_TAILDROP_OFF	0x04
 
+/* LX2 FRC Parsed values (Little Endian) */
+#define DPAA2_PKT_TYPE_ETHER		0x0060
+#define DPAA2_PKT_TYPE_IPV4		0x0000
+#define DPAA2_PKT_TYPE_IPV6		0x0020
+#define DPAA2_PKT_TYPE_IPV4_EXT \
+			(0x0001 | DPAA2_PKT_TYPE_IPV4)
+#define DPAA2_PKT_TYPE_IPV6_EXT \
+			(0x0001 | DPAA2_PKT_TYPE_IPV6)
+#define DPAA2_PKT_TYPE_IPV4_TCP \
+			(0x000e | DPAA2_PKT_TYPE_IPV4)
+#define DPAA2_PKT_TYPE_IPV6_TCP \
+			(0x000e | DPAA2_PKT_TYPE_IPV6)
+#define DPAA2_PKT_TYPE_IPV4_UDP \
+			(0x0010 | DPAA2_PKT_TYPE_IPV4)
+#define DPAA2_PKT_TYPE_IPV6_UDP \
+			(0x0010 | DPAA2_PKT_TYPE_IPV6)
+#define DPAA2_PKT_TYPE_IPV4_SCTP	\
+			(0x000f | DPAA2_PKT_TYPE_IPV4)
+#define DPAA2_PKT_TYPE_IPV6_SCTP	\
+			(0x000f | DPAA2_PKT_TYPE_IPV6)
+#define DPAA2_PKT_TYPE_IPV4_ICMP \
+			(0x0003 | DPAA2_PKT_TYPE_IPV4_EXT)
+#define DPAA2_PKT_TYPE_IPV6_ICMP \
+			(0x0003 | DPAA2_PKT_TYPE_IPV6_EXT)
+#define DPAA2_PKT_TYPE_VLAN_1		0x0160
+#define DPAA2_PKT_TYPE_VLAN_2		0x0260
+
 struct dpaa2_dev_priv {
 	void *hw;
 	int32_t hw_id;
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 93c2319..3b58a48 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -50,6 +50,75 @@
 #include "dpaa2_ethdev.h"
 #include "base/dpaa2_hw_dpni_annot.h"
 
+static inline void __attribute__((hot))
+dpaa2_dev_rx_parse_frc(struct rte_mbuf *m, uint16_t frc)
+{
+	PMD_RX_LOG(DEBUG, "frc = 0x%x   ", frc);
+
+	m->packet_type = RTE_PTYPE_UNKNOWN;
+	switch (frc) {
+	case DPAA2_PKT_TYPE_ETHER:
+		m->packet_type = RTE_PTYPE_L2_ETHER;
+		break;
+	case DPAA2_PKT_TYPE_IPV4:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV4;
+		break;
+	case DPAA2_PKT_TYPE_IPV6:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV6;
+		break;
+	case DPAA2_PKT_TYPE_IPV4_EXT:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV4_EXT;
+		break;
+	case DPAA2_PKT_TYPE_IPV6_EXT:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV6_EXT;
+		break;
+	case DPAA2_PKT_TYPE_IPV4_TCP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP;
+		break;
+	case DPAA2_PKT_TYPE_IPV6_TCP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP;
+		break;
+	case DPAA2_PKT_TYPE_IPV4_UDP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP;
+		break;
+	case DPAA2_PKT_TYPE_IPV6_UDP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP;
+		break;
+	case DPAA2_PKT_TYPE_IPV4_SCTP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_SCTP;
+		break;
+	case DPAA2_PKT_TYPE_IPV6_SCTP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_SCTP;
+		break;
+	case DPAA2_PKT_TYPE_IPV4_ICMP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_ICMP;
+		break;
+	case DPAA2_PKT_TYPE_IPV6_ICMP:
+		m->packet_type = RTE_PTYPE_L2_ETHER |
+			RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_ICMP;
+		break;
+	case DPAA2_PKT_TYPE_VLAN_1:
+	case DPAA2_PKT_TYPE_VLAN_2:
+		m->ol_flags |= PKT_RX_VLAN;
+		break;
+	/* More switch cases can be added */
+	/* TODO: Add handling for checksum error check from FRC */
+	default:
+		m->packet_type = RTE_PTYPE_UNKNOWN;
+	}
+}
+
 static inline uint32_t __attribute__((hot))
 dpaa2_dev_rx_parse(uint64_t hw_annot_addr)
 {
@@ -159,13 +228,17 @@ eth_sg_fd_to_mbuf(const struct qbman_fd *fd)
 	first_seg->pkt_len = DPAA2_GET_FD_LEN(fd);
 	first_seg->nb_segs = 1;
 	first_seg->next = NULL;
-
-	first_seg->packet_type = dpaa2_dev_rx_parse(
+	if (dpaa2_svr_family == SVR_LX2160A)
+		dpaa2_dev_rx_parse_frc(first_seg,
+				DPAA2_GET_FD_FRC_PARSE_SUM(fd));
+	else {
+		first_seg->packet_type = dpaa2_dev_rx_parse(
 			 (uint64_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
 			 + DPAA2_FD_PTA_SIZE);
-	dpaa2_dev_rx_offload((uint64_t)DPAA2_IOVA_TO_VADDR(
+		dpaa2_dev_rx_offload((uint64_t)DPAA2_IOVA_TO_VADDR(
 			DPAA2_GET_FD_ADDR(fd)) +
 			DPAA2_FD_PTA_SIZE, first_seg);
+	}
 	rte_mbuf_refcnt_set(first_seg, 1);
 	cur_seg = first_seg;
 	while (!DPAA2_SG_IS_FINAL(sge)) {
@@ -208,14 +281,21 @@ eth_fd_to_mbuf(const struct qbman_fd *fd)
 	mbuf->pkt_len = mbuf->data_len;
 
 	/* Parse the packet */
-	/* parse results are after the private - sw annotation area */
-	mbuf->packet_type = dpaa2_dev_rx_parse(
+	/* parse results for LX2 are there in FRC field of FD.
+	 * For other DPAA2 platforms , parse results are after
+	 * the private - sw annotation area
+	 */
+
+	if (dpaa2_svr_family == SVR_LX2160A)
+		dpaa2_dev_rx_parse_frc(mbuf, DPAA2_GET_FD_FRC_PARSE_SUM(fd));
+	else {
+		mbuf->packet_type = dpaa2_dev_rx_parse(
 			(uint64_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
 			 + DPAA2_FD_PTA_SIZE);
-
-	dpaa2_dev_rx_offload((uint64_t)DPAA2_IOVA_TO_VADDR(
+		dpaa2_dev_rx_offload((uint64_t)DPAA2_IOVA_TO_VADDR(
 			     DPAA2_GET_FD_ADDR(fd)) +
 			     DPAA2_FD_PTA_SIZE, mbuf);
+	}
 
 	mbuf->next = NULL;
 	rte_mbuf_refcnt_set(mbuf, 1);
-- 
2.7.4

[dpdk-dev] [PATCH 12/14] net/dpaa2: optimize Rx path packet parsing

[Hemant Agrawal]

From: Nipun Gupta <nipun.gupta@nxp.com>

Parsing the annotation has multiple if checks in the data path.
These are reduced for common cases like IPv4/IPv6 and UDP/TCP
packets to enhance performance of these generic cases.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h | 20 +++++++++++++
 drivers/net/dpaa2/dpaa2_rxtx.c               | 43 ++++++++++++++++++++++++----
 2 files changed, 58 insertions(+), 5 deletions(-)

diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
index e68febf..88a9d49 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
@@ -219,6 +219,26 @@ struct dpaa2_annot_hdr {
 #define L5_SOFT_PARSING_ERROR			BIT_POS(1)
 #define L3_IPV6_ROUTE_HDR_PRESENT		BIT_POS(0)
 
+#define DPAA2_L3_IPv4 (L3_IPV4_1_PRESENT | L3_IPV4_1_UNICAST | \
+	L3_IP_1_UNKNOWN_PROTOCOL | L3_IP_UNKNOWN_PROTOCOL)
+
+#define DPAA2_L3_IPv6 (L3_IPV6_1_PRESENT | L3_IPV6_1_UNICAST | \
+	L3_IP_1_UNKNOWN_PROTOCOL | L3_IP_UNKNOWN_PROTOCOL)
+
+#define DPAA2_L3_IPv4_TCP (L3_IPV4_1_PRESENT | L3_IPV4_1_UNICAST | \
+	L3_PROTO_TCP_PRESENT | L3_PROTO_TCP_CTRL_BIT_6_TO_11_PRESENT | \
+	L4_UNKNOWN_PROTOCOL)
+
+#define DPAA2_L3_IPv4_UDP (L3_IPV4_1_PRESENT | L3_IPV4_1_UNICAST | \
+	L3_PROTO_UDP_PRESENT | L4_UNKNOWN_PROTOCOL)
+
+#define DPAA2_L3_IPv6_TCP (L3_IPV6_1_PRESENT | L3_IPV6_1_UNICAST | \
+	L3_PROTO_TCP_PRESENT | L3_PROTO_TCP_CTRL_BIT_6_TO_11_PRESENT | \
+	L4_UNKNOWN_PROTOCOL)
+
+#define DPAA2_L3_IPv6_UDP (L3_IPV6_1_PRESENT | L3_IPV6_1_UNICAST | \
+	L3_PROTO_UDP_PRESENT | L4_UNKNOWN_PROTOCOL)
+
 /* Debug frame, otherwise supposed to be discarded */
 #define DPAA2_ETH_FAS_DISC	      0x80000000
 /* MACSEC frame */
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 3b58a48..5c75cfa 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -120,14 +120,13 @@ dpaa2_dev_rx_parse_frc(struct rte_mbuf *m, uint16_t frc)
 }
 
 static inline uint32_t __attribute__((hot))
-dpaa2_dev_rx_parse(uint64_t hw_annot_addr)
+dpaa2_dev_rx_parse_slow(uint64_t hw_annot_addr)
 {
 	uint32_t pkt_type = RTE_PTYPE_UNKNOWN;
 	struct dpaa2_annot_hdr *annotation =
 			(struct dpaa2_annot_hdr *)hw_annot_addr;
 
 	PMD_RX_LOG(DEBUG, "annotation = 0x%lx   ", annotation->word4);
-
 	if (BIT_ISSET_AT_POS(annotation->word3, L2_ARP_PRESENT)) {
 		pkt_type = RTE_PTYPE_L2_ETHER_ARP;
 		goto parse_done;
@@ -183,6 +182,41 @@ dpaa2_dev_rx_parse(uint64_t hw_annot_addr)
 	return pkt_type;
 }
 
+
+static inline uint32_t __attribute__((hot))
+dpaa2_dev_rx_parse(uint64_t hw_annot_addr)
+{
+	struct dpaa2_annot_hdr *annotation =
+			(struct dpaa2_annot_hdr *)hw_annot_addr;
+
+	PMD_RX_LOG(DEBUG, "annotation = 0x%lx   ", annotation->word4);
+
+	/* Return some common types from parse processing */
+	switch (annotation->word4) {
+	case DPAA2_L3_IPv4:
+		return RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4;
+	case DPAA2_L3_IPv6:
+		return  RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6;
+	case DPAA2_L3_IPv4_TCP:
+		return  RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4 |
+				RTE_PTYPE_L4_TCP;
+	case DPAA2_L3_IPv4_UDP:
+		return  RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4 |
+				RTE_PTYPE_L4_UDP;
+	case DPAA2_L3_IPv6_TCP:
+		return  RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6 |
+				RTE_PTYPE_L4_TCP;
+	case DPAA2_L3_IPv6_UDP:
+		return  RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6 |
+				RTE_PTYPE_L4_UDP;
+	default:
+		PMD_RX_LOG(DEBUG, "Slow parse the parsing results\n");
+		break;
+	}
+
+	return dpaa2_dev_rx_parse_slow(hw_annot_addr);
+}
+
 static inline void __attribute__((hot))
 dpaa2_dev_rx_offload(uint64_t hw_annot_addr, struct rte_mbuf *mbuf)
 {
@@ -279,6 +313,8 @@ eth_fd_to_mbuf(const struct qbman_fd *fd)
 	mbuf->data_off = DPAA2_GET_FD_OFFSET(fd);
 	mbuf->data_len = DPAA2_GET_FD_LEN(fd);
 	mbuf->pkt_len = mbuf->data_len;
+	mbuf->next = NULL;
+	rte_mbuf_refcnt_set(mbuf, 1);
 
 	/* Parse the packet */
 	/* parse results for LX2 are there in FRC field of FD.
@@ -297,9 +333,6 @@ eth_fd_to_mbuf(const struct qbman_fd *fd)
 			     DPAA2_FD_PTA_SIZE, mbuf);
 	}
 
-	mbuf->next = NULL;
-	rte_mbuf_refcnt_set(mbuf, 1);
-
 	PMD_RX_LOG(DEBUG, "to mbuf - mbuf =%p, mbuf->buf_addr =%p, off = %d,"
 		"fd_off=%d fd =%lx, meta = %d  bpid =%d, len=%d\n",
 		mbuf, mbuf->buf_addr, mbuf->data_off,
-- 
2.7.4

[dpdk-dev] [PATCH 13/14] net/dpaa2: optimize Tx path for best case

[Hemant Agrawal]

From: Nipun Gupta <nipun.gupta@nxp.com>

This patch handles the non-sg packets in more optimized way.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h |  2 ++
 drivers/net/dpaa2/dpaa2_rxtx.c          | 44 +++++++++++++++++++++++----------
 2 files changed, 33 insertions(+), 13 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index c29d7f3..fd9e656 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -204,6 +204,8 @@ enum qbman_fd_format {
 } while (0)
 #define DPAA2_SET_FD_LEN(fd, length)	((fd)->simple.len = length)
 #define DPAA2_SET_FD_BPID(fd, bpid)	((fd)->simple.bpid_offset |= bpid)
+#define DPAA2_SET_ONLY_FD_BPID(fd, bpid) \
+	((fd)->simple.bpid_offset = bpid)
 #define DPAA2_SET_FD_IVP(fd)   (((fd)->simple.bpid_offset |= 0x00004000))
 #define DPAA2_SET_FD_OFFSET(fd, offset)	\
 	(((fd)->simple.bpid_offset |= (uint32_t)(offset) << 16))
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 5c75cfa..e8edc67 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -50,6 +50,14 @@
 #include "dpaa2_ethdev.h"
 #include "base/dpaa2_hw_dpni_annot.h"
 
+#define DPAA2_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid)  do { \
+	DPAA2_SET_FD_ADDR(_fd, DPAA2_MBUF_VADDR_TO_IOVA(_mbuf)); \
+	DPAA2_SET_FD_LEN(_fd, _mbuf->data_len); \
+	DPAA2_SET_ONLY_FD_BPID(_fd, _bpid); \
+	DPAA2_SET_FD_OFFSET(_fd, _mbuf->data_off); \
+	DPAA2_SET_FD_ASAL(_fd, DPAA2_ASAL_VAL); \
+} while (0)
+
 static inline void __attribute__((hot))
 dpaa2_dev_rx_parse_frc(struct rte_mbuf *m, uint16_t frc)
 {
@@ -436,11 +444,7 @@ eth_mbuf_to_fd(struct rte_mbuf *mbuf,
 	/*Resetting the buffer pool id and offset field*/
 	fd->simple.bpid_offset = 0;
 
-	DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-	DPAA2_SET_FD_LEN(fd, mbuf->data_len);
-	DPAA2_SET_FD_BPID(fd, bpid);
-	DPAA2_SET_FD_OFFSET(fd, mbuf->data_off);
-	DPAA2_SET_FD_ASAL(fd, DPAA2_ASAL_VAL);
+	DPAA2_MBUF_TO_CONTIG_FD(mbuf, fd, bpid);
 
 	PMD_TX_LOG(DEBUG, "mbuf =%p, mbuf->buf_addr =%p, off = %d,"
 		"fd_off=%d fd =%lx, meta = %d  bpid =%d, len=%d\n",
@@ -497,11 +501,7 @@ eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
 	/*Resetting the buffer pool id and offset field*/
 	fd->simple.bpid_offset = 0;
 
-	DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(m));
-	DPAA2_SET_FD_LEN(fd, mbuf->data_len);
-	DPAA2_SET_FD_BPID(fd, bpid);
-	DPAA2_SET_FD_OFFSET(fd, mbuf->data_off);
-	DPAA2_SET_FD_ASAL(fd, DPAA2_ASAL_VAL);
+	DPAA2_MBUF_TO_CONTIG_FD(m, fd, bpid);
 
 	PMD_TX_LOG(DEBUG, " mbuf %p BMAN buf addr %p",
 		   (void *)mbuf, mbuf->buf_addr);
@@ -721,8 +721,26 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 			fd_arr[loop].simple.frc = 0;
 			DPAA2_RESET_FD_CTRL((&fd_arr[loop]));
 			DPAA2_SET_FD_FLC((&fd_arr[loop]), NULL);
-			if (RTE_MBUF_DIRECT(*bufs)) {
+			if (likely(RTE_MBUF_DIRECT(*bufs))) {
 				mp = (*bufs)->pool;
+				/* Check the basic scenario and set
+				 * the FD appropriately here itself.
+				 */
+				if (likely(mp && mp->ops_index ==
+				    priv->bp_list->dpaa2_ops_index &&
+				    (*bufs)->nb_segs == 1 &&
+				    rte_mbuf_refcnt_read((*bufs)) == 1)) {
+					if (unlikely((*bufs)->ol_flags
+						& PKT_TX_VLAN_PKT)) {
+						ret = rte_vlan_insert(bufs);
+						if (ret)
+							goto send_n_return;
+					}
+					DPAA2_MBUF_TO_CONTIG_FD((*bufs),
+					&fd_arr[loop], mempool_to_bpid(mp));
+					bufs++;
+					continue;
+				}
 			} else {
 				mi = rte_mbuf_from_indirect(*bufs);
 				mp = mi->pool;
@@ -771,9 +789,9 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 		}
 
 		num_tx += frames_to_send;
-		dpaa2_q->tx_pkts += frames_to_send;
 		nb_pkts -= frames_to_send;
 	}
+	dpaa2_q->tx_pkts += num_tx;
 	return num_tx;
 
 send_n_return:
@@ -786,9 +804,9 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 							&fd_arr[i], loop - i);
 		}
 		num_tx += loop;
-		dpaa2_q->tx_pkts += loop;
 	}
 skip_tx:
+	dpaa2_q->tx_pkts += num_tx;
 	return num_tx;
 }
 
-- 
2.7.4

[dpdk-dev] [PATCH 14/14] net/dpaa2: prefetch the parse results from next fd

[Hemant Agrawal]

From: Nipun Gupta <nipun.gupta@nxp.com>

As there were less number of cpu cycles in between when we access
the parse results and when we prefetch them, this patch modifies
the prefetch of the next parse result.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/net/dpaa2/dpaa2_rxtx.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index e8edc67..9b66bd3 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -526,7 +526,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	int ret, num_rx = 0;
 	uint8_t is_last = 0, status;
 	struct qbman_swp *swp;
-	const struct qbman_fd *fd[DPAA2_DQRR_RING_SIZE];
+	const struct qbman_fd *fd[DPAA2_DQRR_RING_SIZE], *next_fd;
 	struct qbman_pull_desc pulldesc;
 	struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
 	struct rte_eth_dev *dev = dpaa2_q->dev;
@@ -569,6 +569,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 		set_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index, dq_storage);
 	}
 	dq_storage = q_storage->active_dqs;
+	rte_prefetch0((void *)((uint64_t)(dq_storage + 1)));
 	/* Check if the previous issued command is completed.
 	 * Also seems like the SWP is shared between the Ethernet Driver
 	 * and the SEC driver.
@@ -583,7 +584,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 		 */
 		while (!qbman_check_new_result(dq_storage))
 			;
-		rte_prefetch0((void *)((uint64_t)(dq_storage + 1)));
+		rte_prefetch0((void *)((uint64_t)(dq_storage + 2)));
 		/* Check whether Last Pull command is Expired and
 		 * setting Condition for Loop termination
 		 */
@@ -596,8 +597,9 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 		}
 		fd[num_rx] = qbman_result_DQ_fd(dq_storage);
 
+		next_fd = qbman_result_DQ_fd(dq_storage + 1);
 		/* Prefetch Annotation address for the parse results */
-		rte_prefetch0((void *)((uint64_t)DPAA2_GET_FD_ADDR(fd[num_rx])
+		rte_prefetch0((void *)((uint64_t)DPAA2_GET_FD_ADDR(next_fd)
 				+ DPAA2_FD_PTA_SIZE + 16));
 
 		if (unlikely(DPAA2_FD_GET_FORMAT(fd[num_rx]) == qbman_fd_sg))
-- 
2.7.4

Re: [dpdk-dev] [PATCH 00/14] DPAA2 PMD fixes and enhancements

[Ferruh Yigit]

On 12/7/2017 9:21 PM, Hemant Agrawal wrote:
> 
> This patch set contains some basic fixes, enhancements and optimzations
> for DPAA2 driver.
> 
> 
> Ashish Jain (1):
>   net/dpaa2: align the frame size in MTU set
> 
> Hemant Agrawal (8):
>   bus/fslmc: fix the cplusplus macro closure
>   drivers: change the deprecated memseg physaddr to iova
>   bus/fslmc: add support for dynamic iova for DPAA2 devices
>   net/dpaa2: link status check as driver flag
>   bus/fslmc: expose platform soc value register
>   bus/fslmc: add qman HW fq query count API
>   net/dpaa2: add Rx queue count support
>   net/dpaa2: add VLAN insert offload
> 
> Nipun Gupta (5):
>   bus/fslmc: add braces for pointers in macros
>   net/dpaa2: add parse function for LX2 device
>   net/dpaa2: optimize Rx path packet parsing
>   net/dpaa2: optimize Tx path for best case
>   net/dpaa2: prefetch the parse results from next fd

Series applied to dpdk-next-net/master, thanks.