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From: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
To: jerin.jacob@caviumnetworks.com, bruce.richardson@intel.com,
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Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Date: Wed, 13 Dec 2017 00:57:09 +0530
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Subject: [dpdk-dev] [PATCH 3/7] event/octeontx: add selftest to device
arguments
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Add selftest as a device argument that can be enabled by suppling
'self_test=1' as a vdev parameter
--vdev="event_octeontx,self_test=1"
The selftest is run after vdev creation is successfully complete.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
drivers/event/octeontx/Makefile | 3 ++-
drivers/event/octeontx/ssovf_evdev.c | 43 ++++++++++++++++++++++++++++++++++++
drivers/event/octeontx/ssovf_evdev.h | 6 +++++
3 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index fdf1b7385..adffd4f09 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -42,7 +42,7 @@ CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx/
CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx/
LDLIBS += -lrte_eal -lrte_eventdev -lrte_mempool_octeontx
-LDLIBS += -lrte_bus_pci
+LDLIBS += -lrte_bus_pci -lrte_kvargs -lrte_mempool -lrte_mbuf
LDLIBS += -lrte_bus_vdev
EXPORT_MAP := rte_pmd_octeontx_ssovf_version.map
@@ -54,6 +54,7 @@ LIBABIVER := 1
#
SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_worker.c
SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_evdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += selftest_octeontx.c
ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
CFLAGS_ssovf_worker.o += -fno-prefetch-loop-arrays
diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 117b1453e..80e8d23c7 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -38,6 +38,7 @@
#include <rte_eal.h>
#include <rte_ethdev.h>
#include <rte_event_eth_rx_adapter.h>
+#include <rte_kvargs.h>
#include <rte_lcore.h>
#include <rte_log.h>
#include <rte_malloc.h>
@@ -592,6 +593,15 @@ ssovf_close(struct rte_eventdev *dev)
return 0;
}
+static int
+ssovf_self_test(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ int *flag = opaque;
+ *flag = !!atoi(value);
+ return 0;
+}
+
/* Initialize and register event driver with DPDK Application */
static const struct rte_eventdev_ops ssovf_ops = {
.dev_infos_get = ssovf_info_get,
@@ -627,7 +637,14 @@ ssovf_vdev_probe(struct rte_vdev_device *vdev)
struct rte_eventdev *eventdev;
static int ssovf_init_once;
const char *name;
+ const char *params;
int ret;
+ int self_test;
+
+ static const char *const args[] = {
+ SSOVF_SELF_TEST_ARG,
+ NULL
+ };
name = rte_vdev_device_name(vdev);
/* More than one instance is not supported */
@@ -636,6 +653,30 @@ ssovf_vdev_probe(struct rte_vdev_device *vdev)
return -EINVAL;
}
+ params = rte_vdev_device_args(vdev);
+ if (params != NULL && params[0] != '\0') {
+ struct rte_kvargs *kvlist = rte_kvargs_parse(params, args);
+
+ if (!kvlist) {
+ ssovf_log_info(
+ "Ignoring unsupported paramss supplied '%s'",
+ name);
+ } else {
+ int ret = rte_kvargs_process(kvlist,
+ SSOVF_SELF_TEST_ARG,
+ ssovf_self_test, &self_test);
+ if (ret != 0) {
+ ssovf_log_err(
+ "%s: Error in selftest",
+ name);
+ rte_kvargs_free(kvlist);
+ return ret;
+ }
+ }
+
+ rte_kvargs_free(kvlist);
+ }
+
eventdev = rte_event_pmd_vdev_init(name, sizeof(struct ssovf_evdev),
rte_socket_id());
if (eventdev == NULL) {
@@ -686,6 +727,8 @@ ssovf_vdev_probe(struct rte_vdev_device *vdev)
edev->max_event_ports);
ssovf_init_once = 1;
+ if (self_test)
+ test_eventdev_octeontx();
return 0;
error:
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index b093a3e73..4332d2461 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -57,6 +57,9 @@
#define ssovf_log_err(fmt, args...) \
RTE_LOG(ERR, EVENTDEV, "[%s] %s() " fmt "\n", \
RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
+#define ssovf_log_selftest(fmt, args...) \
+ RTE_LOG(INFO, EVENTDEV, "[%s] %s() " fmt "\n", \
+ RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
#define SSO_MAX_VHGRP (64)
#define SSO_MAX_VHWS (32)
@@ -114,6 +117,8 @@
#define SSO_GRP_GET_PRIORITY 0x7
#define SSO_GRP_SET_PRIORITY 0x8
+#define SSOVF_SELF_TEST_ARG ("self_test")
+
/*
* In Cavium OcteonTX SoC, all accesses to the device registers are
* implictly strongly ordered. So, The relaxed version of IO operation is
@@ -196,5 +201,6 @@ uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
uint16_t nb_events, uint64_t timeout_ticks);
void ssows_flush_events(struct ssows *ws, uint8_t queue_id);
void ssows_reset(struct ssows *ws);
+void test_eventdev_octeontx(void);
#endif /* __SSOVF_EVDEV_H__ */
--
2.14.1