From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-f66.google.com (mail-pg0-f66.google.com [74.125.83.66]) by dpdk.org (Postfix) with ESMTP id 858A22904 for ; Fri, 5 Jan 2018 21:25:55 +0100 (CET) Received: by mail-pg0-f66.google.com with SMTP id q67so2388330pga.9 for ; Fri, 05 Jan 2018 12:25:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zDNaesYf8cnRpXQSywh7p9+L57OwCqs1GgxqNpv956c=; b=hu0vDgXoc1/agvhMlXrsr5PxSZ1Z+npQIaC6ZAkOmcjM3J2MURMhjwUZROw9vPD8XB ruGuZrk3s9t+Wr3PnVW5hUXMntDlRDKsyL+IX3FazP23/W6aWjyeeHIexFEivri0AYct rgNnRaUuwvx3QiApI3JiumA14KC/j/bQ0pEVxuRlr07PfrKHwzIFPCGX1u1vuBo+3S1W FXHROBVWxHsxnRqFh8rNe1u2Ht5bvc7k8utJbuwKvejT3nTNBoF3SUZ8/VpZ8rqUabC6 h5I+uCUAqqfUkZYVPq+vjr02qv5MdPwPhz2yNAfmu5AlfyCqWjjZ5ottNhNUl0iqSYnp a5zA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zDNaesYf8cnRpXQSywh7p9+L57OwCqs1GgxqNpv956c=; b=mmRQhACXpBteWMCu/bxhtN0W3l0/NRmcfEhNenZGKXaQs7QQ2eHMMUTBCtpkG8sx5q 8MQoz+eaDYp7WVJRT/fSYrLDH2tn2w9JN1o4tiMdTqu6r6ePYRKcTCyKnaMM5pCsieiR TxMRrcXlET827R3Dk5O5p8kyQN3LjRW6I83UkrEfP3IQKc3WvPTAzkJxze9DbY8/m+gj ro0NHNTQR7JLGoPKwqVLqozd/KxI85Cg/IhUN5f8MsLYRLn1H3td4P2u7/nP+KckxPK+ bbf1eDA98dgHIt0qjU104H7L6iEOnUtFj2DHH0MRiyHiJY48k+DtpWwc6MbQ3DiLxDPY V2Iw== X-Gm-Message-State: AKGB3mIIeevmvS+7XgVm2EsKK12PYbbO1bWcuiWNlHp4R1khZ82HRKZb EVl+4znOQse5yJeIgGopb/4h8Q== X-Google-Smtp-Source: ACJfBotfnUbCXVjfz48rpZUqbIQH6HDciCEblUvg5FevzTg6TN6fUexeboPqqei7dAAc299c9kZLrg== X-Received: by 10.98.54.4 with SMTP id d4mr4033485pfa.118.1515183954441; Fri, 05 Jan 2018 12:25:54 -0800 (PST) Received: from xeon-e3 (204-195-18-133.wavecable.com. [204.195.18.133]) by smtp.gmail.com with ESMTPSA id g1sm12025343pgc.32.2018.01.05.12.25.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 05 Jan 2018 12:25:54 -0800 (PST) Date: Fri, 5 Jan 2018 12:25:52 -0800 From: Stephen Hemminger To: Wenzhuo Lu Cc: dev@dpdk.org, Jingjing Wu Message-ID: <20180105122552.70da9a37@xeon-e3> In-Reply-To: <1515140505-38655-2-git-send-email-wenzhuo.lu@intel.com> References: <1511505206-97333-1-git-send-email-jingjing.wu@intel.com> <1515140505-38655-1-git-send-email-wenzhuo.lu@intel.com> <1515140505-38655-2-git-send-email-wenzhuo.lu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v4 01/15] net/avf/base: add base code for avf PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jan 2018 20:25:55 -0000 O > diff --git a/drivers/net/avf/base/avf_adminq.c b/drivers/net/avf/base/avf_adminq.c > new file mode 100644 > index 0000000..616e2a9 > --- /dev/null > +++ b/drivers/net/avf/base/avf_adminq.c > @@ -0,0 +1,1010 @@ > +/******************************************************************************* > + > +Copyright (c) 2013 - 2015, Intel Corporation > +All rights reserved. SPDX instead of more boilerplate. Copyright 2018? > +STATIC void avf_adminq_init_regs(struct avf_hw *hw) Why is there a STATIC macro?? ... > +/** > + * avf_config_asq_regs - configure ASQ registers > + * @hw: pointer to the hardware structure > + * > + * Configure base address and length registers for the transmit queue > + **/ > +STATIC enum avf_status_code avf_config_asq_regs(struct avf_hw *hw) > +{ > + enum avf_status_code ret_code = AVF_SUCCESS; > + u32 reg = 0; > + > + /* Clear Head and Tail */ > + wr32(hw, hw->aq.asq.head, 0); > + wr32(hw, hw->aq.asq.tail, 0); > + > + /* set starting point */ > +#ifdef INTEGRATED_VF > + if (avf_is_vf(hw)) > + wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | > + AVF_ATQLEN1_ATQENABLE_MASK)); > +#else > + wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | > + AVF_ATQLEN1_ATQENABLE_MASK)); > +#endif /* INTEGRATED_VF */ No ifdef please? do it in header file if you have to. as in: #ifdef INTERGRATED_VF #define avf_is_vf(hw) (1) ... > +/* internal (0x00XX) commands */ > + > +/* Get version (direct 0x0001) */ > +struct avf_aqc_get_version { > + __le32 rom_ver; > + __le32 fw_build; > + __le16 fw_major; > + __le16 fw_minor; > + __le16 api_major; > + __le16 api_minor; > +}; The use of __le16 and __le32 is a Linux kernel code style, typically not used in DPDK userland. Are you trying to share code here? ... > +/** > + * virtchnl_vc_validate_vf_msg > + * @ver: Virtchnl version info > + * @v_opcode: Opcode for the message > + * @msg: pointer to the msg buffer > + * @msglen: msg length > + * > + * validate msg format against struct for each opcode > + */ > +static inline int > +virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode, > + u8 *msg, u16 msglen) > +{ > This function is way to big to be an inline.