From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <adrien.mazarguil@6wind.com> Received: from mail-wr0-f177.google.com (mail-wr0-f177.google.com [209.85.128.177]) by dpdk.org (Postfix) with ESMTP id A2B4B1B340 for <dev@dpdk.org>; Tue, 16 Jan 2018 19:03:31 +0100 (CET) Received: by mail-wr0-f177.google.com with SMTP id 100so16159464wrb.7 for <dev@dpdk.org>; Tue, 16 Jan 2018 10:03:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=typrVyZlp8yK9SNkBY71KH/puPy+gSKuYC7I1L0pHok=; b=JkSeUNJMdlcJCBJZv/nsjzVvsaqmdXsk41ttD/J9+/9QPQKyHYo7wW+K0ey4YPZOOR T+EBRklfU84Ckb+WpzT7o8/Ohg4EyDOSyIQjch/HQ9L/hHORjqhrkM8SaFX7ofFwe4oX n/ELWgeEfDbx/qUGWRlLSizGOLpkBK1eo2vaSox0sqtAJu47H9raUXXVTJho5CC86iQI LesoewnCCMtt5GGadaNX0ejPTfY7wDz/93VDg0EIUBjHpoX9obSjd+nJHvKCWHGfdmno 7NwjKKemP3PxaPfyic86BXvKy4+OAaifO9zaL/k/N1thFh/iT9OjFbbLM3OCUYyIOB5r Z0cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=typrVyZlp8yK9SNkBY71KH/puPy+gSKuYC7I1L0pHok=; b=Ni72Eam+Mg30qCeh0EUC0ffL2YSIOZEk69FBz3klYRyWXK9+SmvvQ9iIpaQMsULBSz QIgIHWDf2I/5BHD0ix7EHN7OsxUsKcDXKfKg6TAwPnt1voAUMxfsNiN90uzLGjj7ffOH Kosg0/rFjvtFaQqIJxiXgqfxCRS81Ke6DIn2QYgKHAuJo9uTfAT5srav9+Ym/+wTzn4h IKOC3976l73E4HVJNFaqoMUy1WYvaQ0+y7Usax00iv1kBW/jDcqLyitHeoNVjCkWA7ZV Wdf94wsYDFQ5fS4RVQKAMAhRa1A1R9wRMDnC1/nOEOIVBMQyj7rrJ9TNEJ+xIDBN1WJs evNQ== X-Gm-Message-State: AKwxytcYeSXNGS/V6kZUKNV2iuYJeea7grRZ/Zf9g0DuhSwwzd/ZcQa8 bnx/b83HYF+u4OvxXy1gqmnxSA== X-Google-Smtp-Source: ACJfBougO3lCi5CqEOLA+R97mycJuYGHqgJt3QwQGlbay2/L7UR9LSXaUGG0TwFQdZLGzKV+HRdMlQ== X-Received: by 10.223.166.16 with SMTP id k16mr59758wrc.100.1516125811081; Tue, 16 Jan 2018 10:03:31 -0800 (PST) Received: from 6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id p94sm2253560wrb.95.2018.01.16.10.03.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Jan 2018 10:03:30 -0800 (PST) Date: Tue, 16 Jan 2018 19:03:18 +0100 From: Adrien Mazarguil <adrien.mazarguil@6wind.com> To: "Rybalchenko, Kirill" <kirill.rybalchenko@intel.com> Cc: "dev@dpdk.org" <dev@dpdk.org>, "Wu, Jingjing" <jingjing.wu@intel.com>, "Xing, Beilei" <beilei.xing@intel.com>, "johndale@cisco.com" <johndale@cisco.com>, "neescoba@cisco.com" <neescoba@cisco.com>, "nelio.laranjeiro@6wind.com" <nelio.laranjeiro@6wind.com>, "yskoh@mellanox.com" <yskoh@mellanox.com>, "Lu, Wenzhuo" <wenzhuo.lu@intel.com>, "Ananyev, Konstantin" <konstantin.ananyev@intel.com>, "Chilikin, Andrey" <andrey.chilikin@intel.com> Message-ID: <20180116180318.GK4256@6wind.com> References: <1511785787-127452-1-git-send-email-kirill.rybalchenko@intel.com> <20171204174304.GK4062@6wind.com> <696B43C21188DF4F9C9091AAE4789B824E2B6786@IRSMSX108.ger.corp.intel.com> <20180116111326.GD4256@6wind.com> <696B43C21188DF4F9C9091AAE4789B824E2B8CC8@IRSMSX108.ger.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <696B43C21188DF4F9C9091AAE4789B824E2B8CC8@IRSMSX108.ger.corp.intel.com> Subject: Re: [dpdk-dev] [PATCH] ethdev: increase flow type limit from 32 to 64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Tue, 16 Jan 2018 18:03:31 -0000 Hi Kirill, On Tue, Jan 16, 2018 at 05:23:05PM +0000, Rybalchenko, Kirill wrote: > Hi Adrien, > after some discussion we found that change I've done > in Mellanox PMD is not really necessary: size of array > flow_types_mask[] is still 1 and the loop in patch > > for (i = 0; i < RTE_FLOW_MASK_ARRAY_SIZE; i++) > info->flow_types_mask[i] = 0ULL; > > will work exactly in the same way as assignment > > fdir_info->flow_types_mask[0] = 0; > > in old version, though new version looks more proper > from programming style point of view. > So what do you think, shall I modify Mellanox PMD, > or better leave it as it is? If functionally the same, just drop the mlx change (involving fewer reviewers is a good thing, right? :) If it addressed a bug, it should have come as a separate "Fixes" patch anyway. > > -----Original Message----- > > From: Adrien Mazarguil [mailto:adrien.mazarguil@6wind.com] > > Sent: Tuesday 16 January 2018 11:13 > > To: Rybalchenko, Kirill <kirill.rybalchenko@intel.com> > > Cc: dev@dpdk.org; Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei > > <beilei.xing@intel.com>; johndale@cisco.com; neescoba@cisco.com; > > nelio.laranjeiro@6wind.com; yskoh@mellanox.com; Lu, Wenzhuo > > <wenzhuo.lu@intel.com>; Ananyev, Konstantin > > <konstantin.ananyev@intel.com>; Chilikin, Andrey > > <andrey.chilikin@intel.com> > > Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64 > > > > On Tue, Jan 09, 2018 at 03:16:13PM +0000, Rybalchenko, Kirill wrote: > > > > -----Original Message----- > > > > From: Adrien Mazarguil [mailto:adrien.mazarguil@6wind.com] > > > > Sent: Monday 4 December 2017 17:43 > > > > To: Rybalchenko, Kirill <kirill.rybalchenko@intel.com> > > > > Cc: dev@dpdk.org; Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei > > > > <beilei.xing@intel.com>; johndale@cisco.com; neescoba@cisco.com; > > > > nelio.laranjeiro@6wind.com; yskoh@mellanox.com; Lu, Wenzhuo > > > > <wenzhuo.lu@intel.com>; Ananyev, Konstantin > > > > <konstantin.ananyev@intel.com>; Chilikin, Andrey > > > > <andrey.chilikin@intel.com> > > > > Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64 > > > > > > > > Hi Kirill, > > > > > > > > On Mon, Nov 27, 2017 at 12:29:47PM +0000, Kirill Rybalchenko wrote: > > > > > Increase the internal limit for flow types from 32 to 64 to > > > > > support future flow type extensions. > > > > > Change type of variables from uint32_t[] to uint64_t[]: > > > > > rte_eth_fdir_info.flow_types_mask > > > > > rte_eth_hash_global_conf.sym_hash_enable_mask > > > > > rte_eth_hash_global_conf.valid_bit_mask > > > > > > > > > > This modification affects the following components: > > > > > net/i40e > > > > > net/enic > > > > > net/mlx5 > > > > > net/ixgbe > > > > > app/testpmd > > > > > > > > > > Signed-off-by: Kirill Rybalchenko <kirill.rybalchenko@intel.com> > > > > > > > > Can you elaborate a bit on the need for these changes? > > > > Have you considered implementing those future extensions through > > > > rte_flow instead? > > > > > > Hi Adrien, this is not a new feature but rather fix of existing limitation. > > > In current implementation the symmetric hash mask and flow mask are > > > represented by 32-bit variable, while hardware bitmask has 64 bits. > > > Unfortunately, this modification changes ABI of the library as it > > > changes size of rte_eth_fdir_info structure. All related PMDs (listed > > > above) had to be modified accordingly. > > > > OK, no problem with this change. I assume you'll re-submit it since you sent a > > deprecation notice, we'll review/ack subsequent mlx5 patches. > > > > -- > > Adrien Mazarguil > > 6WIND -- Adrien Mazarguil 6WIND