From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-eopbgr60071.outbound.protection.outlook.com [40.107.6.71]) by dpdk.org (Postfix) with ESMTP id 6B54D1B2CC for ; Fri, 19 Jan 2018 01:44:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=xrMQuEp2H7Ym124kgT6v1UVsrJ6F32DcafVZcJCl1T4=; b=pNGJLlvl7mbVIkgYRuzQcm9yUDoQsQFM2ZUUGQfailiaeYnNj8vLxrvdZEInvb0hyPsFVDIv78trS6K3WRg57poDfyhFTsots5vHT/zS6F7PtWgRgUZf8C6Byo6SX1ctOJNvTOGXSiILTfpwxxwVKPLkk8Eoqk1fnUNSrgn9t0I= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; Received: from mellanox.com (209.116.155.178) by VI1PR0501MB2045.eurprd05.prod.outlook.com (2603:10a6:800:36::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.428.17; Fri, 19 Jan 2018 00:44:46 +0000 From: Yongseok Koh To: adrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, chaozhu@linux.vnet.ibm.com, jerin.jacob@caviumnetworks.com, jianbo.liu@arm.com Cc: dev@dpdk.org, Yongseok Koh Date: Thu, 18 Jan 2018 16:44:22 -0800 Message-Id: <20180119004430.15305-1-yskoh@mellanox.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180116011050.18866-1-yskoh@mellanox.com> References: <20180116011050.18866-1-yskoh@mellanox.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [209.116.155.178] X-ClientProxiedBy: DM5PR2001CA0022.namprd20.prod.outlook.com (2603:10b6:4:16::32) To VI1PR0501MB2045.eurprd05.prod.outlook.com (2603:10a6:800:36::19) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4ada41b0-0b04-405a-6084-08d55ed5d7d9 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; 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Yongseok Koh (8): eal: introduce DMA memory barriers eal/x86: define DMA memory barriers eal/ppc64: define DMA memory barriers eal/armv7: define DMA memory barriers eal/arm64: define DMA memory barriers net/mlx5: remove unnecessary memory barrier net/mlx5: replace IO memory barrier with DMA memory barrier net/mlx5: fix synchonization on polling Rx completions drivers/net/mlx5/mlx5_rxq.c | 1 - drivers/net/mlx5/mlx5_rxtx.c | 5 +- drivers/net/mlx5/mlx5_rxtx.h | 2 +- drivers/net/mlx5/mlx5_rxtx_vec.h | 2 +- drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 53 ++++++++++++---------- drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 2 +- .../common/include/arch/arm/rte_atomic_32.h | 4 ++ .../common/include/arch/arm/rte_atomic_64.h | 4 ++ .../common/include/arch/ppc_64/rte_atomic.h | 4 ++ .../common/include/arch/x86/rte_atomic.h | 4 ++ lib/librte_eal/common/include/generic/rte_atomic.h | 52 +++++++++++++++++++++ 11 files changed, 104 insertions(+), 29 deletions(-) -- 2.11.0