From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 6B180324D for ; Mon, 22 Jan 2018 13:30:58 +0100 (CET) X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jan 2018 04:30:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,396,1511856000"; d="scan'208";a="24362036" Received: from bricha3-mobl3.ger.corp.intel.com ([10.237.221.77]) by fmsmga001.fm.intel.com with SMTP; 22 Jan 2018 04:30:54 -0800 Received: by (sSMTP sendmail emulation); Mon, 22 Jan 2018 12:30:53 +0000 Date: Mon, 22 Jan 2018 12:30:53 +0000 From: Bruce Richardson To: Pavan Nikhilesh Cc: jerin.jacob@caviumnetworks.com, harry.van.haaren@intel.com, herbert.guan@arm.com, hemant.agrawal@nxp.com, dev@dpdk.org Message-ID: <20180122123053.GA19076@bricha3-MOBL3.ger.corp.intel.com> References: <20171219105338.198727-1-bruce.richardson@intel.com> <20180122114649.5907-1-pbhagavatula@caviumnetworks.com> <20180122114649.5907-2-pbhagavatula@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180122114649.5907-2-pbhagavatula@caviumnetworks.com> Organization: Intel Research and Development Ireland Ltd. User-Agent: Mutt/1.9.1 (2017-09-22) Subject: Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Jan 2018 12:30:59 -0000 On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote: > Added support for detecting march and mcpu by reading midr_el1 register. > The implementer, primary part number values read can be used to figure > out the underlying arm cpu. > > Signed-off-by: Pavan Nikhilesh > --- > app/test-pmd/meson.build | 2 +- > config/arm/armv8_machine.py | 18 +++++++++ > config/arm/meson.build | 95 +++++++++++++++++++++++++++++++++++++++++---- > config/meson.build | 19 ++++----- > drivers/meson.build | 2 +- > examples/meson.build | 2 +- > lib/meson.build | 2 +- > meson.build | 2 +- > test/test/meson.build | 2 +- > 9 files changed, 121 insertions(+), 23 deletions(-) > create mode 100755 config/arm/armv8_machine.py > > diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build > index e819677a5..2a3f0ba1f 100644 > --- a/app/test-pmd/meson.build > +++ b/app/test-pmd/meson.build > @@ -45,7 +45,7 @@ endif > > executable('dpdk-testpmd', > sources, > - c_args: machine_arg, > + c_args: machine_args, > link_whole: link_libs, > dependencies: dep_objs, > install_rpath: join_paths(get_option('prefix'), driver_install_path), > diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py > new file mode 100755 > index 000000000..404866d2f > --- /dev/null > +++ b/config/arm/armv8_machine.py > @@ -0,0 +1,18 @@ > +#!/usr/bin/python > +# SPDX-License-Identifier: BSD-3-Clause > +# Copyright(c) 2017 Cavium, Inc > + > +ident = [] > +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1' > +with open(fname) as f: > + content = f.read() > + > +midr_el1 = (int(content.rstrip('\n'), 16)) > + > +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer > +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant > +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture > +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number > +ident.append(hex(midr_el1 & 0xF)) # Revision > + > +print(' '.join(ident)) > diff --git a/config/arm/meson.build b/config/arm/meson.build > index f05de4c2c..212b94499 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -5,28 +5,107 @@ > # for checking defines we need to use the correct compiler flags > march_opt = '-march=@0@'.format(machine) > > -dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) > -if cc.sizeof('void *') == 8 > - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) > - dpdk_conf.set('RTE_ARCH_ARM64', 1) > - dpdk_conf.set('RTE_ARCH_64', 1) > +machine_args_generic = [ > + ['default', ['-march=armv8-a+crc+crypto']]] > +machine_args_cavium = [ > + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], > + ['0xa1', ['-mcpu=thunderxt88']], > + ['0xa2', ['-mcpu=thunderxt81']], > + ['0xa3', ['-mcpu=thunderxt83']]] > + > +flags_generic = [[]] > +flags_cavium = [ > + ['RTE_MACHINE', '"thunderx"'], > + ['RTE_CACHE_LINE_SIZE', 128], > + ['RTE_MAX_NUMA_NODES', 2], > + ['RTE_MAX_LCORE', 96], > + ['RTE_MAX_VFIO_GROUPS', 128], > + ['RTE_RING_USE_C11_MEM_MODEL', false]] > + > +impl_generic = ['Generic armv8', flags_generic, machine_args_generic] > +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] > + > +if cc.get_define('__clang__') != '' > + dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang') > + dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1) > else > + dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc') > + dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1) > +endif > + > +dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) > + > +if cc.sizeof('void *') != 8 > dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) > dpdk_conf.set('RTE_ARCH_ARM', 1) > dpdk_conf.set('RTE_ARCH_ARMv7', 1) > +else > + dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) > + dpdk_conf.set('RTE_ARCH_ARM64', 1) > + dpdk_conf.set('RTE_ARCH_64', 1) > + > + machine = [] > + cmd_generic = ['generic', '', '', 'default', ''] > + cmd_output = cmd_generic # Set generic by default > + machine_args = [] # Clear previous machine args > + if not meson.is_cross_build() > + # The script returns ['Implementer', 'Variant', 'Architecture', > + # 'Primary Part number', 'Revision'] > + detect_vendor = find_program(join_paths( > + meson.current_source_dir(), 'armv8_machine.py')) > + cmd = run_command(detect_vendor.path()) > + if cmd.returncode() == 0 > + cmd_output = cmd.stdout().strip().split(' ') > + endif > + # Set to generic if variable is not found > + machine = get_variable('impl_' + cmd_output[0], 'generic') > + endif > + > + if machine == 'generic' > + machine = impl_generic > + cmd_output = cmd_generic > + endif > + > + message('Implementer : ' + machine[0]) When cross-compiling for arm I get an error at this line: Meson encountered an error in file config/arm/meson.build, line 69, column 1: Index 0 out of bounds of array of size 0. Regards, /Bruce