From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id ECB5437B4 for ; Mon, 22 Jan 2018 15:09:32 +0100 (CET) X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jan 2018 06:09:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,396,1511856000"; d="scan'208";a="28450967" Received: from bricha3-mobl3.ger.corp.intel.com ([10.237.221.77]) by orsmga002.jf.intel.com with SMTP; 22 Jan 2018 06:09:29 -0800 Received: by (sSMTP sendmail emulation); Mon, 22 Jan 2018 14:09:28 +0000 Date: Mon, 22 Jan 2018 14:09:28 +0000 From: Bruce Richardson To: Pavan Nikhilesh Cc: jerin.jacob@caviumnetworks.com, harry.van.haaren@intel.com, herbert.guan@arm.com, hemant.agrawal@nxp.com, dev@dpdk.org Message-ID: <20180122140927.GA9108@bricha3-MOBL3.ger.corp.intel.com> References: <20171219105338.198727-1-bruce.richardson@intel.com> <20180122114649.5907-1-pbhagavatula@caviumnetworks.com> <20180122114649.5907-2-pbhagavatula@caviumnetworks.com> <20180122123053.GA19076@bricha3-MOBL3.ger.corp.intel.com> <20180122123717.7ku5z6yr5dz6mit3@Pavan-LT> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180122123717.7ku5z6yr5dz6mit3@Pavan-LT> Organization: Intel Research and Development Ireland Ltd. User-Agent: Mutt/1.9.1 (2017-09-22) Subject: Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Jan 2018 14:09:33 -0000 On Mon, Jan 22, 2018 at 06:07:18PM +0530, Pavan Nikhilesh wrote: > On Mon, Jan 22, 2018 at 12:30:53PM +0000, Bruce Richardson wrote: > > On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote: > > > Added support for detecting march and mcpu by reading midr_el1 > > > register. The implementer, primary part number values read can be > > > used to figure out the underlying arm cpu. > > > > > > Signed-off-by: Pavan Nikhilesh > > > --- app/test-pmd/meson.build | 2 +- > > > config/arm/armv8_machine.py | 18 +++++++++ config/arm/meson.build > > > | 95 +++++++++++++++++++++++++++++++++++++++++---- > > > config/meson.build | 19 ++++----- drivers/meson.build > > > | 2 +- examples/meson.build | 2 +- lib/meson.build > > > | 2 +- meson.build | 2 +- test/test/meson.build > > > | 2 +- 9 files changed, 121 insertions(+), 23 deletions(-) create > > > mode 100755 config/arm/armv8_machine.py > > > > > > > + + if machine == 'generic' + machine = > > > impl_generic + cmd_output = cmd_generic + endif + > > > + message('Implementer : ' + machine[0]) > > > > When cross-compiling for arm I get an error at this line: > > > > Meson encountered an error in file config/arm/meson.build, line > > 69, column 1: Index 0 out of bounds of array of size 0. > > > Will be sending v2 of the cross patch soon(once directory structure > and file name is fininlized) that would resolve this issue. > So is there an expected patch ordering here? I believe the set for adding Octeon drivers to build is ok to merge, though there is a small change for renaming machine_arg to machine_args in it if these patches are not applied first. Will I take that set, if my recent rebase on top of mainline has not broken it, and you can rebase these to take account of that extra driver? /Bruce