From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from NAM01-SN1-obe.outbound.protection.outlook.com (mail-sn1nam01on0060.outbound.protection.outlook.com [104.47.32.60]) by dpdk.org (Postfix) with ESMTP id CBA0A58CE for ; Mon, 22 Jan 2018 15:45:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=v3sCAy9K+DU/JHCVL2TkAnYYcat/Fkz8v6uhD9RKn6s=; b=czRVh1QPskfIXnk9dRr+/FyyoghG5FrdEbmrfkqTigWKZRO+Cv/eRGT4Rezt5OBOxoYHIge29m5UHpzAmDAQOAPwOLlAbkbj+45EAPEfY0Ufo1v84yGM+lcD7QqztA2RayTgZbqkQfNUN1D0UYkidTYgkqD5E0eExsRtS6GdJVw= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Pavan.Bhagavatula@cavium.com; Received: from Pavan-LT (111.93.218.67) by MWHPR07MB3471.namprd07.prod.outlook.com (10.164.192.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.428.17; Mon, 22 Jan 2018 14:45:02 +0000 Date: Mon, 22 Jan 2018 20:14:43 +0530 From: Pavan Nikhilesh To: Bruce Richardson , jerin.jacob@caviumnetworks.com, harry.van.haaren@intel.com, herbert.guan@arm.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org Message-ID: <20180122144442.hnpnih73h4dgj42u@Pavan-LT> References: <20171219105338.198727-1-bruce.richardson@intel.com> <20180122114649.5907-1-pbhagavatula@caviumnetworks.com> <20180122114649.5907-2-pbhagavatula@caviumnetworks.com> <20180122123053.GA19076@bricha3-MOBL3.ger.corp.intel.com> <20180122123717.7ku5z6yr5dz6mit3@Pavan-LT> <20180122140927.GA9108@bricha3-MOBL3.ger.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; 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MWHPR07MB3471; 6:etLcvMp3mA8SSUdfgYKNfLBf2Zq+JqvOnsgZlv0mwcLuwjT4radjYQsw211V7+IJ7jlG1NAfoyq3h8lV8xtjUep6hr8YgSt4Yszn3oXHIO9VVVb+ibb+ko9hlg5F9vZStg5/3LycYHVOXMqfBbgB91uzYwH0eo0HbmFQG8k5yfMV2u5oyJpygF3pxaba2Q9J6NhxOIWyuSMCucJ9L0DRwFMIayV/A40SfKQ+HVyE4VN4fdfXpYI20mGzMyjUVh+GIZhiNC7u+q5meS07VILZK1OGPyiiTudXc/3EZomrANl0Z6NUKgXIsrhR9xsPi+2DCn3eTiAxvEmDY44mZvDnxDpW1zmDQz9jCQZtc6ITD7Y=; 5:+olcDOZ0Yf5mXZ/o8YP92L04jZRfVzubSpOLTXMp91z+7GsSvHrUZVsUjUK1X1eO6Zax24fvIms2Dh4sCYJ0N2atZ9IScrOkJeGtJs03m71aOXxEgLi+AVl/WDEkj6htExd5+dfb2Gms7IzY6HiTEst0QD0SYANYBzabOI3kkVM=; 24:YuIA9m1phdO+4TAn1P+BpC2qYy0EHvcYex6F1256lnAQAzRhEmy5j95YO2WsP/CqSLFLNom6hmWkRok7Y2d/deDcIPmNR2fqfyAL6kyXico=; 7:ykacIkQKhQKBfLA3iJw002R4JtidhqPwr7mhF78XRkXoCH2FfzQZ8YVb9ox/wTjpaux415kDTD/z1dW/0BdlLTB66QjoKimJ8SV+n84z5vpfIDZItFpFpYAtH7l3u+6PNhczkrp/W+Oixxxu+ttdIv8+A+YoZpWR05RNZbKp4E3CFR8RUlHkhJ4qRdRGkeN3/IlpAIIeyTITlYnJnbHTV2EJsTE0yWM2UrpzWWxrENPSovKWUQJ6MLgDHPIfOfDf SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jan 2018 14:45:02.4243 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c7b370a9-4599-4c47-1d29-08d561a6b954 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR07MB3471 Subject: Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Jan 2018 14:45:07 -0000 On Mon, Jan 22, 2018 at 02:09:28PM +0000, Bruce Richardson wrote: > On Mon, Jan 22, 2018 at 06:07:18PM +0530, Pavan Nikhilesh wrote: > > On Mon, Jan 22, 2018 at 12:30:53PM +0000, Bruce Richardson wrote: > > > On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote: > > > > Added support for detecting march and mcpu by reading midr_el1 > > > > register. The implementer, primary part number values read can be > > > > used to figure out the underlying arm cpu. > > > > > > > > Signed-off-by: Pavan Nikhilesh > > > > --- app/test-pmd/meson.build | 2 +- > > > > config/arm/armv8_machine.py | 18 +++++++++ config/arm/meson.build > > > > | 95 +++++++++++++++++++++++++++++++++++++++++---- > > > > config/meson.build | 19 ++++----- drivers/meson.build > > > > | 2 +- examples/meson.build | 2 +- lib/meson.build > > > > | 2 +- meson.build | 2 +- test/test/meson.build > > > > | 2 +- 9 files changed, 121 insertions(+), 23 deletions(-) create > > > > mode 100755 config/arm/armv8_machine.py > > > > > > > > > > + + if machine == 'generic' + machine = > > > > impl_generic + cmd_output = cmd_generic + endif + > > > > + message('Implementer : ' + machine[0]) > > > > > > When cross-compiling for arm I get an error at this line: > > > > > > Meson encountered an error in file config/arm/meson.build, line > > > 69, column 1: Index 0 out of bounds of array of size 0. > > > > > Will be sending v2 of the cross patch soon(once directory structure > > and file name is fininlized) that would resolve this issue. > > > So is there an expected patch ordering here? I believe the set for > adding Octeon drivers to build is ok to merge, though there is a small > change for renaming machine_arg to machine_args in it if these patches > are not applied first. Will I take that set, if my recent rebase on top > of mainline has not broken it, and you can rebase these to take account > of that extra driver? Now that the cross files naming and directory structure is agreed upon I will merge the patches as a single set and send it fixing the machine_args part for app/test-eventdev. > > /Bruce Thanks, Pavan.