From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from NAM03-DM3-obe.outbound.protection.outlook.com (mail-dm3nam03on0062.outbound.protection.outlook.com [104.47.41.62]) by dpdk.org (Postfix) with ESMTP id AA2B12BE5 for ; Mon, 22 Jan 2018 16:27:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=fOjTVmBlWV+qDTQCqmB+Hra6cUbavAzKiMO09S7JS2A=; b=cKNz7KO4OuVkYNNAR3POWYogw16ZihG0LlGqGpLUNsYm8egN/xStOY6MTPjNxnU/vgIrOzvMxcQROtvYHfWrjS2MM1Utl/la3gnszzsZM3YLXBYSkOM7eebcTwfQHwUZhn7JB45dF5azKe/wghpP5AMjBkF9+xFNAEEl19DezkI= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Pavan.Bhagavatula@cavium.com; Received: from localhost.localdomain (111.93.218.67) by DM5PR07MB3465.namprd07.prod.outlook.com (10.164.153.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.428.17; Mon, 22 Jan 2018 15:27:36 +0000 From: Pavan Nikhilesh To: jerin.jacob@caviumnetworks.com, bruce.richardson@intel.com, harry.van.haaren@intel.com, herbert.guan@arm.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, Pavan Nikhilesh Date: Mon, 22 Jan 2018 20:56:29 +0530 Message-Id: <20180122152632.13685-1-pbhagavatula@caviumnetworks.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171219105338.198727-1-bruce.richardson@intel.com> References: <20171219105338.198727-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [111.93.218.67] X-ClientProxiedBy: SG2PR0601CA0004.apcprd06.prod.outlook.com (10.170.128.14) To DM5PR07MB3465.namprd07.prod.outlook.com (10.164.153.20) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6dad5526-7f75-4fea-6ee4-08d561acad57 X-Microsoft-Antispam: UriScan:; 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This can be tested by doing a cross-compile for armv8-a type using the linaro gcc toolchain. meson arm-build --cross-file aarch64_cross.txt ninja -C arm-build where aarch64_cross.txt contained the following [binaries] c = 'aarch64-linux-gnu-gcc' cpp = 'aarch64-linux-gnu-cpp' ar = 'aarch64-linux-gnu-ar' [host_machine] system = 'linux' cpu_family = 'aarch64' cpu = 'armv8-a' endian = 'little' Signed-off-by: Bruce Richardson Signed-off-by: Pavan Nikhilesh --- v6 Changes: - add documentation for cross compiling with meson - rebase onto master - fix commit logs v5 Changes: - Use generic_armv8 config when script returns unknows machine args v4 Changes: - use set_quoted to set config instead of explicitly using quotes. v3 Changes: - Fix missing SPDX license tags v2 Changes: - Merged RFC patch. - Added framework to easily other vendor specific flags - renamed machine_arg to machine_args config/arm/meson.build | 36 ++++++++++++++++++++++ config/meson.build | 4 ++- lib/librte_eal/common/arch/arm/meson.build | 5 +++ lib/librte_eal/common/include/arch/arm/meson.build | 29 +++++++++++++++++ 4 files changed, 73 insertions(+), 1 deletion(-) create mode 100644 config/arm/meson.build create mode 100644 lib/librte_eal/common/arch/arm/meson.build create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build diff --git a/config/arm/meson.build b/config/arm/meson.build new file mode 100644 index 000000000..f05de4c2c --- /dev/null +++ b/config/arm/meson.build @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2017 Intel Corporation. +# Copyright(c) 2017 Cavium, Inc + +# for checking defines we need to use the correct compiler flags +march_opt = '-march=@0@'.format(machine) + +dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) +if cc.sizeof('void *') == 8 + dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) + dpdk_conf.set('RTE_ARCH_ARM64', 1) + dpdk_conf.set('RTE_ARCH_64', 1) +else + dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) + dpdk_conf.set('RTE_ARCH_ARM', 1) + dpdk_conf.set('RTE_ARCH_ARMv7', 1) +endif + +if cc.get_define('__ARM_NEON', args: march_opt) != '' + dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1) + compile_time_cpuflags += ['RTE_CPUFLAG_NEON'] +endif + +if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != '' + dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1) + compile_time_cpuflags += ['RTE_CPUFLAG_CRC32'] +endif + +if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != '' + dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1) + dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1) + dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1) + dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1) + compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL', + 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] +endif diff --git a/config/meson.build b/config/meson.build index 95223042f..fa55c53a5 100644 --- a/config/meson.build +++ b/config/meson.build @@ -56,8 +56,10 @@ endforeach compile_time_cpuflags = [] if host_machine.cpu_family().startswith('x86') arch_subdir = 'x86' - subdir(arch_subdir) +elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch') + arch_subdir = 'arm' endif +subdir(arch_subdir) dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags)) # set the install path for the drivers diff --git a/lib/librte_eal/common/arch/arm/meson.build b/lib/librte_eal/common/arch/arm/meson.build new file mode 100644 index 000000000..c6bd92272 --- /dev/null +++ b/lib/librte_eal/common/arch/arm/meson.build @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2017 Intel Corporation. + +eal_common_arch_sources = files('rte_cpuflags.c', + 'rte_cycles.c') diff --git a/lib/librte_eal/common/include/arch/arm/meson.build b/lib/librte_eal/common/include/arch/arm/meson.build new file mode 100644 index 000000000..77893fa35 --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/meson.build @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2017 Intel Corporation. + +install_headers( + 'rte_atomic_32.h', + 'rte_atomic_64.h', + 'rte_atomic.h', + 'rte_byteorder.h', + 'rte_cpuflags_32.h', + 'rte_cpuflags_64.h', + 'rte_cpuflags.h', + 'rte_cycles_32.h', + 'rte_cycles_64.h', + 'rte_cycles.h', + 'rte_io_64.h', + 'rte_io.h', + 'rte_memcpy_32.h', + 'rte_memcpy_64.h', + 'rte_memcpy.h', + 'rte_pause_32.h', + 'rte_pause_64.h', + 'rte_pause.h', + 'rte_prefetch_32.h', + 'rte_prefetch_64.h', + 'rte_prefetch.h', + 'rte_rwlock.h', + 'rte_spinlock.h', + 'rte_vect.h', + subdir: get_option('include_subdir_arch')) -- 2.16.0