From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-ve1eur01on0046.outbound.protection.outlook.com [104.47.1.46]) by dpdk.org (Postfix) with ESMTP id B16011B173 for ; Thu, 25 Jan 2018 22:03:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=EgNxJamei91sT7Iy6kJwWoQPTaABFpOq3jDwtnU04u0=; b=XSFJP3iS2HcWU/j1R0HV3+LwophGW/9aZ7GhbRpWd25P8HwDhmR+lF59hqtIiz2ym0e3d18pWNjEYn2k0375yKLDNKSk13EgFwa2sxku1oBmpx073ySrBEjpm5qDfbKt4KTkR/7sJSiQ/uRtZEYtHzOMtW/szYRSWIcL45bv/uo= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; Received: from mellanox.com (209.116.155.178) by DB6PR0501MB2037.eurprd05.prod.outlook.com (2603:10a6:4:6::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.444.14; Thu, 25 Jan 2018 21:03:10 +0000 From: Yongseok Koh To: adrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, chaozhu@linux.vnet.ibm.com, jerin.jacob@caviumnetworks.com, jianbo.liu@arm.com Cc: arybchenko@solarflare.com, dev@dpdk.org, Yongseok Koh Date: Thu, 25 Jan 2018 13:02:43 -0800 Message-Id: <20180125210250.38233-3-yskoh@mellanox.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180125210250.38233-1-yskoh@mellanox.com> References: <20180119004430.15305-1-yskoh@mellanox.com> <20180125210250.38233-1-yskoh@mellanox.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [209.116.155.178] X-ClientProxiedBy: CY4PR15CA0014.namprd15.prod.outlook.com (2603:10b6:910:14::24) To DB6PR0501MB2037.eurprd05.prod.outlook.com (2603:10a6:4:6::19) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 6f91cff9-3e80-41ad-48c7-08d564370b70 X-Microsoft-Antispam: UriScan:; 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Signed-off-by: Yongseok Koh Acked-by: Andrew Rybchenko --- lib/librte_eal/common/include/generic/rte_atomic.h | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h b/lib/librte_eal/common/include/generic/rte_atomic.h index 58c40489b..50e1b8a4d 100644 --- a/lib/librte_eal/common/include/generic/rte_atomic.h +++ b/lib/librte_eal/common/include/generic/rte_atomic.h @@ -110,6 +110,45 @@ static inline void rte_io_wmb(void); static inline void rte_io_rmb(void); ///@} +/** @name Coherent I/O Memory Barrier + * + * Coherent I/O memory barrier is a lightweight version of I/O memory + * barriers which are system-wide data synchronization barriers. This + * is for only coherent memory domain between lcore and I/O device but + * it is same as the I/O memory barriers in most of architectures. + * However, some architecture provides even lighter barriers which are + * somewhere in between I/O memory barriers and SMP memory barriers. + * For example, in case of ARMv8, DMB(data memory barrier) instruction + * can have different shareability domains - inner-shareable and + * outer-shareable. And inner-shareable DMB fits for SMP memory + * barriers and outer-shareable DMB for coherent I/O memory barriers, + * which acts on coherent memory. + * + * In most cases, I/O memory barriers are safer but if operations are + * on coherent memory instead of incoherent MMIO region of a device, + * then coherent I/O memory barriers can be used and this could bring + * performance gain depending on architectures. + */ +///@{ +/** + * Write memory barrier for coherent memory between lcore and I/O device + * + * Guarantees that the STORE operations on coherent memory that + * precede the rte_cio_wmb() call are visible to I/O device before the + * STORE operations that follow it. + */ +static inline void rte_cio_wmb(void); + +/** + * Read memory barrier for coherent memory between lcore and I/O device + * + * Guarantees that the LOAD operations on coherent memory updated by + * I/O device that precede the rte_cio_rmb() call are visible to CPU + * before the LOAD operations that follow it. + */ +static inline void rte_cio_rmb(void); +///@} + #endif /* __DOXYGEN__ */ /** -- 2.11.0