From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f195.google.com (mail-pf0-f195.google.com [209.85.192.195]) by dpdk.org (Postfix) with ESMTP id B9CA42C01 for ; Thu, 8 Mar 2018 22:17:03 +0100 (CET) Received: by mail-pf0-f195.google.com with SMTP id j2so417817pff.10 for ; Thu, 08 Mar 2018 13:17:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qjz4YOqnyrPkxnKiPvAURjjxvqAwSy1O5IZ9tMsc9Gw=; b=U/jzbFju5W1DN9229tN8LVNhQ5+T/yo0yJjBWehUMmHTyogVqyQh7FffW3lpYaJA0s nOvZEaz9m8RX4vCbn0KaoX+Rk86LZicT4yJzRplltN/K8tYaOLTp8tslRbtCJubnJSEA fxj5DLRi/P9pphN6dpLQSNWE7NWabwaXQbh39CtywkbpaqWn7WaEHtM3SA+YJwlMf5KG 6fq7Pq4ZzgDDXxP6X4ii0ar37ZYQAZr+cS9laizjOExuec09cD4e/oDMS7dQlSZw/hAk 4mZIA7AdtKnDFHZcPxJK9pu85BSjYfID6DLXbKiYzmTiIfEwM2stQvpFWWu5q1UL4cVv hevQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qjz4YOqnyrPkxnKiPvAURjjxvqAwSy1O5IZ9tMsc9Gw=; b=AYj4FBlbQcdImCO6+apA5MEE6BnR5Rbim1io0pKvb+W55MsIXfuKXoUO5k5C1VmDUV 3Fv8W1I6fN7SqsfJsgXLBlALsbWyaA38Fq9oyQyypE/sTssGhW7d/SlrcUk2y/88Jy2Z yNJVu1k/JXgB++TxLxqEPjKnDhqmKRulJMRbBLCP0RzRxeG/E6AvtLIljqfLLRFM/lq5 PrSm1IZNT2xu5t0hw6SH7y2cnaxuphkn3fyYUnr2Wrqfnw9S/L683cAP6Tm3zSPErOcq /5A64HxXdxwzVhNrqoYMQZaGWgsNZb6C6VXT8ly3+hISL7xrKew20uEozQEeASdlMDVX /5Hw== X-Gm-Message-State: APf1xPAeTinwiBu1/KaRlWJyHu9SrqsXMk5CDLDtot7GxK0nauiDP8yW sOVpCBrgsUwAvb/3HYdVM05kSw== X-Google-Smtp-Source: AG47ELuXpCTYXV0Mvae2n6odBKx62Kd1Cb8UyVtUZ0rHLjt3xtJ2Xz2bJ9b1J5zOOiIIkhUzTFGnpw== X-Received: by 10.99.175.8 with SMTP id w8mr21851156pge.390.1520543822540; Thu, 08 Mar 2018 13:17:02 -0800 (PST) Received: from xeon-e3 (204-195-71-95.wavecable.com. [204.195.71.95]) by smtp.gmail.com with ESMTPSA id h186sm42398990pfg.15.2018.03.08.13.17.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 08 Mar 2018 13:17:02 -0800 (PST) Date: Thu, 8 Mar 2018 13:17:00 -0800 From: Stephen Hemminger To: Xiao Wang Cc: ferruh.yigit@intel.com, dev@dpdk.org Message-ID: <20180308131700.1569797c@xeon-e3> In-Reply-To: <1512784653-128951-1-git-send-email-xiao.w.wang@intel.com> References: <1512784653-128951-1-git-send-email-xiao.w.wang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] igb_uio: allow multi-process access X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Mar 2018 21:17:04 -0000 On Fri, 8 Dec 2017 17:57:33 -0800 Xiao Wang wrote: > In some case, one device are accessed by different processes via > different BARs, so one uio device may be opened by more than one > process, for this case we just need to enable interrupt once, and > pci_clear_master only when the last process closed. > > Fixes: 5f6ff30dc507 ("igb_uio: fix interrupt enablement after FLR in VM") > > Signed-off-by: Xiao Wang > --- > lib/librte_eal/linuxapp/igb_uio/igb_uio.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c > index a3a98c1..c239d98 100644 > --- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c > +++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c > @@ -45,6 +45,7 @@ struct rte_uio_pci_dev { > struct uio_info info; > struct pci_dev *pdev; > enum rte_intr_mode mode; > + uint32_t ref_cnt; > }; > > static char *intr_mode; > @@ -336,6 +337,9 @@ struct rte_uio_pci_dev { > struct pci_dev *dev = udev->pdev; > int err; > > + if (++(udev->ref_cnt) > 1) Minor nit: Parenthesis is unnecessary here. > + return 0; > + > /* set bus master, which was cleared by the reset function */ > pci_set_master(dev); > > @@ -354,6 +358,9 @@ struct rte_uio_pci_dev { > struct rte_uio_pci_dev *udev = info->priv; > struct pci_dev *dev = udev->pdev; > > + if (--(udev->ref_cnt) > 0) > + return 0; > + > /* disable interrupts */ > igbuio_pci_disable_interrupts(udev); > You might consider using new reference counting (refcnt_t) in kernel which protects against accidental under/overflow.