From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 0EFF5A49B for ; Fri, 9 Mar 2018 12:30:01 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@mellanox.com) with ESMTPS (AES256-SHA encrypted); 9 Mar 2018 13:30:30 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (dev-r630-06.mtbc.labs.mlnx [10.12.205.180]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w29BTvO7021061; Fri, 9 Mar 2018 13:29:58 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (localhost [127.0.0.1]) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7) with ESMTP id w29BTvRq002202; Fri, 9 Mar 2018 19:29:57 +0800 Received: (from xuemingl@localhost) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7/Submit) id w29BTvqH002201; Fri, 9 Mar 2018 19:29:57 +0800 From: Xueming Li To: Wenzhuo Lu , Jingjing Wu , Thomas Monjalon , Nelio Laranjeiro , Adrien Mazarguil , Shahaf Shuler , Olivier Matz Cc: Xueming Li , dev@dpdk.org Date: Fri, 9 Mar 2018 19:29:09 +0800 Message-Id: <20180309112921.2105-10-xuemingl@mellanox.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20180309112921.2105-1-xuemingl@mellanox.com> References: <20180309112921.2105-1-xuemingl@mellanox.com> In-Reply-To: <20180226150947.107179-2-xuemingl@mellanox.com> References: <20180226150947.107179-2-xuemingl@mellanox.com> Subject: [dpdk-dev] [PATCH v1 09/21] net/mlx5: support tunnel inner csum offloads X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Mar 2018 11:30:02 -0000 PKT_RX_IP_CKSUM_GOOD and PKT_RX_L4_CKSUM_GOOD of mubf.ol_flags now are inner header checksum when packet is tunneled. Signed-off-by: Xueming Li --- drivers/net/mlx5/mlx5_flow.c | 13 +++++++++++++ drivers/net/mlx5/mlx5_rxq.c | 2 -- drivers/net/mlx5/mlx5_rxtx.c | 18 ++++-------------- drivers/net/mlx5/mlx5_rxtx.h | 1 - 4 files changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 10f6413..755355e 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -812,8 +812,15 @@ struct ibv_spec_header { { const struct mlx5_flow_items *cur_item = mlx5_flow_items; unsigned int i; + int csum_en = 0; + struct mlx5_rxq_data *q; (void)priv; + /* Check if checksum offloading */ + for (i = 0; i != parser->queues_n; ++i) { + q = (*priv->rxqs)[parser->queues[i]]; + csum_en |= q->csum; + } /* Initialise the offsets to start after verbs attribute. */ for (i = 0; i != hash_rxq_init_n; ++i) parser->queue[i].offset = sizeof(struct ibv_flow_attr); @@ -850,6 +857,12 @@ struct ibv_spec_header { " tunnel encapsulations."); return -rte_errno; } + if (!priv->config.tunnel_en && csum_en) + rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM, + items, + "Cannot support hw tunnel checksum " + "offloads"); parser->inner = IBV_FLOW_SPEC_INNER; } if (parser->drop) { diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 238fa7e..9bc8b30 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1005,8 +1005,6 @@ struct mlx5_rxq_ctrl* } /* Toggle RX checksum offload if hardware supports it. */ tmpl->rxq.csum = !!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM); - tmpl->rxq.csum_l2tun = (!!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM) && - priv->config.tunnel_en); tmpl->rxq.hw_timestamp = !!(conf->offloads & DEV_RX_OFFLOAD_TIMESTAMP); /* Configure VLAN stripping. */ tmpl->rxq.vlan_strip = !!(conf->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index dc4ead9..d9bfc9b 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -41,7 +41,7 @@ uint16_t cqe_cnt, uint32_t *rss_hash); static __rte_always_inline uint32_t -rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe); +rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe); uint32_t mlx5_ptype_table[] __rte_cache_aligned = { [0xff] = RTE_PTYPE_ALL_MASK, /* Last entry for errored packet. */ @@ -1688,8 +1688,6 @@ /** * Translate RX completion flags to offload flags. * - * @param[in] rxq - * Pointer to RX queue structure. * @param[in] cqe * Pointer to CQE. * @@ -1697,7 +1695,7 @@ * Offload flags (ol_flags) for struct rte_mbuf. */ static inline uint32_t -rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe) +rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe) { uint32_t ol_flags = 0; uint16_t flags = rte_be_to_cpu_16(cqe->hdr_type_etc); @@ -1709,14 +1707,6 @@ TRANSPOSE(flags, MLX5_CQE_RX_L4_HDR_VALID, PKT_RX_L4_CKSUM_GOOD); - if ((cqe->pkt_info & MLX5_CQE_RX_TUNNEL_PACKET) && (rxq->csum_l2tun)) - ol_flags |= - TRANSPOSE(flags, - MLX5_CQE_RX_L3_HDR_VALID, - PKT_RX_IP_CKSUM_GOOD) | - TRANSPOSE(flags, - MLX5_CQE_RX_L4_HDR_VALID, - PKT_RX_L4_CKSUM_GOOD); return ol_flags; } @@ -1815,8 +1805,8 @@ mlx5_flow_mark_get(mark); } } - if (rxq->csum | rxq->csum_l2tun) - pkt->ol_flags |= rxq_cq_to_ol_flags(rxq, cqe); + if (rxq->csum) + pkt->ol_flags |= rxq_cq_to_ol_flags(cqe); if (rxq->vlan_strip && (cqe->hdr_type_etc & rte_cpu_to_be_16(MLX5_CQE_VLAN_STRIPPED))) { diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index d7e8905..7fce001 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -77,7 +77,6 @@ struct rxq_zip { /* RX queue descriptor. */ struct mlx5_rxq_data { unsigned int csum:1; /* Enable checksum offloading. */ - unsigned int csum_l2tun:1; /* Same for L2 tunnels. */ unsigned int hw_timestamp:1; /* Enable HW timestamp. */ unsigned int vlan_strip:1; /* Enable VLAN stripping. */ unsigned int crc_present:1; /* CRC must be subtracted. */ -- 1.8.3.1