From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f45.google.com (mail-wm0-f45.google.com [74.125.82.45]) by dpdk.org (Postfix) with ESMTP id 5A92D1B0B for ; Wed, 28 Mar 2018 15:17:59 +0200 (CEST) Received: by mail-wm0-f45.google.com with SMTP id v21so4939214wmc.1 for ; Wed, 28 Mar 2018 06:17:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=sAPKmzCM7rLX3PoFMcYhmBDFs0B12jfqalH8+hWEmmM=; b=msearUEW5zcY3YtPnCIXpiPM2tLCZeHBm92GlZAx+UqzEN9OO7dy3U7/w1JVg9cXsa HYSKcxUnCuk2CREW0sL+LKm8Vs1WDBnEyG+LiJzpF4Bth7kVMJEGuTm4s7jYgAoWwfPT lc0bc4XkyQSYK9JqDxWbNPOH6WC5SPe+395dYAcPrvNWAIowrrkQmauWlXatQdauU/VM 5vnOua1cOyfFvlzEIYhRHuXZJXKsy6CcbbN3fN6FoAEYhHhdf+0yESw0hpdeXEJHyIKa waiFwNWW/MQOoWgdPnGlBml6sxMT796RgIUcKFhtok2HjKNo2koKg+U384yEZ2Sw8PhA Yi4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=sAPKmzCM7rLX3PoFMcYhmBDFs0B12jfqalH8+hWEmmM=; b=Gx3rf9DO/7MJHrIHTOg2CpzkAxZse3tPX0wvNWEieePvpU3DMI2an1qSNVJu04FRXb Qj7Ok6v641Ef0G7AgZEPG03p6+wdxNKdz5ZejBvRHEEQCgVXvdK5HHHNSAu+vxua1Ed9 O5YLtBkK76PK1/YhUESefjUPgqxoVjkVEmvtQbsOgRQyEtrToXhSMgdTiQyYgkyaEfgq 6AgY260fpHh3IzDs+ekJ6DamrBgGXy9Q+aNUCxopslIOyB/w9p0ngEhoT4nJWtQI+QPq J7wFpI4kOe0AZdCIpRNLooWkZFBgxHH7GfdFKtYTiNvQKpn/kLb3DGIUuVAu1PPuMIIw b0uA== X-Gm-Message-State: AElRT7F35cjWyYOJ/7Nf/FS5RXaqEeLkein0Pq/NaczTWjeQYcj/xc/6 +MAGpJBA8HkQ2YbotV3M2Gb23Eod X-Google-Smtp-Source: AIpwx4/oFu/LrIZv+eWXQKmAhhFxYqdhqwnyR74RzOX4zNcKqMdconXRcvdQh/xkZGbSS78W+6JQWQ== X-Received: by 10.80.240.81 with SMTP id u17mr3432954edl.276.1522243078936; Wed, 28 Mar 2018 06:17:58 -0700 (PDT) Received: from bidouze.vm.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id x25sm2402472edb.2.2018.03.28.06.17.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Mar 2018 06:17:58 -0700 (PDT) Date: Wed, 28 Mar 2018 15:17:44 +0200 From: =?iso-8859-1?Q?Ga=EBtan?= Rivet To: Rosen Xu Cc: dev@dpdk.org, declan.doherty@intel.com, bruce.richardson@intel.com, shreyansh.jain@nxp.com, tianfei.zhang@intel.com, hao.wu@intel.com Message-ID: <20180328131744.svqja2g2igfrj642@bidouze.vm.6wind.com> References: <1521553556-62982-1-git-send-email-rosen.xu@intel.com> <1522229396-17898-1-git-send-email-rosen.xu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1522229396-17898-1-git-send-email-rosen.xu@intel.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [dpdk-dev] [PATCH v3 0/6] Introduce Intel FPGA BUS X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Mar 2018 13:17:59 -0000 Hi Rosen, On Wed, Mar 28, 2018 at 05:29:50PM +0800, Rosen Xu wrote: > Intel FPGA BUS in DPDK > ------------------------- > > This patch set introduces Intel FPGA BUS support in DPDK. > > v3 updates: > =========== > - Remove all modifications of bus scan and probe > - FPGA BUS Scan is trigged by hotplug of Rawdev > - Took Modifications of comments > - Move AFU Device to IFPGA > - FPGA BUS Scan depend on it¡¯s IFPGA Rawdev > - Add Build Macros for FPGA BUS and IFPGA Rawdev > > Questions > ========= > Why not PCI Bus? > All of the AFUs of one FPGA may share same PCI BDF. > Why not vdev Bus? > Because AFUs depend on Rawdev, and it's hardware specpic. > > Motivation > ========== > FPGA is used more and more widely in Cloud and NFV, one primary reason is > that FPGA not only provide ASIC performance but also it's more flexible > than ASIC. FPGA use Partial Reconfigure(PR) Parts of Bitstream to achieve > its flexibility. Another reason is that one FPGA can be shared > by different Users, and each User can use some of AFUs of One FPGA. > > That means One FPGA Device Bitstream is divided into many Parts of > Bitstream(each Part of Bitstream is defined as AFU-Accelerated > Function Unit), and each AFU is a Hardware Acceleration Unit and > it can dynamically Reload respectively. > > Proposed Solution > ================= > - Involve Rawdev to take FPGA Partial Configuration(Download/PR) > - Defined FPGA-BUS for Acceleration Drivers of AFUs > - FPGA PCI Scan(1st Scan) follows DPDK UIO/VFIO PCI Scan Process, > probe Intel FPGA Rawdev Driver. FPGA-BUS scan is called, but AFU > depend on Rawdev, so this scan doesn't trig AFU device create. > - AFU Scan(2nd Scan) bind DPDK Driver to FPGA Partial-Bitstream. > This scan is trigged by hotplug of IFPGA Rawdev probe, in this > scan the AFUs will be created and their dirves are also probed. > > Scope > ===== > The Intel FPGA BUS implementation is target towards various FPGA Devices > use PR to provide many Acceleration Function. Specific PMDs may also > bind to its AFU. And Applications don't care they are using ASIC > Acceleration or FPGA AFU Acceleration. > > > Status > ===== > With integrating Intel PSG FPGA Software Stack OPAE(Open Programmable > Acceleration Engine) Share Code, Intel FPGA BUS runs well in > Intel PSG FPGA Cards. > Which compiler did you use and in which version? With GCC 6.3 I got these errors: == Build drivers/raw/ifpga_rawdev CC skeleton_rawdev.o CC skeleton_rawdev_test.o CC ifpga_api.o CC ifpga_enumerate.o /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_enumerate.c: In function ‘parse_feature_afus’: /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_enumerate.c:334:3: error: this ‘if’ clause does not guard... [-Werror=misleading-indentation] if (feature_is_UAFU(binfo)) ^~ /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_enumerate.c:336:4: note: ...this statement, but the latter is misleadinglyindented as if it is guarded by the ‘if’ if (ret) ^~ CC ifpga_feature_dev.o /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c: In function ‘port_hw_init’: /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c:272:3: error: this ‘if’ clause does not guard... [-Werror=misleading-indentation] if (feature->ops && feature->ops->init) ^~ /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c:274:4: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘if’ if (ret) { ^~ cc1: all warnings being treated as errors -- Gaëtan Rivet 6WIND