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> + /* make sure no store/load reordering could happen */ > + rte_smp_mb(); > +} > + > +/* > + * Marks given callback list as not used by datapath. > + */ > +static __rte_always_inline void > +bpf_eth_cbi_unuse(struct bpf_eth_cbi *cbi) > +{ > + /* make sure all previous loads are completed */ > + rte_smp_rmb(); We earlier discussed this barrier. Will following scheme works out to fix the bpf_eth_cbi_wait() without cbi->use scheme? #ie. We need to exit from jitted or interpreted code irrespective of its state. IMO, We can do that by an _arch_ specific function to fill jitted memory with "exit" opcode(value:0x95, exit, return r0),so that above code needs to be come out i n anycase, on next instruction execution. I know, jitted memory is read-only in your design, I think, we can change the permission to "write" to the fill "exit" opcode(both jitted or interpreted case) for termination. What you think? > + cbi->use++; > +} > + > +/* > + * Waits till datapath finished using given callback. > + */ > +static void > +bpf_eth_cbi_wait(const struct bpf_eth_cbi *cbi) > +{ > + uint32_t nuse, puse; > + > + /* make sure all previous loads and stores are completed */ > + rte_smp_mb(); > + > + puse = cbi->use; > + > + /* in use, busy wait till current RX/TX iteration is finished */ > + if ((puse & BPF_ETH_CBI_INUSE) != 0) { > + do { > + rte_pause(); > + rte_compiler_barrier(); > + nuse = cbi->use; > + } while (nuse == puse); > + } > +}