From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <Jerin.JacobKollanukkaran@cavium.com>
Received: from NAM01-BN3-obe.outbound.protection.outlook.com
(mail-bn3nam01on0076.outbound.protection.outlook.com [104.47.33.76])
by dpdk.org (Postfix) with ESMTP id BD8A92B9D
for <dev@dpdk.org>; Sun, 8 Apr 2018 09:47:57 +0200 (CEST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;
h=From:Date:Subject:Message-ID:Content-Type:MIME-Version;
bh=e7O2fKzPhwwT+SOSTQID/BR1AxoM9KULam3yNk19AkQ=;
b=cSxOWqyoOhELDQsIMGqectco4k/AUsZiluaNICUGBIdozeRSO8K7O9iVH7NeZLtwvRfsnXlsuRAEeJi0ZRTw3ZDG4u4bvjJefLqSzg82F3DLj47Z+q5+AhMs0JbxMflk/7SAasfcFJP/yyqh6Jr7rWz8T6Cq+aBjIyauLLlQxK8=
Authentication-Results: spf=none (sender IP is )
smtp.mailfrom=Jerin.JacobKollanukkaran@cavium.com;
Received: from jerin (122.178.210.9) by
CY1PR07MB2524.namprd07.prod.outlook.com (2a01:111:e400:c636::15) with
Microsoft SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.653.12; Sun, 8
Apr 2018 07:47:53 +0000
Date: Sun, 8 Apr 2018 13:17:37 +0530
From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
To: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Cc: santosh.shukla@caviumnetworks.com, erik.g.carrillo@intel.com, dev@dpdk.org
Message-ID: <20180408074736.GB6880@jerin>
References: <20180216213700.3415-1-pbhagavatula@caviumnetworks.com>
<20180403150514.24201-1-pbhagavatula@caviumnetworks.com>
<20180403150514.24201-5-pbhagavatula@caviumnetworks.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20180403150514.24201-5-pbhagavatula@caviumnetworks.com>
User-Agent: Mutt/1.9.4 (2018-02-28)
X-Originating-IP: [122.178.210.9]
X-ClientProxiedBy: MAXPR0101CA0020.INDPRD01.PROD.OUTLOOK.COM
(2603:1096:a00:c::30) To CY1PR07MB2524.namprd07.prod.outlook.com
(2a01:111:e400:c636::15)
X-MS-PublicTrafficType: Email
X-MS-Office365-Filtering-Correlation-Id: 9fa3fa0a-a1c5-4530-d2b2-08d59d250a85
X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0;
RULEID:(7020095)(4652020)(5600026)(4604075)(2017052603328)(7153060)(7193020);
SRVR:CY1PR07MB2524;
X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2524;
3:VOO1aQ60feLLribtKByDTzJUl98Fr9Wdfd1hYD1yjvpLxVc0YTUoSvXVfo18OnQ/ap8aMrRXYIiNX/VAoQOm/UpQ4UzD86+cnhVQkW1VSF/j+PNrQJdKoiA1o+fFItnLPgReZLwt6rtZJx3kjz4k8+zxmN9dH9Qy7uEawhGrhUDfMBl9/RrRY31nRPn4K5HG5xXUXjpCxIXzCWdmsp8h8yBlJ+5oasXsOob5Vv5zVmy+dT1J9Bkk/dZo84lhXozj;
25:bjc5IzbTXqrYTQd+4dQNqMAdjV7kvRQnFhHW6IrftPTqF75DY8+F4WVIT0FS/2TysFt7xoDJpxOqkl4jCtCzPIVx6xhne03Jz1WALxue/y1ENPDJV+y8Gj01+07qwcrhvLWZp7b1DXBZzbRqgOwC0EXymsGHklM42SP8KnKBXfteG+qsaK6cemD9nOMrEqdZUvuzLEKElq6s63ZkJWMxX8NODLQQlQl6prFBfVQGI8u7vmroqzao8AsK2iQdTmgjMOGKLpH5pSDBGRgpE+mHc0SN9eMWkpBsTASPxvTECrPiAD4/szlBL4h1t/jFYAllTopVD70SUVb1UPoOsmhKVg==;
31:9wAgzCeG5ot89iFdMq63ELAxsPQFM/PJFYYP02dBrN8FNhGc5l1AgzwJWLledHTqSRb12Tt6RYbiu1DPqDBese1DknuO2B8+v4c8qS5HrDm14F84bqV9zw5lELHYLZJAoZmFlIZNBOgXhKW0xX9arxe59kwKU7PyH9XUSNE7FdMr9qBnZHjA7nHDkdeof3NLeiyt9EGPS+UH9EMQOPb8+KNzdW8ByGSxLWdX7f2VDUg=
X-MS-TrafficTypeDiagnostic: CY1PR07MB2524:
X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2524;
20:5oEyJgXwWD2TmMCiMCkyBkv4lK5pn/piaz614nCaGnd4JYmPsC/BP9JuJVt/PK38H9KJc+k9BErPmJrfGSGP9foljLpRU6wXlLT5j5DNxcbCzyrHe6SLTdHaELIY9YJ3n0GLCWgZwJ4f81i7OmDHQKJU0ry6qQMG7P04r27aAVaPCgLD6ELlxuCvXhH0cpVkykNHq2TnJpPHEp1MZJ3Uz4OMAbnPiO2K7qkriukPY9SbVwEwPpn/zRHtJWYqgut36dlMNeQBwRVVqQH11w9t7RdttY47q0gdlGNx2JqHLnDQgNENnNdb3DKyhzwA7wYmhOWn21wRhQIW+wdiKgJhCMcFeuMrNd9WVHZ8Y0hGgTQGJ/Zl0HhCiz2zyyLVjyNn+lO3Y8s68QMAkREuY1XrcG08ikNlHkmWmjv6Q9eBIpnVxjF1OQv+mzc+MmL4dibQhlonpKKLydnSf2lkeoPgzS28UYcSuNAE3F1DDGVUqHl6hOX3eiK0mA9UmKCl6O9fECcGlx8KzSF30j8XmDeB4uBa9ZFNAojTSSpsLccpz7XG5PkhtgL63vmudz7iYpv1I5xqi5pCzmQgjynZXewoohAb4nBL1Z1ssMAfSE0XqxY=;
4:OCBV1+o75emasXbWAoBCxXo4MmvmHSc2Hti1ELaZoHwBIbYMD2XYafUGegBhf1ZMVxad6O+PoKIZHjefRcX+pbpW7c/uruloUC2N4ykJxStzbvulAjGLibhXIoMHa+WU3OxlkcqzEku/Ocz9VUPstBpKSz6ma6NOQh8XFXhtZZfa1IQK2O+Q6Vwam6JrPUiD688izxMKsZVT6gxjsYk6YZ/xYwZaDUElZ+fEe+VxmSrURx9WnsTDmVmb0MK/pOLZvyf1b/nLHxhtKChY5jcpVDtlUY0CIWkfFZsVD3AwdkKKMIEiCz5qudyZWnHxzX6m
X-Microsoft-Antispam-PRVS: <CY1PR07MB252479169C6C2E8AB397099CE3B80@CY1PR07MB2524.namprd07.prod.outlook.com>
X-Exchange-Antispam-Report-Test: UriScan:(228905959029699);
X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0;
RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(3002001)(10201501046)(3231221)(944501327)(52105095)(6041310)(20161123564045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123560045)(20161123558120)(20161123562045)(6072148)(201708071742011);
SRVR:CY1PR07MB2524; BCL:0; PCL:0; RULEID:; SRVR:CY1PR07MB2524;
X-Forefront-PRVS: 0636271852
X-Forefront-Antispam-Report: SFV:NSPM;
SFS:(10009020)(39850400004)(376002)(39380400002)(396003)(346002)(366004)(13464003)(189003)(199004)(68736007)(2906002)(446003)(11346002)(476003)(81166006)(81156014)(956004)(106356001)(8676002)(316002)(386003)(486006)(58126008)(16586007)(305945005)(5660300001)(7736002)(97736004)(25786009)(478600001)(72206003)(50466002)(42882007)(105586002)(66066001)(9686003)(16526019)(33716001)(4326008)(52116002)(47776003)(6862004)(33656002)(55016002)(26005)(6246003)(6496006)(53936002)(1076002)(33896004)(23726003)(76176011)(6636002)(6666003)(8936002)(6116002)(3846002)(229853002)(18370500001);
DIR:OUT; SFP:1101; SCL:1; SRVR:CY1PR07MB2524; H:jerin; FPR:; SPF:None; LANG:en;
PTR:InfoNoRecords; MX:1; A:1;
Received-SPF: None (protection.outlook.com: cavium.com does not designate
permitted sender hosts)
X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; CY1PR07MB2524;
23:5oVjYxGTE8P0p3qm3pHhR0na4egxXrtBQ5+seO1Xs?=
=?us-ascii?Q?dPeiXScsEW3ktSEO/bpJuPR70Y4EsPIKgNXPGs11klWymD0tEd3O5w13V/j2?=
=?us-ascii?Q?Yo70afbbdatvKmX27j1zG+nTgwK1iYdrEVnzTp51uNtpbfT7+ha2s7DI7RLU?=
=?us-ascii?Q?h+4C3zd5b2dWQSptxzR7wkuuvh+CFfSMIqRX/wFCmRBXwmB+JzF8gwLYJItS?=
=?us-ascii?Q?21zHWf4LZdc18whDLKVZnjkzZ0XtTUwtgg52qHkd5F9jfCxoJZnGPoiIt77I?=
=?us-ascii?Q?Ye3GfhZfSVSFC02LDF8PStE3HX5285EU45hKvzVyETsQ4xPYz3IJW1FeIdbN?=
=?us-ascii?Q?+o2OQbmV8T/MRKj6VeaqPZMAA6nxWlUbcb+Yr+QlTxtAHCCOdWHByy6gJBl5?=
=?us-ascii?Q?Fxhj6hY/iI39v9lJSjyvPPQgbm+I/snTv4EG7Wm4eVLAOPVYvM4swJIdQ9Ev?=
=?us-ascii?Q?o599aBZcb5ViW69hXXrPkDDrcznuJy7avOyYjLECzyrpnIBwYIh7J7cBhXWd?=
=?us-ascii?Q?JhKRKjmlzQkl8fnLA+m8mymJdYc4p6GH7Rg57Q+oSfS1PBliEJwlKvK14edt?=
=?us-ascii?Q?7LK2jEB5xJScRtyT4PywrtXgvtRWblsoxtIcHwtrqiJUSehahkfRAsTZtsuE?=
=?us-ascii?Q?vFBCjiFttx+au0YrqTz2bjXvA04jJhubCD4sUzPmzCNtoVoAyEe3UPcA5s0I?=
=?us-ascii?Q?akStQF8N9d57Flc/EpgnO3RpPngn/O0/OJ9dbpdUEC7FLALtOvTCal1QmNn8?=
=?us-ascii?Q?ZP1KfT4cxI87b1gg0/df5LSxFd9095osheXIRrmdIM2WlCj6W9MTurW9fyfN?=
=?us-ascii?Q?yUk0PRs5mxEopYpfUDcqTsmpXQDKAN94bC6kZ+25Q1FvLHrUnjARAPUPkZ6I?=
=?us-ascii?Q?OUEmuvo4qUtmAF1495UZlRDB6p5W9NJSmeBQwcOw020pUT7rPz0ahb+8iLJj?=
=?us-ascii?Q?Q+qTLDtfZeBVSy6MR139f6AWx6kI72fXocYq/xq55usofZOvfw9+k2MikueB?=
=?us-ascii?Q?eBx6V4ywRu1GitY+ydJy4X+VI45JIVvwkqUAx15nSUDbP8QbzaFk3uxJxRKk?=
=?us-ascii?Q?v7zl5oCOb9EZKI3pdVSD6iernWGqJnRUDAxJCnZXRKmfjt2tGHvK5loadduU?=
=?us-ascii?Q?+z/rPUTTiecA2xsj4iuHE81CeUZe2/m8RSh4dBvnAC6rOUPjaop5DmRTZ8E0?=
=?us-ascii?Q?RLCX4fjKkNsyzfpzfKEyAe+Ozcow8i1iOQLPv3IR3YkgSHPsKv4X3bvYCkZD?=
=?us-ascii?Q?OMDH2isrF8OPt2sELb4f/J7c2+Ouboc3tPJXJBXA43niW+2+Qa8jDx2y0Rnz?=
=?us-ascii?Q?acGlmGfVHe5+UrM9KFwcAg=3D?=
X-Microsoft-Antispam-Message-Info: 8MgrFMexTXiGzcR+sozWfEYLqMxachwdDgJBPG0aiPaReR0+CkA2vYU2ymok9c1Kv5HM6ceMOR5m6EDH3qBfZfA/kiuCwTJX4+QAuajt9/l3Snoe4RMQL525nZQNc5RyC1pdR6r/JDvYa1kK0thkIgvN10rSMzTBXGBLOM3wUfA4syxQWTK35Fqtk8CyFsdE
X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2524;
6:bTzD5qix9Eg5rpLRpzkUdbGc7/n3AF1ivkH+74MDx1rRFQEgH0HykK/oPRKFeSjuuSZwoay/QC4Zl0h2iwv+3u7S5luITKv5ZSwV5T92hEBN2ELHNHe+pKn8pQkGiX5FcET6D3WjKDFFgtrMCuc/l6TEzhoqciIQBcWeWcI33fbR50xBSgav1AHb2YO9b8ZbXUQ45597ErNj5iJyx3otJB51Do6lSs5fo7RkJZkaUqOGPmTFGb66+fEJ6+UuZtzfTAGZFZYu5NhRNSUbshL7pI7hRwrj03TGXh97QdBdYBiSWYSToivrCT/TmWh+1WtizEW/reh58BQ0nZYJGUj3iMhS1XE+5WsSsDbbnJgSJeILbm7Ne5fcHZF9/Yi3F5VdlifIDCzk8onEqJYmRashxTfyXbbBlR1Un9hWxf993SdT8XeBMP6dkK1u0WN1utndVkNterUF06g62ABFoSyR1A==;
5:gDPGXC0993ZE5FrJzfi1lbuhuenbf7OC3RD3YIdFipagGn1Hh9PKxmC6IRuqjYjpxKQigPKBnCIO9ivKen9zDB1dJb7pk7uhhzFwr4cnPzv4tSgBFzPVi0dQLpmmN6TwgmRkWj9ZiX66kjN9kGdGufGfr9sGyhEu2RVsBb8tBiI=;
24:CqhSlrc5phMse4yWaRxN/4hkjBKDYXntNC4l8GAFefZffmBvl3HmbohC3KkQ5Mn47E6dgJii+FczNAO4rmdrTXrT54h95kt4wh2bEhVkh6w=
SpamDiagnosticOutput: 1:99
SpamDiagnosticMetadata: NSPM
X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2524;
7:LD0S3Arfvjw+2og30Nfsfl+aq9YVBVBfhZN5OyMpQw23P9sq2pXC9KwkNYLAnhvVAyqM6QO1Vw83bEsjlAWUWpP6ndfZJ+DJLRA5zGJHdrcIBn0re34i2U5SvoUh9RlJ4nSfvWgemKah4K7q/s+7tq9jg8vVkuKiahWmMmdjLVTuojiIj6mfvYPzufvRLLVYjIlHuQp5tQ3hN/ynnChy2iqmALmmd0iLtRRdlzJnxJIvszVe7U3osfXT04UmCihd
X-OriginatorOrg: caviumnetworks.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Apr 2018 07:47:53.9623 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 9fa3fa0a-a1c5-4530-d2b2-08d59d250a85
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 711e4ccf-2e9b-4bcf-a551-4094005b6194
X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR07MB2524
Subject: Re: [dpdk-dev] [PATCH v3 04/12] event/octeontx: add support to
start and stop timer device
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://dpdk.org/ml/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://dpdk.org/ml/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Sun, 08 Apr 2018 07:47:58 -0000
-----Original Message-----
> Date: Tue, 3 Apr 2018 20:35:06 +0530
> From: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> To: jerin.jacob@caviumnetworks.com, santosh.shukla@caviumnetworks.com,
> erik.g.carrillo@intel.com
> Cc: dev@dpdk.org, Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v3 04/12] event/octeontx: add support to start
> and stop timer device
> X-Mailer: git-send-email 2.16.3
>
> When application requests to start the timer adapter through
> `rte_event_timer_adapter_start`, Octeontx TIMvf ring does the
> following:
> - Uses mbox to communicate TIMpf driver about,
> * SCLK frequency used to convert ns<->cycles.
> * program the ring control parameters and start the ring.
> * get the exact cycle at which the TIMvf ring has started which can be
> used to estimate the bucket position.
>
> On `rte_event_timer_adapter_stop` i.e stop, Octeontx TIMvf ring does the
> following:
> - Use mbox to communicate TIMpf driver about,
> * reset the ring control parameters and stop the ring.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
> drivers/event/octeontx/timvf_evdev.c | 140 +++++++++++++++++++++++++++++++++++
> drivers/event/octeontx/timvf_evdev.h | 5 ++
> 2 files changed, 145 insertions(+)
>
> +/* Response messages */
> +enum {
> + MBOX_RET_SUCCESS,
> + MBOX_RET_INVALID,
> + MBOX_RET_INTERNAL_ERR,
> +};
If it is duplicate definition then remove it.
> +
> +static int
> +timvf_mbox_dev_info_get(struct timvf_mbox_dev_info *info)
> +{
> + struct octeontx_mbox_hdr hdr = {0};
> + uint16_t len = sizeof(struct timvf_mbox_dev_info);
> +
> + hdr.coproc = TIM_COPROC;
> + hdr.msg = TIM_GET_DEV_INFO;
> + hdr.vfid = 0; /* TIM DEV is always 0. TIM RING ID changes. */
> +
> + memset(info, 0, len);
> + return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
rebase to latest dpdk-next-eventdev where mbox api changed to
octeontx_mbox_send
> +}
> +
> static void
> timvf_ring_info_get(const struct rte_event_timer_adapter *adptr,
> struct rte_event_timer_adapter_info *adptr_info)
> @@ -27,6 +53,118 @@ timvf_ring_info_get(const struct rte_event_timer_adapter *adptr,
> sizeof(struct rte_event_timer_adapter_conf));
> }
>
> +static int
> +timvf_ring_start(const struct rte_event_timer_adapter *adptr)
> +{
> + int ret;
> + uint64_t interval = 0;
This assignment can be avoided.
> + struct timvf_ctrl_reg rctrl = {0};
> + struct timvf_mbox_dev_info dinfo;
> + struct timvf_ring *timr = adptr->data->adapter_priv;
> +
> + ret = timvf_mbox_dev_info_get(&dinfo);
> + if (ret < 0 || ret != sizeof(struct timvf_mbox_dev_info))
> + return -EINVAL;
> +
> + /* Calculate the interval cycles according to clock source. */
> + switch (timr->clk_src) {
> + case TIM_CLK_SRC_SCLK:
> + interval = NSEC2CLK(timr->tck_nsec, dinfo.clk_freq);
> + break;
> + case TIM_CLK_SRC_GPIO:
> + /* GPIO doesn't work on tck_nsec. */
> + interval = 0;
> + break;
> + case TIM_CLK_SRC_GTI:
> + interval = NSEC2CLK(timr->tck_nsec, dinfo.clk_freq);
> + break;
> + case TIM_CLK_SRC_PTP:
> + interval = NSEC2CLK(timr->tck_nsec, dinfo.clk_freq);
> + break;
Shouldn't we return error if clock source is not supported?
> + }
> +
> + /*CTRL0 register.*/
> + rctrl.rctrl0 = interval;
> +
> + /*CTRL1 register.*/
> + rctrl.rctrl1 = (uint64_t)(timr->clk_src) << 51 |
> + 1ull << 48 |
> + 1ull << 47 |
> + 1ull << 44 |
Add comments to this bit definitions.
> + (timr->meta.nb_bkts - 1);
> +
> + rctrl.rctrl2 = (uint64_t)(TIM_CHUNK_SIZE / 16) << 40;
> +
> + timvf_write64((uint64_t)timr->meta.bkt,
> + (uint8_t *)timr->vbar0 + TIM_VRING_BASE);
> + if (timvf_ring_conf_set(&rctrl, timr->tim_ring_id)) {
> + ret = -EACCES;
> + goto error;
> + }
> +
> + if (timvf_get_start_cyc(&timr->meta.ring_start_cyc,
> + timr->tim_ring_id) < 0) {
> + ret = -EACCES;
> + goto error;
> + }
> + timr->meta.tck_int = NSEC2CLK(timr->tck_nsec, rte_get_timer_hz());
> + timr->meta.fast_div = rte_reciprocal_value_u64(timr->meta.tck_int);
> + timvf_log_info("nb_bkts %d min_ns %"PRIu64" min_cyc %"PRIu64""
> + " maxtmo %"PRIu64"\n",
> + timr->meta.nb_bkts, timr->tck_nsec, interval,
> + timr->max_tout);
> +
> + return 0;
> +error:
> + rte_free(timr->meta.bkt);
> + rte_mempool_free(timr->meta.chunk_pool);
> + return ret;
> +}
> +
> +static int
> +timvf_ring_stop(const struct rte_event_timer_adapter *adptr)
> +{
> + struct timvf_ring *timr = adptr->data->adapter_priv;
> + struct timvf_ctrl_reg rctrl = {0};
> + rctrl.rctrl0 = timvf_read64((uint8_t *)timr->vbar0 + TIM_VRING_CTL0);
> + rctrl.rctrl1 = timvf_read64((uint8_t *)timr->vbar0 + TIM_VRING_CTL1);
> + rctrl.rctrl1 &= ~(1ull << 47); /* Disable */
> + rctrl.rctrl2 = timvf_read64((uint8_t *)timr->vbar0 + TIM_VRING_CTL2);
> +
> + if (timvf_ring_conf_set(&rctrl, timr->tim_ring_id))
> + return -EACCES;
> + return 0;
> +}
> +
> static int
> timvf_ring_create(struct rte_event_timer_adapter *adptr)
> {
> @@ -146,6 +284,8 @@ timvf_ring_free(struct rte_event_timer_adapter *adptr)
> static struct rte_event_timer_adapter_ops timvf_ops = {
can be 'const'?
> .init = timvf_ring_create,
> .uninit = timvf_ring_free,
> + .start = timvf_ring_start,
> + .stop = timvf_ring_stop,
Found two tabs
> .get_info = timvf_ring_info_get,
> };
>
> diff --git a/drivers/event/octeontx/timvf_evdev.h b/drivers/event/octeontx/timvf_evdev.h
> index e3f558e10..e155b6ce2 100644
> --- a/drivers/event/octeontx/timvf_evdev.h
> +++ b/drivers/event/octeontx/timvf_evdev.h
> @@ -75,6 +75,11 @@
> #define TIM_VRING_AURA (0x108)
> #define TIM_VRING_REL (0x110)
>
> +
> +#define NSEC_PER_SEC 1E9
> +#define NSEC2CLK(__ns, __freq) (((__ns) * (__freq)) / NSEC_PER_SEC)
> +#define CLK2NSEC(__clk, __freq) (((__clk) * NSEC_PER_SEC) / (__freq))
> +
> #define timvf_read64 rte_read64_relaxed
> #define timvf_write64 rte_write64_relaxed
>
> --
> 2.16.3
>