From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from rnd-relay.smtp.broadcom.com (rnd-relay.smtp.broadcom.com [192.19.229.170]) by dpdk.org (Postfix) with ESMTP id 5DCE91BA3E for ; Tue, 10 Apr 2018 02:20:19 +0200 (CEST) Received: from nis-sj1-27.broadcom.com (nis-sj1-27.lvn.broadcom.net [10.75.144.136]) by rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id C746930C01B; Mon, 9 Apr 2018 17:20:17 -0700 (PDT) Received: from C02VPB22HTD6.vpn.broadcom.net (unknown [10.10.117.15]) by nis-sj1-27.broadcom.com (Postfix) with ESMTP id 918EEAC075F; Mon, 9 Apr 2018 17:20:17 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Scott Branden Date: Mon, 9 Apr 2018 17:20:11 -0700 Message-Id: <20180410002011.64439-4-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.15.1 (Apple Git-101) In-Reply-To: <20180410002011.64439-1-ajit.khaparde@broadcom.com> References: <179e6ef8-c632-7f0f-b423-012a97757593@intel.com> <20180410002011.64439-1-ajit.khaparde@broadcom.com> Subject: [dpdk-dev] [PATCH v4 3/3] doc: add Broadcom Stingray SoC support to release notes X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Apr 2018 00:20:19 -0000 From: Scott Branden Update 18.05 release notes to indicate support for Broadcom Stingray SoC support. Signed-off-by: Scott Branden --- doc/guides/rel_notes/release_18_05.rst | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/doc/guides/rel_notes/release_18_05.rst b/doc/guides/rel_notes/release_18_05.rst index 0f3d00972..88dcbca7e 100644 --- a/doc/guides/rel_notes/release_18_05.rst +++ b/doc/guides/rel_notes/release_18_05.rst @@ -41,6 +41,16 @@ New Features Also, make sure to start the actual text at the margin. ========================================================= +* **Added support for Broadcom NetXtreme-S (BCM58800) family of controllers (aka Stingray) ** + + The BCM58800 devices feature a NetXtreme E-Series advanced network controller, a high-performance + ARM CPU block, PCI Express (PCIe) Gen3 interfaces, key accelerators for compute offload and a high- + speed memory subsystem including L3 cache and DDR4 interfaces, all interconnected by a coherent + Network-on-chip (NOC) fabric. + + The ARM CPU subsystem features eight ARMv8 Cortex-A72 CPUs at 3.0 GHz, arranged in a multi-cluster + configuration. + * **Added RSS hash and key update to CXGBE PMD.** Support to update RSS hash and key has been added to CXGBE PMD. @@ -158,11 +168,10 @@ The libraries prepended with a plus sign were incremented in this version. librte_bus_vdev.so.1 librte_cfgfile.so.2 librte_cmdline.so.2 - + librte_common_octeontx.so.1 librte_cryptodev.so.4 librte_distributor.so.1 - + librte_eal.so.7 - + librte_ethdev.so.9 + librte_eal.so.6 + librte_ethdev.so.8 librte_eventdev.so.3 librte_flow_classify.so.1 librte_gro.so.1 -- 2.15.1 (Apple Git-101)