From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f193.google.com (mail-wr0-f193.google.com [209.85.128.193]) by dpdk.org (Postfix) with ESMTP id C58ACD149 for ; Tue, 10 Apr 2018 17:27:33 +0200 (CEST) Received: by mail-wr0-f193.google.com with SMTP id y55so13243923wry.3 for ; Tue, 10 Apr 2018 08:27:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=2t0EwVBkY66mnJjEmg0O1/l+ID96wopAsNvCyPXUwkw=; b=D3B9pPKwA5uBrr0TfZG2QWDurROLXT1d3Ze8tjfj9coK1gl13FlV+XW4+coTA5l3in vQCWRNaPZGaItJTko9ZsIf56AUPWbeul9GqBdN1YlPYFN2r+Q8zFM52gJsk6l5wdswCF 21bCElBD++DlOVYvrNiknfwU2ZU95lYMOXNbVI1dX9dt2t5xx2FfyiBPIaOTrg3DffLd 6s0rApsoGmN2eE9wkibcS6xoj8MIygfBPZ8KD82jUvM79Ftzl5xbdMPS/BZKf6pKdat4 J9mhmhvZi/uivEr1OQpglK39AtC+FqMQ7Bk3cSLl9yaQo+WyCYaCgUY91KzO65+VSdvT 0i4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=2t0EwVBkY66mnJjEmg0O1/l+ID96wopAsNvCyPXUwkw=; b=beZryY9dkwlDNU5qQ01l2ur8UXuHUAwspSB6xcqmyx7QCjNggIlLKtl9sv6CxH88B4 hDDvmcZw7emckf4Vp0hpEz8jG6ex3g06+du75XT4EX+m8mOmqSWdbCqTBhoDFvGT0qKM A+NnY7Cv3USYvD9e8BQnI54TXL6khfgccFsJIKIVCvqRmMvHfnBRSJZbqeJo66jun+2c gyxcpmshH8E5Nh0NMCR13MM82bLeUaaTcslxbR7niW7SqVcO5NbHZYJ/kpPxiOCncwYZ cJ7UFnV5DkOdbkx3V7D1ebOyiVqAnjnn+1PZPe+WFaL5z3MYhbC37d1NPj/GAIU6Anep 8NOA== X-Gm-Message-State: ALQs6tCQ0XpFBTlpviqdp/8jC2yO94HXM3N9lO9iuZruNbD7207XScVU tS9/gkFWJ7mH/yoZSML2oNul X-Google-Smtp-Source: AIpwx49Fr3j7rNN7ArHJFoX+adD3o4JQviUnNiPnivlIB/33+r6v4QguRy+he+QsUrSx5Jb86kxD5w== X-Received: by 10.223.136.67 with SMTP id e3mr699184wre.250.1523374053491; Tue, 10 Apr 2018 08:27:33 -0700 (PDT) Received: from laranjeiro-vm.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id 33sm1858919wrs.74.2018.04.10.08.27.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 10 Apr 2018 08:27:33 -0700 (PDT) Date: Tue, 10 Apr 2018 17:27:50 +0200 From: =?iso-8859-1?Q?N=E9lio?= Laranjeiro To: Xueming Li Cc: Shahaf Shuler , dev@dpdk.org Message-ID: <20180410152750.sgm6qqftzj3vqxiq@laranjeiro-vm.dev.6wind.com> References: <20180410133415.189905-1-xuemingl@mellanox.com> <20180410133415.189905-6-xuemingl@mellanox.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180410133415.189905-6-xuemingl@mellanox.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [dpdk-dev] [PATCH v2 05/15] net/mlx5: support tunnel inner checksum offloads X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Apr 2018 15:27:33 -0000 On Tue, Apr 10, 2018 at 09:34:05PM +0800, Xueming Li wrote: > This patch support tunnel inner checksum offloads. By creating tunnel > flow, once tunnel packet type(RTE_PTYPE_TUNNEL_xxx) identified, Where is the code creating the tunnel flow? > PKT_RX_IP_CKSUM_XXX and PKT_RX_L4_CKSUM_XXX represent checksum result of > inner headers, outer L3 and L4 header checksum are always valid as soon > as tunnel identified. If no tunnel identified, PKT_RX_IP_CKSUM_XXX and > PKT_RX_L4_CKSUM_XXX represent checksum result of outer L3 and L4 > headers. > > Signed-off-by: Xueming Li > --- > drivers/net/mlx5/mlx5_flow.c | 7 +++++-- > drivers/net/mlx5/mlx5_rxq.c | 2 -- > drivers/net/mlx5/mlx5_rxtx.c | 18 ++++-------------- > drivers/net/mlx5/mlx5_rxtx.h | 1 - > 4 files changed, 9 insertions(+), 19 deletions(-) > > diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c > index 65d7a9b62..b3ad6dc85 100644 > --- a/drivers/net/mlx5/mlx5_flow.c > +++ b/drivers/net/mlx5/mlx5_flow.c > @@ -829,6 +829,8 @@ mlx5_flow_convert_actions(struct rte_eth_dev *dev, > /** > * Validate items. > * > + * @param dev > + * Pointer to Ethernet device. > * @param[in] items > * Pattern specification (list terminated by the END pattern item). > * @param[out] error > @@ -840,7 +842,8 @@ mlx5_flow_convert_actions(struct rte_eth_dev *dev, > * 0 on success, a negative errno value otherwise and rte_errno is set. > */ > static int > -mlx5_flow_convert_items_validate(const struct rte_flow_item items[], > +mlx5_flow_convert_items_validate(struct rte_eth_dev *dev __rte_unused, > + const struct rte_flow_item items[], > struct rte_flow_error *error, > struct mlx5_flow_parse *parser) > { > @@ -1146,7 +1149,7 @@ mlx5_flow_convert(struct rte_eth_dev *dev, > ret = mlx5_flow_convert_actions(dev, actions, error, parser); > if (ret) > return ret; > - ret = mlx5_flow_convert_items_validate(items, error, parser); > + ret = mlx5_flow_convert_items_validate(dev, items, error, parser); > if (ret) > return ret; > mlx5_flow_convert_finalise(parser); I don't understand the necessity of the two hunks above. > diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c > index 351acfc0f..073732e16 100644 > --- a/drivers/net/mlx5/mlx5_rxq.c > +++ b/drivers/net/mlx5/mlx5_rxq.c > @@ -1045,8 +1045,6 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, > } > /* Toggle RX checksum offload if hardware supports it. */ > tmpl->rxq.csum = !!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM); > - tmpl->rxq.csum_l2tun = (!!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM) && > - priv->config.tunnel_en); > tmpl->rxq.hw_timestamp = !!(conf->offloads & DEV_RX_OFFLOAD_TIMESTAMP); > /* Configure VLAN stripping. */ > tmpl->rxq.vlan_strip = !!(conf->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); > diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c > index d061dfc8a..285b2dbf0 100644 > --- a/drivers/net/mlx5/mlx5_rxtx.c > +++ b/drivers/net/mlx5/mlx5_rxtx.c > @@ -41,7 +41,7 @@ mlx5_rx_poll_len(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe, > uint16_t cqe_cnt, uint32_t *rss_hash); > > static __rte_always_inline uint32_t > -rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe); > +rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe); > > uint32_t mlx5_ptype_table[] __rte_cache_aligned = { > [0xff] = RTE_PTYPE_ALL_MASK, /* Last entry for errored packet. */ > @@ -1728,8 +1728,6 @@ mlx5_rx_poll_len(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe, > /** > * Translate RX completion flags to offload flags. > * > - * @param[in] rxq > - * Pointer to RX queue structure. > * @param[in] cqe > * Pointer to CQE. > * > @@ -1737,7 +1735,7 @@ mlx5_rx_poll_len(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe, > * Offload flags (ol_flags) for struct rte_mbuf. > */ > static inline uint32_t > -rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe) > +rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe) > { > uint32_t ol_flags = 0; > uint16_t flags = rte_be_to_cpu_16(cqe->hdr_type_etc); > @@ -1749,14 +1747,6 @@ rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe) > TRANSPOSE(flags, > MLX5_CQE_RX_L4_HDR_VALID, > PKT_RX_L4_CKSUM_GOOD); > - if ((cqe->pkt_info & MLX5_CQE_RX_TUNNEL_PACKET) && (rxq->csum_l2tun)) > - ol_flags |= > - TRANSPOSE(flags, > - MLX5_CQE_RX_L3_HDR_VALID, > - PKT_RX_IP_CKSUM_GOOD) | > - TRANSPOSE(flags, > - MLX5_CQE_RX_L4_HDR_VALID, > - PKT_RX_L4_CKSUM_GOOD); > return ol_flags; > } > > @@ -1855,8 +1845,8 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n) > mlx5_flow_mark_get(mark); > } > } > - if (rxq->csum | rxq->csum_l2tun) > - pkt->ol_flags |= rxq_cq_to_ol_flags(rxq, cqe); > + if (rxq->csum) > + pkt->ol_flags |= rxq_cq_to_ol_flags(cqe); > if (rxq->vlan_strip && > (cqe->hdr_type_etc & > rte_cpu_to_be_16(MLX5_CQE_VLAN_STRIPPED))) { > diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h > index 6866f6818..d35605b55 100644 > --- a/drivers/net/mlx5/mlx5_rxtx.h > +++ b/drivers/net/mlx5/mlx5_rxtx.h > @@ -77,7 +77,6 @@ struct rxq_zip { > /* RX queue descriptor. */ > struct mlx5_rxq_data { > unsigned int csum:1; /* Enable checksum offloading. */ > - unsigned int csum_l2tun:1; /* Same for L2 tunnels. */ > unsigned int hw_timestamp:1; /* Enable HW timestamp. */ > unsigned int vlan_strip:1; /* Enable VLAN stripping. */ > unsigned int crc_present:1; /* CRC must be subtracted. */ > -- > 2.13.3 This last part seems to introduce a regression by removing the support for the tunnel checksum offload. Seems this patch is incomplete or wrongly explained. -- Nélio Laranjeiro 6WIND