From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from rnd-relay.smtp.broadcom.com (rnd-relay.smtp.broadcom.com [192.19.229.170]) by dpdk.org (Postfix) with ESMTP id 6495EAABD; Tue, 17 Apr 2018 03:11:40 +0200 (CEST) Received: from nis-sj1-27.broadcom.com (nis-sj1-27.lvn.broadcom.net [10.75.144.136]) by rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id 3D3A930C01A; Mon, 16 Apr 2018 18:11:34 -0700 (PDT) Received: from C02VPB22HTD6.vpn.broadcom.net (unknown [10.10.117.92]) by nis-sj1-27.broadcom.com (Postfix) with ESMTP id 2703BAC0719; Mon, 16 Apr 2018 18:11:33 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: stable@dpdk.org Date: Mon, 16 Apr 2018 18:11:17 -0700 Message-Id: <20180417011126.12622-6-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.15.1 (Apple Git-101) In-Reply-To: <20180417011126.12622-1-ajit.khaparde@broadcom.com> References: <20180417011126.12622-1-ajit.khaparde@broadcom.com> Subject: [dpdk-dev] [PATCH 05/14] net/bnxt: fix Rx checksum flags for tunnel frames X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Apr 2018 01:11:41 -0000 Fix Rx checksum status for tunnel frames as seen by hardware. Current code does not handle cases for tunnel frames correctly. Fixes: 7ec39d8c524b ("net/bnxt: update status of Rx IP/L4 CKSUM") Cc: stable@dpdk.org Signed-off-by: Ajit Khaparde --- drivers/net/bnxt/bnxt_rxr.h | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h index dd4ea5d1d..e8c47ca56 100644 --- a/drivers/net/bnxt/bnxt_rxr.h +++ b/drivers/net/bnxt/bnxt_rxr.h @@ -24,17 +24,25 @@ #define BNXT_TPA_OUTER_L3_OFF(hdr_info) \ ((hdr_info) & 0x1ff) -#define RX_CMP_L4_CS_BITS rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_L4_CS_CALC) +#define RX_CMP_L4_CS_BITS \ + rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_L4_CS_CALC | \ + RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC) -#define RX_CMP_L4_CS_ERR_BITS rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_L4_CS_ERROR) +#define RX_CMP_L4_CS_ERR_BITS \ + rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_L4_CS_ERROR | \ + RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR) #define RX_CMP_L4_CS_OK(rxcmp1) \ (((rxcmp1)->flags2 & RX_CMP_L4_CS_BITS) && \ !((rxcmp1)->errors_v2 & RX_CMP_L4_CS_ERR_BITS)) -#define RX_CMP_IP_CS_ERR_BITS rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_IP_CS_ERROR) +#define RX_CMP_IP_CS_ERR_BITS \ + rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_IP_CS_ERROR | \ + RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR) -#define RX_CMP_IP_CS_BITS rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_CS_CALC) +#define RX_CMP_IP_CS_BITS \ + rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_CS_CALC | \ + RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC) #define RX_CMP_IP_CS_OK(rxcmp1) \ (((rxcmp1)->flags2 & RX_CMP_IP_CS_BITS) && \ -- 2.15.1 (Apple Git-101)