From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) by dpdk.org (Postfix) with ESMTP id 3ADE525D9 for ; Wed, 8 Aug 2018 17:13:29 +0200 (CEST) Received: by mail-pf1-f193.google.com with SMTP id y10-v6so1286985pfn.8 for ; Wed, 08 Aug 2018 08:13:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hs7nYJKJ9JZXk+W3lZAbWYxEFDHus0jH7Mz5+5b03Es=; b=Ibrg/rnIhH0kmuY3o556SeEAgQmHvDMOwbp1FtfOMBmHjDLu0WTZB8QnR0+HOEYygy Rq6yIXZW7WdYp764XiYTqRpTigFacX18J+YBxcbsGw0QixBywZqhr6nz8UV/RDw7bJWc GvHSEWbK3LDQftwgKuQrg/8RjG5UiAhvzGrJ/hknEuLbBnPjxbJclK/YCvKJYJnME5La pk8yuM4JssNL35rXl/mZDRBdyWwdzk2Q2i+C0OCulKYpXpK640QYOl8pOlt5BcODCdNs CsyvBcwXq4lBakkFfEHcXzWbixtmRufKOX3wL/mLOr0625bRSdhEtMIoF0idiY/770Bw nsuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hs7nYJKJ9JZXk+W3lZAbWYxEFDHus0jH7Mz5+5b03Es=; b=irXJzcMnslA8SOd39fsO03kwhwfTDvWZPGuKbFDzvGP1jlXCMgBokuRAlgY4j8cxpt qhFbWxW5+M/naZ+ZRB6n0SqBOWr+Prp8bmtx7UtL6ELA6daMhmFpzmKg3sHWv4U2qWpo A1h1oPC4GRpBV9hqQP1wKa+IAqK0a5VQSd6ndns/z5WbpDMmDDkSZdwhvaYNgtHixyYD EyLILQ7l2BcmC40HOzuL3e+Bq+m1nIWzRjpyKFHO9oPDMOGaN8fnPP+TC/GL2wLYMR1D NkiTPKflt3lThW7mdaDPuLa9VM9c0YYuECJVjUcquXo8qNGz/+QIN2P3Lm+1nnOomNLh xytw== X-Gm-Message-State: AOUpUlFQK1KDvWEurWjTh9pm7ZRAbDcrMWTtj24Gdpxs+gSJL01DYN7G PXnNdyxMduEKP+mkXEAKIeKqmg== X-Google-Smtp-Source: AA+uWPzNTJRyofftBRWCOMmzZzseG0KrJ3MjiHSVpG9d7758zl6u9Mmp/3Xt8oDUYlDzqn5qd3ezQg== X-Received: by 2002:a62:4255:: with SMTP id p82-v6mr3454001pfa.238.1533741208197; Wed, 08 Aug 2018 08:13:28 -0700 (PDT) Received: from xeon-e3 (204-195-22-127.wavecable.com. [204.195.22.127]) by smtp.gmail.com with ESMTPSA id h130-v6sm18952526pgc.88.2018.08.08.08.13.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 08 Aug 2018 08:13:27 -0700 (PDT) Date: Wed, 8 Aug 2018 08:13:25 -0700 From: Stephen Hemminger To: Qi Zhang Cc: thomas@monjalon.net, konstantin.ananyev@intel.com, declan.doherty@intel.com, ferruh.yigit@intel.com, dev@dpdk.org, benjamin.h.shelton@intel.com, narender.vangati@intel.com, beilei.xing@intel.com, wenzhuo.lu@intel.com, 0000-cover-letter.patch@dpdk.org Message-ID: <20180808081325.00df3024@xeon-e3> In-Reply-To: <20180808070045.13334-1-qi.z.zhang@intel.com> References: <20180808070045.13334-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [RFC 1/4] ethdev: claim device reset as async X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Aug 2018 15:13:29 -0000 On Wed, 8 Aug 2018 15:00:42 +0800 Qi Zhang wrote: > rte_eth_dev_reset should be implemented in an async way since it is > possible be invoked in interrupt thread and sometimes to reset a > device need to wait for some dependency, for example, a VF expects > for PF ready, or a NIC function as part of a SOC wait for the whole > system reset complete, all these time consuming task will block the > the interrupt thread. > The patch claims rte_eth_dev_reset is an async function and introduce > a new event RTE_ETH_EVENT_RESET_COMPLETE. PMD should raise this event > when finish reset in background. The applicaiton should always wait > for this event before continue to configure and restart the device. If you have to change every driver to spawn a thread, then this doesn't seem that useful. If you have to have a thread, then the base layer code in EAL should do it. Lots of DPDK changes seem to require every driver to change (a nuisance), and then every driver changes in the same boilerplate way (indicates poor design choice).