From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id D0E735F16 for ; Wed, 24 Oct 2018 08:52:06 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Oct 2018 23:52:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,419,1534834800"; d="scan'208";a="80469118" Received: from unknown (HELO saesrv02-S2600CWR.intel.com) ([10.224.122.203]) by fmsmga007.fm.intel.com with ESMTP; 23 Oct 2018 23:52:04 -0700 From: Vipin Varghese To: dev@dpdk.org, stephen@networkplumber.org, maryam.tahhan@intel.com, reshma.pattan@intel.com Cc: amol.patel@intel.com, sivaprasad.tummala@intel.com, stephen1.byrne@intel.com, michael.j.glynn@intel.com, Vipin Varghese Date: Wed, 24 Oct 2018 12:18:02 +0530 Message-Id: <20181024064805.23197-6-vipin.varghese@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181024064805.23197-1-vipin.varghese@intel.com> References: <20181023135751.21536-1-vipin.varghese@intel.com> <20181024064805.23197-1-vipin.varghese@intel.com> Subject: [dpdk-dev] [PATCH v2 6/9] app/procinfo: add code for debug crypto X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Oct 2018 06:52:07 -0000 Function debug_crypto is used for displaying the crypto PMD under the primary process. Signed-off-by: Vipin Varghese --- app/proc-info/main.c | 70 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 69 insertions(+), 1 deletion(-) diff --git a/app/proc-info/main.c b/app/proc-info/main.c index f518935a2..d48334bd0 100644 --- a/app/proc-info/main.c +++ b/app/proc-info/main.c @@ -999,7 +999,75 @@ x.cman_wred_context_shared_n_max); \ static void debug_crypto(void) { - printf(" crypto"); + uint8_t crypto_dev_count = rte_cryptodev_count(), i; + + snprintf(bdr_str, 100, "debug - CRYPTO PMD %"PRIu64, rte_get_tsc_hz()); + STATS_BDR_STR(10, bdr_str); + + for (i = 0; i < crypto_dev_count; i++) { + struct rte_cryptodev_info dev_info = {0}; + struct rte_cryptodev_stats stats = {0}; + + rte_cryptodev_info_get(i, &dev_info); + + printf(" - device (%u)\n", i); + printf("\t -- name (%s) driver (%s)\n" + "\t -- id (%u) flags (0x%"PRIx64") socket (%d)\n" + "\t -- queue pairs (%d)\n", + rte_cryptodev_name_get(i), + dev_info.driver_name, dev_info.driver_id, + dev_info.feature_flags, dev_info.device->numa_node, + rte_cryptodev_queue_pair_count(i)); + +#define DSP_CRYPTO_FLAG(x) do { \ +printf(" - feature flags\n"); \ +printf("\t -- symmetric (%c) asymmetric (%c)" \ +" symmetric operation chaining (%c)\n", \ +(x & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO)?'y':'n', \ +(x & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)?'y':'n', \ +(x & RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING)?'y':'n'); \ +printf("\t -- CPU SSE (%c) AVX (%c) AVX2 (%c) AVX512 (%c)\n", \ +(x & RTE_CRYPTODEV_FF_CPU_SSE)?'y':'n', \ +(x & RTE_CRYPTODEV_FF_CPU_AVX)?'y':'n', \ +(x & RTE_CRYPTODEV_FF_CPU_AVX2)?'y':'n', \ +(x & RTE_CRYPTODEV_FF_CPU_AVX512)?'y':'n'); \ +printf("\t -- Acclerate CPU AESNI (%c) HW (%c)\n", \ +(x & RTE_CRYPTODEV_FF_CPU_AESNI)?'y':'n', \ +(x & RTE_CRYPTODEV_FF_HW_ACCELERATED)?'y':'n'); \ +printf("\t -- INLINE (%c)\n", \ +(x & RTE_CRYPTODEV_FF_SECURITY)?'y':'n'); \ +printf("\t -- ARM NEON (%c) CE (%c)\n", \ +(x & RTE_CRYPTODEV_FF_CPU_NEON)?'y':'n', \ +(x & RTE_CRYPTODEV_FF_CPU_ARM_CE)?'y':'n'); \ +printf(" - buffer offload\n"); \ +printf("\t -- IN_PLACE_SGL (%c)\n", \ +(x & RTE_CRYPTODEV_FF_IN_PLACE_SGL)?'y':'n'); \ +printf("\t -- OOP_SGL_IN_SGL_OUT (%c)\n", \ +(x & RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT)?'y':'n'); \ +printf("\t -- OOP_SGL_IN_LB_OUT (%c)\n", \ +(x & RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT)?'y':'n'); \ +printf("\t -- OOP_LB_IN_SGL_OUT (%c)\n", \ +(x & RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT)?'y':'n'); \ +printf("\t -- OOP_LB_IN_LB_OUT (%c)\n", \ +(x & RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT)?'y':'n'); \ +} while (0) + + DSP_CRYPTO_FLAG(dev_info.feature_flags); + + printf(" - stats\n"); + if (rte_cryptodev_stats_get(i, &stats) == 0) { + printf("\t -- enqueue count (%"PRIu64")" + " error (%"PRIu64")\n", + stats.enqueued_count, + stats.enqueue_err_count); + printf("\t -- dequeue count (%"PRIu64")" + " error (%"PRIu64")\n", + stats.dequeued_count, + stats.dequeue_err_count); + } + } + + STATS_BDR_STR(50, ""); } static void -- 2.17.1