From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
To: Ferruh Yigit <ferruh.yigit@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
"thomas@monjalon.net" <thomas@monjalon.net>,
"arybchenko@solarflare.com" <arybchenko@solarflare.com>,
"olivier.matz@6wind.com" <olivier.matz@6wind.com>,
"qi.z.zhang@intel.com" <qi.z.zhang@intel.com>,
"beilei.xing@intel.com" <beilei.xing@intel.com>,
Wenzhuo Lu <wenzhuo.lu@intel.com>,
Konstantin Ananyev <konstantin.ananyev@intel.com>
Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload
Date: Fri, 26 Oct 2018 14:35:24 +0000 [thread overview]
Message-ID: <20181026143508.GA2616@jerin> (raw)
In-Reply-To: <1888b918-6871-eadc-6aa1-fbf6b0cf48fe@intel.com>
-----Original Message-----
> Date: Fri, 26 Oct 2018 14:40:42 +0100
> From: Ferruh Yigit <ferruh.yigit@intel.com>
> To: Jerin Jacob <jerin.jacob@caviumnetworks.com>, "dev@dpdk.org"
> <dev@dpdk.org>
> CC: "thomas@monjalon.net" <thomas@monjalon.net>,
> "arybchenko@solarflare.com" <arybchenko@solarflare.com>,
> "olivier.matz@6wind.com" <olivier.matz@6wind.com>, "qi.z.zhang@intel.com"
> <qi.z.zhang@intel.com>, "beilei.xing@intel.com" <beilei.xing@intel.com>,
> Wenzhuo Lu <wenzhuo.lu@intel.com>, Konstantin Ananyev
> <konstantin.ananyev@intel.com>
> Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload
> User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101
> Thunderbird/52.9.1
>
>
> On 10/26/2018 11:56 AM, Jerin Jacob wrote:
> >
> > Does anyone know the expectation of DEV_RX_OFFLOAD_VLAN_EXTEND
> > offload? Does not look like it is documented.
> >
> > Looks like it is very specific to Intel controllers, Based on 82599 HRM,
> > it is following, not sure what is the real expectation from NIC in
> > normative terms.
> >
> > Extended VLAN.
> > -------------
> > When set, all incoming Rx packets are expected to have at least one VLAN
> > with the Ether type as defined in EXVET register. The packets can have
> > an inner-VLAN that should be used for all filtering purposes. All Tx
> > packets are expected to have at least one VLAN added to them by the
> > host. In the case of an additional VLAN request (VLE), the inner-VLAN is
> > added by the hardware after the outer-VLAN is added by the host.
> > This bit should only be reset by a PCIe reset and should only be changed
> > while Tx and Rx processes are stopped.
> > The exception to this rule are MAC control packets such as flow control,
> > 802.1x, LACP, etc. that never carry a VLAN tag of any type
> >
>
> This looks similar to QinQ but it seems not, in ixgbe datasheet it has:
Yes. QinQ there is an already an offload called
DEV_RX_OFFLOAD_QINQ_STRIP
>
> "
> Double VLAN and Single VLAN Support
> -----------------------------------
> <....>
> This mode is used for systems where the near end switch adds the outer VLAN
> header containing switching information.
> <...>
> "
>
> And it in this mode hw doesn't insert or strip the outer VLAN, it expect SW does
> it. The ethernet type is not 0x88A8 but can be anything set on EXVET.VET_EXT. So
> looks like it is to let switch to add custom VLAN tags and NIC to ignore them.
next prev parent reply other threads:[~2018-10-26 14:38 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-26 10:56 Jerin Jacob
2018-10-26 13:40 ` Ferruh Yigit
2018-10-26 14:35 ` Jerin Jacob [this message]
2018-11-01 9:50 ` Zhao1, Wei
2018-11-01 10:34 ` Jerin Jacob
2018-11-05 4:22 ` Zhao1, Wei
2018-11-05 6:55 ` Thomas Monjalon
2018-11-05 9:09 ` Zhao1, Wei
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