From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com [209.85.210.177]) by dpdk.org (Postfix) with ESMTP id 8BEF7F94 for ; Wed, 31 Oct 2018 16:48:45 +0100 (CET) Received: by mail-pf1-f177.google.com with SMTP id a15-v6so7832055pfn.0 for ; Wed, 31 Oct 2018 08:48:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cb9MHMmMhaOYrb9oMqUY841joUG9kgYM/hEsB2K3u3E=; b=SuhUSWd9y5DjYeNPcdqkDj32wDfWFuj7PnOlNaO9BTSxh6UcSRvpiCkXuT4jydejTg Us1EaKPRxpbb0fKa9KzC/PkfFuAIGYBf6n8ievhAFvmemkB9HEr43W8upiU0Zc3xyB1P G6YlePI24J4enoIXgjWXjf7AiL/JwBu76qY5rYOMb0BawEwTV8PTMJ2tPEJku3LAAGXE Oa6rIePw/wiKl8x78gBDOVajwGlmFsZ26SndmrL9EODCzbu2CQbHlLyxa9OsTm8xetUU szYs7eHWuGTSS583abpRqobKoB6WxuQoUWDdlY9YO8QT9MWNk1D6nksQXXyDTijMQCT8 y1dQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Cb9MHMmMhaOYrb9oMqUY841joUG9kgYM/hEsB2K3u3E=; b=tiYrTMtVzGctuWJyN7HV098dRVHLsPsmyS+dXpEjw6gkQVRwoMcgjx1o3d2APUGaao c3UtzPwwpkhwhXbv5NSrDdq1+ZWHMgg3ICyhIJA8lRPdO7zXqhFt/joB18bnrHWXOKxj OK4tbRQ0KoaqOUQW8dg/JVmJKBqLb+Klc+raFZgMLTkRQk1Lr7A2W1WMicOxIKHUXeVu T45Zq/PG+qXZplyDqc/+TWQCNuJmntwm0ilEdO+IoXBc0mPLVd4omdIMKf0VQL+BZf4I wR5pd8cGvK29HntuK3RCEau8rqdU/e1x+0mcuZGkr4SCQ11bPRviJvsl6yK1maRlsqZn CAKA== X-Gm-Message-State: AGRZ1gIx5Pr/nIr6mkNCUsfwE6ndtS8HUJlUzU9uWQufpWizwT0tvGBp eJynQRTK+ZDJnh3pIi9gGsCZKFTe5I4= X-Google-Smtp-Source: AJdET5fo/W0rkJdpNxPzgS4lbI5CdXNb96uA75bJfvwHPfEU6F4wdzgEUlUBDSmzgqV8vY5GPkVIvw== X-Received: by 2002:a63:26c1:: with SMTP id m184mr3429367pgm.367.1541000924591; Wed, 31 Oct 2018 08:48:44 -0700 (PDT) Received: from xeon-e3 (204-195-22-127.wavecable.com. [204.195.22.127]) by smtp.gmail.com with ESMTPSA id e12-v6sm6897915pff.5.2018.10.31.08.48.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 31 Oct 2018 08:48:44 -0700 (PDT) Date: Wed, 31 Oct 2018 08:48:36 -0700 From: Stephen Hemminger To: Hideyuki Yamashita Cc: dev@dpdk.org Message-ID: <20181031084836.0e3bea7f@xeon-e3> In-Reply-To: <201810310822.w9V8MaA1017463@ccmail04.silk.ntt-tx.co.jp> References: <20181031144907.303203-1-yong.liu@intel.com> <201810310822.w9V8MaA1017463@ccmail04.silk.ntt-tx.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] Question about jumbo frame support on ixgbe X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Oct 2018 15:48:45 -0000 On Wed, 31 Oct 2018 17:22:02 +0900 Hideyuki Yamashita wrote: > Hi, > > I have a very basic question about jumbo frame support for ixgbe. > > I understand that some drivers support jumbo frame and > if it receive jumbo packet (greater than 1500 byte), it creates > mbuf chains and pass it to DPDK application through > e.g. rte_eth_rx_burst. > > However it looks that ixgbe driver does not support jumbo frame. > > Q1. Is my understanding above correct? > Q2. If A1 equals YES, then are there any future plan to support > jumbo frame on ixgbe? > > BR, > Hideyuki Yamashita > NTT TechnoCross > I don't work for Intel, and haven't tried jumbo frames on ixgbe. The hardware does support jumbo frames. You might be confusing the overlapping receive offload values. The setting for using jumbo frames is in current DPDK is shown as available in device as: rx_offload_capa & DEV_RX_OFFLOAD_JUMBO_FRAME In order to use it, this bit must be setn in rx_conf that is passed to rte_eth_rx_queue_setup The feature bit that creates multiple mbuf's if necessary on receive is: rx_offload_capa & DEV_RX_OFFLOAD_SCATTER Likewise to enable it, this must be set in rte_eth_rx_queue_setup rx_conf.