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From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
To: Joyce Kong <joyce.kong@arm.com>
CC: "dev@dpdk.org" <dev@dpdk.org>, "thomas@monjalon.net"
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Thread-Topic: [PATCH v4] config: enable more than 128 cores for Arm64 platform
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Date: Thu, 22 Nov 2018 11:04:13 +0000
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Subject: Re: [dpdk-dev] [PATCH v4] config: enable more than 128 cores for
Arm64 platform
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-----Original Message-----
> Date: Thu, 22 Nov 2018 15:37:07 +0800
> From: Joyce Kong <joyce.kong@arm.com>
> To: dev@dpdk.org
> CC: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
> Honnappa.Nagarahalli@arm.com, gavin.hu@arm.com, nd@arm.com,
> stable@dpdk.org
> Subject: [PATCH v4] config: enable more than 128 cores for Arm64 platform
> X-Mailer: git-send-email 2.7.4
>=20
>=20
> When running dpdk applications on cores whose ids are bigger
> than original max_core setting, eal error as below:
> EAL: Detected 104 lcore(s)
> EAL: Detected 2 NUMA nodes
> EAL: invalid core list
> -l CORELIST core indexes between 0 and 128
>=20
> The fix is to increase max_core to 256 on Arm64 platform.
>=20
> Fixes: b3ce00e5 ("mk: introduce ARMv8 architecture")
> Cc: stable@dpdk.org
>=20
> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> ---
> config/arm/meson.build | 1 +
> config/defconfig_arm64-armv8a-linuxapp-gcc | 1 +
> 2 files changed, 2 insertions(+)
>=20
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index b755138..3f91725 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -46,6 +46,7 @@ flags_common_default =3D [
>=20
> flags_generic =3D [
> ['RTE_MACHINE', '"armv8a"'],
> + ['RTE_MAX_LCORE', 256],
> ['RTE_CACHE_LINE_SIZE', 128]]
> flags_cavium =3D [
> ['RTE_MACHINE', '"thunderx"'],
> diff --git a/config/defconfig_arm64-armv8a-linuxapp-gcc b/config/defconfi=
g_arm64-armv8a-linuxapp-gcc
> index 1842744..a6ed90c 100644
> --- a/config/defconfig_arm64-armv8a-linuxapp-gcc
> +++ b/config/defconfig_arm64-armv8a-linuxapp-gcc
> @@ -6,3 +6,4 @@
>=20
> CONFIG_RTE_TOOLCHAIN=3D"gcc"
> CONFIG_RTE_TOOLCHAIN_GCC=3Dy
> +CONFIG_RTE_MAX_LCORE=3D256
> --
> 2.7.4
>=20