* [dpdk-dev] [PATCH 00/37] share code update.
@ 2019-02-28 5:56 Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
` (39 more replies)
0 siblings, 40 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Main changes:
1. add DCB/FDIR support.
2. add more APIs in switch module.
3. code clean and bug fix.
Qi Zhang (37):
net/ice/base: add switch resource allocation and free
net/ice/base: improve comments
net/ice/base: add two helper functions
net/ice/base: add helper macros
net/ice/base: allow package copy to be used after resets
net/ice/base: code clean
net/ice/base: declare functions as external
net/ice/base: add more APIs in switch module
net/ice/base: add VSI queue context framework
net/ice/base: add APIs to add remove ethertype filter
net/ice/base: add APIs to get allocated resources
net/ice/base: add APIs to alloc/free VLAN resource counter
net/ice/base: add APIs to get VSI promiscuous mode
net/ice/base: add MAC filter with marker and counter
net/ice/base: add two helper functions for flow management
net/ice/base: minor fix
net/ice/base: update macros
net/ice/base: code clean
net/ice/base: enable VSI queue context
net/ice/base: ensure only valid bits are set
net/ice/base: enhance get link status command
net/ice/base: add RSS key related macro and structures
net/ice/base: do not write TCAM entries back
net/ice/base: remove local VSIG allocations
net/ice/base: minor fix
net/ice/base: update copyright time
net/ice/base: resolve static analysis reported issues
net/ice/base: return config error without queue to disable
net/ice/base: add function to check FW recovery mode
net/ice/base: change profile id reference counting
net/ice/base: add DCB support
net/ice/base: add FDIR support
net/ice/base: change profile priority for RSS reply
net/ice/base: remove duplicate resource allocations
net/ice/base: minor fix
net/ice/base: increase prototol offset size
net/ice/base: revert the workaround for resource allocation
drivers/net/ice/Makefile | 2 +
drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 650 ++++++--
drivers/net/ice/base/ice_common.h | 36 +-
drivers/net/ice/base/ice_controlq.c | 10 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 +++
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_fdir.c | 742 +++++++++
drivers/net/ice/base/ice_fdir.h | 205 +++
drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
drivers/net/ice/base/ice_flex_pipe.h | 4 +-
drivers/net/ice/base/ice_flex_type.h | 19 +-
drivers/net/ice/base/ice_flow.c | 224 +--
drivers/net/ice/base/ice_flow.h | 22 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
drivers/net/ice/base/ice_nvm.c | 17 +-
drivers/net/ice/base/ice_osdep.h | 16 +
drivers/net/ice/base/ice_protocol_type.h | 8 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 34 +-
drivers/net/ice/base/ice_status.h | 3 +-
drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
drivers/net/ice/base/ice_switch.h | 109 +-
drivers/net/ice/base/ice_type.h | 119 +-
drivers/net/ice/base/meson.build | 2 +
drivers/net/ice/ice_rxtx.c | 11 +-
31 files changed, 7114 insertions(+), 2362 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 01/37] net/ice/base: add switch resource allocation and free
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 02/37] net/ice/base: improve comments Qi Zhang
` (38 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Add two APIs ice_alloc_sw and ice_free_sw to support
switch related resource allocation and free.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 150 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 ++
2 files changed, 155 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 0379cd045..a7b712e17 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
}
+/**
+ * ice_alloc_sw - allocate resources specific to switch
+ * @hw: pointer to the HW struct
+ * @ena_stats: true to turn on VEB stats
+ * @shared_res: true for shared resource, false for dedicated resource
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * allocates switch resources (SWID and VEB counter) (0x0208)
+ */
+enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ struct ice_aqc_res_elem *sw_ele;
+ enum ice_status status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer for switch ID.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is allocated, and hence a single sw_id
+ * is requested.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |
+ (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+
+ if (status)
+ goto ice_alloc_sw_exit;
+
+ sw_ele = &sw_buf->elem[0];
+ *sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);
+
+ if (ena_stats) {
+ /* Prepare buffer for VEB Counter */
+ enum ice_adminq_opc opc = ice_aqc_opc_alloc_res;
+ struct ice_aqc_alloc_free_res_elem *counter_buf;
+ struct ice_aqc_res_elem *counter_ele;
+
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ status = ICE_ERR_NO_MEMORY;
+ goto ice_alloc_sw_exit;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since
+ * only a single switch/VEB instance is allocated, and hence a
+ * single VEB counter is requested.
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED);
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ opc, NULL);
+
+ if (status) {
+ ice_free(hw, counter_buf);
+ goto ice_alloc_sw_exit;
+ }
+ counter_ele = &counter_buf->elem[0];
+ *counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);
+ ice_free(hw, counter_buf);
+ }
+
+ice_alloc_sw_exit:
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_free_sw - free resources specific to switch
+ * @hw: pointer to the HW struct
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * free switch resources (SWID and VEB counter) (0x0209)
+ *
+ * NOTE: This function frees multiple resources. It continues
+ * releasing other resources even after it encounters error.
+ * The error code returned is the last error it encountered.
+ */
+enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
+ enum ice_status status, ret_status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer to free for switch ID res.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single sw_id
+ * is released.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);
+ sw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);
+
+ ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+
+ if (ret_status)
+ ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
+
+ /* Prepare buffer to free for VEB Counter resource */
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ ice_free(hw, sw_buf);
+ return ICE_ERR_NO_MEMORY;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single VEB counter
+ * is released
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);
+ counter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status) {
+ ice_debug(hw, ICE_DBG_SW,
+ "VEB counter resource could not be freed\n");
+ ret_status = status;
+ }
+
+ ice_free(hw, counter_buf);
+ ice_free(hw, sw_buf);
+ return ret_status;
+}
/**
* ice_aq_add_vsi
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 66a172fc2..dd21781f7 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id);
+enum ice_status
+ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 02/37] net/ice/base: improve comments
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 03/37] net/ice/base: add two helper functions Qi Zhang
` (37 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Improve comments to follow naming rules.
Also the patch include some minor cleanup.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 27 +-
drivers/net/ice/base/ice_common.c | 148 +++----
drivers/net/ice/base/ice_common.h | 4 +-
drivers/net/ice/base/ice_controlq.c | 8 +-
drivers/net/ice/base/ice_flex_pipe.c | 364 ++++++++--------
drivers/net/ice/base/ice_flex_pipe.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 4 +-
drivers/net/ice/base/ice_flow.c | 65 +--
drivers/net/ice/base/ice_flow.h | 1 -
drivers/net/ice/base/ice_lan_tx_rx.h | 70 +--
drivers/net/ice/base/ice_nvm.c | 8 +-
drivers/net/ice/base/ice_protocol_type.h | 4 +-
drivers/net/ice/base/ice_sched.c | 719 ++++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 8 +-
drivers/net/ice/base/ice_switch.c | 120 +++---
drivers/net/ice/base/ice_switch.h | 20 +-
drivers/net/ice/base/ice_type.h | 34 +-
17 files changed, 804 insertions(+), 802 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a1b9edd14..5a599280e 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -71,7 +71,7 @@ struct ice_aqc_req_res {
#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000
#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000
#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000
- /* For SDP: pin id of the SDP */
+ /* For SDP: pin ID of the SDP */
__le32 res_number;
/* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */
__le16 status;
@@ -854,7 +854,6 @@ struct ice_aqc_delete_elem {
-
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
* Query RL profile (indirect 0x0411)
@@ -1154,8 +1153,8 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
-#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
-#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
+#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
+#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
#define ICE_AQ_PHY_ENA_LINK BIT(3)
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
@@ -1228,7 +1227,7 @@ struct ice_aqc_get_link_status_data {
u8 ext_info;
#define ICE_AQ_LINK_PHY_TEMP_ALARM BIT(0)
#define ICE_AQ_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
- /* Port TX Suspended */
+ /* Port Tx Suspended */
#define ICE_AQ_LINK_TX_S 2
#define ICE_AQ_LINK_TX_M (0x03 << ICE_AQ_LINK_TX_S)
#define ICE_AQ_LINK_TX_ACTIVE 0
@@ -1441,7 +1440,7 @@ struct ice_aqc_get_set_rss_lut {
-/* Add TX LAN Queues (indirect 0x0C30) */
+/* Add Tx LAN Queues (indirect 0x0C30) */
struct ice_aqc_add_txqs {
u8 num_qgrps;
u8 reserved[3];
@@ -1451,7 +1450,7 @@ struct ice_aqc_add_txqs {
};
-/* This is the descriptor of each queue entry for the Add TX LAN Queues
+/* This is the descriptor of each queue entry for the Add Tx LAN Queues
* command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp.
*/
struct ice_aqc_add_txqs_perq {
@@ -1464,7 +1463,7 @@ struct ice_aqc_add_txqs_perq {
};
-/* The format of the command buffer for Add TX LAN Queues (0x0C30)
+/* The format of the command buffer for Add Tx LAN Queues (0x0C30)
* is an array of the following structs. Please note that the length of
* each struct ice_aqc_add_tx_qgrp is variable due
* to the variable number of queues in each group!
@@ -1477,7 +1476,7 @@ struct ice_aqc_add_tx_qgrp {
};
-/* Disable TX LAN Queues (indirect 0x0C31) */
+/* Disable Tx LAN Queues (indirect 0x0C31) */
struct ice_aqc_dis_txqs {
u8 cmd_type;
#define ICE_AQC_Q_DIS_CMD_S 0
@@ -1500,7 +1499,7 @@ struct ice_aqc_dis_txqs {
};
-/* The buffer for Disable TX LAN Queues (indirect 0x0C31)
+/* The buffer for Disable Tx LAN Queues (indirect 0x0C31)
* contains the following structures, arrayed one after the
* other.
* Note: Since the q_id is 16 bits wide, if the
@@ -1528,7 +1527,7 @@ struct ice_aqc_dis_txq {
};
-/* TX LAN Queues Cleanup Event (0x0C31) */
+/* Tx LAN Queues Cleanup Event (0x0C31) */
struct ice_aqc_txqs_cleanup {
__le16 caller_opc;
__le16 cmd_tag;
@@ -1536,7 +1535,7 @@ struct ice_aqc_txqs_cleanup {
};
-/* Move / Reconfigure TX Queues (indirect 0x0C32) */
+/* Move / Reconfigure Tx Queues (indirect 0x0C32) */
struct ice_aqc_move_txqs {
u8 cmd_type;
#define ICE_AQC_Q_CMD_TYPE_S 0
@@ -1557,7 +1556,7 @@ struct ice_aqc_move_txqs {
};
-/* This is the descriptor of each queue entry for the move TX LAN Queues
+/* This is the descriptor of each queue entry for the move Tx LAN Queues
* command (0x0C32).
*/
struct ice_aqc_move_txqs_elem {
@@ -1950,7 +1949,7 @@ enum ice_adminq_opc {
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
- /* TX queue handling commands/events */
+ /* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
ice_aqc_opc_dis_txqs = 0x0C31,
ice_aqc_opc_txqs_cleanup = 0x0C31,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 145f66a90..bcfa3014b 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -36,7 +36,7 @@
* @hw: pointer to the HW structure
*
* This function sets the MAC type of the adapter based on the
- * vendor ID and device ID stored in the hw structure.
+ * vendor ID and device ID stored in the HW structure.
*/
static enum ice_status ice_set_mac_type(struct ice_hw *hw)
{
@@ -79,7 +79,7 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
/**
* ice_aq_manage_mac_read - manage MAC address read command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the manage MAC read response
* @buf_size: Size of the virtual buffer
* @cd: pointer to command details structure or NULL
@@ -338,7 +338,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
/* flag cleared so calling functions don't call AQ again */
pi->phy.get_link_info = false;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -426,7 +426,7 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -446,7 +446,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -503,7 +503,7 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cfg_fw_log - configure FW logging
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @enable: enable certain FW logging events if true, disable all if false
*
* This function enables/disables the FW logging via Rx CQ events and a UART
@@ -652,7 +652,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
/**
* ice_output_fw_log
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: pointer to the AQ message descriptor
* @buf: pointer to the buffer accompanying the AQ message
*
@@ -668,7 +668,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
/**
* ice_get_itr_intrl_gran - determine int/intrl granularity
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
@@ -763,7 +763,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
goto err_unroll_cqinit;
}
- /* set the back pointer to hw */
+ /* set the back pointer to HW */
hw->port_info->hw = hw;
/* Initialize port_info struct with switch configuration data */
@@ -1034,7 +1034,7 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
* @ice_rxq_ctx: pointer to the rxq context
* @rxq_index: the index of the Rx queue
*
- * Copies rxq context from dense structure to hw register space
+ * Copies rxq context from dense structure to HW register space
*/
static enum ice_status
ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
@@ -1047,7 +1047,7 @@ ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
if (rxq_index > QRX_CTRL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, QRX_CONTEXT(i, rxq_index),
*((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
@@ -1091,7 +1091,7 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = {
* @rxq_index: the index of the Rx queue
*
* Converts rxq context from sparse to dense structure and then writes
- * it to hw register space
+ * it to HW register space
*/
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -1109,7 +1109,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
* @hw: pointer to the hardware structure
* @rxq_index: the index of the Rx queue to clear
*
- * Clears rxq context in hw register space
+ * Clears rxq context in HW register space
*/
enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
{
@@ -1166,7 +1166,7 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {
* @ice_tx_cmpltnq_ctx: pointer to the Tx completion queue context
* @tx_cmpltnq_index: the index of the completion queue
*
- * Copies Tx completion q context from dense structure to hw register space
+ * Copies Tx completion queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
@@ -1180,7 +1180,7 @@ ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
if (tx_cmpltnq_index > GLTCLAN_CQ_CNTX0_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index),
*((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
@@ -1215,7 +1215,7 @@ static const struct ice_ctx_ele ice_tx_cmpltnq_ctx_info[] = {
* @tx_cmpltnq_index: the index of the completion queue
*
* Converts completion queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
@@ -1233,7 +1233,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_cmpltnq_index: the index of the completion queue to clear
*
- * Clears Tx completion queue context in hw register space
+ * Clears Tx completion queue context in HW register space
*/
enum ice_status
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
@@ -1256,7 +1256,7 @@ ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
* @ice_tx_drbell_q_ctx: pointer to the doorbell queue context
* @tx_drbell_q_index: the index of the doorbell queue
*
- * Copies doorbell q context from dense structure to hw register space
+ * Copies doorbell queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
@@ -1270,7 +1270,7 @@ ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
if (tx_drbell_q_index > QTX_COMM_DBLQ_DBELL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS; i++) {
wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index),
*((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
@@ -1306,7 +1306,7 @@ static const struct ice_ctx_ele ice_tx_drbell_q_ctx_info[] = {
* @tx_drbell_q_index: the index of the doorbell queue
*
* Converts doorbell queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
@@ -1324,7 +1324,7 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_drbell_q_index: the index of the doorbell queue to clear
*
- * Clears doorbell queue context in hw register space
+ * Clears doorbell queue context in HW register space
*/
enum ice_status
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
@@ -1394,7 +1394,7 @@ ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf, u16 buf_len)
/**
* ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: descriptor describing the command
* @buf: buffer to use for indirect commands (NULL for direct commands)
* @buf_size: size of buffer for indirect commands (0 for direct commands)
@@ -1411,7 +1411,7 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
/**
* ice_aq_get_fw_ver
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cd: pointer to command details structure or NULL
*
* Get the firmware version (0x0001) from the admin queue commands
@@ -1446,7 +1446,7 @@ enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
/**
* ice_aq_q_shutdown
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @unloading: is the driver unloading itself
*
* Tell the Firmware that we're shutting down the AdminQ and whether
@@ -1469,8 +1469,8 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
/**
* ice_aq_req_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @access: access type
* @sdp_number: resource number
* @timeout: the maximum time in ms that the driver may hold the resource
@@ -1557,8 +1557,8 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_aq_release_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @sdp_number: resource number
* @cd: pointer to command details structure or NULL
*
@@ -1586,7 +1586,7 @@ ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
/**
* ice_acquire_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
* @access: access type (read or write)
* @timeout: timeout in milliseconds
*
@@ -1650,7 +1650,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_release_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
*
* This function will release a resource using the proper Admin Command.
*/
@@ -1664,7 +1664,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
status = ice_aq_release_res(hw, res, 0, NULL);
/* there are some rare cases when trying to release the resource
- * results in an admin Q timeout, so handle them correctly
+ * results in an admin queue timeout, so handle them correctly
*/
while ((status == ICE_ERR_AQ_TIMEOUT) &&
(total_delay < hw->adminq.sq_cmd_timeout)) {
@@ -1676,7 +1676,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
/**
* ice_aq_alloc_free_res - command to allocate/free resources
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_entries: number of resource entries in buffer
* @buf: Indirect buffer to hold data parameters and response
* @buf_size: size of buffer for indirect commands
@@ -1714,7 +1714,7 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
/**
* ice_alloc_hw_res - allocate resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
* @sh: shared if true, dedicated if false
@@ -1751,8 +1751,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
}
/**
- * ice_free_hw_res - free allocated hw resource
- * @hw: pointer to the hw struct
+ * ice_free_hw_res - free allocated HW resource
+ * @hw: pointer to the HW struct
* @type: type of resource to free
* @num: number of resources
* @res: pointer to array that contains the resources to free
@@ -1786,7 +1786,7 @@ ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
/**
* ice_get_num_per_func - determine number of resources per PF
- * @hw: pointer to the hw structure
+ * @hw: pointer to the HW structure
* @max: value to be evenly split between each PF
*
* Determine the number of valid functions by going through the bitmap returned
@@ -1809,7 +1809,7 @@ static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)
/**
* ice_parse_caps - parse function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: pointer to a buffer containing function/device capability records
* @cap_count: number of capability records in the list
* @opc: type of capabilities list to parse
@@ -1929,7 +1929,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
/**
* ice_aq_discover_caps - query function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the capabilities
* @buf_size: Size of the virtual buffer
* @cap_count: cap count needed if AQ err==ENOMEM
@@ -2028,7 +2028,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
/**
* ice_aq_manage_mac_write - manage MAC address write command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address
* @flags: flags to control write behavior
* @cd: pointer to command details structure or NULL
@@ -2057,7 +2057,7 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
/**
* ice_aq_clear_pxe_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Tell the firmware that the driver is taking over from PXE (0x0110).
*/
@@ -2073,7 +2073,7 @@ static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw)
/**
* ice_clear_pxe_mode - clear pxe operations mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Make sure all PXE mode settings are cleared, including things
* like descriptor fetch/write-back mode.
@@ -2090,10 +2090,10 @@ void ice_clear_pxe_mode(struct ice_hw *hw)
* @phy_type_low: lower part of phy_type
* @phy_type_high: higher part of phy_type
*
- * This helper function will convert an entry in phy type structure
+ * This helper function will convert an entry in PHY type structure
* [phy_type_low, phy_type_high] to its corresponding link speed.
* Note: In the structure of [phy_type_low, phy_type_high], there should
- * be one bit set, as this function will convert one phy type to its
+ * be one bit set, as this function will convert one PHY type to its
* speed.
* If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
* If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
@@ -2263,7 +2263,7 @@ ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
/**
* ice_aq_set_phy_cfg
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @cfg: structure with PHY configuration data to be set
* @cd: pointer to command details structure or NULL
@@ -2372,7 +2372,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
if (!pcaps)
return ICE_ERR_NO_MEMORY;
- /* Get the current phy config */
+ /* Get the current PHY config */
status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
NULL);
if (status) {
@@ -2561,7 +2561,7 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
/**
* ice_aq_set_event_mask
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @port_num: port number of the physical function
* @mask: event mask to be set
* @cd: pointer to command details structure or NULL
@@ -2587,7 +2587,7 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
/**
* ice_aq_set_mac_loopback
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @ena_lpbk: Enable or Disable loopback
* @cd: pointer to command details structure or NULL
*
@@ -2775,7 +2775,7 @@ ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type,
/**
* __ice_aq_get_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_id: VSI FW index
* @key: pointer to key info struct
* @set: set true to set the key, false to get the key
@@ -2810,7 +2810,7 @@ ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
/**
* ice_aq_get_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @key: pointer to key info struct
*
@@ -2829,7 +2829,7 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
/**
* ice_aq_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @keys: pointer to key info struct
*
@@ -2916,8 +2916,8 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
* @num_qgrps: number of groups in the list
* @qg_list: the list of groups to disable
* @buf_size: the total size of the qg_list buffer in bytes
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* Disable LAN Tx queue (0x0C31)
@@ -2993,7 +2993,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",
vmvf_num, hw->adminq.sq_last_status);
else
- ice_debug(hw, ICE_DBG_SCHED, "disable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",
LE16_TO_CPU(qg_list[0].q_id[0]),
hw->adminq.sq_last_status);
}
@@ -3232,13 +3232,13 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @tc: tc number
+ * @tc: TC number
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
* @cd: pointer to command details structure or NULL
*
- * This function adds one lan q
+ * This function adds one LAN queue
*/
enum ice_status
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
@@ -3282,14 +3282,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* Bit 5-6.
* - Bit 7 is reserved.
* Without setting the generic section as valid in valid_sections, the
- * Admin Q command will fail with error code ICE_AQ_RC_EINVAL.
+ * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
*/
buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
- /* add the lan q */
+ /* add the LAN queue */
status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
if (status != ICE_SUCCESS) {
- ice_debug(hw, ICE_DBG_SCHED, "enable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n",
LE16_TO_CPU(buf->txqs[0].txq_id),
hw->adminq.sq_last_status);
goto ena_txq_exit;
@@ -3298,7 +3298,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
- /* add a leaf node into schduler tree q layer */
+ /* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
ena_txq_exit:
@@ -3312,8 +3312,8 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* @num_queues: number of queues
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* This function removes queues and their corresponding nodes in SW DB
@@ -3363,12 +3363,12 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
}
/**
- * ice_cfg_vsi_qs - configure the new/exisiting VSI queues
+ * ice_cfg_vsi_qs - configure the new/existing VSI queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
* @maxqs: max queues array per TC
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
* This function adds/updates the VSI queues per TC.
*/
@@ -3403,13 +3403,13 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
}
/**
- * ice_cfg_vsi_lan - configure VSI lan queues
+ * ice_cfg_vsi_lan - configure VSI LAN queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
- * @max_lanqs: max lan queues array per TC
+ * @max_lanqs: max LAN queues array per TC
*
- * This function adds/updates the VSI lan queues per TC.
+ * This function adds/updates the VSI LAN queues per TC.
*/
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
@@ -3423,7 +3423,7 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
/**
* ice_replay_pre_init - replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Initializes required config data for VSI, FD, ACL, and RSS before replay.
*/
@@ -3447,9 +3447,9 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
}
/**
- * ice_replay_vsi - replay vsi configuration
- * @hw: pointer to the hw struct
- * @vsi_handle: driver vsi handle
+ * ice_replay_vsi - replay VSI configuration
+ * @hw: pointer to the HW struct
+ * @vsi_handle: driver VSI handle
*
* Restore all VSI configuration after reset. It is required to call this
* function with main VSI first.
@@ -3477,7 +3477,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_post - post replay configuration cleanup
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Post replay cleanup.
*/
@@ -3553,9 +3553,9 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
/**
- * ice_sched_query_elem - query element information from hw
- * @hw: pointer to the hw struct
- * @node_teid: node teid to be queried
+ * ice_sched_query_elem - query element information from HW
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID to be queried
* @buf: buffer to element information
*
* This function queries HW element information
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 5ac991ef2..f2ad86182 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -61,8 +61,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw);
* ... the value of pointer would equal 0x1008, since 0x1008 is the next
* address after 0x1006 which is divisible by 4.
*/
-#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
-
+#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -149,7 +148,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
-
enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index cbc4cb4c2..1c0830cec 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -54,7 +54,7 @@ static void ice_mailbox_init_regs(struct ice_hw *hw)
/**
* ice_check_sq_alive
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if Queue is enabled else false.
@@ -729,7 +729,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_done - check if FW has processed the Admin Send Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if the firmware has processed all descriptors on the
@@ -745,7 +745,7 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_send_cmd - send command to Control Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @desc: prefilled descriptor describing the command (non DMA mem)
* @buf: buffer to use for indirect commands (or NULL for direct commands)
@@ -990,7 +990,7 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
/**
* ice_clean_rq_elem
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @e: event info from the receive descriptor, includes any buffers
* @pending: number of events that could be left to process
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 493bc4e9b..c87424601 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -325,11 +325,11 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
* ice_boost_tcam_handler
* @sect_type: section type
* @section: pointer to section
- * @index: index of the boost tcam entry to be returned
- * @offset: pointer to receive absolute offset, always 0 for boost tcam sections
+ * @index: index of the boost TCAM entry to be returned
+ * @offset: pointer to receive absolute offset, always 0 for boost TCAM sections
*
* This is a callback function that can be passed to ice_pkg_enum_entry.
- * Handles enumeration of individual boost tcam entries.
+ * Handles enumeration of individual boost TCAM entries.
*/
static void *
ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
@@ -501,7 +501,7 @@ void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
label_name = ice_enum_labels(NULL, 0, &state, &val);
}
- /* Cache the appropriate boost tcam entry pointers */
+ /* Cache the appropriate boost TCAM entry pointers */
for (i = 0; i < hw->tnl.count; i++) {
ice_find_boost_entry(ice_seg, hw->tnl.tbl[i].boost_addr,
&hw->tnl.tbl[i].boost_entry);
@@ -1078,7 +1078,7 @@ enum ice_status ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg)
* @hw: pointer to the hardware structure
* @pkg_hdr: pointer to the driver's package hdr
*
- * Saves off the package details into the hw structure.
+ * Saves off the package details into the HW structure.
*/
enum ice_status
ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
@@ -1468,14 +1468,14 @@ ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
/**
* ice_get_sw_fv_list
* @hw: pointer to the HW structure
- * @prot_ids: field vector to search for with a given protocol id
+ * @prot_ids: field vector to search for with a given protocol ID
* @ids_cnt: lookup/protocol count
* @fv_list: Head of a list
*
* Finds all the field vector entries from switch block that contain
- * a given protocol id and returns a list of structures of type
+ * a given protocol ID and returns a list of structures of type
* "ice_sw_fv_list_entry". Every structure in the list has a field vector
- * definition and profile id information
+ * definition and profile ID information
* NOTE: The caller of the function is responsible for freeing the memory
* allocated for every list entry.
*/
@@ -1782,11 +1782,11 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
/* PTG Management */
/**
- * ice_ptg_update_xlt1 - Updates packet type groups in hw via xlt1 table
+ * ice_ptg_update_xlt1 - Updates packet type groups in HW via XLT1 table
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt1 hardware table to reflect the new
+ * This function will update the XLT1 hardware table to reflect the new
* packet type group configuration.
*/
enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
@@ -1817,7 +1817,7 @@ enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to search for
* @ptg: pointer to variable that receives the PTG
*
@@ -1838,7 +1838,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
/**
* ice_ptg_alloc_val - Allocates a new packet type group ID by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg to allocate
*
* This function allocates a given packet type group ID specified by the ptg
@@ -1853,7 +1853,7 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_alloc - Find a free entry and allocates a new packet type group ID
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function allocates and returns a new packet type group ID. Note
* that 0 is the default packet type group, so successfully created PTGs will
@@ -1877,7 +1877,7 @@ u8 ice_ptg_alloc(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_free - Frees a packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg ID to free
*
* This function frees a packet type group, and returns all the current ptypes
@@ -1902,7 +1902,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_remove_ptype - Removes ptype from a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to remove
* @ptg: the ptg to remove the ptype from
*
@@ -1947,7 +1947,7 @@ ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/**
* ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to add or move
* @ptg: the ptg to add or move the ptype to
*
@@ -1998,10 +1998,10 @@ ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/* Block / table size info */
struct ice_blk_size_details {
- u16 xlt1; /* # xlt1 entries */
- u16 xlt2; /* # xlt2 entries */
- u16 prof_tcam; /* # profile id tcam entries */
- u16 prof_id; /* # profile ids */
+ u16 xlt1; /* # XLT1 entries */
+ u16 xlt2; /* # XLT2 entries */
+ u16 prof_tcam; /* # profile ID TCAM entries */
+ u16 prof_id; /* # profile IDs */
u8 prof_cdid_bits; /* # cdid one-hot bits used in key */
u16 prof_redir; /* # profile redirection entries */
u16 es; /* # extraction sequence entries */
@@ -2079,7 +2079,7 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* profile cookies must compare, and in the exact same order to take
* into account priority
*/
- while (--count) {
+ while (count--) {
if (tmp2->profile_cookie != tmp1->profile_cookie)
return false;
@@ -2093,13 +2093,13 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* VSIG Management */
/**
- * ice_vsig_update_xlt2_sect - update one section of xlt2 table
+ * ice_vsig_update_xlt2_sect - update one section of XLT2 table
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: hw vsi number to program
- * @vsig: vsig for the vsi
+ * @blk: HW block
+ * @vsi: HW VSI number to program
+ * @vsig: vsig for the VSI
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration.
*/
static enum ice_status
@@ -2128,11 +2128,11 @@ ice_vsig_update_xlt2_sect(struct ice_hw *hw, enum ice_block blk, u16 vsi,
}
/**
- * ice_vsig_update_xlt2 - update xlt2 table with VSIG configuration
+ * ice_vsig_update_xlt2 - update XLT2 table with VSIG configuration
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration of used vsis.
*/
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
@@ -2158,14 +2158,14 @@ enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_vsig_find_vsi - find a VSIG that contains a specified vsi
+ * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi of interest
- * @vsig: pointer to receive the vsi group
+ * @blk: HW block
+ * @vsi: VSI of interest
+ * @vsig: pointer to receive the VSI group
*
- * This function will lookup the vsi entry in the XLT2 list and return
- * the vsi group its associated with.
+ * This function will lookup the VSI entry in the XLT2 list and return
+ * the VSI group its associated with.
*/
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
@@ -2174,7 +2174,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
return ICE_ERR_PARAM;
/* As long as there's a default or valid VSIG associated with the input
- * vsi, the functions returns a success. Any handling of VSIG will be
+ * VSI, the functions returns a success. Any handling of VSIG will be
* done by the following add, update or remove functions.
*/
*vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
@@ -2185,7 +2185,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
/**
* ice_vsig_alloc_val - allocate a new VSIG by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: the vsig to allocate
*
* This function will allocate a given VSIG specified by the vsig parameter.
@@ -2205,7 +2205,7 @@ static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
/**
* ice_vsig_alloc - Finds a free entry and allocates a new VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function will iterate through the VSIG list and mark the first
* unused entry for the new VSIG entry as used and return that value.
@@ -2222,16 +2222,16 @@ static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_find_dup_props_vsig - find vsi group with a specified set of properties
+ * ice_find_dup_props_vsig - find VSI group with a specified set of properties
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @chs: characteristic list
* @vsig: returns the VSIG with the matching profiles, if found
*
- * Each VSIG is associated with a characteristic set; i.e. all vsis under
+ * Each VSIG is associated with a characteristic set; i.e. all VSIs under
* a group have the same characteristic set. To check if there exists a VSIG
* which has the same characteristics as the input characteristics; this
- * function will iterate through the xlt2 list and return the VSIG that has a
+ * function will iterate through the XLT2 list and return the VSIG that has a
* matching configuration. In order to make sure that priorities are accounted
* for, the list must match exactly, including the order in which the
* characteristics are listed.
@@ -2257,12 +2257,12 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_vsig_free - free vsi group
+ * ice_vsig_free - free VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to remove
*
- * The function will remove all vsis associated with the input VSIG and move
+ * The function will remove all VSIs associated with the input VSIG and move
* them to the DEFAULT_VSIG and mark the VSIG available.
*/
enum ice_status
@@ -2310,14 +2310,14 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_vsig_add_mv_vsi - add or move a vsi to a vsi group
+ * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to move
- * @vsig: destination vsi group
+ * @blk: HW block
+ * @vsi: VSI to move
+ * @vsig: destination VSI group
*
- * This function will move or add the input vsi to the target VSIG.
- * The function will find the original VSIG the vsi belongs to and
+ * This function will move or add the input VSI to the target VSIG.
+ * The function will find the original VSIG the VSI belongs to and
* move the entry to the DEFAULT_VSIG, update the original VSIG and
* then move entry to the new VSIG.
*/
@@ -2358,7 +2358,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
- /* Create vsi entry and add VSIG and prop_mask values */
+ /* Create VSI entry and add VSIG and prop_mask values */
hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
hw->blk[blk].xlt2.vsis[vsi].changed = 1;
@@ -2373,13 +2373,13 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_vsig_remove_vsi - remove vsi from VSIG
+ * ice_vsig_remove_vsi - remove VSI from VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to remove
- * @vsig: vsi group to remove from
+ * @blk: HW block
+ * @vsi: VSI to remove
+ * @vsig: VSI group to remove from
*
- * The function will remove the input vsi from its vsi group and move it
+ * The function will remove the input VSI from its VSI group and move it
* to the DEFAULT_VSIG.
*/
enum ice_status
@@ -2396,7 +2396,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
return ICE_ERR_DOES_NOT_EXIST;
- /* entry already in default VSIG, dont have to remove */
+ /* entry already in default VSIG, don't have to remove */
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
@@ -2407,7 +2407,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
vsi_cur = (*vsi_head);
- /* iterate the vsi list, skip over the entry to be removed */
+ /* iterate the VSI list, skip over the entry to be removed */
while (vsi_cur) {
if (vsi_tgt == vsi_cur) {
(*vsi_head) = vsi_cur->next_vsi;
@@ -2417,7 +2417,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_cur = vsi_cur->next_vsi;
}
- /* verify if vsi was removed from group list */
+ /* verify if VSI was removed from group list */
if (!vsi_cur)
return ICE_ERR_DOES_NOT_EXIST;
@@ -2429,11 +2429,11 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_find_prof_id - find profile id for a given field vector
+ * ice_find_prof_id - find profile ID for a given field vector
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @fv: field vector to search for
- * @prof_id: receives the profile id
+ * @prof_id: receives the profile ID
*/
static enum ice_status
ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
@@ -2456,7 +2456,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_id_rsrc_type - get profile id resource type for a block type
+ * ice_prof_id_rsrc_type - get profile ID resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2485,7 +2485,7 @@ static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_tcam_ent_rsrc_type - get tcam entry resource type for a block type
+ * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2707,10 +2707,10 @@ ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
}
/**
- * ice_alloc_tcam_ent - allocate hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the tcam for
- * @tcam_idx: pointer to variable to receive the tcam entry
+ * ice_alloc_tcam_ent - allocate hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the TCAM for
+ * @tcam_idx: pointer to variable to receive the TCAM entry
*
* This function allocates a new entry in a Profile ID TCAM for a specific
* block.
@@ -2727,10 +2727,10 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
}
/**
- * ice_free_tcam_ent - free hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the tcam entry
- * @tcam_idx: the tcam entry to free
+ * ice_free_tcam_ent - free hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the TCAM entry
+ * @tcam_idx: the TCAM entry to free
*
* This function frees an entry in a Profile ID TCAM for a specific block.
*/
@@ -2746,12 +2746,12 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
}
/**
- * ice_alloc_prof_id - allocate profile id
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the profile id for
- * @prof_id: pointer to variable to receive the profile id
+ * ice_alloc_prof_id - allocate profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the profile ID for
+ * @prof_id: pointer to variable to receive the profile ID
*
- * This function allocates a new profile id, which also corresponds to a Field
+ * This function allocates a new profile ID, which also corresponds to a Field
* Vector (Extraction Sequence) entry.
*/
static enum ice_status
@@ -2772,12 +2772,12 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
}
/**
- * ice_free_prof_id - free profile id
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id to free
+ * ice_free_prof_id - free profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID to free
*
- * This function frees a profile id, which also corresponds to a Field Vector.
+ * This function frees a profile ID, which also corresponds to a Field Vector.
*/
static enum ice_status
ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2801,9 +2801,9 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_inc_ref - increment reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to increment the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to increment the reference count
*/
static enum ice_status
ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2818,9 +2818,9 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_dec_ref - decrement reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to decrement the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to decrement the reference count
*/
static enum ice_status
ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2838,9 +2838,9 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block in which to write the extraction sequence
- * @prof_id: the profile id to write
+ * @prof_id: the profile ID to write
* @fv: pointer to the extraction sequence to write
*/
static void
@@ -2921,7 +2921,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
u8 *src, *dst;
void *sect;
- /* if the hw segment pointer is null then the first iteration of
+ /* if the HW segment pointer is null then the first iteration of
* ice_pkg_enum_section() will fail. In this case the Hw tables will
* not be filled and return success.
*/
@@ -3072,7 +3072,7 @@ static void ice_free_flow_profs(struct ice_hw *hw)
/**
* ice_free_prof_map - frees the profile map
* @hw: pointer to the hardware structure
- * @blk: the hw block which contains the profile map to be freed
+ * @blk: the HW block which contains the profile map to be freed
*/
static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
{
@@ -3091,7 +3091,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
/**
* ice_free_vsig_tbl - free complete VSIG table entries
* @hw: pointer to the hardware structure
- * @blk: the hw block on which to free the VSIG table entries
+ * @blk: the HW block on which to free the VSIG table entries
*/
static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
{
@@ -3151,9 +3151,9 @@ static void ice_init_flow_profs(struct ice_hw *hw)
}
/**
- * ice_init_sw_xlt1_db - init software xlt1 database from hw tables
+ * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
@@ -3172,9 +3172,9 @@ void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_xlt2_db - init software xlt2 database from hw tables
+ * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
@@ -3197,7 +3197,7 @@ void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_db - init software database from hw tables
+ * ice_init_sw_db - init software database from HW tables
* @hw: pointer to the hardware structure
*/
static
@@ -3329,9 +3329,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
}
/**
- * ice_prof_gen_key - generate profile id key
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_prof_gen_key - generate profile ID key
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3339,7 +3339,7 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
* @vl_msk: valid mask
* @dc_msk: don't care mask
* @nm_msk: never match mask
- * @key: output of profile id key
+ * @key: output of profile ID key
*/
static enum ice_status
ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
@@ -3384,11 +3384,11 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
}
/**
- * ice_tcam_write_entry - write tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_tcam_write_entry - write TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @idx: the entry index to write to
- * @prof_id: profile id
+ * @prof_id: profile ID
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3418,9 +3418,9 @@ ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
}
/**
- * ice_vsig_get_ref - returns number of vsis belong to a VSIG
+ * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to query
* @refs: pointer to variable to receive the reference count
*/
@@ -3446,7 +3446,7 @@ ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
/**
* ice_get_ptg - get or allocate a ptg for a ptype
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to retrieve the PTG for
* @ptg: receives the PTG of the ptype
* @add: receive boolean indicating whether PTG was added or not
@@ -3483,7 +3483,7 @@ ice_get_ptg(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg,
/**
* ice_has_prof_vsig - check to see if VSIG has a specific profile
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to check against
* @hdl: profile handle
*/
@@ -3500,14 +3500,14 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
}
ice_debug(hw, ICE_DBG_INIT,
- "Characteristic list for vsi group %d not found.\n",
+ "Characteristic list for VSI group %d not found.\n",
vsig);
return false;
}
/**
- * ice_prof_bld_es - build profile id extraction sequence changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_es - build profile ID extraction sequence changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3546,8 +3546,8 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_tcam - build profile id tcam changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_tcam - build profile ID TCAM changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3586,7 +3586,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_xlt1 - build xlt1 changes
+ * ice_prof_bld_xlt1 - build XLT1 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3619,7 +3619,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
}
/**
- * ice_prof_bld_xlt2 - build xlt2 changes
+ * ice_prof_bld_xlt2 - build XLT2 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3662,7 +3662,7 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
/**
* ice_upd_prof_hw - update hardware using the change list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @chgs: the list of changes to make in hardware
*/
@@ -3763,16 +3763,16 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
/**
* ice_add_prof - add profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @id: profile tracking id
+ * @id: profile tracking ID
* @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
* @es: extraction sequence (length of array is determined by the block)
*
* This function registers a profile, which matches a set of PTYPES with a
* particular extraction sequence. While the hardware profile is allocated
* it will not be written until the first call to ice_add_flow that specifies
- * the id value used here.
+ * the ID value used here.
*/
enum ice_status
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
@@ -3787,7 +3787,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/* search for existing profile */
status = ice_find_prof_id(hw, blk, es, &prof_id);
if (status) {
- /* allocate profile id */
+ /* allocate profile ID */
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
@@ -3851,7 +3851,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/**
* ice_search_prof_id - Search for a profile tracking ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
@@ -3876,7 +3876,7 @@ ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_set_prof_context - Set context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: context
@@ -3895,7 +3895,7 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt)
/**
* ice_get_prof_context - Get context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: pointer to variable to receive the context
@@ -3914,7 +3914,7 @@ ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt)
/**
* ice_vsig_prof_id_count - count profiles in a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
*/
@@ -3933,8 +3933,8 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_rel_tcam_idx - release a tcam index
- * @hw: pointer to the hw struct
+ * ice_rel_tcam_idx - release a TCAM index
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @idx: the index to release
*/
@@ -3947,13 +3947,13 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
enum ice_status status;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
dc_msk, nm_msk);
if (status)
return status;
- /* release the tcam entry */
+ /* release the TCAM entry */
status = ice_free_tcam_ent(hw, blk, idx);
return status;
@@ -3961,7 +3961,7 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
/**
* ice_rem_prof_id - remove one profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
@@ -4007,7 +4007,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_vsig - remove VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to remove
* @chg: the change list
@@ -4069,7 +4069,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_prof_id_vsig - remove a specific profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @hdl: profile handle indicating which profile to remove
@@ -4105,7 +4105,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_rem_flow_all - remove all flows with a particular profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*/
@@ -4143,11 +4143,11 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_rem_prof - remove profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
- * This will remove the profile specified by the id parameter, which was
+ * This will remove the profile specified by the ID parameter, which was
* previously created through ice_add_prof. If any existing entries
* are associated with this profile, they will be removed as well.
*/
@@ -4177,7 +4177,7 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_get_prof_ptgs - get ptgs for profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: profile handle
* @chg: change list
@@ -4190,7 +4190,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4231,7 +4231,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
/**
* ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG from which to copy the list
* @lst: output list
@@ -4272,7 +4272,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_to_lst - add profile entry to a list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @lst: the list to be added to
* @hdl: profile handle of entry to add
@@ -4320,7 +4320,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
/**
* ice_move_vsi - move VSI to another VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the VSI to move
* @vsig: the VSIG to move the VSI to
@@ -4357,15 +4357,15 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
}
/**
- * ice_prof_tcam_ena_dis - add enable or disable tcam change
- * @hw: pointer to the hw struct
+ * ice_prof_tcam_ena_dis - add enable or disable TCAM change
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @enable: true to enable, false to disable
- * @vsig: the vsig of the tcam entry
- * @tcam: pointer the tcam info structure of the tcam to disable
+ * @vsig: the vsig of the TCAM entry
+ * @tcam: pointer the TCAM info structure of the TCAM to disable
* @chg: the change list
*
- * This function appends an enable or disable tcam entry in the change log
+ * This function appends an enable or disable TCAM entry in the change log
*/
static enum ice_status
ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
@@ -4418,7 +4418,7 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
/**
* ice_adj_prof_priorities - adjust profile based on priorities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG for which to adjust profile priorities
* @chg: the change list
@@ -4487,7 +4487,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_id_vsig - add profile to VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to which this profile is to be added
* @hdl: the profile handle indicating the profile to add
@@ -4506,7 +4506,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4524,7 +4524,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
t->prof_id = map->prof_id;
t->tcam_count = map->ptype_count;
- /* create tcam entries */
+ /* create TCAM entries */
for (i = 0; i < map->ptype_count; i++) {
enum ice_status status;
u16 tcam_idx;
@@ -4543,7 +4543,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (!p)
goto err_ice_add_prof_id_vsig;
- /* allocate the tcam entry index */
+ /* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
if (status)
goto err_ice_add_prof_id_vsig;
@@ -4560,7 +4560,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
p->vsig = vsig;
p->tcam_idx = t->tcam[i].tcam_idx;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
t->tcam[i].prof_id,
t->tcam[i].ptg, vsig, 0, 0,
@@ -4568,8 +4568,8 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many tcam entries
- * are using this hw profile id
+ /* this increments the reference count of how many TCAM entries
+ * are using this HW profile ID
*/
status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
@@ -4590,7 +4590,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_create_prof_id_vsig - add a new VSIG with a single profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @hdl: the profile handle of the profile that will be added to the VSIG
@@ -4632,7 +4632,7 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
/**
* ice_create_vsig_from_list - create a new VSIG with a list of profiles
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @lst: the list of profile that will be added to the VSIG
@@ -4666,7 +4666,7 @@ ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
/**
* ice_find_prof_vsig - find a VSIG with a specific profile handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: the profile handle of the profile to search for
* @vsig: returns the VSIG with the matching profile
@@ -4697,13 +4697,13 @@ ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
/**
* ice_add_prof_id_flow - add profile flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi to enable with the profile specified by id
+ * @vsi: the VSI to enable with the profile specified by ID
* @hdl: profile handle
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4725,7 +4725,7 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
return status;
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool only_vsi;
@@ -4805,10 +4805,10 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
}
} else {
/* need to find or add a VSIG */
- /* search for an exising VSIG with an exact charc match */
+ /* search for an existing VSIG with an exact charc match */
if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
@@ -4847,14 +4847,14 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_add_flow - add flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs to enable with the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs to enable with the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4875,7 +4875,7 @@ ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,
/**
* ice_rem_prof_from_list - remove a profile from list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lst: list to remove the profile from
* @hdl: the profile handle indicating the profile to remove
*/
@@ -4897,13 +4897,13 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
/**
* ice_rem_prof_id_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi from which to remove the profile specified by id
+ * @vsi: the VSI from which to remove the profile specified by ID
* @hdl: profile tracking handle
*
* Calling this function will update the hardware tables to remove the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be disabled.
*/
enum ice_status
@@ -4918,7 +4918,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
INIT_LIST_HEAD(©);
INIT_LIST_HEAD(&chg);
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool last_profile;
@@ -4979,7 +4979,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else if (ice_find_dup_props_vsig(hw, blk, ©,
&vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
* list
*/
@@ -4991,7 +4991,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else {
/* since no existing VSIG supports this
* characteristic pattern, we need to create a
- * new VSIG and tcam entries
+ * new VSIG and TCAM entries
*/
status = ice_create_vsig_from_lst(hw, blk, vsi,
©, &chg);
@@ -5029,14 +5029,14 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_rem_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs from which to remove the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs from which to remove the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* The function will remove flows from the specified VSIs that were enabled
- * using ice_add_flow. The id value will indicated which profile will be
+ * using ice_add_flow. The ID value will indicated which profile will be
* removed. Once successfully called, the flow will be disabled.
*/
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 81e89aeeb..23fffed75 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -59,7 +59,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg);
enum ice_status
ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg);
-/* XLT2/Vsi group functions */
+/* XLT2/VSI group functions */
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 9f98f4f2a..aed23a067 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -350,7 +350,7 @@ struct ice_sw_fv_list_entry {
};
#pragma pack(1)
-/* The BOOST tcam stores the match packet header in reverse order, meaning
+/* The BOOST TCAM stores the match packet header in reverse order, meaning
* the fields are reversed; in addition, this means that the normally big endian
* fields of the packet are now little endian.
*/
@@ -602,7 +602,7 @@ struct ice_xlt2 {
};
/* Extraction sequence - list of match fields:
- * protocol id, offset, profile length
+ * protocol ID, offset, profile length
*/
union ice_match_fld {
struct {
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index cc3f69b51..574c927c4 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -292,6 +292,9 @@ struct ice_flow_prof_params {
u16 entry_length; /* # of bytes formatted entry will require */
u8 es_cnt;
+ /* For ACL, the es[0] will have the data of ICE_RX_MDID_PKT_FLAGS_15_0
+ * This will give us the direction flags.
+ */
struct ice_fv_word es[ICE_MAX_FV_WORDS];
ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
@@ -494,7 +497,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
/**
* ice_flow_xtract_fld - Create an extraction sequence entry for the given field
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: packet segment index of the field to be extracted
* @fld: ID of field to be extracted
@@ -656,7 +659,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_xtract_raws - Create extract sequence entries for raw bytes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: index of packet segment whose raw fields are to be be extracted
*/
@@ -728,7 +731,7 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_create_xtrct_seq - Create an extraction sequence for given segments
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*
* This function iterates through all matched fields in the given segments, and
@@ -768,7 +771,7 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
/**
* ice_flow_proc_segs - process all packet segments associated with a profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*/
static enum ice_status
@@ -807,7 +810,7 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
/**
* ice_flow_find_prof_conds - Find a profile matching headers and conditions
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -852,7 +855,7 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_find_prof - Look up a profile matching headers and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -874,7 +877,7 @@ ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_find_prof_id - Look up a profile with given profile ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: unique ID to identify this flow profile
*/
@@ -893,7 +896,7 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
/**
* ice_flow_rem_entry_sync - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry: flow entry to be removed
*/
static enum ice_status
@@ -917,7 +920,7 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
/**
* ice_flow_add_prof_sync - Add a flow profile for packet segments and fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1057,7 +1060,7 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1089,7 +1092,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1115,7 +1118,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_add_prof - Add a flow profile for packet segments and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1160,7 +1163,7 @@ ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_rem_prof - Remove a flow profile and all entries associated with it
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block for which the flow profile is to be removed
* @prof_id: unique ID of the flow profile to be removed
*/
@@ -1188,11 +1191,11 @@ ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
}
/**
- * ice_flow_get_hw_prof - return the hw profile for a specific profile id handle
- * @hw: pointer to the hw struct
+ * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
+ * @hw: pointer to the HW struct
* @blk: classification stage
- * @prof_id: the profile id handle
- * @hw_prof_id: pointer to variable to receive the hw profile id
+ * @prof_id: the profile ID handle
+ * @hw_prof_id: pointer to variable to receive the HW profile ID
*/
enum ice_status
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
@@ -1211,7 +1214,7 @@ ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_find_entry - look for a flow entry using its unique ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @entry_id: unique ID to identify this flow entry
*
@@ -1249,7 +1252,7 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
/**
* ice_flow_add_entry - Add a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: ID of the profile to add a new flow entry to
* @entry_id: unique ID to identify this flow entry
@@ -1335,7 +1338,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_rem_entry - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry_h: handle to the flow entry to be removed
*/
enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h)
@@ -1712,12 +1715,12 @@ void ice_rem_all_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_rem_vsi_rss_cfg - remove RSS configurations associated with vsi
+ * ice_rem_vsi_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*
* This function will iterate through all flow profiles and disassociate
- * the vsi from that profile. If the flow profile has no vsis it will
+ * the VSI from that profile. If the flow profile has no VSIs it will
* be removed.
*/
enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
@@ -1847,7 +1850,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Search for a flow profile that has matching headers, hash fields
- * and has the input vsi associated to it. If found, no further
+ * and has the input VSI associated to it. If found, no further
* operations required and exit.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1858,8 +1861,8 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Check if a flow profile exists with the same protocol headers and
- * associated with the input vsi. If so disasscociate the vsi from
- * this profile. The vsi will be added to a new profile created with
+ * associated with the input VSI. If so disasscociate the VSI from
+ * this profile. The VSI will be added to a new profile created with
* the protocol header and new hash field configuration.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1871,7 +1874,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
else
goto exit;
- /* Remove profile if it has no vsis associated */
+ /* Remove profile if it has no VSIs associated */
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI)) {
status = ice_flow_rem_prof_sync(hw, blk, prof);
if (status)
@@ -1880,7 +1883,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/* Search for a profile that has same match fields only. If this
- * exists then associate the vsi to this profile.
+ * exists then associate the VSI to this profile.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
vsi_handle,
@@ -2003,7 +2006,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
*
* This function will lookup the flow profile based on the input
* hash field bitmap, iterate through the profile entry list of
- * that profile and find entry associated with input vsi to be
+ * that profile and find entry associated with input VSI to be
* removed. Calls are made to underlying flow apis which will in
* turn build or update buffers for RSS XLT1 section.
*/
@@ -2025,7 +2028,7 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/**
- * ice_replay_rss_cfg - remove RSS configurations associated with vsi
+ * ice_replay_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*/
@@ -2057,13 +2060,13 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
* @hdrs: protocol header type
*
* This function will return the match fields of the first instance of flow
- * profile having the given header types and containing input vsi
+ * profile having the given header types and containing input VSI
*/
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
{
struct ice_rss_cfg *r, *rss_cfg = NULL;
- /* verify if the protocol header is non zero and vsi is valid */
+ /* verify if the protocol header is non zero and VSI is valid */
if (hdrs == ICE_FLOW_SEG_HDR_NONE || !ice_is_vsi_valid(hw, vsi_handle))
return ICE_HASH_INVALID;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 51d7c3ac9..265e1ee3e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -227,7 +227,6 @@ struct ice_flow_entry {
u64 id;
u16 vsi_handle;
enum ice_flow_priority priority;
-
struct ice_flow_prof *prof;
/* Flow entry's content */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index d27045f7e..4a1ea0c7d 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -6,7 +6,7 @@
#define _ICE_LAN_TX_RX_H_
#include "ice_osdep.h"
-/* RX Descriptors */
+/* Rx Descriptors */
union ice_16byte_rx_desc {
struct {
__le64 pkt_addr; /* Packet buffer address */
@@ -20,7 +20,7 @@ union ice_16byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -46,7 +46,7 @@ union ice_32byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -181,15 +181,15 @@ enum ice_rx_desc_status_bits {
ICE_RX_DESC_STATUS_L2TAG1P_S = 2,
ICE_RX_DESC_STATUS_L3L4P_S = 3,
ICE_RX_DESC_STATUS_CRCP_S = 4,
- ICE_RX_DESC_STATUS_TSYNINDX_S = 5, /* 2 BITS */
+ ICE_RX_DESC_STATUS_TSYNINDX_S = 5,
ICE_RX_DESC_STATUS_TSYNVALID_S = 7,
ICE_RX_DESC_STATUS_EXT_UDP_0_S = 8,
- ICE_RX_DESC_STATUS_UMBCAST_S = 9, /* 2 BITS */
+ ICE_RX_DESC_STATUS_UMBCAST_S = 9,
ICE_RX_DESC_STATUS_FLM_S = 11,
- ICE_RX_DESC_STATUS_FLTSTAT_S = 12, /* 2 BITS */
+ ICE_RX_DESC_STATUS_FLTSTAT_S = 12,
ICE_RX_DESC_STATUS_LPBK_S = 14,
ICE_RX_DESC_STATUS_IPV6EXADD_S = 15,
- ICE_RX_DESC_STATUS_RESERVED2_S = 16, /* 2 BITS */
+ ICE_RX_DESC_STATUS_RESERVED2_S = 16,
ICE_RX_DESC_STATUS_INT_UDP_0_S = 18,
ICE_RX_DESC_STATUS_LAST /* this entry must be last!!! */
};
@@ -325,8 +325,8 @@ enum ice_rx_desc_ext_status_bits {
/* Note: These are predefined bit offsets */
ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0,
ICE_RX_DESC_EXT_STATUS_L2TAG3P_S = 1,
- ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2, /* 2 BITS */
- ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4, /* 2 BITS */
+ ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2,
+ ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4,
ICE_RX_DESC_EXT_STATUS_FDLONGB_S = 9,
ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11,
};
@@ -373,7 +373,7 @@ enum ice_rx_prog_status_desc_error_bits {
ICE_RX_PROG_STATUS_DESC_NO_FD_ENTRY_S = 1,
};
-/* RX Flex Descriptor
+/* Rx Flex Descriptor
* This descriptor is used instead of the legacy version descriptor when
* ice_rlan_ctx.adv_desc is set
*/
@@ -387,7 +387,7 @@ union ice_32b_rx_flex_desc {
} read;
struct {
/* Qword 0 */
- u8 rxdid; /* descriptor builder profile id */
+ u8 rxdid; /* descriptor builder profile ID */
u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */
__le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */
__le16 pkt_len; /* [15:14] are reserved */
@@ -422,12 +422,12 @@ union ice_32b_rx_flex_desc {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 2
+ * RxDID Profile ID 2
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Flow Id higher 16-bits
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Flow ID higher 16-bits
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic {
/* Qword 0 */
@@ -461,8 +461,8 @@ struct ice_32b_rx_flex_desc_nic {
};
/* Rx Flex Descriptor Switch Profile
- * RxDID Profile Id 3
- * Flex-field 0: Source Vsi
+ * RxDID Profile ID 3
+ * Flex-field 0: Source VSI
*/
struct ice_32b_rx_flex_desc_sw {
/* Qword 0 */
@@ -491,8 +491,8 @@ struct ice_32b_rx_flex_desc_sw {
};
/* Rx Flex Descriptor NIC VEB Profile
- * RxDID Profile Id 4
- * Flex-field 0: Destination Vsi
+ * RxDID Profile ID 4
+ * Flex-field 0: Destination VSI
*/
struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 0 */
@@ -505,8 +505,8 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 1 */
__le16 status_error0;
__le16 l2tag1;
- __le16 dst_vsi; /* [0:12]: destination vsi */
- /* 13: vsi valid bit */
+ __le16 dst_vsi; /* [0:12]: destination VSI */
+ /* 13: VSI valid bit */
/* [14:15] are reserved */
__le16 flex_field_1;
@@ -523,7 +523,7 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
};
/* Rx Flex Descriptor NIC ACL Profile
- * RxDID Profile Id 5
+ * RxDID Profile ID 5
* Flex-field 0: ACL Counter 0
* Flex-field 1: ACL Counter 1
* Flex-field 2: ACL Counter 2
@@ -556,12 +556,12 @@ struct ice_32b_rx_flex_desc_nic_acl_dbg {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 6
+ * RxDID Profile ID 6
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Source Vsi
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Source VSI
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic_2 {
/* Qword 0 */
@@ -818,7 +818,7 @@ enum ice_rlan_ctx_rx_hsplit_1 {
ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS = 2,
};
-/* TX Descriptor */
+/* Tx Descriptor */
struct ice_tx_desc {
__le64 buf_addr; /* Address of descriptor's data buf */
__le64 cmd_type_offset_bsz;
@@ -846,15 +846,15 @@ enum ice_tx_desc_cmd_bits {
ICE_TX_DESC_CMD_RSVD = 0x0004,
ICE_TX_DESC_CMD_IL2TAG1 = 0x0008,
ICE_TX_DESC_CMD_DUMMY = 0x0010,
- ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060, /* 2 BITS */
+ ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000,
+ ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020,
+ ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040,
+ ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060,
ICE_TX_DESC_CMD_RSVD2 = 0x0080,
- ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300, /* 2 BITS */
+ ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000,
+ ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100,
+ ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200,
+ ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300,
ICE_TX_DESC_CMD_RE = 0x0400,
ICE_TX_DESC_CMD_RSVD3 = 0x0800,
};
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 25a2ca4cb..92de2ec3b 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -7,7 +7,7 @@
/**
* ice_aq_read_nvm
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @module_typeid: module pointer location in words from the NVM beginning
* @offset: byte offset from the module beginning
* @length: length of the section to be read (in bytes from the offset)
@@ -248,7 +248,7 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
/**
* ice_init_nvm - initializes NVM setting
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function reads and populates NVM settings such as Shadow RAM size,
* max_timeout, and blank_nvm_mode
@@ -264,7 +264,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
ice_debug(hw, ICE_DBG_TRACE, "ice_init_nvm");
- /* The SR size is stored regardless of the nvm programming mode
+ /* The SR size is stored regardless of the NVM programming mode
* as the blank mode may be used in the factory line.
*/
gens_stat = rd32(hw, GLNVM_GENS);
@@ -357,7 +357,7 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
/**
* ice_nvm_validate_checksum
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Verify NVM PFA checksum validity (0x0706)
*/
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 7b92c7105..f96964d86 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -18,7 +18,7 @@
/* Max recipes that can be chained */
#define ICE_MAX_CHAIN_RECIPE 5
-/* 1 word reserved for switch id from allowed 5 words.
+/* 1 word reserved for switch ID from allowed 5 words.
* So a recipe can have max 4 words. And you can chain 5 such recipes
* together. So maximum words that can be programmed for look up is 5 * 4.
*/
@@ -128,7 +128,7 @@ enum ice_prot_id {
#define ICE_PROTOCOL_MAX_ENTRIES 16
-/* Mapping of software defined protocol id to hardware defined protocol id */
+/* Mapping of software defined protocol ID to hardware defined protocol ID */
struct ice_protocol_entry {
enum ice_protocol_type type;
u8 protocol_id;
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 7acbae62c..2edc305b5 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -45,9 +45,9 @@ ice_sched_add_root_node(struct ice_port_info *pi,
/**
* ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
* @start_node: pointer to the starting ice_sched_node struct in a sub-tree
- * @teid: node teid to search
+ * @teid: node TEID to search
*
- * This function searches for a node matching the teid in the scheduling tree
+ * This function searches for a node matching the TEID in the scheduling tree
* from the SW DB. The search is recursive and is restricted by the number of
* layers it has searched through; stopping at the max supported layer.
*
@@ -68,7 +68,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
return NULL;
- /* Check if teid matches to any of the children nodes */
+ /* Check if TEID matches to any of the children nodes */
for (i = 0; i < start_node->num_children; i++)
if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
return start_node->children[i];
@@ -88,7 +88,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
/**
* ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cmd_opc: cmd opcode
* @elems_req: number of elements to request
* @buf: pointer to buffer
@@ -120,7 +120,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
/**
* ice_aq_query_sched_elems - query scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -201,7 +201,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
/**
* ice_aq_delete_sched_elems - delete scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to delete
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -221,13 +221,13 @@ ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
}
/**
- * ice_sched_remove_elems - remove nodes from hw
- * @hw: pointer to the hw struct
+ * ice_sched_remove_elems - remove nodes from HW
+ * @hw: pointer to the HW struct
* @parent: pointer to the parent node
* @num_nodes: number of nodes
* @node_teids: array of node teids to be deleted
*
- * This function remove nodes from hw
+ * This function remove nodes from HW
*/
static enum ice_status
ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
@@ -260,7 +260,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
/**
* ice_sched_get_first_node - get the first node of the given layer
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @parent: pointer the base node of the subtree
* @layer: layer number
*
@@ -381,7 +381,7 @@ void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
/**
* ice_aq_get_dflt_topo - gets default scheduler topology
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -411,7 +411,7 @@ ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
/**
* ice_aq_add_sched_elems - adds scheduling element
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: the number of groups that are requested to be added
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -432,7 +432,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_cfg_sched_elems - configures scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -453,7 +453,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_move_sched_elems - move scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to move
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -474,7 +474,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_suspend_sched_elems - suspend scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to suspend
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -495,7 +495,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_resume_sched_elems - resume scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to resume
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -516,7 +516,7 @@ ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_query_sched_res - query scheduler resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf_size: buffer size in bytes
* @buf: pointer to buffer
* @cd: pointer to command details structure or NULL
@@ -535,13 +535,13 @@ ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
}
/**
- * ice_sched_suspend_resume_elems - suspend or resume hw nodes
- * @hw: pointer to the hw struct
+ * ice_sched_suspend_resume_elems - suspend or resume HW nodes
+ * @hw: pointer to the HW struct
* @num_nodes: number of nodes
* @node_teids: array of node teids to be suspended or resumed
* @suspend: true means suspend / false means resume
*
- * This function suspends or resumes hw nodes
+ * This function suspends or resumes HW nodes
*/
static enum ice_status
ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
@@ -577,7 +577,7 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
/**
* ice_aq_rl_profile - performs a rate limiting task
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
* @num_profiles: the number of profiles
* @buf: pointer to buffer
@@ -609,14 +609,14 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
/**
* ice_aq_add_rl_profile - adds rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to be add
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_added: total number of profiles added to return
* @cd: pointer to command details structure
*
- * Add rl profile (0x0410)
+ * Add RL profile (0x0410)
*/
static enum ice_status
ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -631,13 +631,13 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
/**
* ice_aq_query_rl_profile - query rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure
*
- * Query rl profile (0x0411)
+ * Query RL profile (0x0411)
*/
enum ice_status
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -649,15 +649,15 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_aq_remove_rl_profile - removes rl profile(s)
- * @hw: pointer to the hw struct
+ * ice_aq_remove_rl_profile - removes RL profile(s)
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to remove
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_removed: total number of profiles removed to return
* @cd: pointer to command details structure or NULL
*
- * Remove rl profile (0x0415)
+ * Remove RL profile (0x0415)
*/
static enum ice_status
ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -671,10 +671,10 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_sched_clear_rl_prof - clears rl prof entries
+ * ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
- * This function removes all rl profile from hw as well as from SW DB.
+ * This function removes all RL profile from HW as well as from SW DB.
*/
static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
{
@@ -704,10 +704,10 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
}
/**
- * ice_sched_clear_agg - clears the agg related information
+ * ice_sched_clear_agg - clears the aggregator related information
* @hw: pointer to the hardware structure
*
- * This function removes agg list and free up agg related memory
+ * This function removes aggregator list and free up aggregator related memory
* previously allocated.
*/
void ice_sched_clear_agg(struct ice_hw *hw)
@@ -742,7 +742,7 @@ static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
{
if (!pi)
return;
- /* remove rl profiles related lists */
+ /* remove RL profiles related lists */
ice_sched_clear_rl_prof(pi);
if (pi->root) {
ice_free_sched_node(pi, pi->root);
@@ -770,7 +770,7 @@ void ice_sched_clear_port(struct ice_port_info *pi)
/**
* ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Cleanup scheduling elements from SW DB for all the ports
*/
@@ -795,7 +795,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
/**
* ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_l2_nodes: the number of L2 nodes whose CGDs to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -821,16 +821,16 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
/**
- * ice_sched_add_elems - add nodes to hw and SW DB
+ * ice_sched_add_elems - add nodes to HW and SW DB
* @pi: port information structure
* @tc_node: pointer to the branch node
* @parent: pointer to the parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes
* @num_nodes_added: pointer to num nodes added
- * @first_node_teid: if new nodes are added then return the teid of first node
+ * @first_node_teid: if new nodes are added then return the TEID of first node
*
- * This function add nodes to hw as well as to SW DB for a given layer
+ * This function add nodes to HW as well as to SW DB for a given layer
*/
static enum ice_status
ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
@@ -924,7 +924,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
* @parent: pointer to parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes to be added
- * @first_node_teid: pointer to the first node teid
+ * @first_node_teid: pointer to the first node TEID
* @num_nodes_added: pointer to number of nodes added
*
* This function add nodes to a given layer.
@@ -976,7 +976,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
*num_nodes_added += num_added;
}
- /* Don't modify the first node teid memory if the first node was
+ /* Don't modify the first node TEID memory if the first node was
* added already in the above call. Instead send some temp
* memory for all other recursive calls.
*/
@@ -1008,7 +1008,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
/**
* ice_sched_get_qgrp_layer - get the current queue group layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current queue group layer number
*/
@@ -1020,7 +1020,7 @@ static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
/**
* ice_sched_get_vsi_layer - get the current VSI layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current VSI layer number
*/
@@ -1031,7 +1031,7 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
* 7 4
* 5 or less sw_entry_point_layer
*/
- /* calculate the vsi layer based on number of layers. */
+ /* calculate the VSI layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
@@ -1043,17 +1043,17 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
/**
* ice_sched_get_agg_layer - get the current aggregator layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current aggregator layer number
*/
static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
{
- /* Num Layers agg layer
+ /* Num Layers aggregator layer
* 9 4
* 7 or less sw_entry_point_layer
*/
- /* calculate the agg layer based on number of layers. */
+ /* calculate the aggregator layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
@@ -1226,11 +1226,11 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)
}
/**
- * ice_sched_get_node - Get the struct ice_sched_node for given teid
+ * ice_sched_get_node - Get the struct ice_sched_node for given TEID
* @pi: port information structure
* @teid: Scheduler node TEID
*
- * This function retrieves the ice_sched_node struct for given teid from
+ * This function retrieves the ice_sched_node struct for given TEID from
* the SW DB and returns it to the caller.
*/
struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
@@ -1313,7 +1313,7 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
/**
* ice_sched_find_node_in_subtree - Find node in part of base node subtree
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @base: pointer to the base node
* @node: pointer to the node to search
*
@@ -1345,13 +1345,13 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
}
/**
- * ice_sched_get_free_qparent - Get a free lan or rdma q group node
+ * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: branch number
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function retrieves a free lan or rdma q group node
+ * This function retrieves a free LAN or RDMA queue group node
*/
struct ice_sched_node *
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -1369,11 +1369,11 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
if (!vsi_ctx)
return NULL;
vsi_node = vsi_ctx->sched.vsi_node[tc];
- /* validate invalid VSI id */
+ /* validate invalid VSI ID */
if (!vsi_node)
goto lan_q_exit;
- /* get the first q group node from VSI sub-tree */
+ /* get the first queue group node from VSI sub-tree */
qgrp_node = ice_sched_get_first_node(pi->hw, vsi_node, qgrp_layer);
while (qgrp_node) {
/* make sure the qgroup node is part of the VSI subtree */
@@ -1389,12 +1389,12 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_get_vsi_node - Get a VSI node based on VSI id
- * @hw: pointer to the hw struct
+ * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
* @vsi_handle: software VSI handle
*
- * This function retrieves a VSI node for a given VSI id from a given
+ * This function retrieves a VSI node for a given VSI ID from a given
* TC branch
*/
struct ice_sched_node *
@@ -1418,13 +1418,13 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
}
/**
- * ice_sched_get_agg_node - Get an aggregator node based on agg id
- * @hw: pointer to the hw struct
+ * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function retrieves an aggregator node for a given agg id from a given
- * TC branch
+ * This function retrieves an aggregator node for a given aggregator ID from
+ * a given TC branch
*/
struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
@@ -1448,7 +1448,7 @@ ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
/**
* ice_sched_check_node - Compare node parameters between SW DB and HW DB
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function queries and compares the HW element with SW DB node parameters
@@ -1475,7 +1475,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
/**
* ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_qs: number of queues
* @num_nodes: num nodes array
*
@@ -1491,7 +1491,7 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
qgl = ice_sched_get_qgrp_layer(hw);
vsil = ice_sched_get_vsi_layer(hw);
- /* calculate num nodes from q group to VSI layer */
+ /* calculate num nodes from queue group to VSI layer */
for (i = qgl; i > vsil; i--) {
/* round to the next integer if there is a remainder */
num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
@@ -1507,10 +1507,10 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
* @vsi_handle: software VSI handle
* @tc_node: pointer to the TC node
* @num_nodes: pointer to the num nodes that needs to be added per layer
- * @owner: node owner (lan or rdma)
+ * @owner: node owner (LAN or RDMA)
*
* This function adds the VSI child nodes to tree. It gets called for
- * lan and rdma separately.
+ * LAN and RDMA separately.
*/
static enum ice_status
ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
@@ -1559,7 +1559,7 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @tc_node: pointer to TC node
* @num_nodes: pointer to num nodes array
*
@@ -1678,7 +1678,7 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
/* calculate number of supported nodes needed for this VSI */
ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes);
- /* add vsi supported nodes to tc subtree */
+ /* add VSI supported nodes to TC subtree */
return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
num_nodes);
}
@@ -1740,7 +1740,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
return status;
vsi_ctx->sched.max_lanq[tc] = new_numqs;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -1749,7 +1749,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
* @vsi_handle: software VSI handle
* @tc: TC number
* @maxqs: max number of queues
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
* @enable: TC enabled or disabled
*
* This function adds/updates VSI nodes based on the number of queues. If TC is
@@ -1774,7 +1774,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
return ICE_ERR_PARAM;
vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
- /* suspend the VSI if tc is not enabled */
+ /* suspend the VSI if TC is not enabled */
if (!enable) {
if (vsi_node && vsi_node->in_use) {
u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
@@ -1825,11 +1825,11 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
}
/**
- * ice_sched_rm_agg_vsi_entry - remove agg related vsi info entry
+ * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function removes single aggregator vsi info entry from
+ * This function removes single aggregator VSI info entry from
* aggregator list.
*/
static void
@@ -1876,9 +1876,9 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
* ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function removes the VSI and its lan or rdma children nodes from the
+ * This function removes the VSI and its LAN or RDMA children nodes from the
* scheduler tree.
*/
static enum ice_status
@@ -1931,7 +1931,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
ice_free_sched_node(pi, vsi_node);
vsi_ctx->sched.vsi_node[i] = NULL;
- /* clean up agg related vsi info if any */
+ /* clean up aggregator related VSI info if any */
ice_sched_rm_agg_vsi_info(pi, vsi_handle);
}
if (owner == ICE_SCHED_NODE_OWNER_LAN)
@@ -1945,11 +1945,11 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
}
/**
- * ice_rm_vsi_lan_cfg - remove VSI and its lan children nodes
+ * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function clears the VSI and its lan children nodes from scheduler tree
+ * This function clears the VSI and its LAN children nodes from scheduler tree
* for all TCs.
*/
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
@@ -1960,7 +1960,7 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
/**
* ice_sched_is_tree_balanced - Check tree nodes are identical or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function compares all the nodes for a given tree against HW DB nodes
@@ -1983,15 +1983,15 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
}
/**
- * ice_aq_query_node_to_root - retrieve the tree topology for a given node teid
- * @hw: pointer to the hw struct
- * @node_teid: node teid
+ * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure or NULL
*
* This function retrieves the tree topology from the firmware for a given
- * node teid to the root node.
+ * node TEID to the root node.
*/
enum ice_status
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
@@ -2008,12 +2008,12 @@ ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
}
/**
- * ice_get_agg_info - get the agg id
+ * ice_get_agg_info - get the aggregator ID
* @hw: pointer to the hardware structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function validates agg id. The function returns info if agg id is
- * prsent in list otherwise it returns null.
+ * This function validates aggregator ID. The function returns info if
+ * aggregator ID is present in list otherwise it returns null.
*/
static struct ice_sched_agg_info*
ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
@@ -2029,14 +2029,14 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
- * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default agg
+ * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
* @tc: traffic class number
* @rm_vsi_info: true or false
*
* This function move all the VSI(s) to the default aggregator and delete
- * agg vsi info based on passed in boolean parameter rm_vsi_info. The
+ * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
* caller holds the scheduler lock.
*/
static enum ice_status
@@ -2052,7 +2052,7 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
ice_sched_agg_vsi_info, list_entry) {
u16 vsi_handle = agg_vsi_info->vsi_handle;
- /* Move VSI to default agg */
+ /* Move VSI to default aggregator */
if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
continue;
@@ -2072,15 +2072,15 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove agg configuration for tc
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
* @pi: port information structure
- * @agg_info: aggregator id
- * @tc: tc number
+ * @agg_info: aggregator ID
+ * @tc: TC number
* @rm_vsi_info: bool value true or false
*
- * This function removes agg reference to vsi of given tc. It removes the agg
- * configuration completely for requested tc. The caller needs to hold the
- * scheduler lock.
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
*/
static enum ice_status
ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
@@ -2107,12 +2107,12 @@ ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
}
/**
- * ice_save_agg_tc_bitmap - save agg TC bitmap
+ * ice_save_agg_tc_bitmap - save aggregator TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc_bitmap: 8 bits TC bitmap
*
- * Save agg TC bitmap. This function needs to be called with scheduler
+ * Save aggregator TC bitmap. This function needs to be called with scheduler
* lock held.
*/
static enum ice_status
@@ -2130,19 +2130,19 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_sched_cfg_agg - configure agg node
+ * ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* It registers a unique aggregator node into scheduler services. It
* allows a user to register with a unique ID to track it's resources.
* The aggregator type determines if this is a queue group, VSI group
- * or aggregator group. It then creates the agg node(s) for requested
- * tc(s) or removes an existing agg node including its configuration
- * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release agg
- * resources and remove agg id.
+ * or aggregator group. It then creates the aggregator node(s) for requested
+ * TC(s) or removes an existing aggregator node including its configuration
+ * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
+ * resources and remove aggregator ID.
* This function needs to be called with scheduler lock held.
*/
static enum ice_status
@@ -2156,7 +2156,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info = ice_get_agg_info(hw, agg_id);
if (!agg_info) {
- /* Creat new entry for new agg id */
+ /* Create new entry for new aggregator ID */
agg_info = (struct ice_sched_agg_info *)
ice_malloc(hw, sizeof(*agg_info));
if (!agg_info) {
@@ -2167,32 +2167,32 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info->agg_type = agg_type;
agg_info->tc_bitmap[0] = 0;
- /* Initialize the aggregator vsi list head */
+ /* Initialize the aggregator VSI list head */
INIT_LIST_HEAD(&agg_info->agg_vsi_list);
- /* Add new entry in agg list */
+ /* Add new entry in aggregator list */
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
- /* Create agg node(s) for requested tc(s) */
+ /* Create aggregator node(s) for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
- /* Delete agg cfg tc if it exists previously */
+ /* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
if (status)
break;
continue;
}
- /* Check if agg node for tc already exists */
+ /* Check if aggregator node for TC already exists */
if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
continue;
- /* Create new agg node for tc */
+ /* Create new aggregator node for TC */
status = ice_sched_add_agg_cfg(pi, agg_id, tc);
if (status)
break;
- /* Save agg node's tc information */
+ /* Save aggregator node's TC information */
ice_set_bit(tc, agg_info->tc_bitmap);
}
exit_reg_agg:
@@ -2200,10 +2200,10 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_agg - config agg node
+ * ice_cfg_agg - config aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* This function configures aggregator node(s).
@@ -2226,12 +2226,12 @@ ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
}
/**
- * ice_get_agg_vsi_info - get the agg id
+ * ice_get_agg_vsi_info - get the aggregator ID
* @agg_info: aggregator info
* @vsi_handle: software VSI handle
*
- * The function returns agg VSI info based on VSI handle. This function needs
- * to be called with scheduler lock held.
+ * The function returns aggregator VSI info based on VSI handle. This function
+ * needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_vsi_info*
ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
@@ -2247,13 +2247,13 @@ ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
}
/**
- * ice_get_vsi_agg_info - get the agg info of VSI
+ * ice_get_vsi_agg_info - get the aggregator info of VSI
* @hw: pointer to the hardware structure
* @vsi_handle: Sw VSI handle
*
- * The function returns agg info of VSI represented via vsi_handle. The VSI has
- * in this case a different aggregator than the default one. This function
- * needs to be called with scheduler lock held.
+ * The function returns aggregator info of VSI represented via vsi_handle. The
+ * VSI has in this case a different aggregator than the default one. This
+ * function needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_info*
ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
@@ -2274,9 +2274,9 @@ ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Save VSI to aggregator TC bitmap. This function needs to call with scheduler
* lock held.
@@ -2301,15 +2301,15 @@ ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_sched_assoc_vsi_to_agg - associate or move VSI to new or default agg
+ * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* This function moves VSI to a new or default aggregator node. If VSI is
- * already associated to the agg node then no operation is performed on the
- * tree. This function needs to be called with scheduler lock held.
+ * already associated to the aggregator node then no operation is performed on
+ * the tree. This function needs to be called with scheduler lock held.
*/
static enum ice_status
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
@@ -2329,22 +2329,22 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
/* check if entry already exist */
agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
if (!agg_vsi_info) {
- /* Create new entry for vsi under agg list */
+ /* Create new entry for VSI under aggregator list */
agg_vsi_info = (struct ice_sched_agg_vsi_info *)
ice_malloc(hw, sizeof(*agg_vsi_info));
if (!agg_vsi_info)
return ICE_ERR_PARAM;
- /* add vsi id into the agg list */
+ /* add VSI ID into the aggregator list */
agg_vsi_info->vsi_handle = vsi_handle;
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
- /* Move vsi node to new agg node for requested tc(s) */
+ /* Move VSI node to new aggregator node for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
- /* Move VSI to new agg */
+ /* Move VSI to new aggregator */
status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
if (status)
break;
@@ -2354,7 +2354,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
else
ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
}
- /* If vsi moved back to default agg then delete entry agg_vsi_info. */
+ /* If VSI moved back to default aggregator, delete agg_vsi_info. */
if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
LIST_DEL(&agg_vsi_info->list_entry);
@@ -2364,11 +2364,11 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_move_vsi_to_agg - moves VSI to new or default agg
+ * ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: tc bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Move or associate VSI to a new or default aggregator node.
*/
@@ -2390,12 +2390,12 @@ ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_rm_agg_cfg - remove agg configuration
+ * ice_rm_agg_cfg - remove aggregator configuration
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes agg reference to vsi and delete agg id info.
- * It removes the agg configuration completely.
+ * This function removes aggregator reference to VSI and delete aggregator ID
+ * info. It removes the aggregator configuration completely.
*/
enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
{
@@ -2425,7 +2425,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
LIST_DEL(&agg_info->list_entry);
ice_free(pi->hw, agg_info);
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
exit_ice_rm_agg_cfg:
@@ -2434,11 +2434,11 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_set_clear_cir_bw_alloc - set or clear CIR bw alloc information
+ * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear CIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear CIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2452,11 +2452,11 @@ ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_set_clear_eir_bw_alloc - set or clear EIR bw alloc information
+ * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear EIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear EIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2470,14 +2470,14 @@ ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_sched_save_vsi_bw_alloc - save VSI node's bw alloc information
+ * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2506,11 +2506,11 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_set_clear_cir_bw - set or clear CIR bw
+ * ice_set_clear_cir_bw - set or clear CIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear CIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2519,18 +2519,18 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = 0;
} else {
- /* Save type of bw information */
+ /* Save type of BW information */
ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = bw;
}
}
/**
- * ice_set_clear_eir_bw - set or clear EIR bw
+ * ice_set_clear_eir_bw - set or clear EIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear EIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2539,24 +2539,24 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved shared bw information.
+ * First clear earlier saved shared BW information.
*/
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
- /* save EIR bw information */
+ /* save EIR BW information */
ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = bw;
}
}
/**
- * ice_set_clear_shared_bw - set or clear shared bw
+ * ice_set_clear_shared_bw - set or clear shared BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear shared bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2565,27 +2565,27 @@ ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved EIR bw information.
+ * First clear earlier saved EIR BW information.
*/
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
- /* save shared bw information */
+ /* save shared BW information */
ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = bw;
}
}
/**
- * ice_sched_save_vsi_bw - save VSI node's bw information
+ * ice_sched_save_vsi_bw - save VSI node's BW information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of VSI type node for post replay use.
+ * Save BW information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2658,14 +2658,14 @@ ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_save_agg_bw_alloc - save agg node's bw alloc information
+ * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: bandwidth alloc information
*
- * Save bw alloc information of AGG type node for post replay use.
+ * Save BW alloc information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2692,14 +2692,14 @@ ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_sched_save_agg_bw - save agg node's bw information
+ * ice_sched_save_agg_bw - save aggregator node's BW information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of AGG type node for post replay use.
+ * Save BW information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2729,14 +2729,14 @@ ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_lmt_per_tc - configure VSI bw limit per tc
+ * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of VSI scheduling node based on tc
+ * This function configures BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2757,13 +2757,13 @@ ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI bw limit per tc
+ * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
*
- * This function configures default bw limit of VSI scheduling node based on tc
+ * This function configures default BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2786,14 +2786,14 @@ ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_agg_bw_lmt_per_tc - configure aggregator bw limit per tc
+ * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function applies bw limit to aggregator scheduling node based on tc
+ * This function applies BW limit to aggregator scheduling node based on TC
* information.
*/
enum ice_status
@@ -2813,14 +2813,14 @@ ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator bw default limit per tc
+ * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
*
- * This function applies default bw limit to aggregator scheduling node based
- * on tc information.
+ * This function applies default BW limit to aggregator scheduling node based
+ * on TC information.
*/
enum ice_status
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2841,10 +2841,10 @@ ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_shared_lmt - configure VSI bw shared limit
+ * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
* across all traffic classes for VSI matching handle.
@@ -2856,7 +2856,7 @@ ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
}
/**
- * ice_cfg_vsi_bw_no_shared_lmt - configure VSI bw for no shared limiter
+ * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
* @pi: port information structure
* @vsi_handle: software VSI handle
*
@@ -2871,13 +2871,13 @@ ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_cfg_agg_bw_shared_lmt - configure aggregator bw shared limit
+ * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function configures the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
@@ -2886,12 +2886,12 @@ ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/**
- * ice_cfg_agg_bw_no_shared_lmt - configure aggregator bw for no shared limiter
+ * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function removes the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
@@ -2903,12 +2903,12 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
* ice_config_vsi_queue_priority - config VSI queue priority of node
* @pi: port information structure
* @num_qs: number of VSI queues
- * @q_ids: queue ids array
- * @q_ids: queue ids array
+ * @q_ids: queue IDs array
+ * @q_ids: queue IDs array
* @q_prio: queue priority array
*
* This function configures the queue node priority (Sibling Priority) of the
- * passed in VSI's queue(s) for a given traffic class (tc).
+ * passed in VSI's queue(s) for a given traffic class (TC).
*/
enum ice_status
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
@@ -2940,16 +2940,16 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
}
/**
- * ice_cfg_agg_vsi_priority_per_tc - config agg's VSI priority per tc
+ * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
* @pi: port information structure
- * @agg_id: Aggregator id
+ * @agg_id: Aggregator ID
* @num_vsis: number of VSI(s)
* @vsi_handle_arr: array of software VSI handles
* @node_prio: pointer to node priority
* @tc: traffic class
*
* This function configures the node priority (Sibling Priority) of the
- * passed in VSI's for a given traffic class (tc) of an Aggregator id.
+ * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
*/
enum ice_status
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
@@ -3027,14 +3027,14 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_vsi_bw_alloc - config VSI bw alloc per tc
+ * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @ena_tcmap: enabled tc map
+ * @ena_tcmap: enabled TC map
* @rl_type: Rate limit type CIR/EIR
- * @bw_alloc: Array of bw alloc
+ * @bw_alloc: Array of BW alloc
*
- * This function configures the bw allocation of the passed in VSI's
+ * This function configures the BW allocation of the passed in VSI's
* node(s) for enabled traffic class.
*/
enum ice_status
@@ -3049,7 +3049,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
@@ -3079,14 +3079,14 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
}
/**
- * ice_cfg_agg_bw_alloc - config agg bw alloc
+ * ice_cfg_agg_bw_alloc - config aggregator BW alloc
* @pi: port information structure
- * @agg_id: aggregator id
- * @ena_tcmap: enabled tc map
+ * @agg_id: aggregator ID
+ * @ena_tcmap: enabled TC map
* @rl_type: rate limit type CIR/EIR
- * @bw_alloc: array of bw alloc
+ * @bw_alloc: array of BW alloc
*
- * This function configures the bw allocation of passed in aggregator for
+ * This function configures the BW allocation of passed in aggregator for
* enabled traffic class(s).
*/
enum ice_status
@@ -3111,7 +3111,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
goto exit_cfg_agg_bw_alloc;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
@@ -3142,10 +3142,10 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/**
- * ice_sched_calc_wakeup - calculate rl profile wakeup parameter
- * @bw: bandwidth in kbps
+ * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
+ * @bw: bandwidth in Kbps
*
- * This function calculates the wakeup parameter of rl profile.
+ * This function calculates the wakeup parameter of RL profile.
*/
static u16 ice_sched_calc_wakeup(s32 bw)
{
@@ -3183,11 +3183,11 @@ static u16 ice_sched_calc_wakeup(s32 bw)
}
/**
- * ice_sched_bw_to_rl_profile - convert bw to profile parameters
- * @bw: bandwidth in kbps
+ * ice_sched_bw_to_rl_profile - convert BW to profile parameters
+ * @bw: bandwidth in Kbps
* @profile: profile parameters to return
*
- * This function converts the bw to profile structure format.
+ * This function converts the BW to profile structure format.
*/
static enum ice_status
ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
@@ -3203,7 +3203,7 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
return status;
- /* Bytes per second from kbps */
+ /* Bytes per second from Kbps */
bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
/* encode is 6 bits but really useful are 5 bits */
@@ -3247,16 +3247,16 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
}
/**
- * ice_sched_add_rl_profile - add rl profile
+ * ice_sched_add_rl_profile - add RL profile
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: specifies in which layer to create profile
*
- * This function first checks the existing list for corresponding bw
+ * This function first checks the existing list for corresponding BW
* parameter. If it exists, it returns the associated profile otherwise
- * it creates a new rate limit profile for requested bw, and adds it to
- * the hw db and local list. It returns the new profile or null on error.
+ * it creates a new rate limit profile for requested BW, and adds it to
+ * the HW DB and local list. It returns the new profile or null on error.
* The caller needs to hold the scheduler lock.
*/
static struct ice_aqc_rl_profile_info *
@@ -3291,10 +3291,10 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
rl_prof_elem->bw == bw)
- /* Return existing profile id info */
+ /* Return existing profile ID info */
return rl_prof_elem;
- /* Create new profile id */
+ /* Create new profile ID */
rl_prof_elem = (struct ice_aqc_rl_profile_info *)
ice_malloc(hw, sizeof(*rl_prof_elem));
@@ -3311,7 +3311,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
rl_prof_elem->profile.flags = profile_type;
rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
- /* Create new entry in hw db */
+ /* Create new entry in HW DB */
buf = (struct ice_aqc_rl_profile_generic_elem *)
&rl_prof_elem->profile;
status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
@@ -3435,12 +3435,12 @@ ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @rl_prof_id: rate limit profile id
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @rl_prof_id: rate limit profile ID
*
- * This function configures node element's bw limit.
+ * This function configures node element's BW limit.
*/
static enum ice_status
ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
@@ -3457,7 +3457,7 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_MAX_BW:
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
@@ -3466,11 +3466,11 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_SHARED_BW:
- /* Check for removing shared bw */
+ /* Check for removing shared BW */
if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
/* remove shared profile */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
- data->srl_id = 0; /* clear srl field */
+ data->srl_id = 0; /* clear SRL field */
/* enable back EIR to default profile */
data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
@@ -3478,16 +3478,16 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
break;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
(LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
ICE_SCHED_DFLT_RL_PROF_ID))
return ICE_ERR_CFG;
- /* EIR bw is set to default, disable it */
+ /* EIR BW is set to default, disable it */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
- /* Okay to enable shared bw now */
+ /* Okay to enable shared BW now */
data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
data->srl_id = CPU_TO_LE16(rl_prof_id);
break;
@@ -3501,12 +3501,12 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_get_node_rl_prof_id - get node's rate limit profile id
+ * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
* @node: sched node
* @rl_type: rate limit type
*
* If existing profile matches, it returns the corresponding rate
- * limit profile id, otherwise it returns an invalid id as error.
+ * limit profile ID, otherwise it returns an invalid ID as error.
*/
static u16
ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
@@ -3539,7 +3539,7 @@ ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
/**
* ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @layer_index: layer index
*
* This function returns requested profile creation layer.
@@ -3603,14 +3603,14 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
}
/**
- * ice_sched_rm_rl_profile - remove rl profile id
+ * ice_sched_rm_rl_profile - remove RL profile ID
* @pi: port information structure
* @layer_num: layer number where profiles are saved
* @profile_type: profile type like EIR, CIR, or SRL
- * @profile_id: profile id to remove
+ * @profile_id: profile ID to remove
*
* This function removes rate limit profile from layer 'layer_num' of type
- * 'profile_type' and profile id as 'profile_id'. The caller needs to hold
+ * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
* scheduler lock.
*/
static enum ice_status
@@ -3620,7 +3620,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
struct ice_aqc_rl_profile_info *rl_prof_elem;
enum ice_status status = ICE_SUCCESS;
- /* Check the existing list for rl profile */
+ /* Check the existing list for RL profile */
LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
@@ -3629,7 +3629,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
if (rl_prof_elem->prof_id_ref)
rl_prof_elem->prof_id_ref--;
- /* Remove old profile id from database */
+ /* Remove old profile ID from database */
status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
if (status && status != ICE_ERR_IN_USE)
ice_debug(pi->hw, ICE_DBG_SCHED,
@@ -3646,10 +3646,10 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
- * @layer_num: layer number where rl profiles are saved
+ * @layer_num: layer number where RL profiles are saved
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3681,17 +3681,18 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
default:
return ICE_ERR_PARAM;
}
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
- /* Remove stale rl profile id */
+ /* Remove stale RL profile ID */
if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
old_id == ICE_SCHED_INVAL_PROF_ID)
- return status;
+ return ICE_SUCCESS;
+
return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
}
@@ -3704,7 +3705,7 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
* @bw: bandwidth value
*
* This function prepares node element's bandwidth to SRL or EIR exclusively.
- * EIR bw and Shared bw profiles are mutually exclusive and hence only one of
+ * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
* them may be set for any given element. This function needs to be called
* with the scheduler lock held.
*/
@@ -3730,7 +3731,7 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
layer_num);
} else if (rl_type == ICE_MAX_BW &&
node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
- /* Remove Shared profile. Set default shared bw call
+ /* Remove Shared profile. Set default shared BW call
* removes shared profile for a node.
*/
return ice_sched_set_node_bw_dflt(pi, node,
@@ -3748,9 +3749,9 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: layer number
*
- * This function adds new profile corresponding to requested bw, configures
- * node's rl profile id of type cir, eir, or srl, and removes old profile
- * id from local database. The caller needs to hold scheduler lock.
+ * This function adds new profile corresponding to requested BW, configures
+ * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
+ * ID from local database. The caller needs to hold scheduler lock.
*/
static enum ice_status
ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3767,21 +3768,21 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
/* New changes has been applied */
- /* Increment the profile id reference count */
+ /* Increment the profile ID reference count */
rl_prof_info->prof_id_ref++;
- /* Check for old id removal */
+ /* Check for old ID removal */
if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
- return status;
+ return ICE_SUCCESS;
return ice_sched_rm_rl_profile(pi, layer_num,
rl_prof_info->profile.flags,
@@ -3789,14 +3790,14 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_lmt - set node's bw limit
+ * ice_sched_set_node_bw_lmt - set node's BW limit
* @pi: port information structure
* @node: tree node
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * It updates node's bw limit parameters like bw rl profile id of type cir,
- * eir, or srl. The caller needs to hold scheduler lock.
+ * It updates node's BW limit parameters like BW RL profile ID of type CIR,
+ * EIR, or SRL. The caller needs to hold scheduler lock.
*/
enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3811,7 +3812,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!pi)
return ICE_ERR_PARAM;
hw = pi->hw;
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
node->tx_sched_layer);
@@ -3824,7 +3825,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!cfg_node)
return ICE_ERR_CFG;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
@@ -3838,13 +3839,13 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_dflt_lmt - set node's bw limit to default
+ * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3884,13 +3885,13 @@ ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
}
/**
- * ice_sched_set_q_bw_lmt - sets queue bw limit
+ * ice_sched_set_q_bw_lmt - sets queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of queue scheduling node.
+ * This function sets BW limit of queue scheduling node.
*/
static enum ice_status
ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3937,13 +3938,13 @@ ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_cfg_q_bw_lmt - configure queue bw limit
+ * ice_cfg_q_bw_lmt - configure queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of queue scheduling node.
+ * This function configures BW limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
@@ -3953,12 +3954,12 @@ ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
}
/**
- * ice_cfg_q_bw_dflt_lmt - configure queue bw default limit
+ * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
*
- * This function configures bw default limit of queue scheduling node.
+ * This function configures BW default limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3968,11 +3969,11 @@ ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_sched_save_tc_node_bw - save tc node bw limit
+ * ice_sched_save_tc_node_bw - save TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function saves the modified values of bandwidth settings for later
* replay purpose (restore) after reset.
@@ -4002,13 +4003,13 @@ ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_lmt - sets tc node bw limit
+ * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bandwidth limit of tc node.
+ * This function configures bandwidth limit of TC node.
*/
static enum ice_status
ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
@@ -4036,13 +4037,13 @@ ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_lmt - configure tc node bw limit
+ * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4053,12 +4054,12 @@ ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_dflt_lmt - configure tc node bw default limit
+ * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
*
- * This function configures bw default limit of tc node.
+ * This function configures BW default limit of TC node.
*/
enum ice_status
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
@@ -4068,13 +4069,13 @@ ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_save_tc_node_bw_alloc - save tc node's bw alloc information
+ * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
* @pi: port information structure
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
@@ -4100,13 +4101,13 @@ ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_alloc - set tc node bw alloc
+ * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bandwidth alloc of tc node, also saves the
+ * This function configures bandwidth alloc of TC node, also saves the
* changed settings for replay purpose, and return success if it succeeds
* in modifying bandwidth alloc setting.
*/
@@ -4135,13 +4136,13 @@ ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_alloc - configure tc node bw alloc
+ * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4152,12 +4153,12 @@ ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_agg_bw_dflt_lmt - set agg node's bw limit to default
+ * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function retrieves the aggregator id based on VSI id and tc,
- * and sets node's bw limit to default. This function needs to be
+ * This function retrieves the aggregator ID based on VSI ID and TC,
+ * and sets node's BW limit to default. This function needs to be
* called with the scheduler lock held.
*/
enum ice_status
@@ -4201,14 +4202,14 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_get_node_by_id_type - get node from id type
+ * ice_sched_get_node_by_id_type - get node from ID type
* @pi: port information structure
* @id: identifier
* @agg_type: type of aggregator
* @tc: traffic class
*
- * This function returns node identified by id of type aggregator, and
- * based on traffic class (tc). This function needs to be called with
+ * This function returns node identified by ID of type aggregator, and
+ * based on traffic class (TC). This function needs to be called with
* the scheduler lock held.
*/
static struct ice_sched_node *
@@ -4263,16 +4264,16 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
}
/**
- * ice_sched_set_node_bw_lmt_per_tc - set node bw limit per tc
+ * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
* @pi: port information structure
- * @id: id (software VSI handle or AGG id)
+ * @id: ID (software VSI handle or AGG ID)
* @agg_type: aggregator type (VSI or AGG type node)
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of VSI or Aggregator scheduling node
- * based on tc information from passed in argument bw.
+ * This function sets BW limit of VSI or Aggregator scheduling node
+ * based on TC information from passed in argument BW.
*/
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -4310,7 +4311,7 @@ ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
* @vsi_handle: software VSI handle
*
* This function validates SRL node of the VSI node if available SRL layer is
- * different than the VSI node layer on all tc(s).This function needs to be
+ * different than the VSI node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4322,7 +4323,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4356,13 +4357,13 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_set_vsi_bw_shared_lmt - set VSI bw shared limit
+ * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
- * across all traffic classes for VSI matching handle. When bw value of
+ * across all traffic classes for VSI matching handle. When BW value of
* ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
*/
enum ice_status
@@ -4382,7 +4383,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
if (status)
goto exit_set_vsi_bw_shared_lmt;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4417,10 +4418,10 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_validate_agg_srl_node - validate AGG SRL node
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
* This function validates SRL node of the AGG node if available SRL layer is
- * different than the AGG node layer on all tc(s).This function needs to be
+ * different than the AGG node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4440,7 +4441,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
if (!agg_id_present)
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4472,14 +4473,14 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_sched_set_agg_bw_shared_lmt - set aggregator bw shared limit
+ * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type
+ * This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id. When
- * bw value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
+ * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
* node(s).
*/
enum ice_status
@@ -4511,7 +4512,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
goto exit_agg_bw_shared_lmt;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -4975,7 +4976,7 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
/**
* ice_cfg_rl_burst_size - Set burst size value
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @bytes: burst size in bytes
*
* This function configures/set the burst size to requested new value. The new
@@ -4995,7 +4996,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_BYTE_GRANULARITY;
/* round number to nearest 256 granularity */
bytes = ice_round_to_num(bytes, 256);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_BYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_BYTE_GRANULARITY;
burst_size_to_prog |= (u16)bytes;
@@ -5005,7 +5006,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_KBYTE_GRANULARITY;
/* round number to nearest 1024 granularity */
bytes = ice_round_to_num(bytes, 1024);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
/* The value is in k bytes */
@@ -5017,7 +5018,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
/*
* ice_sched_replay_node_prio - re-configure node priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: priority value
*
@@ -5043,12 +5044,12 @@ ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_node_bw - replay node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_node_bw - replay node(s) BW
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @bw_t_info: bw type information
+ * @bw_t_info: BW type information
*
- * This function restores node's bw from bw_t_info. The caller needs
+ * This function restores node's BW from bw_t_info. The caller needs
* to hold the scheduler lock.
*/
static enum ice_status
@@ -5102,8 +5103,8 @@ ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_agg_bw - replay aggregator node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_agg_bw - replay aggregator node(s) BW
+ * @hw: pointer to the HW struct
* @agg_info: aggregator data structure
*
* This function re-creates aggregator type nodes. The caller needs to hold
@@ -5157,7 +5158,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
{
u8 tc;
- /* Some tc(s) may be missing after reset, adjust for replay */
+ /* Some TC(s) may be missing after reset, adjust for replay */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
@@ -5166,10 +5167,10 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
/**
* ice_sched_replay_agg - recreate aggregator node(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function recreate aggregator type nodes which are not replayed earlier.
- * It also replay aggregator bw information. These aggregator nodes are not
+ * It also replay aggregator BW information. These aggregator nodes are not
* associated with VSI type node yet.
*/
void ice_sched_replay_agg(struct ice_hw *hw)
@@ -5180,7 +5181,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
ice_acquire_lock(&pi->sched_lock);
LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
list_entry) {
- /* replay agg (re-create aggregator node) */
+ /* replay aggregator (re-create aggregator node) */
if (!ice_cmp_bitmap(agg_info->tc_bitmap,
agg_info->replay_tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
@@ -5203,7 +5204,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/* Move on to next one */
continue;
}
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
ice_info(hw, "Replay agg bw [id=%d] failed\n",
@@ -5215,7 +5216,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/**
* ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function initialize aggregator(s) TC bitmap to zero. A required
* preinit step for replaying aggregators.
@@ -5239,10 +5240,10 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
}
/**
- * ice_sched_replay_tc_node_bw - replay tc node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_tc_node_bw - replay TC node(s) BW
+ * @hw: pointer to the HW struct
*
- * This function replay tc nodes. The caller needs to hold the scheduler lock.
+ * This function replay TC nodes. The caller needs to hold the scheduler lock.
*/
enum ice_status
ice_sched_replay_tc_node_bw(struct ice_hw *hw)
@@ -5257,7 +5258,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
if (!tc_node)
- continue; /* tc not present */
+ continue; /* TC not present */
status = ice_sched_replay_node_bw(hw, tc_node,
&hw->tc_node_bw_t_info[tc]);
if (status)
@@ -5268,8 +5269,8 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
}
/**
- * ice_sched_replay_vsi_bw - replay VSI type node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @tc_bitmap: 8 bits TC bitmap
*
@@ -5308,8 +5309,8 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
}
/**
- * ice_sched_replay_vsi_agg - replay agg & VSI to aggregator node(s)
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays aggregator node, VSI to aggregator type nodes, and
@@ -5336,12 +5337,12 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
return ICE_SUCCESS; /* Not present in list - default Agg case */
ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
replay_bitmap);
- /* Replay agg node associated to vsi_handle */
+ /* Replay aggregator node associated to vsi_handle */
status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
ICE_AGG_TYPE_AGG, replay_bitmap);
if (status)
return status;
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
return status;
@@ -5354,14 +5355,14 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
replay_bitmap);
if (status)
return status;
- /* Replay VSI bw (restore VSI bw) */
+ /* Replay VSI BW (restore VSI BW) */
return ice_sched_replay_vsi_bw(hw, vsi_handle,
agg_vsi_info->tc_bitmap);
}
/**
* ice_replay_vsi_agg - replay VSI to aggregator node
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays association of VSI to aggregator type nodes, and
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index a5565945e..61fa6a85b 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -43,14 +43,14 @@ struct ice_aqc_rl_profile_info {
struct ice_aqc_rl_profile_elem profile;
struct LIST_ENTRY_TYPE list_entry;
u32 bw; /* requested */
- u16 prof_id_ref; /* profile id to node association ref count */
+ u16 prof_id_ref; /* profile ID to node association ref count */
};
struct ice_sched_agg_vsi_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u16 vsi_handle;
- /* save agg vsi TC bitmap */
+ /* save aggregator VSI TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
@@ -60,9 +60,9 @@ struct ice_sched_agg_info {
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u32 agg_id;
enum ice_agg_type agg_type;
- /* bw_t_info saves agg bw information */
+ /* bw_t_info saves aggregator BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
- /* save agg TC bitmap */
+ /* save aggregator TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a7b712e17..512e64b91 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -21,7 +21,7 @@
* byte 6 = 0x2: to identify it as locally administered SA MAC
* byte 12 = 0x81 & byte 13 = 0x00:
* In case of VLAN filter first two bytes defines ether type (0x8100)
- * and remaining two bytes are placeholder for programming a given VLAN id
+ * and remaining two bytes are placeholder for programming a given VLAN ID
* In case of Ether type filter it is treated as header without VLAN tag
* and byte 12 and 13 is used to program a given Ether type instead
*/
@@ -54,7 +54,7 @@ static const u8 dummy_eth_header[DUMMY_ETH_HDR_LEN] = { 0x2, 0, 0, 0, 0, 0,
/**
* ice_init_def_sw_recp - initialize the recipe book keeping tables
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Allocate memory for the entire recipe table and initialize the structures/
* entries corresponding to basic recipes.
@@ -282,7 +282,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
/**
* ice_aq_add_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -324,7 +324,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_free_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
* @cd: pointer to command details structure or NULL
@@ -360,7 +360,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -397,7 +397,7 @@ ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_is_vsi_valid - check whether the VSI is valid or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* check whether the VSI is valid or not
@@ -408,11 +408,11 @@ bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_get_hw_vsi_num - return the hw VSI number
- * @hw: pointer to the hw struct
+ * ice_get_hw_vsi_num - return the HW VSI number
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
- * return the hw VSI number
+ * return the HW VSI number
* Caution: call this function only if VSI is valid (ice_is_vsi_valid)
*/
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
@@ -422,7 +422,7 @@ u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_get_vsi_ctx - return the VSI context entry for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* return the VSI context entry for a given VSI handle
@@ -434,7 +434,7 @@ struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_vsi_ctx - save the VSI context for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
* @vsi: VSI context pointer
*
@@ -448,7 +448,7 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
/**
* ice_clear_vsi_ctx - clear the VSI context entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* clear the VSI context entry
@@ -467,7 +467,7 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_clear_all_vsi_ctx - clear all the VSI context entries
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
void ice_clear_all_vsi_ctx(struct ice_hw *hw)
{
@@ -479,13 +479,13 @@ void ice_clear_all_vsi_ctx(struct ice_hw *hw)
/**
* ice_add_vsi - add VSI context to the hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle provided by drivers
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
* Add a VSI context to the hardware also add it into the VSI handle list.
- * If this function gets called after reset for exisiting VSIs then update
+ * If this function gets called after reset for existing VSIs then update
* with the new HW VSI number in the corresponding VSI handle list entry.
*/
enum ice_status
@@ -502,7 +502,7 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return status;
tmp_vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
if (!tmp_vsi_ctx) {
- /* Create a new vsi context */
+ /* Create a new VSI context */
tmp_vsi_ctx = (struct ice_vsi_ctx *)
ice_malloc(hw, sizeof(*tmp_vsi_ctx));
if (!tmp_vsi_ctx) {
@@ -519,12 +519,12 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
tmp_vsi_ctx->vsi_num = vsi_ctx->vsi_num;
}
- return status;
+ return ICE_SUCCESS;
}
/**
* ice_free_vsi- free VSI context from hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
@@ -549,7 +549,7 @@ ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
@@ -570,8 +570,8 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_alloc_free_vsi_list
- * @hw: pointer to the hw struct
- * @vsi_list_id: VSI list id returned or used for lookup
+ * @hw: pointer to the HW struct
+ * @vsi_list_id: VSI list ID returned or used for lookup
* @lkup_type: switch rule filter lookup type
* @opc: switch rules population command type - pass in the command opcode
*
@@ -629,7 +629,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
/**
* ice_aq_sw_rules - add/update/remove switch rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @rule_list: pointer to switch rule population list
* @rule_list_sz: total size of the rule list in bytes
* @num_rules: number of switch rules in the rule_list
@@ -798,7 +798,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
* 1. The switch is a VEB AND
* 2
* 2.1 The lookup is a directional lookup like ethertype,
- * promiscuous, ethertype-mac, promiscuous-vlan
+ * promiscuous, ethertype-MAC, promiscuous-VLAN
* and default-port OR
* 2.2 The lookup is VLAN, OR
* 2.3 The lookup is MAC with mcast or bcast addr for MAC, OR
@@ -829,7 +829,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
}
/**
- * ice_ilog2 - Caculates integer log base 2 of a number
+ * ice_ilog2 - Calculates integer log base 2 of a number
* @n: number on which to perform operation
*/
static int ice_ilog2(u64 n)
@@ -984,7 +984,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,
* @hw: pointer to the hardware structure
* @m_ent: the management entry for which sw marker needs to be added
* @sw_marker: sw marker to tag the Rx descriptor with
- * @l_id: large action resource id
+ * @l_id: large action resource ID
*
* Create a large action to hold software marker and update the switch rule
* entry pointed by m_ent with newly created large action
@@ -996,8 +996,8 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
struct ice_aqc_sw_rules_elem *lg_act, *rx_tx;
/* For software marker we need 3 large actions
* 1. FWD action: FWD TO VSI or VSI LIST
- * 2. GENERIC VALUE action to hold the profile id
- * 3. GENERIC VALUE action to hold the software marker id
+ * 2. GENERIC VALUE action to hold the profile ID
+ * 3. GENERIC VALUE action to hold the software marker ID
*/
const u16 num_lg_acts = 3;
enum ice_status status;
@@ -1060,13 +1060,13 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
ice_aqc_opc_update_sw_rules);
- /* Update the action to point to the large action id */
+ /* Update the action to point to the large action ID */
rx_tx->pdata.lkup_tx_rx.act =
CPU_TO_LE32(ICE_SINGLE_ACT_PTR |
((l_id << ICE_SINGLE_ACT_PTR_VAL_S) &
ICE_SINGLE_ACT_PTR_VAL_M));
- /* Use the filter rule id of the previously created rule with single
+ /* Use the filter rule ID of the previously created rule with single
* act. Once the update happens, hardware will treat this as large
* action
*/
@@ -1090,10 +1090,10 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to set in the VSI mapping
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
*
- * Helper function to create a new entry of VSI list id to VSI mapping
- * using the given VSI list id
+ * Helper function to create a new entry of VSI list ID to VSI mapping
+ * using the given VSI list ID
*/
static struct ice_vsi_list_map_info *
ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1122,13 +1122,13 @@ ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @remove: Boolean value to indicate if this is a remove action
* @opc: switch rules population command type - pass in the command opcode
* @lkup_type: lookup type of the filter
*
* Call AQ command to add a new switch rule or update existing switch rule
- * using the given VSI list id
+ * using the given VSI list ID
*/
static enum ice_status
ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1185,7 +1185,7 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
/**
* ice_create_vsi_list_rule - Creates and populates a VSI list rule
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
* @vsi_list_id: stores the ID of the VSI list to be created
@@ -1279,7 +1279,7 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw,
* @f_info: filter information for switch rule
*
* Call AQ command to update a previously created switch rule with a
- * VSI list id
+ * VSI list ID
*/
static enum ice_status
ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
@@ -1306,7 +1306,7 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
/**
* ice_update_sw_rule_bridge_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Updates unicast switch filter rules based on VEB/VEPA mode
*/
@@ -1362,7 +1362,7 @@ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
* Allocate a new VSI list and add two VSIs
* to this list using switch rule command
* Update the previously created switch rule with the
- * newly created VSI list id
+ * newly created VSI list ID
* if a VSI list was previously created
* Add the new VSI to the previously created VSI list set
* using the update switch rule command
@@ -1443,7 +1443,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
return ICE_SUCCESS;
/* Update the previously created VSI list set with
- * the new VSI id passed in
+ * the new VSI ID passed in
*/
vsi_list_id = cur_fltr->fwd_id.vsi_list_id;
opcode = ice_aqc_opc_update_sw_rules;
@@ -1451,7 +1451,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
status = ice_update_vsi_list_rule(hw, &vsi_handle, 1,
vsi_list_id, false, opcode,
new_fltr->lkup_type);
- /* update VSI list mapping info with new VSI id */
+ /* update VSI list mapping info with new VSI ID */
if (!status)
ice_set_bit(vsi_handle,
m_entry->vsi_list_info->vsi_map);
@@ -1495,7 +1495,7 @@ ice_find_rule_entry(struct ice_hw *hw, u8 recp_id, struct ice_fltr_info *f_info)
* @hw: pointer to the hardware structure
* @recp_id: lookup type for which VSI lists needs to be searched
* @vsi_handle: VSI handle to be found in VSI list
- * @vsi_list_id: VSI list id found contaning vsi_handle
+ * @vsi_list_id: VSI list ID found containing vsi_handle
*
* Helper function to search a VSI list with single entry containing given VSI
* handle element. This can be extended further to search VSI list with more
@@ -1527,7 +1527,7 @@ ice_find_vsi_list_entry(struct ice_hw *hw, u8 recp_id, u16 vsi_handle,
/**
* ice_add_rule_internal - add rule for a given lookup type
* @hw: pointer to the hardware structure
- * @recp_id: lookup type (recipe id) for which rule has to be added
+ * @recp_id: lookup type (recipe ID) for which rule has to be added
* @f_entry: structure containing MAC forwarding information
*
* Adds or updates the rule lists for a given recipe
@@ -1576,7 +1576,7 @@ ice_add_rule_internal(struct ice_hw *hw, u8 recp_id,
/**
* ice_remove_vsi_list_rule
* @hw: pointer to the hardware structure
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @lkup_type: switch rule filter lookup type
*
* The VSI list should be emptied before this function is called to remove the
@@ -1702,7 +1702,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
* ice_remove_rule_internal - Remove a filter rule of a given type
*
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @f_entry: rule entry containing filter information
*/
static enum ice_status
@@ -1752,7 +1752,7 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
status = ice_rem_update_vsi_list(hw, vsi_handle, list_elem);
if (status)
goto exit;
- /* if vsi count goes to zero after updating the vsi list */
+ /* if VSI count goes to zero after updating the VSI list */
if (list_elem->vsi_count == 0)
remove_rule = true;
}
@@ -1830,7 +1830,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
return ICE_ERR_PARAM;
hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
m_list_itr->fltr_info.fwd_id.hw_vsi_id = hw_vsi_id;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (m_list_itr->fltr_info.src_id != ICE_SRC_ID_VSI)
return ICE_ERR_PARAM;
m_list_itr->fltr_info.src = hw_vsi_id;
@@ -1907,7 +1907,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
((u8 *)r_iter + (elem_sent * s_rule_size));
}
- /* Fill up rule id based on the value returned from FW */
+ /* Fill up rule ID based on the value returned from FW */
r_iter = s_rule;
LIST_FOR_EACH_ENTRY(m_list_itr, m_list, ice_fltr_list_entry,
list_entry) {
@@ -1968,7 +1968,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);
new_fltr = &f_entry->fltr_info;
- /* VLAN id should only be 12 bits */
+ /* VLAN ID should only be 12 bits */
if (new_fltr->l_data.vlan.vlan_id > ICE_MAX_VLAN_ID)
return ICE_ERR_PARAM;
@@ -2026,7 +2026,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
}
}
} else if (v_list_itr->vsi_list_info->ref_cnt == 1) {
- /* Update existing VSI list to add new VSI id only if it used
+ /* Update existing VSI list to add new VSI ID only if it used
* by one VLAN rule.
*/
cur_fltr = &v_list_itr->fltr_info;
@@ -2036,7 +2036,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
/* If VLAN rule exists and VSI list being used by this rule is
* referenced by more than 1 VLAN rule. Then create a new VSI
* list appending previous VSI with new VSI and update existing
- * VLAN rule to point to new VSI list id
+ * VLAN rule to point to new VSI list ID
*/
struct ice_fltr_info tmp_fltr;
u16 vsi_handle_arr[2];
@@ -2130,9 +2130,9 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
* @hw: pointer to the hardware structure
* @mv_list: list of MAC and VLAN filters
*
- * If the VSI on which the mac-vlan pair has to be added has RX and Tx VLAN
+ * If the VSI on which the MAC-VLAN pair has to be added has Rx and Tx VLAN
* pruning bits enabled, then it is the responsibility of the caller to make
- * sure to add a vlan only filter on the same VSI. Packets belonging to that
+ * sure to add a VLAN only filter on the same VSI. Packets belonging to that
* VLAN won't be received on that VSI otherwise.
*/
enum ice_status
@@ -2446,7 +2446,7 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
struct ice_fltr_mgmt_list_entry *fm_entry;
enum ice_status status = ICE_SUCCESS;
- /* check to make sure VSI id is valid and within boundary */
+ /* check to make sure VSI ID is valid and within boundary */
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -2504,7 +2504,7 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
/**
* ice_remove_promisc - Remove promisc based filter rules
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @v_list: list of promisc entries
*/
static enum ice_status
@@ -2851,8 +2851,8 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
- * @recp_id: Recipe id for which rules need to be replayed
+ * @vsi_handle: driver VSI handle
+ * @recp_id: Recipe ID for which rules need to be replayed
* @list_head: list for which filters need to be replayed
*
* Replays the filter of recipe recp_id for a VSI represented via vsi_handle.
@@ -2877,7 +2877,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
f_entry.fltr_info = itr->fltr_info;
if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN &&
itr->fltr_info.vsi_handle == vsi_handle) {
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
status = ice_add_rule_internal(hw, recp_id, &f_entry);
@@ -2892,7 +2892,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
f_entry.fltr_info.vsi_handle = vsi_handle;
f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
if (recp_id == ICE_SW_LKUP_VLAN)
@@ -2910,7 +2910,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
/**
* ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
+ * @vsi_handle: driver VSI handle
*
* Replays filters for requested VSI via vsi_handle.
*/
@@ -2938,7 +2938,7 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_rm_all_sw_replay_rule_info - deletes filter replay rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Deletes the filter replay rules.
*/
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index dd21781f7..90dfdabcb 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -40,10 +40,10 @@ enum ice_sw_lkup_type {
ICE_SW_LKUP_DFLT = 5,
ICE_SW_LKUP_ETHERTYPE_MAC = 8,
ICE_SW_LKUP_PROMISC_VLAN = 9,
- ICE_SW_LKUP_LAST,
+ ICE_SW_LKUP_LAST
};
-/* type of filter src id */
+/* type of filter src ID */
enum ice_src_id {
ICE_SRC_ID_UNKNOWN = 0,
ICE_SRC_ID_VSI,
@@ -94,8 +94,8 @@ struct ice_fltr_info {
/* Depending on filter action */
union {
- /* queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 hw_vsi_id:10;
@@ -134,8 +134,8 @@ struct ice_sw_act_ctrl {
enum ice_sw_fwd_act_type fltr_act;
/* Depending on filter action */
union {
- /* This is a queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* This is a queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 vsi_id:10;
@@ -178,7 +178,7 @@ struct ice_sw_recipe {
u8 chain_idx;
/* if this recipe is a collection of other recipe then count of other
- * recipes and recipe ids of those recipes
+ * recipes and recipe IDs of those recipes
*/
u8 n_grp_count;
@@ -211,9 +211,11 @@ struct ice_sw_recipe {
/* AQ buffer associated with this recipe */
struct ice_aqc_recipe_data_elem *root_buf;
+ /* This struct saves the fv_words for a given lookup */
+ struct ice_prot_lkup_ext lkup_exts;
};
-/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list id */
+/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list ID */
struct ice_vsi_list_map_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(vsi_map, ICE_MAX_VSI);
@@ -235,7 +237,7 @@ struct ice_fltr_list_entry {
* used for VLAN membership.
*/
struct ice_fltr_mgmt_list_entry {
- /* back pointer to VSI list id to VSI list mapping */
+ /* back pointer to VSI list ID to VSI list mapping */
struct ice_vsi_list_map_info *vsi_list_info;
u16 vsi_count;
#define ICE_INVAL_LG_ACT_INDEX 0xffff
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 17d79ba21..08c974004 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -196,7 +196,7 @@ enum ice_q {
};
/* Different reset sources for which a disable queue AQ call has to be made in
- * order to clean the TX scheduler as a part of the reset
+ * order to clean the Tx scheduler as a part of the reset
*/
enum ice_disq_rst_src {
ICE_NO_RESET = 0,
@@ -242,11 +242,11 @@ struct ice_hw_common_caps {
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
u32 rss_table_entry_width; /* RSS Entry width in bits */
- /* TX/RX queues */
- u32 num_rxq; /* Number/Total RX queues */
- u32 rxq_first_id; /* First queue ID for RX queues */
- u32 num_txq; /* Number/Total TX queues */
- u32 txq_first_id; /* First queue ID for TX queues */
+ /* Tx/Rx queues */
+ u32 num_rxq; /* Number/Total Rx queues */
+ u32 rxq_first_id; /* First queue ID for Rx queues */
+ u32 num_txq; /* Number/Total Tx queues */
+ u32 txq_first_id; /* First queue ID for Tx queues */
/* MSI-X vectors */
u32 num_msix_vectors;
@@ -390,7 +390,7 @@ struct ice_sched_node {
struct ice_sched_node *sibling; /* next sibling in the same layer */
struct ice_sched_node **children;
struct ice_aqc_txsched_elem_data info;
- u32 agg_id; /* aggregator group id */
+ u32 agg_id; /* aggregator group ID */
u16 vsi_handle;
u8 in_use; /* suspended or in use */
u8 tx_sched_layer; /* Logical Layer (1-9) */
@@ -435,8 +435,8 @@ enum ice_agg_type {
/* Rate limit types */
enum ice_rl_type {
ICE_UNKNOWN_BW = 0,
- ICE_MIN_BW, /* for cir profile */
- ICE_MAX_BW, /* for eir profile */
+ ICE_MIN_BW, /* for CIR profile */
+ ICE_MAX_BW, /* for EIR profile */
ICE_SHARED_BW /* for shared profile */
};
@@ -475,7 +475,7 @@ enum ice_rl_type {
*
* (a) is the last_node_teid(not of type Leaf). A leaf node is created under
* (a) as child node where queues get added, add Tx/Rx queue admin commands;
- * need teid of (a) to add queues.
+ * need TEID of (a) to add queues.
*
* This tree
* -> has 8 branches (one for each TC)
@@ -487,7 +487,7 @@ enum ice_rl_type {
* Refer to the documentation for more info.
*/
- /* Data structure for saving bw information */
+ /* Data structure for saving BW information */
enum ice_bw_type {
ICE_BW_TYPE_PRIO,
ICE_BW_TYPE_CIR,
@@ -511,12 +511,12 @@ struct ice_bw_type_info {
u32 shared_bw;
};
-/* vsi type list entry to locate corresponding vsi/ag nodes */
+/* VSI type list entry to locate corresponding VSI/aggregator nodes */
struct ice_sched_vsi_info {
struct ice_sched_node *vsi_node[ICE_MAX_TRAFFIC_CLASS];
struct ice_sched_node *ag_node[ICE_MAX_TRAFFIC_CLASS];
u16 max_lanq[ICE_MAX_TRAFFIC_CLASS];
- /* bw_t_info saves VSI bw information */
+ /* bw_t_info saves VSI BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
@@ -577,7 +577,7 @@ struct ice_dcbx_cfg {
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
- struct ice_hw *hw; /* back pointer to hw instance */
+ struct ice_hw *hw; /* back pointer to HW instance */
u32 last_node_teid; /* scheduler last node info */
u16 sw_id; /* Initial switch ID belongs to port */
u16 pf_vf_num;
@@ -592,7 +592,7 @@ struct ice_port_info {
struct ice_mac_info mac;
struct ice_phy_info phy;
struct ice_lock sched_lock; /* protect access to TXSched tree */
- /* List contain profile id(s) and other params per layer */
+ /* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
@@ -648,7 +648,7 @@ struct ice_hw {
u8 pf_id; /* device profile info */
u16 max_burst_size; /* driver sets this value */
- /* TX Scheduler values */
+ /* Tx Scheduler values */
u16 num_tx_sched_layers;
u16 num_tx_sched_phys_layers;
u8 flattened_layers;
@@ -659,7 +659,7 @@ struct ice_hw {
struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
struct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];
u8 evb_veb; /* true for VEB, false for VEPA */
- u8 reset_ongoing; /* true if hw is in reset, false otherwise */
+ u8 reset_ongoing; /* true if HW is in reset, false otherwise */
struct ice_bus_info bus;
struct ice_nvm_info nvm;
struct ice_hw_dev_caps dev_caps; /* device capabilities */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 03/37] net/ice/base: add two helper functions
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 02/37] net/ice/base: improve comments Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 04/37] net/ice/base: add helper macros Qi Zhang
` (36 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Add two helper functions in common module.
1. ice_aq_set_mac_cfg to help configure maximum frame size with AQ
command
2. ice_get_ctx help to extract context bits from a packet structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 20 +++
drivers/net/ice/base/ice_common.c | 282 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_common.h | 4 +
3 files changed, 306 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 5a599280e..feb980475 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1168,6 +1168,25 @@ struct ice_aqc_set_phy_cfg_data {
};
+/* Set MAC Config command data structure (direct 0x0603) */
+struct ice_aqc_set_mac_cfg {
+ __le16 max_frame_size;
+ u8 params;
+#define ICE_AQ_SET_MAC_PACE_S 3
+#define ICE_AQ_SET_MAC_PACE_M (0xF << ICE_AQ_SET_MAC_PACE_S)
+#define ICE_AQ_SET_MAC_PACE_TYPE_M BIT(7)
+#define ICE_AQ_SET_MAC_PACE_TYPE_RATE 0
+#define ICE_AQ_SET_MAC_PACE_TYPE_FIXED ICE_AQ_SET_MAC_PACE_TYPE_M
+ u8 tx_tmr_priority;
+ __le16 tx_tmr_value;
+ __le16 fc_refresh_threshold;
+ u8 drop_opts;
+#define ICE_AQ_SET_MAC_AUTO_DROP_MASK BIT(0)
+#define ICE_AQ_SET_MAC_AUTO_DROP_NONE 0
+#define ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS BIT(0)
+ u8 reserved[7];
+};
+
/* Restart AN command data structure (direct 0x0605)
* Also used for response, with only the lport_num field present.
@@ -1782,6 +1801,7 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
} params;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index bcfa3014b..392183375 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -423,6 +423,74 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
}
}
+/**
+ * ice_aq_set_mac_cfg
+ * @hw: pointer to the HW struct
+ * @max_frame_size: Maximum Frame Size to be supported
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set MAC configuration (0x0603)
+ */
+enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
+{
+ u16 fc_threshold_val, tx_timer_val;
+ struct ice_aqc_set_mac_cfg *cmd;
+ struct ice_port_info *pi;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ u8 port_num = 0;
+ bool link_up;
+ u32 reg_val;
+
+ cmd = &desc.params.set_mac_cfg;
+
+ if (max_frame_size == 0)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_cfg);
+
+ cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
+
+ /* Retrieve the current data_pacing value in FW*/
+ pi = &hw->port_info[port_num];
+
+ /* We turn on the get_link_info so that ice_update_link_info(...)
+ * can be called.
+ */
+ pi->phy.get_link_info = 1;
+
+ status = ice_get_link_status(pi, &link_up);
+
+ if (status)
+ return status;
+
+ cmd->params = pi->phy.link_info.pacing;
+
+ /* We read back the transmit timer and fc threshold value of
+ * LFC. Thus, we will use index =
+ * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+ *
+ * Also, because we are opearating on transmit timer and fc
+ * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+ */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+ /* Retrieve the transmit timer */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+ tx_timer_val = reg_val &
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+ cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+ /* Retrieve the fc threshold */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+ fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
+ cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
@@ -3227,6 +3295,220 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+/**
+ * ice_read_byte - read context byte into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_byte(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u8 dest_byte, mask;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = (u8)(BIT(ce_info->width) - 1);
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&dest_byte, src, sizeof(dest_byte), ICE_DMA_TO_NONDMA);
+
+ dest_byte &= ~(mask);
+
+ dest_byte >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_byte, sizeof(dest_byte), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_word - read context word into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_word(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u16 dest_word, mask;
+ u8 *src, *target;
+ __le16 src_word;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = BIT(ce_info->width) - 1;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_word, src, sizeof(src_word), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_word &= ~(CPU_TO_LE16(mask));
+
+ /* get the data back into host order before shifting */
+ dest_word = LE16_TO_CPU(src_word);
+
+ dest_word >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_word, sizeof(dest_word), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_dword - read context dword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_dword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u32 dest_dword, mask;
+ __le32 src_dword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 32 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 5 bits so the shift will do nothing
+ */
+ if (ce_info->width < 32)
+ mask = BIT(ce_info->width) - 1;
+ else
+ mask = (u32)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_dword, src, sizeof(src_dword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_dword &= ~(CPU_TO_LE32(mask));
+
+ /* get the data back into host order before shifting */
+ dest_dword = LE32_TO_CPU(src_dword);
+
+ dest_dword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_dword, sizeof(dest_dword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_qword - read context qword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_qword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u64 dest_qword, mask;
+ __le64 src_qword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 64 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 6 bits so the shift will do nothing
+ */
+ if (ce_info->width < 64)
+ mask = BIT_ULL(ce_info->width) - 1;
+ else
+ mask = (u64)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_qword, src, sizeof(src_qword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_qword &= ~(CPU_TO_LE64(mask));
+
+ /* get the data back into host order before shifting */
+ dest_qword = LE64_TO_CPU(src_qword);
+
+ dest_qword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_qword, sizeof(dest_qword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_get_ctx - extract context bits from a packed structure
+ * @src_ctx: pointer to a generic packed context structure
+ * @dest_ctx: pointer to a generic non-packed context structure
+ * @ce_info: a description of the structure to be read from
+ */
+enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ int f;
+
+ for (f = 0; ce_info[f].width; f++) {
+ switch (ce_info[f].size_of) {
+ case 1:
+ ice_read_byte(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 2:
+ ice_read_word(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 4:
+ ice_read_dword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 8:
+ ice_read_qword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ default:
+ /* nothing to do, just keep going */
+ break;
+ }
+ }
+
+ return ICE_SUCCESS;
+}
/**
* ice_ena_vsi_txq
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index f2ad86182..0b387cdbe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -133,6 +133,8 @@ enum ice_status
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd);
enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
+enum ice_status
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd);
enum ice_status
@@ -149,6 +151,8 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
+enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cmd_details);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 04/37] net/ice/base: add helper macros
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (2 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 03/37] net/ice/base: add two helper functions Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 05/37] net/ice/base: allow package copy to be used after resets Qi Zhang
` (35 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. Add macro ice_for_each_traffic_class to loop for each
traffic class.
2. Add macro MIN_T to wrap min with type conversion.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_nvm.c | 7 ++++---
drivers/net/ice/base/ice_sched.c | 30 +++++++++++++++---------------
drivers/net/ice/base/ice_type.h | 7 +++++++
4 files changed, 27 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 392183375..86d3be17a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3669,7 +3669,7 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
ice_acquire_lock(&pi->sched_lock);
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
/* configuration is possible only if TC node is present */
if (!ice_sched_get_tc_node(pi, i))
continue;
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 92de2ec3b..8d3d0b0ed 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -163,9 +163,10 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
*/
off_w = offset % ICE_SR_SECTOR_SIZE_IN_WORDS;
read_size = off_w ?
- min(*words,
- (u16)(ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
- min((*words - words_read), ICE_SR_SECTOR_SIZE_IN_WORDS);
+ MIN_T(u16, *words,
+ (ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
+ MIN_T(u16, (*words - words_read),
+ ICE_SR_SECTOR_SIZE_IN_WORDS);
/* Check if this is last command, if so set proper flag */
if ((words_read + read_size) >= *words)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2edc305b5..237bf7350 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1896,7 +1896,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
if (!vsi_ctx)
goto exit_sched_rm_vsi_cfg;
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
struct ice_sched_node *vsi_node, *tc_node;
u8 j = 0;
@@ -2174,7 +2174,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
/* Create aggregator node(s) for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
/* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
@@ -2340,7 +2340,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
/* Move VSI node to new aggregator node for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
@@ -2410,7 +2410,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
goto exit_ice_rm_agg_cfg;
}
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
if (status)
goto exit_ice_rm_agg_cfg;
@@ -3050,7 +3050,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -3112,7 +3112,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -4174,7 +4174,7 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *node;
node = vsi_ctx->sched.ag_node[tc];
@@ -4324,7 +4324,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
enum ice_status status;
@@ -4384,7 +4384,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
if (status)
goto exit_set_vsi_bw_shared_lmt;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4442,7 +4442,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
if (!agg_id_present)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4513,7 +4513,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -5119,7 +5119,7 @@ ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
if (!agg_info)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
ICE_BW_TYPE_CNT))
continue;
@@ -5159,7 +5159,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
u8 tc;
/* Some TC(s) may be missing after reset, adjust for replay */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
+ ice_for_each_traffic_class(tc)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
ice_set_bit(tc, ena_tc_bitmap);
@@ -5253,7 +5253,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
u8 tc;
ice_acquire_lock(&pi->sched_lock);
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node;
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
@@ -5291,7 +5291,7 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
tc_node = ice_sched_get_tc_node(pi, tc);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 08c974004..2e865a78f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -18,6 +18,9 @@
#define ICE_BYTES_PER_DWORD 4
#define ICE_MAX_TRAFFIC_CLASS 8
+#ifndef MIN_T
+#define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b))
+#endif
#include "ice_status.h"
#include "ice_hw_autogen.h"
@@ -379,6 +382,10 @@ struct ice_nvm_info {
/* Max number of port to queue branches w.r.t topology */
#define ICE_TXSCHED_MAX_BRANCHES ICE_MAX_TRAFFIC_CLASS
+
+#define ice_for_each_traffic_class(_i) \
+ for ((_i) = 0; (_i) < ICE_MAX_TRAFFIC_CLASS; (_i)++)
+
/* ICE_DFLT_AGG_ID means that all new VM(s)/VSI node connects
* to driver defined policy for default aggregator
*/
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 05/37] net/ice/base: allow package copy to be used after resets
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (3 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 04/37] net/ice/base: add helper macros Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 06/37] net/ice/base: code clean Qi Zhang
` (34 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Bruce Allan
For components that make a copy of an external pipeline package file (i.e.
the Linux and FreeBSD drivers), save the size of the package file along
with the copy so that both can be used when calling ice_init_pkg() after a
CORER/GLOBR reset. Also, do not free the copy of the package file in
ice_init_pkg() since it is needed afterward for subsequent resets.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 9 +++++----
drivers/net/ice/base/ice_type.h | 1 +
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c87424601..66c47abda 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1269,6 +1269,7 @@ void ice_free_seg(struct ice_hw *hw)
if (hw->pkg_copy) {
ice_free(hw, hw->pkg_copy);
hw->pkg_copy = NULL;
+ hw->pkg_size = 0;
}
hw->seg = NULL;
}
@@ -1351,8 +1352,6 @@ static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
status = ICE_SUCCESS;
}
- /* Free a previous segment, if necessary */
- ice_free_seg(hw);
if (!status) {
hw->seg = seg;
/* on successful package download, update other required
@@ -1401,12 +1400,14 @@ enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
buf_copy = (u8 *)ice_memdup(hw, buf, len, ICE_NONDMA_TO_NONDMA);
status = ice_init_pkg(hw, buf_copy, len);
- if (status)
+ if (status) {
/* Free the copy, since we failed to initialize the package */
ice_free(hw, buf_copy);
- else
+ } else {
/* Track the copied pkg so we can free it later */
hw->pkg_copy = buf_copy;
+ hw->pkg_size = len;
+ }
return status;
}
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 2e865a78f..6bd73ed04 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -728,6 +728,7 @@ struct ice_hw {
/* Pointer to allocated copy of pkg memory */
u8 *pkg_copy;
+ u32 pkg_size;
/* tunneling info */
struct ice_tunnel_table tnl;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 06/37] net/ice/base: code clean
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (4 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 05/37] net/ice/base: allow package copy to be used after resets Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 07/37] net/ice/base: declare functions as external Qi Zhang
` (33 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Remove unnecessary macro and data structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 -
drivers/net/ice/base/ice_flex_pipe.c | 2 -
drivers/net/ice/base/ice_flow.c | 136 ----------------------------------
drivers/net/ice/base/ice_type.h | 6 --
4 files changed, 146 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index feb980475..056a9fbef 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1930,8 +1930,6 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
- ice_aqc_opc_suspend_sched_traffic = 0x040B,
- ice_aqc_opc_resume_sched_traffic = 0x040C,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 66c47abda..2d23c36eb 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2247,8 +2247,6 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < xlt2->count; i++) {
if (xlt2->vsig_tbl[i].in_use &&
ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
- *vsig = (i | ((hw->pf_id << ICE_PF_NUM_S) &
- ICE_PF_NUM_M));
*vsig = ICE_VSIG_VALUE(i, hw->pf_id);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 574c927c4..03a324d49 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1554,142 +1554,6 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
return ICE_SUCCESS;
}
-/* Mapping of AVF hash bit fields to an L3-L4 hash combination.
- * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash,
- * convert its values to their appropriate flow L3, L4 values.
- */
-#define ICE_FLOW_AVF_RSS_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4))
-#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP))
-#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \
- ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP))
-
-#define ICE_FLOW_AVF_RSS_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6))
-#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP))
-#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \
- ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP))
-
-#define ICE_FLOW_MAX_CFG 10
-
-/**
- * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver
- * @hw: pointer to the hardware structure
- * @vsi_handle: software VSI handle
- * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure
- *
- * This function will take the hash bitmap provided by the AVF driver via a
- * message, convert it to ICE-compatible values, and configure RSS flow
- * profiles.
- */
-enum ice_status
-ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
-{
- u64 added_cfg[ICE_FLOW_MAX_CFG], hash_flds;
- enum ice_status status = ICE_SUCCESS;
- u8 i, idx = 0;
-
- if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||
- !ice_is_vsi_valid(hw, vsi_handle))
- return ICE_ERR_PARAM;
-
- /* Make sure no unsupported bits are specified */
- if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS |
- ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS))
- return ICE_ERR_CFG;
-
- hash_flds = avf_hash;
-
- /* Always create an L3 RSS configuration for any L4 RSS configuration */
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS;
-
- /* Create the corresponding RSS configuration for each valid hash bit */
- while (hash_flds) {
- u64 rss_hash = ICE_HASH_INVALID;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS;
- }
- } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS;
- }
- }
-
- if (rss_hash == ICE_HASH_INVALID)
- return ICE_ERR_OUT_OF_RANGE;
-
- status = ice_add_rss_cfg(hw, vsi_handle, rss_hash,
- ICE_FLOW_SEG_HDR_NONE);
- if (status)
- break;
- added_cfg[idx++] = rss_hash;
- }
-
- /* If status is not success, we must remove all hash configurations
- * that were successfully added previously in this call for the vsi
- */
- if (status)
- for (i = 0; i < idx; i++)
- ice_rem_rss_cfg(hw, vsi_handle, added_cfg[i],
- ICE_FLOW_SEG_HDR_NONE);
-
- return status;
-}
-
/**
* ice_rem_all_rss_vsi_ctx - remove all RSS configurations from VSI context
* @hw: pointer to the hardware structure
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6bd73ed04..25d64477f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -733,12 +733,6 @@ struct ice_hw {
/* tunneling info */
struct ice_tunnel_table tnl;
- /* PTYPE group and XLT1 management */
-#define ICE_MAX_PTGS 256
- struct ice_ptg_entry ptg_tbl[ICE_BLK_COUNT][ICE_MAX_PTGS];
-
-#define ICE_XLT1_CNT 1024
- struct ice_ptg_ptype xlt1_tbl[ICE_BLK_COUNT][ICE_XLT1_CNT];
#define ICE_PKG_FILENAME "package_file"
#define ICE_PKG_FILENAME_EXT "pkg"
#define ICE_PKG_FILE_MAJ_VER 1
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 07/37] net/ice/base: declare functions as external
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (5 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 06/37] net/ice/base: code clean Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-03-01 10:30 ` Ferruh Yigit
2019-02-28 5:56 ` [dpdk-dev] [PATCH 08/37] net/ice/base: add more APIs in switch module Qi Zhang
` (32 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Remove static of below functions and declare them as external
APIs.
ice_aq_add_vsi
ice_aq_free_vsi
ice_aq_update_vsi
ice_aq_add_lan_txq
ice_init_pkg
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 4 ++++
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.h | 2 ++
drivers/net/ice/base/ice_switch.c | 6 +++---
drivers/net/ice/base/ice_switch.h | 9 +++++++++
6 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 86d3be17a..015db11e0 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2935,7 +2935,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
* Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
* flow.
*/
-static enum ice_status
+enum ice_status
ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 0b387cdbe..63f4a5ebe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -94,6 +94,10 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
enum ice_status
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
+enum ice_status
+ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
+ struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
+ struct ice_sq_cd *cd);
bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 2d23c36eb..ff615f94f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1314,7 +1314,7 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
* ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
* case.
*/
-static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
+enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
{
struct ice_pkg_hdr *pkg;
enum ice_status status;
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 23fffed75..00c2b6682 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -88,6 +88,8 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);
struct ice_prof_map *
ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);
enum ice_status
+ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);
+enum ice_status
ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
void ice_free_seg(struct ice_hw *hw);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 512e64b91..e6fc9fcee 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -288,7 +288,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
*
* Add a VSI context to the hardware (0x0210)
*/
-static enum ice_status
+enum ice_status
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
@@ -331,7 +331,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Free VSI context info from hardware (0x0213)
*/
-static enum ice_status
+enum ice_status
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd)
{
@@ -366,7 +366,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Update VSI context in the hardware (0x0211)
*/
-static enum ice_status
+enum ice_status
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 90dfdabcb..b28e55a4f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -271,6 +271,15 @@ enum ice_promisc_flags {
/* VSI related commands */
enum ice_status
+ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ bool keep_vsi_alloc, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 08/37] net/ice/base: add more APIs in switch module
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (6 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 07/37] net/ice/base: declare functions as external Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 09/37] net/ice/base: add VSI queue context framework Qi Zhang
` (31 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Add below APIs in switch module
1. ice_aq_get_vsi_params - get VSI context info
2. ice_aq_add_update_mir_rule - add/update mirror rule
3. ice_aq_delete_mir_rule - delete mirror rule
4. ice_aq_set_storm_ctrl - set storm control configuration
5. ice_aq_get_storm_ctrl - get storm control configuration
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 136 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.c | 228 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 29 +++++
3 files changed, 393 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 056a9fbef..724657af6 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -177,6 +177,13 @@ struct ice_aqc_clear_pxe {
};
+/* Configure No-Drop Policy Command (direct 0x0112) */
+struct ice_aqc_config_no_drop_policy {
+ u8 opts;
+#define ICE_AQC_FORCE_NO_DROP BIT(0)
+ u8 rsvd[15];
+};
+
/* Get switch configuration (0x0200) */
struct ice_aqc_get_sw_cfg {
/* Reserved for command and copy of request flags for response */
@@ -350,6 +357,19 @@ struct ice_aqc_add_update_free_vsi_resp {
};
+struct ice_aqc_get_vsi_resp {
+ __le16 vsi_num;
+ u8 vf_id;
+ /* The vsi_flags field uses the ICE_AQ_VSI_TYPE_* defines for values.
+ * These are found above in struct ice_aqc_add_get_update_free_vsi.
+ */
+ u8 vsi_flags;
+ __le16 vsi_used;
+ __le16 vsi_free;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
struct ice_aqc_vsi_props {
__le16 valid_sections;
@@ -506,6 +526,110 @@ struct ice_aqc_vsi_props {
};
+/* Add/update mirror rule - direct (0x0260) */
+#define ICE_AQC_RULE_ID_VALID_S 7
+#define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S)
+#define ICE_AQC_RULE_ID_S 0
+#define ICE_AQC_RULE_ID_M (0x3F << ICE_AQC_RULE_ID_S)
+
+/* Following defines to be used while processing caller specified mirror list
+ * of VSI indexes.
+ */
+/* Action: Byte.bit (1.7)
+ * 0 = Remove VSI from mirror rule
+ * 1 = Add VSI to mirror rule
+ */
+#define ICE_AQC_RULE_ACT_S 15
+#define ICE_AQC_RULE_ACT_M (0x1 << ICE_AQC_RULE_ACT_S)
+/* Action: 1.2:0.0 = Mirrored VSI */
+#define ICE_AQC_RULE_MIRRORED_VSI_S 0
+#define ICE_AQC_RULE_MIRRORED_VSI_M (0x7FF << ICE_AQC_RULE_MIRRORED_VSI_S)
+
+/* This is to be used by add/update mirror rule Admin Queue command.
+ * In case of add mirror rule - if rule ID is specified as
+ * INVAL_MIRROR_RULE_ID, new rule ID is allocated from shared pool.
+ * If specified rule_id is valid, then it is used. If specified rule_id
+ * is in use then new mirroring rule is added.
+ */
+#define ICE_INVAL_MIRROR_RULE_ID 0xFFFF
+
+struct ice_aqc_add_update_mir_rule {
+ __le16 rule_id;
+
+ __le16 rule_type;
+#define ICE_AQC_RULE_TYPE_S 0
+#define ICE_AQC_RULE_TYPE_M (0x7 << ICE_AQC_RULE_TYPE_S)
+ /* VPORT ingress/egress */
+#define ICE_AQC_RULE_TYPE_VPORT_INGRESS 0x1
+#define ICE_AQC_RULE_TYPE_VPORT_EGRESS 0x2
+ /* Physical port ingress mirroring.
+ * All traffic received by this port
+ */
+#define ICE_AQC_RULE_TYPE_PPORT_INGRESS 0x6
+ /* Physical port egress mirroring. All traffic sent by this port */
+#define ICE_AQC_RULE_TYPE_PPORT_EGRESS 0x7
+
+ /* Number of mirrored entries.
+ * The values are in the command buffer
+ */
+ __le16 num_entries;
+
+ /* Destination VSI */
+ __le16 dest;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Delete mirror rule - direct(0x0261) */
+struct ice_aqc_delete_mir_rule {
+ __le16 rule_id;
+ __le16 rsvd;
+
+ /* Byte.bit: 20.0 = Keep allocation. If set VSI stays part of
+ * the PF allocated resources, otherwise it is returned to the
+ * shared pool
+ */
+#define ICE_AQC_FLAG_KEEP_ALLOCD_S 0
+#define ICE_AQC_FLAG_KEEP_ALLOCD_M (0x1 << ICE_AQC_FLAG_KEEP_ALLOCD_S)
+ __le16 flags;
+
+ u8 reserved[10];
+};
+
+/* Set/Get storm config - (direct 0x0280, 0x0281) */
+/* This structure holds get storm configuration response and same structure
+ * is used to perform set_storm_cfg
+ */
+struct ice_aqc_storm_cfg {
+ __le32 bcast_thresh_size;
+ __le32 mcast_thresh_size;
+ /* Bit 18:0 - Traffic upper threshold size
+ * Bit 31:19 - Reserved
+ */
+#define ICE_AQ_THRESHOLD_S 0
+#define ICE_AQ_THRESHOLD_M (0x7FFFF << ICE_AQ_THRESHOLD_S)
+
+ __le32 storm_ctrl_ctrl;
+ /* Bit 0: MDIPW - Drop Multicast packets in previous window
+ * Bit 1: MDICW - Drop multicast packets in current window
+ * Bit 2: BDIPW - Drop broadcast packets in previous window
+ * Bit 3: BDICW - Drop broadcast packets in current window
+ */
+#define ICE_AQ_STORM_CTRL_MDIPW_DROP_MULTICAST BIT(0)
+#define ICE_AQ_STORM_CTRL_MDICW_DROP_MULTICAST BIT(1)
+#define ICE_AQ_STORM_CTRL_BDIPW_DROP_MULTICAST BIT(2)
+#define ICE_AQ_STORM_CTRL_BDICW_DROP_MULTICAST BIT(3)
+ /* Bit 7:5 : Reserved */
+ /* Bit 27:8 : Interval - BSC/MSC Time-interval specification: The
+ * interval size for applying ingress broadcast or multicast storm
+ * control.
+ */
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S 8
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_M \
+ (0xFFFFF << ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S)
+ __le32 reserved;
+};
+
#define ICE_MAX_NUM_RECIPES 64
@@ -1771,6 +1895,9 @@ struct ice_aq_desc {
struct ice_aqc_manage_mac_read mac_read;
struct ice_aqc_manage_mac_write mac_write;
struct ice_aqc_clear_pxe clear_pxe;
+ struct ice_aqc_config_no_drop_policy no_drop;
+ struct ice_aqc_add_update_mir_rule add_update_rule;
+ struct ice_aqc_delete_mir_rule del_rule;
struct ice_aqc_list_caps get_cap;
struct ice_aqc_get_phy_caps get_phy;
struct ice_aqc_set_phy_cfg set_phy;
@@ -1778,6 +1905,7 @@ struct ice_aq_desc {
struct ice_aqc_set_port_id_led set_port_id_led;
struct ice_aqc_get_sw_cfg get_sw_conf;
struct ice_aqc_sw_rules sw_rules;
+ struct ice_aqc_storm_cfg storm_conf;
struct ice_aqc_get_topo get_topo;
struct ice_aqc_sched_elem_cmd sched_elem_cmd;
struct ice_aqc_query_txsched_res query_sched_res;
@@ -1795,6 +1923,7 @@ struct ice_aq_desc {
struct ice_aqc_txqs_cleanup txqs_cleanup;
struct ice_aqc_add_get_update_free_vsi vsi_cmd;
struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res;
+ struct ice_aqc_get_vsi_resp get_vsi_resp;
struct ice_aqc_download_pkg download_pkg;
struct ice_aqc_get_pkg_info_list get_pkg_info_list;
struct ice_aqc_fw_logging fw_logging;
@@ -1912,6 +2041,13 @@ enum ice_adminq_opc {
ice_aqc_opc_get_vsi_params = 0x0212,
ice_aqc_opc_free_vsi = 0x0213,
+ /* Mirroring rules - add/update, delete */
+ ice_aqc_opc_add_update_mir_rule = 0x0260,
+ ice_aqc_opc_del_mir_rule = 0x0261,
+
+ /* storm configuration */
+ ice_aqc_opc_set_storm_cfg = 0x0280,
+ ice_aqc_opc_get_storm_cfg = 0x0281,
/* switch rules population commands */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e6fc9fcee..34637c1be 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -566,7 +566,174 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return ice_aq_update_vsi(hw, vsi_ctx, cd);
}
+/**
+ * ice_aq_get_vsi_params
+ * @hw: pointer to the HW struct
+ * @vsi_ctx: pointer to a VSI context struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get VSI context info from hardware (0x0212)
+ */
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_add_get_update_free_vsi *cmd;
+ struct ice_aqc_get_vsi_resp *resp;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.vsi_cmd;
+ resp = &desc.params.get_vsi_resp;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_vsi_params);
+
+ cmd->vsi_num = CPU_TO_LE16(vsi_ctx->vsi_num | ICE_AQ_VSI_IS_VALID);
+
+ status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,
+ sizeof(vsi_ctx->info), cd);
+ if (!status) {
+ vsi_ctx->vsi_num = LE16_TO_CPU(resp->vsi_num) &
+ ICE_AQ_VSI_NUM_M;
+ vsi_ctx->vsis_allocd = LE16_TO_CPU(resp->vsi_used);
+ vsi_ctx->vsis_unallocated = LE16_TO_CPU(resp->vsi_free);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_add_update_mir_rule - add/update a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_type: Rule Type
+ * @dest_vsi: VSI number to which packets will be mirrored
+ * @count: length of the list
+ * @mr_buf: buffer for list of mirrored VSI numbers
+ * @cd: pointer to command details structure or NULL
+ * @rule_id: Rule ID
+ *
+ * Add/Update Mirror Rule (0x260).
+ */
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id)
+{
+ struct ice_aqc_add_update_mir_rule *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ __le16 *mr_list = NULL;
+ u16 buf_size = 0;
+
+ switch (rule_type) {
+ case ICE_AQC_RULE_TYPE_VPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_VPORT_EGRESS:
+ /* Make sure count and mr_buf are set for these rule_types */
+ if (!(count && mr_buf))
+ return ICE_ERR_PARAM;
+
+ buf_size = count * sizeof(__le16);
+ mr_list = (__le16 *)ice_malloc(hw, buf_size);
+ if (!mr_list)
+ return ICE_ERR_NO_MEMORY;
+ break;
+ case ICE_AQC_RULE_TYPE_PPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_PPORT_EGRESS:
+ /* Make sure count and mr_buf are not set for these
+ * rule_types
+ */
+ if (count || mr_buf)
+ return ICE_ERR_PARAM;
+ break;
+ default:
+ ice_debug(hw, ICE_DBG_SW,
+ "Error due to unsupported rule_type %u\n", rule_type);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_update_mir_rule);
+
+ /* Pre-process 'mr_buf' items for add/update of virtual port
+ * ingress/egress mirroring (but not physical port ingress/egress
+ * mirroring)
+ */
+ if (mr_buf) {
+ int i;
+
+ for (i = 0; i < count; i++) {
+ u16 id;
+
+ id = mr_buf[i].vsi_idx & ICE_AQC_RULE_MIRRORED_VSI_M;
+
+ /* Validate specified VSI number, make sure it is less
+ * than ICE_MAX_VSI, if not return with error.
+ */
+ if (id >= ICE_MAX_VSI) {
+ ice_debug(hw, ICE_DBG_SW,
+ "Error VSI index (%u) out-of-range\n",
+ id);
+ ice_free(hw, mr_list);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ /* add VSI to mirror rule */
+ if (mr_buf[i].add)
+ mr_list[i] =
+ CPU_TO_LE16(id | ICE_AQC_RULE_ACT_M);
+ else /* remove VSI from mirror rule */
+ mr_list[i] = CPU_TO_LE16(id);
+ }
+ }
+
+ cmd = &desc.params.add_update_rule;
+ if ((*rule_id) != ICE_INVAL_MIRROR_RULE_ID)
+ cmd->rule_id = CPU_TO_LE16(((*rule_id) & ICE_AQC_RULE_ID_M) |
+ ICE_AQC_RULE_ID_VALID_M);
+ cmd->rule_type = CPU_TO_LE16(rule_type & ICE_AQC_RULE_TYPE_M);
+ cmd->num_entries = CPU_TO_LE16(count);
+ cmd->dest = CPU_TO_LE16(dest_vsi);
+
+ status = ice_aq_send_cmd(hw, &desc, mr_list, buf_size, cd);
+ if (!status)
+ *rule_id = LE16_TO_CPU(cmd->rule_id) & ICE_AQC_RULE_ID_M;
+ ice_free(hw, mr_list);
+
+ return status;
+}
+
+/**
+ * ice_aq_delete_mir_rule - delete a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_id: Mirror rule ID (to be deleted)
+ * @keep_allocd: if set, the VSI stays part of the PF allocated res,
+ * otherwise it is returned to the shared pool
+ * @cd: pointer to command details structure or NULL
+ *
+ * Delete Mirror Rule (0x261).
+ */
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_delete_mir_rule *cmd;
+ struct ice_aq_desc desc;
+
+ /* rule_id should be in the range 0...63 */
+ if (rule_id >= ICE_MAX_NUM_MIRROR_RULES)
+ return ICE_ERR_OUT_OF_RANGE;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_del_mir_rule);
+
+ cmd = &desc.params.del_rule;
+ rule_id |= ICE_AQC_RULE_ID_VALID_M;
+ cmd->rule_id = CPU_TO_LE16(rule_id);
+
+ if (keep_allocd)
+ cmd->flags = CPU_TO_LE16(ICE_AQC_FLAG_KEEP_ALLOCD_M);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_aq_alloc_free_vsi_list
@@ -626,6 +793,67 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
return status;
}
+/**
+ * ice_aq_set_storm_ctrl - Sets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Sets the storm control configuration (0x0280)
+ */
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask)
+{
+ struct ice_aqc_storm_cfg *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.storm_conf;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_storm_cfg);
+
+ cmd->bcast_thresh_size = CPU_TO_LE32(bcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->mcast_thresh_size = CPU_TO_LE32(mcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->storm_ctrl_ctrl = CPU_TO_LE32(ctl_bitmask);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_aq_get_storm_ctrl - gets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Gets the storm control configuration (0x0281)
+ */
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask)
+{
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_storm_cfg);
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+ if (!status) {
+ struct ice_aqc_storm_cfg *resp = &desc.params.storm_conf;
+
+ if (bcast_thresh)
+ *bcast_thresh = LE32_TO_CPU(resp->bcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (mcast_thresh)
+ *mcast_thresh = LE32_TO_CPU(resp->mcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (ctl_bitmask)
+ *ctl_bitmask = LE32_TO_CPU(resp->storm_ctrl_ctrl);
+ }
+
+ return status;
+}
/**
* ice_aq_sw_rules - add/update/remove switch rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b28e55a4f..ebcfaa120 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -29,6 +29,19 @@ struct ice_vsi_ctx {
struct LIST_HEAD_TYPE rss_list_head;
};
+/* This is to be used by add/update mirror rule Admin Queue command */
+struct ice_mir_rule_buf {
+ u16 vsi_idx; /* VSI index */
+
+ /* For each VSI, user can specify whether corresponding VSI
+ * should be added/removed to/from mirror rule
+ *
+ * add mirror rule: this should always be TRUE.
+ * update mirror rule: add(true) or remove(false) VSI to/from
+ * mirror rule
+ */
+ u8 add;
+};
/* Switch recipe ID enum values are specific to hardware */
enum ice_sw_lkup_type {
@@ -290,6 +303,22 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id);
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask);
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask);
/* Switch config */
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 09/37] net/ice/base: add VSI queue context framework
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (7 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 08/37] net/ice/base: add more APIs in switch module Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 10/37] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
` (30 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Victor Raj
Added code to allocate VSI queue contexts to save the queue specific
information like bandwidth etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_sched.c | 52 +++++++++++++++++++++++++++++++++++----
drivers/net/ice/base/ice_switch.c | 26 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 8 ++++++
3 files changed, 81 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 237bf7350..ab6097237 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -576,6 +576,48 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
}
/**
+ * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ * @tc: TC number
+ * @new_numqs: number of queues
+ */
+static enum ice_status
+ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
+{
+ struct ice_vsi_ctx *vsi_ctx;
+ struct ice_q_ctx *q_ctx;
+
+ vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi_ctx)
+ return ICE_ERR_PARAM;
+ /* allocate LAN queue contexts */
+ if (!vsi_ctx->lan_q_ctx[tc]) {
+ vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!vsi_ctx->lan_q_ctx[tc])
+ return ICE_ERR_NO_MEMORY;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ return ICE_SUCCESS;
+ }
+ /* num queues are increased, update the queue contexts */
+ if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
+ u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
+
+ q_ctx = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!q_ctx)
+ return ICE_ERR_NO_MEMORY;
+ ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
+ prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
+ ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
+ vsi_ctx->lan_q_ctx[tc] = q_ctx;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
* ice_aq_rl_profile - performs a rate limiting task
* @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
@@ -1717,14 +1759,14 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
if (!vsi_ctx)
return ICE_ERR_PARAM;
- if (owner == ICE_SCHED_NODE_OWNER_LAN)
- prev_numqs = vsi_ctx->sched.max_lanq[tc];
- else
- return ICE_ERR_PARAM;
-
+ prev_numqs = vsi_ctx->sched.max_lanq[tc];
/* num queues are not changed or less than the previous number */
if (new_numqs <= prev_numqs)
return status;
+ status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
+ if (status)
+ return status;
+
if (new_numqs)
ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
/* Keep the max number of queue configuration all the time. Update the
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 34637c1be..4b53636b4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3,6 +3,8 @@
*/
#include "ice_switch.h"
+#include "ice_flex_type.h"
+#include "ice_flow.h"
#define ICE_ETH_DA_OFFSET 0
@@ -447,6 +449,27 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
}
/**
+ * ice_clear_vsi_q_ctx - clear VSI queue contexts for all TCs
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ */
+static void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ u8 i;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return;
+ ice_for_each_traffic_class(i) {
+ if (vsi->lan_q_ctx[i]) {
+ ice_free(hw, vsi->lan_q_ctx[i]);
+ vsi->lan_q_ctx[i] = NULL;
+ }
+ }
+}
+
+/**
* ice_clear_vsi_ctx - clear the VSI context entry
* @hw: pointer to the HW struct
* @vsi_handle: VSI handle
@@ -459,6 +482,9 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
vsi = ice_get_vsi_ctx(hw, vsi_handle);
if (vsi) {
+ if (!LIST_EMPTY(&vsi->rss_list_head))
+ ice_rem_all_rss_vsi_ctx(hw, vsi_handle);
+ ice_clear_vsi_q_ctx(hw, vsi_handle);
ice_destroy_lock(&vsi->rss_locks);
ice_free(hw, vsi);
hw->vsi_ctx[vsi_handle] = NULL;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index ebcfaa120..c6d31475c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -15,6 +15,12 @@
#define ICE_VSI_INVAL_ID 0xFFFF
+#define ICE_INVAL_Q_HANDLE 0xFFFF
+
+/* VSI queue context structure */
+struct ice_q_ctx {
+ u16 q_handle;
+};
/* VSI context structure for add/get/update/free operations */
struct ice_vsi_ctx {
@@ -25,6 +31,8 @@ struct ice_vsi_ctx {
struct ice_aqc_vsi_props info;
struct ice_sched_vsi_info sched;
u8 alloc_from_pool;
+ u16 num_lan_q_entries[ICE_MAX_TRAFFIC_CLASS];
+ struct ice_q_ctx *lan_q_ctx[ICE_MAX_TRAFFIC_CLASS];
struct ice_lock rss_locks; /* protect rss config in VSI ctx */
struct LIST_HEAD_TYPE rss_list_head;
};
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 10/37] net/ice/base: add APIs to add remove ethertype filter
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (8 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 09/37] net/ice/base: add VSI queue context framework Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 11/37] net/ice/base: add APIs to get allocated resources Qi Zhang
` (29 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Add API ice_remove_eth_mac and ice_add_eth_mac to support
adding / removing ethertype (or MAC) based filter rules.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 57 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 4 +++
2 files changed, 61 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4b53636b4..4af6a323c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2415,6 +2415,63 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
}
#endif
+/**
+ * ice_add_eth_mac - Add ethertype and MAC based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ether type MAC filter, MAC is optional
+ */
+enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr;
+
+ LIST_FOR_EACH_ENTRY(em_list_itr, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->fltr_info.flag = ICE_FLTR_TX;
+ em_list_itr->status = ice_add_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_remove_eth_mac - Remove an ethertype (or MAC) based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ethertype or ethertype MAC entries
+ */
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr, *tmp;
+
+ if (!em_list || !hw)
+ return ICE_ERR_PARAM;
+
+ LIST_FOR_EACH_ENTRY_SAFE(em_list_itr, tmp, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->status = ice_remove_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
/**
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index c6d31475c..f331621e1 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -347,6 +347,10 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#ifndef NO_MACVLAN_SUPPORT
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 11/37] net/ice/base: add APIs to get allocated resources
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (9 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 10/37] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 12/37] net/ice/base: add APIs to alloc/free VLAN resource counter Qi Zhang
` (28 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. ice_aq_get_res_alloc - get allocated resources.
2. ice_aq_get_res_descs - get allocated resource descriptors.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 53 +++++++++++++++++++++-
drivers/net/ice/base/ice_switch.c | 83 +++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 12 +++++
3 files changed, 147 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 724657af6..ca3d40c8b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -281,6 +281,34 @@ struct ice_aqc_get_sw_cfg_resp {
#define ICE_AQC_RES_TYPE_FLAG_DEDICATED 0x00
+#define ICE_AQC_RES_TYPE_S 0
+#define ICE_AQC_RES_TYPE_M (0x07F << ICE_AQC_RES_TYPE_S)
+
+/* Get Resource Allocation command (indirect 0x0204) */
+struct ice_aqc_get_res_alloc {
+ __le16 resp_elem_num; /* Used in response, reserved in command */
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Resource Allocation Response Buffer per response */
+struct ice_aqc_get_res_resp_elem {
+ __le16 res_type; /* Types defined above cmd 0x0204 */
+ __le16 total_capacity; /* Resources available to all PF's */
+ __le16 total_function; /* Resources allocated for a PF */
+ __le16 total_shared; /* Resources allocated as shared */
+ __le16 total_free; /* Resources un-allocated/not reserved by any PF */
+};
+
+/* Buffer for Get Resource command */
+struct ice_aqc_get_res_resp {
+ /* Number of resource entries to be calculated using
+ * datalen/sizeof(struct ice_aqc_cmd_resp)).
+ * Value of 'datalen' gets updated as part of response.
+ */
+ struct ice_aqc_get_res_resp_elem elem[1];
+};
/* Allocate Resources command (indirect 0x0208)
@@ -314,6 +342,28 @@ struct ice_aqc_alloc_free_res_elem {
};
+/* Get Allocated Resource Descriptors Command (indirect 0x020A) */
+struct ice_aqc_get_allocd_res_desc {
+ union {
+ struct {
+ __le16 res; /* Types defined above cmd 0x0204 */
+ __le16 first_desc;
+ __le32 reserved;
+ } cmd;
+ struct {
+ __le16 res;
+ __le16 next_desc;
+ __le16 num_desc;
+ __le16 reserved;
+ } resp;
+ } ops;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_get_allocd_res_desc_resp {
+ struct ice_aqc_res_elem elem[1];
+};
/* Add VSI (indirect 0x0210)
@@ -1912,7 +1962,6 @@ struct ice_aq_desc {
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
struct ice_aqc_rl_profile rl_profile;
-
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
@@ -1930,6 +1979,8 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_get_res_alloc get_res;
+ struct ice_aqc_get_allocd_res_desc get_res_desc;
struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4af6a323c..c985c1e31 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2042,6 +2042,89 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
return status;
}
+/**
+ * ice_aq_get_res_alloc - get allocated resources
+ * @hw: pointer to the HW struct
+ * @num_entries: pointer to u16 to store the number of resource entries returned
+ * @buf: pointer to user-supplied buffer
+ * @buf_size: size of buff
+ * @cd: pointer to command details structure or NULL
+ *
+ * The user-supplied buffer must be large enough to store the resource
+ * information for all resource types. Each resource type is an
+ * ice_aqc_get_res_resp_data_elem structure.
+ */
+enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_res_alloc *resp;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ if (!buf)
+ return ICE_ERR_BAD_PTR;
+
+ if (buf_size < ICE_AQ_GET_RES_ALLOC_BUF_LEN)
+ return ICE_ERR_INVAL_SIZE;
+
+ resp = &desc.params.get_res;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_res_alloc);
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+
+ if (!status && num_entries)
+ *num_entries = LE16_TO_CPU(resp->resp_elem_num);
+
+ return status;
+}
+
+/**
+ * ice_aq_get_res_descs - get allocated resource descriptors
+ * @hw: pointer to the hardware structure
+ * @num_entries: number of resource entries in buffer
+ * @buf: Indirect buffer to hold data parameters and response
+ * @buf_size: size of buffer for indirect commands
+ * @res_type: resource type
+ * @res_shared: is resource shared
+ * @desc_id: input - first desc ID to start; output - next desc ID
+ * @cd: pointer to command details structure or NULL
+ */
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_allocd_res_desc *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ ice_debug(hw, ICE_DBG_TRACE, "ice_aq_get_res_descs");
+
+ cmd = &desc.params.get_res_desc;
+
+ if (!buf)
+ return ICE_ERR_PARAM;
+
+ if (buf_size != (num_entries * sizeof(*buf)))
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_allocd_res_desc);
+
+ cmd->ops.cmd.res = CPU_TO_LE16(((res_type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | (res_shared ?
+ ICE_AQC_RES_TYPE_FLAG_SHARED : 0));
+ cmd->ops.cmd.first_desc = CPU_TO_LE16(*desc_id);
+
+ desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status)
+ *desc_id = LE16_TO_CPU(cmd->ops.resp.next_desc);
+
+ return status;
+}
/**
* ice_add_mac - Add a MAC address based filter rule
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index f331621e1..4b77d920f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -13,6 +13,10 @@
#define ICE_DFLT_VSI_INVAL 0xff
+/* Worst case buffer length for ice_aqc_opc_get_res_alloc */
+#define ICE_MAX_RES_TYPES 0x80
+#define ICE_AQ_GET_RES_ALLOC_BUF_LEN \
+ (ICE_MAX_RES_TYPES * sizeof(struct ice_aqc_get_res_resp_elem))
#define ICE_VSI_INVAL_ID 0xFFFF
#define ICE_INVAL_Q_HANDLE 0xFFFF
@@ -343,6 +347,14 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
enum ice_status
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 12/37] net/ice/base: add APIs to alloc/free VLAN resource counter
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (10 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 11/37] net/ice/base: add APIs to get allocated resources Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 13/37] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
` (27 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. ice_alloc_res_cntr - allocate resource counter
2. ice_free_res_cntr - free resource counter
3. ice_alloc_vlan_res_counter - allocate vlan resource counter
4. ice_free_vlan_res_counter - free vlan resource counter
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 97 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 6 +++
2 files changed, 103 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index c985c1e31..26fc0b46b 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3238,9 +3238,106 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_PROMISC_VLAN);
}
+/**
+ * ice_alloc_res_cntr - allocating resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries requested for FD resource type
+ * @counter_id: counter index returned by AQ call
+ */
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ /* Allocate resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (status)
+ goto exit;
+
+ *counter_id = LE16_TO_CPU(buf->elem[0].e.sw_resp);
+
+exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_free_res_cntr - free resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries to be freed for FD resource type
+ * @counter_id: counter ID resource which needs to be freed
+ */
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+ /* Free resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+ buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status)
+ ice_debug(hw, ICE_DBG_SW,
+ "counter resource could not be freed\n");
+
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_alloc_vlan_res_counter - obtain counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: returns counter index
+ */
+enum ice_status ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
+
+/**
+ * ice_free_vlan_res_counter - Free counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: counter index to be freed
+ */
+enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 4b77d920f..364083eb4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -338,6 +338,12 @@ enum ice_status
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
enum ice_status
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id);
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 13/37] net/ice/base: add APIs to get VSI promiscuous mode
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (11 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 12/37] net/ice/base: add APIs to alloc/free VLAN resource counter Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 14/37] net/ice/base: add MAC filter with marker and counter Qi Zhang
` (26 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. ice_get_vsi_promisc - get promiscuous mode of give VSI.
2. ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 79 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 7 ++++
2 files changed, 86 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 26fc0b46b..e4024a0b0 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2894,6 +2894,85 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
return promisc_mask;
}
+/**
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head,
+ ice_fltr_mgmt_list_entry, list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
/**
* ice_remove_promisc - Remove promisc based filter rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 364083eb4..0d70b38f4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -394,6 +394,13 @@ enum ice_status
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc);
+/* Get VSIs Promisc/defport settings */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 14/37] net/ice/base: add MAC filter with marker and counter
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (12 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 13/37] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 15/37] net/ice/base: add two helper functions for flow management Qi Zhang
` (25 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. ice_add_mac_with_sw_marker - add filter with software marker.
2. ice_add_mac_with_counter - add filter with counter enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 328 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 +
2 files changed, 333 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e4024a0b0..bfcb33ea6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1338,6 +1338,95 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
return status;
}
+/**
+ * ice_add_counter_act - add/update filter rule with counter action
+ * @hw: pointer to the hardware structure
+ * @m_ent: the management entry for which counter needs to be added
+ * @counter_id: VLAN counter ID returned as part of allocate resource
+ * @l_id: large action resource ID
+ */
+static enum ice_status
+ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
+ u16 counter_id, u16 l_id)
+{
+ struct ice_aqc_sw_rules_elem *lg_act;
+ struct ice_aqc_sw_rules_elem *rx_tx;
+ enum ice_status status;
+ /* 2 actions will be added while adding a large action counter */
+ const int num_acts = 2;
+ u16 lg_act_size;
+ u16 rules_size;
+ u16 f_rule_id;
+ u32 act;
+ u16 id;
+
+ if (m_ent->fltr_info.lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ /* Create two back-to-back switch rules and submit them to the HW using
+ * one memory buffer:
+ * 1. Large Action
+ * 2. Look up Tx Rx
+ */
+ lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts);
+ rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE;
+ lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
+ rules_size);
+ if (!lg_act)
+ return ICE_ERR_NO_MEMORY;
+
+ rx_tx = (struct ice_aqc_sw_rules_elem *)
+ ((u8 *)lg_act + lg_act_size);
+
+ /* Fill in the first switch rule i.e. large action */
+ lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT);
+ lg_act->pdata.lg_act.index = CPU_TO_LE16(l_id);
+ lg_act->pdata.lg_act.size = CPU_TO_LE16(num_acts);
+
+ /* First action VSI forwarding or VSI list forwarding depending on how
+ * many VSIs
+ */
+ id = (m_ent->vsi_count > 1) ? m_ent->fltr_info.fwd_id.vsi_list_id :
+ m_ent->fltr_info.fwd_id.hw_vsi_id;
+
+ act = ICE_LG_ACT_VSI_FORWARDING | ICE_LG_ACT_VALID_BIT;
+ act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) &
+ ICE_LG_ACT_VSI_LIST_ID_M;
+ if (m_ent->vsi_count > 1)
+ act |= ICE_LG_ACT_VSI_LIST;
+ lg_act->pdata.lg_act.act[0] = CPU_TO_LE32(act);
+
+ /* Second action counter ID */
+ act = ICE_LG_ACT_STAT_COUNT;
+ act |= (counter_id << ICE_LG_ACT_STAT_COUNT_S) &
+ ICE_LG_ACT_STAT_COUNT_M;
+ lg_act->pdata.lg_act.act[1] = CPU_TO_LE32(act);
+
+ /* call the fill switch rule to fill the lookup Tx Rx structure */
+ ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
+ ice_aqc_opc_update_sw_rules);
+
+ act = ICE_SINGLE_ACT_PTR;
+ act |= (l_id << ICE_SINGLE_ACT_PTR_VAL_S) & ICE_SINGLE_ACT_PTR_VAL_M;
+ rx_tx->pdata.lkup_tx_rx.act = CPU_TO_LE32(act);
+
+ /* Use the filter rule ID of the previously created rule with single
+ * act. Once the update happens, hardware will treat this as large
+ * action
+ */
+ f_rule_id = m_ent->fltr_info.fltr_rule_id;
+ rx_tx->pdata.lkup_tx_rx.index = CPU_TO_LE16(f_rule_id);
+
+ status = ice_aq_sw_rules(hw, lg_act, rules_size, 2,
+ ice_aqc_opc_update_sw_rules, NULL);
+ if (!status) {
+ m_ent->lg_act_idx = l_id;
+ m_ent->counter_index = counter_id;
+ }
+
+ ice_free(hw, lg_act);
+ return status;
+}
/**
* ice_create_vsi_list_map
@@ -3419,6 +3508,245 @@ enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
}
/**
+ * ice_alloc_res_lg_act - add large action resource
+ * @hw: pointer to the hardware structure
+ * @l_id: large action ID to fill it in
+ * @num_acts: number of actions to hold with a large action entry
+ */
+static enum ice_status
+ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ if (num_acts > ICE_MAX_LG_ACT || num_acts == 0)
+ return ICE_ERR_PARAM;
+
+ /* Allocate resource for large action */
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ sw_buf->num_elems = CPU_TO_LE16(1);
+
+ /* If num_acts is 1, use ICE_AQC_RES_TYPE_WIDE_TABLE_1.
+ * If num_acts is 2, use ICE_AQC_RES_TYPE_WIDE_TABLE_3.
+ * If num_acts is greater than 2, then use
+ * ICE_AQC_RES_TYPE_WIDE_TABLE_4.
+ * The num_acts cannot exceed 4. This was ensured at the
+ * beginning of the function.
+ */
+ if (num_acts == 1)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_1);
+ else if (num_acts == 2)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_2);
+ else
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_4);
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (!status)
+ *l_id = LE16_TO_CPU(sw_buf->elem[0].e.sw_resp);
+
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_add_mac_with_sw_marker - add filter with sw marker
+ * @hw: pointer to the hardware structure
+ * @f_info: filter info structure containing the MAC filter information
+ * @sw_marker: sw marker to tag the Rx descriptor with
+ */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exists;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (sw_marker == ICE_INVAL_SW_MARKER_ID)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+
+ INIT_LIST_HEAD(&l_head);
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ entry_exists = false;
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exists = true;
+ else if (ret)
+ return ret;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+ ice_acquire_lock(rule_lock);
+ /* Get the book keeping entry for the filter */
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry)
+ goto exit_error;
+
+ /* If counter action was enabled for this rule then don't enable
+ * sw marker large action
+ */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* if same marker was added before */
+ if (m_entry->sw_marker_id == sw_marker) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to hold large act. Three actions
+ * for marker based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 3);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the marker action */
+ ret = ice_add_marker_act(hw, m_entry, sw_marker, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exists)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
+ * ice_add_mac_with_counter - add filter with counter enabled
+ * @hw: pointer to the hardware structure
+ * @f_info: pointer to filter info structure containing the MAC filter
+ * information
+ */
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exist;
+ u16 counter_id;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ entry_exist = false;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+ INIT_LIST_HEAD(&l_head);
+
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exist = true;
+ else if (ret)
+ return ret;
+
+ ice_acquire_lock(rule_lock);
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry) {
+ ret = ICE_ERR_BAD_PTR;
+ goto exit_error;
+ }
+
+ /* Don't enable counter for a filter for which sw marker was enabled */
+ if (m_entry->sw_marker_id != ICE_INVAL_SW_MARKER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* If a counter was already enabled then don't need to add again */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to VLAN counter */
+ ret = ice_alloc_vlan_res_counter(hw, &counter_id);
+ if (ret)
+ goto exit_error;
+
+ /* Allocate a hardware table entry to hold large act. Two actions for
+ * counter based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 2);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the counter action */
+ ret = ice_add_counter_act(hw, m_entry, counter_id, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exist)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 0d70b38f4..b396a486c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -377,6 +377,11 @@ enum ice_status
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#endif /* !NO_MACVLAN_SUPPORT */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker);
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 15/37] net/ice/base: add two helper functions for flow management
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (13 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 14/37] net/ice/base: add MAC filter with marker and counter Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 16/37] net/ice/base: minor fix Qi Zhang
` (24 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. ice_rem_all_sw_rules_info - remove all switch rules.
2. ice_reply_all_fltr - replay all filters stored in book keeping list.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 107 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 2 +
2 files changed, 109 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index bfcb33ea6..a0c39b5d7 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2667,6 +2667,23 @@ ice_rem_sw_rule_info(struct ice_hw *hw, struct LIST_HEAD_TYPE *rule_head)
}
+/**
+ * ice_rem_all_sw_rules_info
+ * @hw: pointer to the hardware structure
+ */
+void ice_rem_all_sw_rules_info(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *rule_head;
+
+ rule_head = &sw->recp_list[i].filt_rules;
+ if (!sw->recp_list[i].adv_rule)
+ ice_rem_sw_rule_info(hw, rule_head);
+ }
+}
/**
* ice_cfg_dflt_vsi - change state of VSI to set/clear default
@@ -3747,6 +3764,96 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
}
/**
+ * ice_replay_fltr - Replay all the filters stored by a specific list head
+ * @hw: pointer to the hardware structure
+ * @list_head: list for which filters needs to be replayed
+ * @recp_id: Recipe ID for which rules need to be replayed
+ */
+static enum ice_status
+ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
+{
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE l_head;
+ enum ice_status status = ICE_SUCCESS;
+
+ if (LIST_EMPTY(list_head))
+ return status;
+
+ /* Move entries from the given list_head to a temporary l_head so that
+ * they can be replayed. Otherwise when trying to re-add the same
+ * filter, the function will return already exists
+ */
+ LIST_REPLACE_INIT(list_head, &l_head);
+
+ /* Mark the given list_head empty by reinitializing it so filters
+ * could be added again by *handler
+ */
+ LIST_FOR_EACH_ENTRY(itr, &l_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ struct ice_fltr_list_entry f_entry;
+
+ f_entry.fltr_info = itr->fltr_info;
+ if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) {
+ status = ice_add_rule_internal(hw, recp_id, &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ continue;
+ }
+
+ /* Add a filter per VSI separately */
+ while (1) {
+ u16 vsi_handle;
+
+ vsi_handle =
+ ice_find_first_bit(itr->vsi_list_info->vsi_map,
+ ICE_MAX_VSI);
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ break;
+
+ ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
+ f_entry.fltr_info.vsi_handle = vsi_handle;
+ f_entry.fltr_info.fwd_id.hw_vsi_id =
+ ice_get_hw_vsi_num(hw, vsi_handle);
+ f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
+ if (recp_id == ICE_SW_LKUP_VLAN)
+ status = ice_add_vlan_internal(hw, &f_entry);
+ else
+ status = ice_add_rule_internal(hw, recp_id,
+ &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ }
+ }
+end:
+ /* Clear the filter management list */
+ ice_rem_sw_rule_info(hw, &l_head);
+ return status;
+}
+
+/**
+ * ice_replay_all_fltr - replay all filters stored in bookkeeping lists
+ * @hw: pointer to the hardware structure
+ *
+ * NOTE: This function does not clean up partially added filters on error.
+ * It is up to caller of the function to issue a reset or fail early.
+ */
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ enum ice_status status = ICE_SUCCESS;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *head = &sw->recp_list[i].filt_rules;
+
+ status = ice_replay_fltr(hw, i, head);
+ if (status != ICE_SUCCESS)
+ return status;
+ }
+ return status;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b396a486c..3cc2c10e8 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -362,6 +362,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
+void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
@@ -409,6 +410,7 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
enum ice_status ice_init_def_sw_recp(struct ice_hw *hw);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 16/37] net/ice/base: minor fix
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (14 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 15/37] net/ice/base: add two helper functions for flow management Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 17/37] net/ice/base: update macros Qi Zhang
` (23 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. ICE_SW_LKUP_LAST need to be handled correctly in
ice_aq_alloc_free_vsi_list and ice_update_vsi_list_rule
2. ICE_SW_LKUP_ETHERTYPE_MAC need to be handled correctly in
ice_update_vsi_lkup_fltr
3. free package segment pointer during ice_deinit_hw
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 1 +
drivers/net/ice/base/ice_switch.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 015db11e0..4085ccc12 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -938,6 +938,7 @@ void ice_deinit_hw(struct ice_hw *hw)
ice_sched_cleanup_all(hw);
ice_sched_clear_agg(hw);
+ ice_free_seg(hw);
if (hw->port_info) {
ice_free(hw, hw->port_info);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a0c39b5d7..e47c1d845 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -792,7 +792,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN) {
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST) {
sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VSI_LIST_REP);
} else if (lkup_type == ICE_SW_LKUP_VLAN) {
sw_buf->res_type =
@@ -1492,7 +1493,8 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN)
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST)
type = remove ? ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR :
ICE_AQC_SW_RULES_T_VSI_LIST_SET;
else if (lkup_type == ICE_SW_LKUP_VLAN)
@@ -3388,6 +3390,8 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
break;
case ICE_SW_LKUP_ETHERTYPE:
case ICE_SW_LKUP_ETHERTYPE_MAC:
+ ice_remove_eth_mac(hw, &remove_list_head);
+ break;
case ICE_SW_LKUP_DFLT:
ice_debug(hw, ICE_DBG_SW,
"Remove filters for this lookup type hasn't been implemented yet\n");
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 17/37] net/ice/base: update macros
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (15 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 16/37] net/ice/base: minor fix Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 18/37] net/ice/base: code clean Qi Zhang
` (22 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Update macros for metadata and package flags.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 36 ++++++++---------
drivers/net/ice/base/ice_flow.h | 17 ++++++--
drivers/net/ice/base/ice_lan_tx_rx.h | 77 +++++++++++++++++++++++-------------
3 files changed, 80 insertions(+), 50 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4085ccc12..e0fe06e9c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -365,22 +365,22 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_FIN, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,
+ ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,
+ ICE_FLG_FIN, idx++);
/* flex flag 1 is not used for flexi-flag programming, skipping
* these four FLG64 bits.
*/
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100,
- ICE_RXFLG_EVLAN_x9100, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC,
- ICE_RXFLG_TNL0, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,
+ ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,
+ ICE_FLG_EVLAN_x9100, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,
+ ICE_FLG_TNL0, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);
break;
default:
@@ -399,17 +399,17 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
{
- enum ice_flex_rx_mdid mdid;
+ enum ice_flex_mdid mdid;
switch (prof_id) {
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?
- ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;
+ ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH;
ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 265e1ee3e..3db10cd6f 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -278,14 +278,23 @@ enum ice_flow_action_type {
ICE_FLOW_ACT_NOP,
ICE_FLOW_ACT_ALLOW,
ICE_FLOW_ACT_DROP,
- ICE_FLOW_ACT_COUNT,
+ ICE_FLOW_ACT_CNTR_PKT,
ICE_FLOW_ACT_FWD_VSI,
ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
- ICE_FLOW_ACTION_PUSH,
- ICE_FLOW_ACTION_POP,
- ICE_FLOW_ACTION_MODIFY,
+ ICE_FLOW_ACT_PUSH,
+ ICE_FLOW_ACT_POP,
+ ICE_FLOW_ACT_MODIFY,
+ ICE_FLOW_ACT_CNTR_BYTES,
+ ICE_FLOW_ACT_CNTR_PKT_BYTES,
+ ICE_FLOW_ACT_GENERIC_0,
+ ICE_FLOW_ACT_GENERIC_1,
+ ICE_FLOW_ACT_GENERIC_2,
+ ICE_FLOW_ACT_GENERIC_3,
+ ICE_FLOW_ACT_GENERIC_4,
+ ICE_FLOW_ACT_RPT_FLOW_ID,
+ ICE_FLOW_ACT_BUILD_PROF_IDX,
};
struct ice_flow_action {
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 4a1ea0c7d..b1963b5eb 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -627,39 +627,60 @@ enum ice_flex_opcode {
ICE_RX_OPC_PROTID
};
-/* Receive Descriptor MDID values */
-enum ice_flex_rx_mdid {
- ICE_RX_MDID_FLOW_ID_LOWER = 5,
- ICE_RX_MDID_FLOW_ID_HIGH,
- ICE_RX_MDID_DST_VSI = 13,
- ICE_RX_MDID_SRC_VSI = 19,
- ICE_RX_MDID_HASH_LOW = 56,
- ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR0 = ICE_RX_MDID_HASH_LOW,
- ICE_RX_MDID_ACL_CTR1 = ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR2 = 59
+/* Receive Descriptor MDID values that access packet flags */
+enum ice_flex_mdid_pkt_flags {
+ ICE_RX_MDID_PKT_FLAGS_15_0 = 20,
+ ICE_RX_MDID_PKT_FLAGS_31_16,
+ ICE_RX_MDID_PKT_FLAGS_47_32,
+ ICE_RX_MDID_PKT_FLAGS_63_48,
+};
+
+/* Generic descriptor MDID values */
+enum ice_flex_mdid {
+ ICE_MDID_GENERIC_WORD_0,
+ ICE_MDID_GENERIC_WORD_1,
+ ICE_MDID_GENERIC_WORD_2,
+ ICE_MDID_GENERIC_WORD_3,
+ ICE_MDID_GENERIC_WORD_4,
+ ICE_MDID_FLOW_ID_LOWER,
+ ICE_MDID_FLOW_ID_HIGH,
+ ICE_MDID_RX_DESCR_PROF_IDX,
+ ICE_MDID_RX_PKT_DROP,
+ ICE_MDID_RX_DST_Q = 12,
+ ICE_MDID_RX_DST_VSI,
+ ICE_MDID_SRC_VSI = 19,
+ ICE_MDID_ACL_NOP = 55,
+ /* Entry 56 */
+ ICE_MDID_RX_HASH_LOW,
+ ICE_MDID_ACL_CNTR_PKT = ICE_MDID_RX_HASH_LOW,
+ /* Entry 57 */
+ ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_BYTES = ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_PKT_BYTES
};
/* for ice_32byte_rx_flex_desc.mir_id_umb_cast member */
#define ICE_RX_FLEX_DESC_MIRROR_M (0x3F) /* 6-bits */
-/* Rx Flag64 packet flag bits */
-enum ice_rx_flg64_bits {
- ICE_RXFLG_PKT_DSI = 0,
- ICE_RXFLG_EVLAN_x8100 = 15,
- ICE_RXFLG_EVLAN_x9100,
- ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_MAC = 22,
- ICE_RXFLG_TNL_VLAN,
- ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_FIN = 32,
- ICE_RXFLG_SYN,
- ICE_RXFLG_RST,
- ICE_RXFLG_TNL0 = 38,
- ICE_RXFLG_TNL1,
- ICE_RXFLG_TNL2,
- ICE_RXFLG_UDP_GRE,
- ICE_RXFLG_RSVD = 63
+/* Rx/Tx Flag64 packet flag bits */
+enum ice_flg64_bits {
+ ICE_FLG_PKT_DSI = 0,
+ /* If there is a 1 in this bit position then that means Rx packet */
+ ICE_FLG_PKT_DIR = 4,
+ ICE_FLG_EVLAN_x8100 = 15,
+ ICE_FLG_EVLAN_x9100,
+ ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_MAC = 22,
+ ICE_FLG_TNL_VLAN,
+ ICE_FLG_PKT_FRG,
+ ICE_FLG_FIN = 32,
+ ICE_FLG_SYN,
+ ICE_FLG_RST,
+ ICE_FLG_TNL0 = 38,
+ ICE_FLG_TNL1,
+ ICE_FLG_TNL2,
+ ICE_FLG_UDP_GRE,
+ ICE_FLG_RSVD = 63
};
enum ice_rx_flex_desc_umb_cast_bits { /* field is 2 bits long */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 18/37] net/ice/base: code clean
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (16 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 17/37] net/ice/base: update macros Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 19/37] net/ice/base: enable VSI queue context Qi Zhang
` (21 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Change below function as static and also relocated code line
to align with kernel driver.
ice_aq_move_sched_elems
ice_sched_get_agg_node
ice_sched_set_node_bw_lmt
ice_sched_cfg_node_bw_alloc
ice_sched_add_agg_cfg
ice_sched_rm_agg_cfg
ice_sched_move_vsi_to_agg
ice_sched_del_rl_profile
ice_sched_rm_unused_rl_prof
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_sched.c | 1038 +++++++++++++++++++-------------------
drivers/net/ice/base/ice_sched.h | 24 -
2 files changed, 519 insertions(+), 543 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index ab6097237..2dd9f6f6c 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -462,7 +462,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
*
* Move scheduling elements (0x0408)
*/
-enum ice_status
+static enum ice_status
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd)
@@ -713,6 +713,41 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
+ * ice_sched_del_rl_profile - remove RL profile
+ * @hw: pointer to the HW struct
+ * @rl_info: rate limit profile information
+ *
+ * If the profile ID is not referenced anymore, it removes profile ID with
+ * its associated parameters from HW DB,and locally. The caller needs to
+ * hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_del_rl_profile(struct ice_hw *hw,
+ struct ice_aqc_rl_profile_info *rl_info)
+{
+ struct ice_aqc_rl_profile_generic_elem *buf;
+ u16 num_profiles_removed;
+ enum ice_status status;
+ u16 num_profiles = 1;
+
+ if (rl_info->prof_id_ref != 0)
+ return ICE_ERR_IN_USE;
+
+ /* Safe to remove profile ID */
+ buf = (struct ice_aqc_rl_profile_generic_elem *)
+ &rl_info->profile;
+ status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
+ &num_profiles_removed, NULL);
+ if (status || num_profiles_removed != num_profiles)
+ return ICE_ERR_CFG;
+
+ /* Delete stale entry now */
+ LIST_DEL(&rl_info->list_entry);
+ ice_free(hw, rl_info);
+ return status;
+}
+
+/**
* ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
@@ -1468,7 +1503,7 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
* This function retrieves an aggregator node for a given aggregator ID from
* a given TC branch
*/
-struct ice_sched_node *
+static struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u32 agg_id)
{
@@ -2071,6 +2106,220 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
+ * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
+ * @hw: pointer to the HW struct
+ * @node: pointer to a child node
+ * @num_nodes: num nodes count array
+ *
+ * This function walks through the aggregator subtree to find a free parent
+ * node
+ */
+static struct ice_sched_node *
+ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
+ u16 *num_nodes)
+{
+ u8 l = node->tx_sched_layer;
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(hw);
+
+ /* Is it VSI parent layer ? */
+ if (l == vsil - 1)
+ return (node->num_children < hw->max_children[l]) ? node : NULL;
+
+ /* We have intermediate nodes. Let's walk through the subtree. If the
+ * intermediate node has space to add a new node then clear the count
+ */
+ if (node->num_children < hw->max_children[l])
+ num_nodes[l] = 0;
+ /* The below recursive call is intentional and wouldn't go more than
+ * 2 or 3 iterations.
+ */
+
+ for (i = 0; i < node->num_children; i++) {
+ struct ice_sched_node *parent;
+
+ parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
+ num_nodes);
+ if (parent)
+ return parent;
+ }
+
+ return NULL;
+}
+
+/**
+ * ice_sched_update_parent - update the new parent in SW DB
+ * @new_parent: pointer to a new parent node
+ * @node: pointer to a child node
+ *
+ * This function removes the child from the old parent and adds it to a new
+ * parent
+ */
+static void
+ice_sched_update_parent(struct ice_sched_node *new_parent,
+ struct ice_sched_node *node)
+{
+ struct ice_sched_node *old_parent;
+ u8 i, j;
+
+ old_parent = node->parent;
+
+ /* update the old parent children */
+ for (i = 0; i < old_parent->num_children; i++)
+ if (old_parent->children[i] == node) {
+ for (j = i + 1; j < old_parent->num_children; j++)
+ old_parent->children[j - 1] =
+ old_parent->children[j];
+ old_parent->num_children--;
+ break;
+ }
+
+ /* now move the node to a new parent */
+ new_parent->children[new_parent->num_children++] = node;
+ node->parent = new_parent;
+ node->info.parent_teid = new_parent->info.node_teid;
+}
+
+/**
+ * ice_sched_move_nodes - move child nodes to a given parent
+ * @pi: port information structure
+ * @parent: pointer to parent node
+ * @num_items: number of child nodes to be moved
+ * @list: pointer to child node teids
+ *
+ * This function move the child nodes to a given parent.
+ */
+static enum ice_status
+ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
+ u16 num_items, u32 *list)
+{
+ struct ice_aqc_move_elem *buf;
+ struct ice_sched_node *node;
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw;
+ u16 grps_movd = 0;
+ u8 i;
+
+ hw = pi->hw;
+
+ if (!parent || !num_items)
+ return ICE_ERR_PARAM;
+
+ /* Does parent have enough space */
+ if (parent->num_children + num_items >=
+ hw->max_children[parent->tx_sched_layer])
+ return ICE_ERR_AQ_FULL;
+
+ buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ for (i = 0; i < num_items; i++) {
+ node = ice_sched_find_node_by_teid(pi->root, list[i]);
+ if (!node) {
+ status = ICE_ERR_PARAM;
+ goto move_err_exit;
+ }
+
+ buf->hdr.src_parent_teid = node->info.parent_teid;
+ buf->hdr.dest_parent_teid = parent->info.node_teid;
+ buf->teid[0] = node->info.node_teid;
+ buf->hdr.num_elems = CPU_TO_LE16(1);
+ status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
+ &grps_movd, NULL);
+ if (status && grps_movd != 1) {
+ status = ICE_ERR_CFG;
+ goto move_err_exit;
+ }
+
+ /* update the SW DB */
+ ice_sched_update_parent(parent, node);
+ }
+
+move_err_exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_sched_move_vsi_to_agg - move VSI to aggregator node
+ * @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function moves a VSI to an aggregator node or its subtree.
+ * Intermediate nodes may be created if required.
+ */
+static enum ice_status
+ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
+ u8 tc)
+{
+ struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ u32 first_node_teid, vsi_teid;
+ enum ice_status status;
+ u16 num_nodes_added;
+ u8 aggl, vsil, i;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
+ if (!vsi_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ aggl = ice_sched_get_agg_layer(pi->hw);
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+
+ /* set intermediate node count to 1 between aggregator and VSI layers */
+ for (i = aggl + 1; i < vsil; i++)
+ num_nodes[i] = 1;
+
+ /* Check if the aggregator subtree has any free node to add the VSI */
+ for (i = 0; i < agg_node->num_children; i++) {
+ parent = ice_sched_get_free_vsi_parent(pi->hw,
+ agg_node->children[i],
+ num_nodes);
+ if (parent)
+ goto move_nodes;
+ }
+
+ /* add new nodes */
+ parent = agg_node;
+ for (i = aggl + 1; i < vsil; i++) {
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added)
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ else
+ parent = parent->children[0];
+
+ if (!parent)
+ return ICE_ERR_CFG;
+ }
+
+move_nodes:
+ vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
+ return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
+}
+
+/**
* ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
@@ -2114,20 +2363,89 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
* @pi: port information structure
- * @agg_info: aggregator ID
- * @tc: TC number
- * @rm_vsi_info: bool value true or false
+ * @node: node pointer
*
- * This function removes aggregator reference to VSI of given TC. It removes
- * the aggregator configuration completely for requested TC. The caller needs
- * to hold the scheduler lock.
+ * This function checks whether the aggregator is attached with any VSI or not.
*/
-static enum ice_status
-ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
- u8 tc, bool rm_vsi_info)
-{
+static bool
+ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
+{
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+ if (node->tx_sched_layer < vsil - 1) {
+ for (i = 0; i < node->num_children; i++)
+ if (ice_sched_is_agg_inuse(pi, node->children[i]))
+ return true;
+ return false;
+ } else {
+ return node->num_children ? true : false;
+ }
+}
+
+/**
+ * ice_sched_rm_agg_cfg - remove the aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function removes the aggregator node and intermediate nodes if any
+ * from the given TC
+ */
+static enum ice_status
+ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *tc_node, *agg_node;
+ struct ice_hw *hw = pi->hw;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ /* Can't remove the aggregator node if it has children */
+ if (ice_sched_is_agg_inuse(pi, agg_node))
+ return ICE_ERR_IN_USE;
+
+ /* need to remove the whole subtree if aggregator node is the
+ * only child.
+ */
+ while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
+ struct ice_sched_node *parent = agg_node->parent;
+
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ if (parent->num_children > 1)
+ break;
+
+ agg_node = parent;
+ }
+
+ ice_free_sched_node(pi, agg_node);
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * @pi: port information structure
+ * @agg_info: aggregator ID
+ * @tc: TC number
+ * @rm_vsi_info: bool value true or false
+ *
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
+ */
+static enum ice_status
+ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
+ u8 tc, bool rm_vsi_info)
+{
enum ice_status status = ICE_SUCCESS;
/* If nothing to remove - return success */
@@ -2172,6 +2490,89 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_add_agg_cfg - create an aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function creates an aggregator node and intermediate nodes if required
+ * for the given TC
+ */
+static enum ice_status
+ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *parent, *agg_node, *tc_node;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw = pi->hw;
+ u32 first_node_teid;
+ u16 num_nodes_added;
+ u8 i, aggl;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ /* Does Agg node already exist ? */
+ if (agg_node)
+ return status;
+
+ aggl = ice_sched_get_agg_layer(hw);
+
+ /* need one node in Agg layer */
+ num_nodes[aggl] = 1;
+
+ /* Check whether the intermediate nodes have space to add the
+ * new aggregator. If they are full, then SW needs to allocate a new
+ * intermediate node on those layers
+ */
+ for (i = hw->sw_entry_point_layer; i < aggl; i++) {
+ parent = ice_sched_get_first_node(hw, tc_node, i);
+
+ /* scan all the siblings */
+ while (parent) {
+ if (parent->num_children < hw->max_children[i])
+ break;
+ parent = parent->sibling;
+ }
+
+ /* all the nodes are full, reserve one for this layer */
+ if (!parent)
+ num_nodes[i]++;
+ }
+
+ /* add the aggregator node */
+ parent = tc_node;
+ for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added) {
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ /* register aggregator ID with the aggregator node */
+ if (parent && i == aggl)
+ parent->agg_id = agg_id;
+ } else {
+ parent = parent->children[0];
+ }
+ }
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
* @agg_id: aggregator ID
@@ -2406,6 +2807,109 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_rm_unused_rl_prof - remove unused RL profile
+ * @pi: port information structure
+ *
+ * This function removes unused rate limit profiles from the HW and
+ * SW DB. The caller needs to hold scheduler lock.
+ */
+static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
+{
+ u8 ln;
+
+ for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+ struct ice_aqc_rl_profile_info *rl_prof_elem;
+ struct ice_aqc_rl_profile_info *rl_prof_tmp;
+
+ LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
+ &pi->rl_prof_list[ln],
+ ice_aqc_rl_profile_info, list_entry) {
+ if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
+ ice_debug(pi->hw, ICE_DBG_SCHED,
+ "Removed rl profile\n");
+ }
+ }
+}
+
+/**
+ * ice_sched_update_elem - update element
+ * @hw: pointer to the HW struct
+ * @node: pointer to node
+ * @info: node info to update
+ *
+ * It updates the HW DB, and local SW DB of node. It updates the scheduling
+ * parameters of node from argument info data buffer (Info->data buf) and
+ * returns success or error on config sched element failure. The caller
+ * needs to hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
+ struct ice_aqc_txsched_elem_data *info)
+{
+ struct ice_aqc_conf_elem buf;
+ enum ice_status status;
+ u16 elem_cfgd = 0;
+ u16 num_elems = 1;
+
+ buf.generic[0] = *info;
+ /* Parent TEID is reserved field in this aq call */
+ buf.generic[0].parent_teid = 0;
+ /* Element type is reserved field in this aq call */
+ buf.generic[0].data.elem_type = 0;
+ /* Flags is reserved field in this aq call */
+ buf.generic[0].data.flags = 0;
+
+ /* Update HW DB */
+ /* Configure element node */
+ status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
+ &elem_cfgd, NULL);
+ if (status || elem_cfgd != num_elems) {
+ ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
+ return ICE_ERR_CFG;
+ }
+
+ /* Config success case */
+ /* Now update local SW DB */
+ /* Only copy the data portion of info buffer */
+ node->info.data = info->data;
+ return status;
+}
+
+/**
+ * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
+ * @hw: pointer to the HW struct
+ * @node: sched node to configure
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @bw_alloc: BW weight/allocation
+ *
+ * This function configures node element's BW allocation.
+ */
+static enum ice_status
+ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
+ enum ice_rl_type rl_type, u8 bw_alloc)
+{
+ struct ice_aqc_txsched_elem_data buf;
+ struct ice_aqc_txsched_elem *data;
+ enum ice_status status;
+
+ buf = node->info;
+ data = &buf.data;
+ if (rl_type == ICE_MIN_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
+ data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else if (rl_type == ICE_MAX_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
+ data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else {
+ return ICE_ERR_PARAM;
+ }
+
+ /* Configure element */
+ status = ice_sched_update_elem(hw, node, &buf);
+ return status;
+}
+
+/**
* ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
* @agg_id: aggregator ID
@@ -3372,110 +3876,6 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
}
/**
- * ice_sched_del_rl_profile - remove rl profile
- * @hw: pointer to the hw struct
- * @rl_info: rate limit profile information
- *
- * If the profile id is not referenced anymore, it removes profile id with
- * its associated parameters from hw db,and locally. The caller needs to
- * hold scheduler lock.
- */
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info)
-{
- struct ice_aqc_rl_profile_generic_elem *buf;
- u16 num_profiles_removed;
- enum ice_status status;
- u16 num_profiles = 1;
-
- if (rl_info->prof_id_ref != 0)
- return ICE_ERR_IN_USE;
-
- /* Safe to remove profile id */
- buf = (struct ice_aqc_rl_profile_generic_elem *)
- &rl_info->profile;
- status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
- &num_profiles_removed, NULL);
- if (status || num_profiles_removed != num_profiles)
- return ICE_ERR_CFG;
-
- /* Delete stale entry now */
- LIST_DEL(&rl_info->list_entry);
- ice_free(hw, rl_info);
- return status;
-}
-
-/**
- * ice_sched_rm_unused_rl_prof - remove unused rl profile
- * @pi: port information structure
- *
- * This function removes unused rate limit profiles from the hw and
- * SW DB. The caller needs to hold scheduler lock.
- */
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
-{
- u8 ln;
-
- for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
- struct ice_aqc_rl_profile_info *rl_prof_elem;
- struct ice_aqc_rl_profile_info *rl_prof_tmp;
-
- LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
- &pi->rl_prof_list[ln],
- ice_aqc_rl_profile_info, list_entry) {
- if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
- ice_debug(pi->hw, ICE_DBG_SCHED,
- "Removed rl profile\n");
- }
- }
-}
-
-/**
- * ice_sched_update_elem - update element
- * @hw: pointer to the hw struct
- * @node: pointer to node
- * @info: node info to update
- *
- * It updates the HW DB, and local SW DB of node. It updates the scheduling
- * parameters of node from argument info data buffer (Info->data buf) and
- * returns success or error on config sched element failure. The caller
- * needs to hold scheduler lock.
- */
-static enum ice_status
-ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
- struct ice_aqc_txsched_elem_data *info)
-{
- struct ice_aqc_conf_elem buf;
- enum ice_status status;
- u16 elem_cfgd = 0;
- u16 num_elems = 1;
-
- buf.generic[0] = *info;
- /* Parent teid is reserved field in this aq call */
- buf.generic[0].parent_teid = 0;
- /* Element type is reserved field in this aq call */
- buf.generic[0].data.elem_type = 0;
- /* Flags is reserved field in this aq call */
- buf.generic[0].data.flags = 0;
-
- /* Update HW DB */
- /* Configure element node */
- status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
- &elem_cfgd, NULL);
- if (status || elem_cfgd != num_elems) {
- ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
- return ICE_ERR_CFG;
- }
-
- /* Config success case */
- /* Now update local SW DB */
- /* Only copy the data portion of info buffer */
- node->info.data = info->data;
- return status;
-}
-
-/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
* @hw: pointer to the HW struct
* @node: sched node to configure
@@ -3841,7 +4241,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
* It updates node's BW limit parameters like BW RL profile ID of type CIR,
* EIR, or SRL. The caller needs to hold scheduler lock.
*/
-enum ice_status
+static enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4588,7 +4988,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
/**
* ice_sched_cfg_sibl_node_prio - configure node sibling priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: sibling priority
*
@@ -4617,406 +5017,6 @@ ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_cfg_node_bw_alloc - configure node bw weight/alloc params
- * @hw: pointer to the hw struct
- * @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @bw_alloc: bw weight/allocation
- *
- * This function configures node element's bw allocation.
- */
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc)
-{
- struct ice_aqc_txsched_elem_data buf;
- struct ice_aqc_txsched_elem *data;
- enum ice_status status;
-
- buf = node->info;
- data = &buf.data;
- if (rl_type == ICE_MIN_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
- data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else if (rl_type == ICE_MAX_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
- data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else {
- return ICE_ERR_PARAM;
- }
-
- /* Configure element */
- status = ice_sched_update_elem(hw, node, &buf);
- return status;
-}
-
-/**
- * ice_sched_add_agg_cfg - create an aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function creates an aggregator node and intermediate nodes if required
- * for the given TC
- */
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *parent, *agg_node, *tc_node;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw = pi->hw;
- u32 first_node_teid;
- u16 num_nodes_added;
- u8 i, aggl;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- /* Does Agg node already exist ? */
- if (agg_node)
- return status;
-
- aggl = ice_sched_get_agg_layer(hw);
-
- /* need one node in Agg layer */
- num_nodes[aggl] = 1;
-
- /* Check whether the intermediate nodes have space to add the
- * new agg. If they are full, then SW needs to allocate a new
- * intermediate node on those layers
- */
- for (i = hw->sw_entry_point_layer; i < aggl; i++) {
- parent = ice_sched_get_first_node(hw, tc_node, i);
-
- /* scan all the siblings */
- while (parent) {
- if (parent->num_children < hw->max_children[i])
- break;
- parent = parent->sibling;
- }
-
- /* all the nodes are full, reserve one for this layer */
- if (!parent)
- num_nodes[i]++;
- }
-
- /* add the agg node */
- parent = tc_node;
- for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
- if (!parent)
- return ICE_ERR_CFG;
-
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added) {
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- /* register the aggregator id with the agg node */
- if (parent && i == aggl)
- parent->agg_id = agg_id;
- } else {
- parent = parent->children[0];
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_is_agg_inuse - check whether the agg is in use or not
- * @pi: port information structure
- * @node: node pointer
- *
- * This function checks whether the agg is attached with any vsi or not.
- */
-static bool
-ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
-{
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(pi->hw);
- if (node->tx_sched_layer < vsil - 1) {
- for (i = 0; i < node->num_children; i++)
- if (ice_sched_is_agg_inuse(pi, node->children[i]))
- return true;
- return false;
- } else {
- return node->num_children ? true : false;
- }
-}
-
-/**
- * ice_sched_rm_agg_cfg - remove the aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function removes the aggregator node and intermediate nodes if any
- * from the given TC
- */
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *tc_node, *agg_node;
- struct ice_hw *hw = pi->hw;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- /* Can't remove the agg node if it has children */
- if (ice_sched_is_agg_inuse(pi, agg_node))
- return ICE_ERR_IN_USE;
-
- /* need to remove the whole subtree if agg node is the
- * only child.
- */
- while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
- struct ice_sched_node *parent = agg_node->parent;
-
- if (!parent)
- return ICE_ERR_CFG;
-
- if (parent->num_children > 1)
- break;
-
- agg_node = parent;
- }
-
- ice_free_sched_node(pi, agg_node);
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_get_free_vsi_parent - Find a free parent node in agg subtree
- * @hw: pointer to the hw struct
- * @node: pointer to a child node
- * @num_nodes: num nodes count array
- *
- * This function walks through the aggregator subtree to find a free parent
- * node
- */
-static struct ice_sched_node *
-ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
- u16 *num_nodes)
-{
- u8 l = node->tx_sched_layer;
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(hw);
-
- /* Is it VSI parent layer ? */
- if (l == vsil - 1)
- return (node->num_children < hw->max_children[l]) ? node : NULL;
-
- /* We have intermediate nodes. Let's walk through the subtree. If the
- * intermediate node has space to add a new node then clear the count
- */
- if (node->num_children < hw->max_children[l])
- num_nodes[l] = 0;
- /* The below recursive call is intentional and wouldn't go more than
- * 2 or 3 iterations.
- */
-
- for (i = 0; i < node->num_children; i++) {
- struct ice_sched_node *parent;
-
- parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
- num_nodes);
- if (parent)
- return parent;
- }
-
- return NULL;
-}
-
-/**
- * ice_sched_update_new_parent - update the new parent in SW DB
- * @new_parent: pointer to a new parent node
- * @node: pointer to a child node
- *
- * This function removes the child from the old parent and adds it to a new
- * parent
- */
-static void
-ice_sched_update_parent(struct ice_sched_node *new_parent,
- struct ice_sched_node *node)
-{
- struct ice_sched_node *old_parent;
- u8 i, j;
-
- old_parent = node->parent;
-
- /* update the old parent children */
- for (i = 0; i < old_parent->num_children; i++)
- if (old_parent->children[i] == node) {
- for (j = i + 1; j < old_parent->num_children; j++)
- old_parent->children[j - 1] =
- old_parent->children[j];
- old_parent->num_children--;
- break;
- }
-
- /* now move the node to a new parent */
- new_parent->children[new_parent->num_children++] = node;
- node->parent = new_parent;
- node->info.parent_teid = new_parent->info.node_teid;
-}
-
-/**
- * ice_sched_move_nodes - move child nodes to a given parent
- * @pi: port information structure
- * @parent: pointer to parent node
- * @num_items: number of child nodes to be moved
- * @list: pointer to child node teids
- *
- * This function move the child nodes to a given parent.
- */
-static enum ice_status
-ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
- u16 num_items, u32 *list)
-{
- struct ice_aqc_move_elem *buf;
- struct ice_sched_node *node;
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw;
- u16 grps_movd = 0;
- u8 i;
-
- hw = pi->hw;
-
- if (!parent || !num_items)
- return ICE_ERR_PARAM;
-
- /* Does parent have enough space */
- if (parent->num_children + num_items >=
- hw->max_children[parent->tx_sched_layer])
- return ICE_ERR_AQ_FULL;
-
- buf = (struct ice_aqc_move_elem *) ice_malloc(hw, sizeof(*buf));
- if (!buf)
- return ICE_ERR_NO_MEMORY;
-
- for (i = 0; i < num_items; i++) {
- node = ice_sched_find_node_by_teid(pi->root, list[i]);
- if (!node) {
- status = ICE_ERR_PARAM;
- goto move_err_exit;
- }
-
- buf->hdr.src_parent_teid = node->info.parent_teid;
- buf->hdr.dest_parent_teid = parent->info.node_teid;
- buf->teid[0] = node->info.node_teid;
- buf->hdr.num_elems = CPU_TO_LE16(1);
- status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
- &grps_movd, NULL);
- if (status && grps_movd != 1) {
- status = ICE_ERR_CFG;
- goto move_err_exit;
- }
-
- /* update the SW DB */
- ice_sched_update_parent(parent, node);
- }
-
-move_err_exit:
- ice_free(hw, buf);
- return status;
-}
-
-/**
- * ice_sched_move_vsi_to_agg - move VSI to aggregator node
- * @pi: port information structure
- * @vsi_handle: software VSI handle
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function moves a VSI to an aggregator node or its subtree.
- * Intermediate nodes may be created if required.
- */
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc)
-{
- struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- u32 first_node_teid, vsi_teid;
- enum ice_status status;
- u16 num_nodes_added;
- u8 aggl, vsil, i;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
- if (!vsi_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- aggl = ice_sched_get_agg_layer(pi->hw);
- vsil = ice_sched_get_vsi_layer(pi->hw);
-
- /* initialize intermediate node count to 1 between agg and VSI layers */
- for (i = aggl + 1; i < vsil; i++)
- num_nodes[i] = 1;
-
- /* Check whether the agg subtree has any free node to add the VSI */
- for (i = 0; i < agg_node->num_children; i++) {
- parent = ice_sched_get_free_vsi_parent(pi->hw,
- agg_node->children[i],
- num_nodes);
- if (parent)
- goto move_nodes;
- }
-
- /* add new nodes */
- parent = agg_node;
- for (i = aggl + 1; i < vsil; i++) {
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added)
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- else
- parent = parent->children[0];
-
- if (!parent)
- return ICE_ERR_CFG;
- }
-
-move_nodes:
- vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
- return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
-}
-
-/**
* ice_cfg_rl_burst_size - Set burst size value
* @hw: pointer to the HW struct
* @bytes: burst size in bytes
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 61fa6a85b..09de765ff 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -76,10 +76,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
-ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
- struct ice_aqc_move_elem *buf, u16 buf_size,
- u16 *grps_movd, struct ice_sq_cd *cd);
-enum ice_status
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_get_elem *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd);
@@ -109,9 +105,6 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable);
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
struct ice_sched_node *
-ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
- u32 agg_id);
-struct ice_sched_node *
ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u16 vsi_handle);
bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
@@ -177,9 +170,6 @@ bool
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
struct ice_sched_node *node);
enum ice_status
-ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u32 bw);
-enum ice_status
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -193,18 +183,4 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);
enum ice_status
ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
u8 priority);
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc);
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc);
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info);
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi);
#endif /* _ICE_SCHED_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 19/37] net/ice/base: enable VSI queue context
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (17 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 18/37] net/ice/base: code clean Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 20/37] net/ice/base: ensure only valid bits are set Qi Zhang
` (20 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Victor Raj
The patch added to retrieve the queue context and update the queue
handle for lan queues.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 60 ++++++++++++++++++++++++++++++++++++---
drivers/net/ice/base/ice_common.h | 11 +++----
drivers/net/ice/ice_rxtx.c | 11 +++++--
3 files changed, 70 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e0fe06e9c..f5cbd47c3 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3512,10 +3512,35 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
}
/**
+ * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
+ * @q_handle: software queue handle
+ */
+static struct ice_q_ctx *
+ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ struct ice_q_ctx *q_ctx;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return NULL;
+ if (q_handle >= vsi->num_lan_q_entries[tc])
+ return NULL;
+ if (!vsi->lan_q_ctx[tc])
+ return NULL;
+ q_ctx = vsi->lan_q_ctx[tc];
+ return &q_ctx[q_handle];
+}
+
+/**
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: TC number
+ * @q_handle: software queue handle
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
@@ -3524,12 +3549,13 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
* This function adds one LAN queue
*/
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_txsched_elem_data node = { 0 };
struct ice_sched_node *parent;
+ struct ice_q_ctx *q_ctx;
enum ice_status status;
struct ice_hw *hw;
@@ -3546,6 +3572,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
ice_acquire_lock(&pi->sched_lock);
+ q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle);
+ if (!q_ctx) {
+ ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n",
+ q_handle);
+ status = ICE_ERR_PARAM;
+ goto ena_txq_exit;
+ }
+
/* find a parent node */
parent = ice_sched_get_free_qparent(pi, vsi_handle, tc,
ICE_SCHED_NODE_OWNER_LAN);
@@ -3580,6 +3614,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
+ q_ctx->q_handle = q_handle;
/* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
@@ -3592,7 +3627,10 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
/**
* ice_dis_vsi_txq
* @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
* @num_queues: number of queues
+ * @q_handles: pointer to software queue handle array
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
* @rst_src: if called due to reset, specifies the reset source
@@ -3602,12 +3640,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* This function removes queues and their corresponding nodes in SW DB
*/
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handles, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd)
{
enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_aqc_dis_txq_item qg_list;
+ struct ice_q_ctx *q_ctx;
u16 i;
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
@@ -3630,6 +3670,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
if (!node)
continue;
+ q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);
+ if (!q_ctx) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
+ q_handles[i]);
+ continue;
+ }
+ if (q_ctx->q_handle != q_handles[i]) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
+ q_ctx->q_handle, q_handles[i]);
+ continue;
+ }
qg_list.parent_teid = node->info.parent_teid;
qg_list.num_qs = 1;
qg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);
@@ -3640,6 +3691,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
if (status != ICE_SUCCESS)
break;
ice_free_sched_node(pi, node);
+ q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
}
ice_release_lock(&pi->sched_lock);
return status;
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 63f4a5ebe..72560fbbf 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -157,15 +157,16 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
- struct ice_sq_cd *cmd_details);
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handle, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ struct ice_sq_cd *cd);
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
u16 *max_lanqs);
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
void ice_replay_post(struct ice_hw *hw);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index c794ee861..b65bb4a51 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -453,7 +453,8 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
/* Init the Tx tail register*/
ICE_PCI_REG_WRITE(txq->qtx_tail, 0);
- err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, 1, &txq_elem,
+ /* Fix me, we assume TC always 0 here */
+ err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, 0, 1, &txq_elem,
sizeof(txq_elem), NULL);
if (err) {
PMD_DRV_LOG(ERR, "Failed to add lan txq");
@@ -528,9 +529,12 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct ice_tx_queue *txq;
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct ice_vsi *vsi = pf->main_vsi;
enum ice_status status;
uint16_t q_ids[1];
uint32_t q_teids[1];
+ uint16_t q_handle = 0;
if (tx_queue_id >= dev->data->nb_tx_queues) {
PMD_DRV_LOG(ERR, "TX queue %u is out of range %u",
@@ -548,8 +552,9 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
q_ids[0] = txq->reg_idx;
q_teids[0] = txq->q_teid;
- status = ice_dis_vsi_txq(hw->port_info, 1, q_ids, q_teids,
- ICE_NO_RESET, 0, NULL);
+ /* Fix me, we assume TC always 0 here */
+ status = ice_dis_vsi_txq(hw->port_info, vsi->idx, 0, 1, &q_handle,
+ q_ids, q_teids, ICE_NO_RESET, 0, NULL);
if (status != ICE_SUCCESS) {
PMD_DRV_LOG(DEBUG, "Failed to disable Lan Tx queue");
return -EINVAL;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 20/37] net/ice/base: ensure only valid bits are set
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (18 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 19/37] net/ice/base: enable VSI queue context Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 21/37] net/ice/base: enhance get link status command Qi Zhang
` (19 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Chinh T Cao
In the ice_aq_set_phy_cfg AQ command, the 16.4 bit is reserved.
This patch will make sure that this bit will never be set to 1.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 1 +
drivers/net/ice/base/ice_common.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ca3d40c8b..70cd0604b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1327,6 +1327,7 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
+#define ICE_AQ_PHY_ENA_VALID_MASK MAKEMASK(0xef, 0)
#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index f5cbd47c3..1c381b5e2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2351,6 +2351,15 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport,
if (!cfg)
return ICE_ERR_PARAM;
+ /* Ensure that only valid bits of cfg->caps can be turned on. */
+ if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
+ ice_debug(hw, ICE_DBG_PHY,
+ "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
+ cfg->caps);
+
+ cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
+ }
+
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg);
desc.params.set_phy.lport_num = lport;
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 21/37] net/ice/base: enhance get link status command
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (19 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 20/37] net/ice/base: ensure only valid bits are set Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 22/37] net/ice/base: add RSS key related macro and structures Qi Zhang
` (18 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Matthew Vick
Extend the functionality of the admin queue command by including
additional status and ID bits to improve link topology configuration.
Signed-off-by: Matthew Vick <matthew.vick@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 70cd0604b..cb1e1ca1a 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1399,7 +1399,12 @@ struct ice_aqc_get_link_status_data {
#define ICE_AQ_LINK_TOPO_CONFLICT BIT(0)
#define ICE_AQ_LINK_MEDIA_CONFLICT BIT(1)
#define ICE_AQ_LINK_TOPO_CORRUPT BIT(2)
- u8 reserved1;
+#define ICE_AQ_LINK_TOPO_UNREACH_PRT BIT(4)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_PRT BIT(5)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA BIT(6)
+#define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA BIT(7)
+ u8 link_cfg_err;
+#define ICE_AQ_LINK_CFG_ERR BIT(0)
u8 link_info;
#define ICE_AQ_LINK_UP BIT(0) /* Link Status */
#define ICE_AQ_LINK_FAULT BIT(1)
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 22/37] net/ice/base: add RSS key related macro and structures
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (20 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 21/37] net/ice/base: enhance get link status command Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 16:54 ` Greenwalt, Paul
2019-02-28 5:56 ` [dpdk-dev] [PATCH 23/37] net/ice/base: do not write TCAM entries back Qi Zhang
` (17 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Paul Greenwalt
Add define for 52 byte RSS hash key size, and add struct
ice_aqc_get_set_rss_keys comments regarding setting 40 bytes and
52 byte hash key.
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index cb1e1ca1a..ed7dfae8c 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1593,7 +1593,20 @@ struct ice_aqc_get_set_rss_key {
#define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28
#define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC
+#define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \
+ (ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE + \
+ ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE)
+/**
+ * struct ice_aqc_get_set_rss_keys - Get/Set RSS hash key command buffer
+ * @standard_rss_key: 40 most significant bytes of hash key
+ * @extended_hash_key: 12 least significant bytes of hash key
+ *
+ * Set/Get 40 byte hash key using standard_rss_key field, and set
+ * extended_hash_key field to zero. Set/Get 52 byte hash key using
+ * standard_rss_key field for 40 most significant bytes and the
+ * extended_hash_key field for the 12 least significant bytes of hash key.
+ */
struct ice_aqc_get_set_rss_keys {
u8 standard_rss_key[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 23/37] net/ice/base: do not write TCAM entries back
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (21 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 22/37] net/ice/base: add RSS key related macro and structures Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 24/37] net/ice/base: remove local VSIG allocations Qi Zhang
` (16 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Dan Nowlin
Profile TCAM entry removal is handled by the firmware when
freeing the resource, so the driver does not need to write these
default entries back with an update Package action.
This patch removes writing of the TCAM entry using Update Package
command when removing it, since the entry has already been freed
by firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 41 +++++++++---------------------------
drivers/net/ice/base/ice_flex_type.h | 2 --
2 files changed, 10 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index ff615f94f..900a19387 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -3558,8 +3558,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
struct ice_chs_chg *tmp;
LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
- if ((tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) ||
- tmp->type == ICE_TCAM_REM) {
+ if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
struct ice_prof_id_section *p;
u32 id;
@@ -3689,7 +3688,6 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
es++;
break;
case ICE_TCAM_ADD:
- case ICE_TCAM_REM:
tcam++;
break;
case ICE_VSIG_ADD:
@@ -3962,46 +3960,27 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
* ice_rem_prof_id - remove one profile from a VSIG
* @hw: pointer to the HW struct
* @blk: hardware block
- * @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
- * @chg: pointer to list to record changes
*/
static enum ice_status
-ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
- struct ice_vsig_prof *prof, struct LIST_HEAD_TYPE *chg)
+ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
+ struct ice_vsig_prof *prof)
{
enum ice_status status;
- struct ice_chs_chg *p;
u16 i;
for (i = 0; i < prof->tcam_count; i++) {
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_prof_id;
-
- p->type = ICE_TCAM_REM;
- p->vsig = vsig;
- p->prof_id = prof->tcam[i].prof_id;
- p->tcam_idx = prof->tcam[i].tcam_idx;
-
- p->ptg = prof->tcam[i].ptg;
prof->tcam[i].in_use = false;
- p->orig_ent = hw->blk[blk].prof.t[p->tcam_idx];
- status = ice_rel_tcam_idx(hw, blk, p->tcam_idx);
+ status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
if (!status)
- status = ice_prof_dec_ref(hw, blk, p->prof_id);
-
- LIST_ADD(&p->list_entry, chg);
+ status = ice_prof_dec_ref(hw, blk,
+ prof->tcam[i].prof_id);
if (status)
- goto err_ice_rem_prof_id;
+ return ICE_ERR_HW_TABLE;
}
return ICE_SUCCESS;
-
-err_ice_rem_prof_id:
- /* caller will clean up the change list */
- return ICE_ERR_NO_MEMORY;
}
/**
@@ -4024,9 +4003,9 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
LIST_FOR_EACH_ENTRY_SAFE(d, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list) {
- status = ice_rem_prof_id(hw, blk, vsig, d, chg);
+ status = ice_rem_prof_id(hw, blk, d);
if (status)
- goto err_ice_rem_vsig;
+ return status;
LIST_DEL(&d->list);
ice_free(hw, d);
@@ -4090,7 +4069,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* this is the last profile, remove the VSIG */
return ice_rem_vsig(hw, blk, vsig, chg);
- status = ice_rem_prof_id(hw, blk, vsig, p, chg);
+ status = ice_rem_prof_id(hw, blk, p);
if (!status) {
LIST_DEL(&p->list);
ice_free(hw, p);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index aed23a067..1bb865896 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -676,7 +676,6 @@ enum ice_chg_type {
ICE_TCAM_NONE = 0,
ICE_PTG_ES_ADD,
ICE_TCAM_ADD,
- ICE_TCAM_REM,
ICE_VSIG_ADD,
ICE_VSIG_REM,
ICE_VSI_MOVE,
@@ -697,7 +696,6 @@ struct ice_chs_chg {
u16 vsig;
u16 orig_vsig;
u16 tcam_idx;
- struct ice_prof_tcam_entry orig_ent;
};
#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 24/37] net/ice/base: remove local VSIG allocations
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (22 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 23/37] net/ice/base: do not write TCAM entries back Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 25/37] net/ice/base: minor fix Qi Zhang
` (15 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Vignesh Sridhar
If allocating a VSI to a VSIG fails the local allocations made for VSIG
profiles and change-lists will not be removed. Adding calls to free these
entries on error in VSIG management calls.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 900a19387..887609204 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4523,8 +4523,10 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
- if (status)
+ if (status) {
+ ice_free(hw, p);
goto err_ice_add_prof_id_vsig;
+ }
t->tcam[i].ptg = ptg;
t->tcam[i].prof_id = map->prof_id;
@@ -4563,6 +4565,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
err_ice_add_prof_id_vsig:
/* let caller clean up the change list */
+ ice_free(hw, t);
return ICE_ERR_NO_MEMORY;
}
@@ -4587,16 +4590,18 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
return ICE_ERR_NO_MEMORY;
new_vsig = ice_vsig_alloc(hw, blk);
- if (!new_vsig)
- return ICE_ERR_HW_TABLE;
+ if (!new_vsig) {
+ status = ICE_ERR_HW_TABLE;
+ goto err_ice_create_prof_id_vsig;
+ }
status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
p->type = ICE_VSIG_ADD;
p->vsi = vsi;
@@ -4606,6 +4611,11 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
LIST_ADD(&p->list_entry, chg);
return ICE_SUCCESS;
+
+err_ice_create_prof_id_vsig:
+ /* let caller clean up the change list */
+ ice_free(hw, p);
+ return status;
}
/**
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 25/37] net/ice/base: minor fix
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (23 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 24/37] net/ice/base: remove local VSIG allocations Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 26/37] net/ice/base: update copyright time Qi Zhang
` (14 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. Fix some problems with filling the HW tables.
2. Fix a logic error in ice_rem_prof_from_list.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 887609204..1dd121b28 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2935,9 +2935,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
while (sect) {
switch (sid) {
+ case ICE_SID_XLT1_SW:
case ICE_SID_XLT1_FD:
case ICE_SID_XLT1_RSS:
case ICE_SID_XLT1_ACL:
+ case ICE_SID_XLT1_PE:
xlt1 = (struct ice_xlt1_section *)sect;
src = xlt1->value;
sect_len = LE16_TO_CPU(xlt1->count) *
@@ -2946,9 +2948,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt1.count *
sizeof(*hw->blk[block_id].xlt1.t);
break;
+ case ICE_SID_XLT2_SW:
case ICE_SID_XLT2_FD:
case ICE_SID_XLT2_RSS:
case ICE_SID_XLT2_ACL:
+ case ICE_SID_XLT2_PE:
xlt2 = (struct ice_xlt2_section *)sect;
src = (u8 *)xlt2->value;
sect_len = LE16_TO_CPU(xlt2->count) *
@@ -2957,9 +2961,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt2.count *
sizeof(*hw->blk[block_id].xlt2.t);
break;
+ case ICE_SID_PROFID_TCAM_SW:
case ICE_SID_PROFID_TCAM_FD:
case ICE_SID_PROFID_TCAM_RSS:
case ICE_SID_PROFID_TCAM_ACL:
+ case ICE_SID_PROFID_TCAM_PE:
pid = (struct ice_prof_id_section *)sect;
src = (u8 *)pid->entry;
sect_len = LE16_TO_CPU(pid->count) *
@@ -2968,9 +2974,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof.count *
sizeof(*hw->blk[block_id].prof.t);
break;
+ case ICE_SID_PROFID_REDIR_SW:
case ICE_SID_PROFID_REDIR_FD:
case ICE_SID_PROFID_REDIR_RSS:
case ICE_SID_PROFID_REDIR_ACL:
+ case ICE_SID_PROFID_REDIR_PE:
pr = (struct ice_prof_redir_section *)sect;
src = pr->redir_value;
sect_len = LE16_TO_CPU(pr->count) *
@@ -2979,15 +2987,19 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof_redir.count *
sizeof(*hw->blk[block_id].prof_redir.t);
break;
+ case ICE_SID_FLD_VEC_SW:
case ICE_SID_FLD_VEC_FD:
case ICE_SID_FLD_VEC_RSS:
case ICE_SID_FLD_VEC_ACL:
+ case ICE_SID_FLD_VEC_PE:
es = (struct ice_sw_fv_section *)sect;
src = (u8 *)es->fv;
sect_len = LE16_TO_CPU(es->count) *
- sizeof(*hw->blk[block_id].prof_redir.t);
+ hw->blk[block_id].es.fvw *
+ sizeof(*hw->blk[block_id].es.t);
dst = (u8 *)hw->blk[block_id].es.t;
dst_len = hw->blk[block_id].es.count *
+ hw->blk[block_id].es.fvw *
sizeof(*hw->blk[block_id].es.t);
break;
default:
@@ -4964,8 +4976,8 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
goto err_ice_rem_prof_id_flow;
- } else if (ice_find_dup_props_vsig(hw, blk, ©,
- &vsig)) {
+ } else if (!ice_find_dup_props_vsig(hw, blk, ©,
+ &vsig)) {
/* found an exact match */
/* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 26/37] net/ice/base: update copyright time
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (24 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 25/37] net/ice/base: minor fix Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 27/37] net/ice/base: resolve static analysis reported issues Qi Zhang
` (13 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Update copyright time to 2019.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_controlq.c | 2 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 2 +-
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 2 +-
drivers/net/ice/base/ice_nvm.c | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2 +-
drivers/net/ice/base/ice_sched.h | 2 +-
drivers/net/ice/base/ice_status.h | 2 +-
drivers/net/ice/base/ice_switch.c | 2 +-
drivers/net/ice/base/ice_switch.h | 2 +-
drivers/net/ice/base/ice_type.h | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ed7dfae8c..81a331b41 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ADMINQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_alloc.h b/drivers/net/ice/base/ice_alloc.h
index 78831045b..cf823a2c2 100644
--- a/drivers/net/ice/base/ice_alloc.h
+++ b/drivers/net/ice/base/ice_alloc.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ALLOC_H_
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1c381b5e2..ae0e7fc5f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 72560fbbf..cc7a77747 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_COMMON_H_
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 1c0830cec..f3404023a 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h
index db2db9389..182db6754 100644
--- a/drivers/net/ice/base/ice_controlq.h
+++ b/drivers/net/ice/base/ice_controlq.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_CONTROLQ_H_
diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h
index 87f17ab91..5f1ac0422 100644
--- a/drivers/net/ice/base/ice_devids.h
+++ b/drivers/net/ice/base/ice_devids.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_DEVIDS_H_
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 1bb865896..951c2051f 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLEX_TYPE_H_
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 3db10cd6f..bad925c8c 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLOW_H_
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 8c79891ad..e63e41133 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
/* Machine-generated file; do not edit */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index b1963b5eb..8c9902994 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_LAN_TX_RX_H_
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 8d3d0b0ed..b770abfd0 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index f96964d86..6b3bd6542 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_PROTOCOL_TYPE_H_
diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h
index 6dff37871..70a019292 100644
--- a/drivers/net/ice/base/ice_sbq_cmd.h
+++ b/drivers/net/ice/base/ice_sbq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SBQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2dd9f6f6c..8773e62a9 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_sched.h"
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 09de765ff..92377a82e 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SCHED_H_
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index 898bfa6d8..cd561b0a4 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_STATUS_H_
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e47c1d845..a1c29d606 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_switch.h"
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 3cc2c10e8..13525d8d0 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SWITCH_H_
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 25d64477f..90736faa1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_TYPE_H_
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 27/37] net/ice/base: resolve static analysis reported issues
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (25 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 26/37] net/ice/base: update copyright time Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-03-01 10:36 ` Ferruh Yigit
2019-02-28 5:56 ` [dpdk-dev] [PATCH 28/37] net/ice/base: return config error without queue to disable Qi Zhang
` (12 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Bruce Allan
Resolve static analysis reported issue in
ice_get_itr_intrl_gran and ice_ptg_find_ptype.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 12 ++----------
drivers/net/ice/base/ice_flex_pipe.c | 7 +------
2 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ae0e7fc5f..2362dd774 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -741,7 +741,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
*/
-static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
+static void ice_get_itr_intrl_gran(struct ice_hw *hw)
{
u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &
GL_PWR_MODE_CTL_CAR_MAX_BW_M) >>
@@ -758,13 +758,7 @@ static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
hw->itr_gran = ICE_ITR_GRAN_MAX_25;
hw->intrl_gran = ICE_INTRL_GRAN_MAX_25;
break;
- default:
- ice_debug(hw, ICE_DBG_INIT,
- "Failed to determine itr/intrl granularity\n");
- return ICE_ERR_CFG;
}
-
- return ICE_SUCCESS;
}
/**
@@ -795,9 +789,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
return status;
- status = ice_get_itr_intrl_gran(hw);
- if (status)
- return status;
+ ice_get_itr_intrl_gran(hw);
status = ice_init_all_ctrlq(hw);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 1dd121b28..525378079 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4288,17 +4288,12 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
p->tcam_count = map->ptype_count;
for (i = 0; i < map->ptype_count; i++) {
- enum ice_status status;
u8 ptg;
p->tcam[i].prof_id = map->prof_id;
p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
- status = ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
- if (status) {
- ice_free(hw, p);
- return status;
- }
+ ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
p->tcam[i].ptg = ptg;
}
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 28/37] net/ice/base: return config error without queue to disable
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (26 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 27/37] net/ice/base: resolve static analysis reported issues Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 29/37] net/ice/base: add function to check FW recovery mode Qi Zhang
` (11 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Akeem G Abodunrin
If there is no queue to disable, return appropriate configuration error
earlier without acquiring the lock.
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2362dd774..c35a2f91d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3654,14 +3654,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
return ICE_ERR_CFG;
- /* if queue is disabled already yet the disable queue command has to be
- * sent to complete the VF reset, then call ice_aq_dis_lan_txq without
- * any queue information
- */
- if (!num_queues && rst_src)
- return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src, vmvf_num,
- NULL);
+ if (!num_queues) {
+ /* if queue is disabled already yet the disable queue command
+ * has to be sent to complete the VF reset, then call
+ * ice_aq_dis_lan_txq without any queue information
+ */
+ if (rst_src)
+ return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,
+ vmvf_num, NULL);
+ return ICE_ERR_CFG;
+ }
ice_acquire_lock(&pi->sched_lock);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 29/37] net/ice/base: add function to check FW recovery mode
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (27 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 28/37] net/ice/base: return config error without queue to disable Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 30/37] net/ice/base: change profile id reference counting Qi Zhang
` (10 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Victor Raj
Code added to check the FW recovery mode. This function will be
used by the drivers during init to check whether the FW is in
recovery mode or not. If FW is in recovery mode then the drivers
need to run in a recovery mode where it can allow only limited
operations. Link should be down, allow only certain AQ commands
etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 15 +++++++++++++++
drivers/net/ice/base/ice_common.h | 8 ++++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index c35a2f91d..2ebf95eed 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3915,3 +3915,18 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
ice_debug(hw, ICE_DBG_SCHED, "query element failed\n");
return status;
}
+
+/**
+ * ice_is_fw_in_rec_mode
+ * @hw: pointer to the HW struct
+ *
+ * This function returns true if fw is in recovery mode
+ */
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw)
+{
+ u32 reg;
+
+ /* check the current FW mode */
+ reg = rd32(hw, GL_MNG_FWSM);
+ return (reg & GL_MNG_FWSM_FW_MODES_M) > ICE_FW_MODE_DBG;
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index cc7a77747..9665f3204 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -10,6 +10,13 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+enum ice_fw_modes {
+ ICE_FW_MODE_NORMAL,
+ ICE_FW_MODE_DBG,
+ ICE_FW_MODE_REC,
+ ICE_FW_MODE_DBG_REC
+};
+
enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
void
@@ -188,4 +195,5 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
enum ice_status
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_get_elem *buf);
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw);
#endif /* _ICE_COMMON_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 30/37] net/ice/base: change profile id reference counting
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (28 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 29/37] net/ice/base: add function to check FW recovery mode Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 31/37] net/ice/base: add DCB support Qi Zhang
` (9 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Dan Nowlin
Improved the profile reference counting, by moving it from being
based on how many TCAM entries using the profile to how many
profile map entries are using the profile.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 70 ++++++++++++++++++++----------------
drivers/net/ice/base/ice_flex_type.h | 1 +
2 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 525378079..99108d81c 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2816,6 +2816,30 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
}
/**
+ * ice_write_es - write an extraction sequence to hardware
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write the extraction sequence
+ * @prof_id: the profile ID to write
+ * @fv: pointer to the extraction sequence to write - NULL to clear extraction
+ */
+static void
+ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
+ struct ice_fv_word *fv)
+{
+ u16 off;
+
+ off = prof_id * hw->blk[blk].es.fvw;
+ if (!fv) {
+ ice_memset(&hw->blk[blk].es.t[off], 0, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_MEM);
+ hw->blk[blk].es.written[prof_id] = false;
+ } else {
+ ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_TO_NONDMA);
+ }
+}
+
+/**
* ice_prof_dec_ref - decrement reference count for profile
* @hw: pointer to the HW struct
* @blk: the block from which to free the profile ID
@@ -2828,31 +2852,15 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
return ICE_ERR_PARAM;
if (hw->blk[blk].es.ref_count[prof_id] > 0) {
- if (!--hw->blk[blk].es.ref_count[prof_id])
+ if (!--hw->blk[blk].es.ref_count[prof_id]) {
+ ice_write_es(hw, blk, prof_id, NULL);
return ice_free_prof_id(hw, blk, prof_id);
+ }
}
return ICE_SUCCESS;
}
-/**
- * ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the HW struct
- * @blk: the block in which to write the extraction sequence
- * @prof_id: the profile ID to write
- * @fv: pointer to the extraction sequence to write
- */
-static void
-ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
- struct ice_fv_word *fv)
-{
- u16 off;
-
- off = prof_id * hw->blk[blk].es.fvw;
- ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw * 2,
- ICE_NONDMA_TO_NONDMA);
-}
-
/* Block / table section IDs */
static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
/* SWITCH */
@@ -3140,6 +3148,7 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].es.resource_used_hack);
ice_free(hw, hw->blk[i].prof.resource_used_hack);
+ ice_free(hw, hw->blk[i].es.written);
}
ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);
@@ -3309,6 +3318,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
es->ref_count = (u16 *)
ice_calloc(hw, es->count, sizeof(*es->ref_count));
+ es->written = (u8 *)
+ ice_calloc(hw, es->count, sizeof(*es->written));
+
if (!es->ref_count)
goto err;
@@ -3805,6 +3817,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
ice_write_es(hw, blk, prof_id, es);
}
+ ice_prof_inc_ref(hw, blk, prof_id);
+
/* add profile info */
prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof));
@@ -3984,10 +3998,6 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < prof->tcam_count; i++) {
prof->tcam[i].in_use = false;
status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
- if (!status)
- status = ice_prof_dec_ref(hw, blk,
- prof->tcam[i].prof_id);
-
if (status)
return ICE_ERR_HW_TABLE;
}
@@ -4159,6 +4169,9 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
+ /* dereference profile, and possibly remove */
+ ice_prof_dec_ref(hw, blk, pmap->prof_id);
+
LIST_DEL(&pmap->list);
ice_free(hw, pmap);
@@ -4194,7 +4207,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
if (status)
goto err_ice_get_prof_ptgs;
- if (add || !hw->blk[blk].es.ref_count[map->prof_id]) {
+ if (add || !hw->blk[blk].es.written[map->prof_id]) {
/* add PTG to change list */
p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
if (!p)
@@ -4205,9 +4218,11 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
p->ptg = ptg;
p->add_ptg = add;
- p->add_prof = !hw->blk[blk].es.ref_count[map->prof_id];
+ p->add_prof = !hw->blk[blk].es.written[map->prof_id];
p->prof_id = map->prof_id;
+ hw->blk[blk].es.written[map->prof_id] = true;
+
LIST_ADD(&p->list_entry, chg);
}
}
@@ -4555,11 +4570,6 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many TCAM entries
- * are using this HW profile ID
- */
- status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
-
/* log change */
LIST_ADD(&p->list_entry, chg);
}
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 951c2051f..365f33390 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -497,6 +497,7 @@ struct ice_es {
u16 count;
u16 fvw;
u16 *ref_count;
+ u8 *written;
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 31/37] net/ice/base: add DCB support
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (29 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 30/37] net/ice/base: change profile id reference counting Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 32/37] net/ice/base: add FDIR support Qi Zhang
` (8 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Add module to support DCB related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 243 ++++++
drivers/net/ice/base/ice_common.c | 12 +
drivers/net/ice/base/ice_dcb.c | 1393 +++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 ++++++
drivers/net/ice/base/ice_status.h | 1 +
drivers/net/ice/base/ice_type.h | 14 +-
drivers/net/ice/base/meson.build | 1 +
8 files changed, 1884 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 61846cae2..89d21334e 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -51,6 +51,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_switch.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 81a331b41..4c5cf5419 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -100,6 +100,7 @@ struct ice_aqc_list_caps_elem {
__le16 cap;
#define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005
#define ICE_AQC_CAPS_VSI 0x0017
+#define ICE_AQC_CAPS_DCB 0x0018
#define ICE_AQC_CAPS_RSS 0x0040
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
@@ -894,6 +895,40 @@ struct ice_aqc_sw_rules_elem {
#pragma pack()
+/* PFC Ignore (direct 0x0301)
+ * The command and response use the same descriptor structure
+ */
+struct ice_aqc_pfc_ignore {
+ u8 tc_bitmap;
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_PFC_IGNORE_SET BIT(7)
+#define ICE_AQC_PFC_IGNORE_CLEAR 0
+ u8 reserved[14];
+};
+
+/* Set PFC Mode (direct 0x0303)
+ * Query PFC Mode (direct 0x0302)
+ */
+struct ice_aqc_set_query_pfc_mode {
+ u8 pfc_mode;
+/* For Set Command response, reserved in all other cases */
+#define ICE_AQC_PFC_NOT_CONFIGURED 0
+/* For Query Command response, reserved in all other cases */
+#define ICE_AQC_DCB_DIS 0
+#define ICE_AQC_PFC_VLAN_BASED_PFC 1
+#define ICE_AQC_PFC_DSCP_BASED_PFC 2
+ u8 rsvd[15];
+};
+
+/* Set DCB Parameters (direct 0x0306) */
+struct ice_aqc_set_dcb_params {
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG BIT(0)
+ u8 valid_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG_VALID BIT(0)
+ u8 rsvd[14];
+};
+
/* Get Default Topology (indirect 0x0400) */
struct ice_aqc_get_topo {
@@ -1027,6 +1062,32 @@ struct ice_aqc_delete_elem {
};
+/* Query Port ETS (indirect 0x040E)
+ *
+ * This indirect command is used to query port TC node configuration.
+ */
+struct ice_aqc_query_port_ets {
+ __le32 port_teid;
+ __le32 reserved;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_port_ets_elem {
+ u8 tc_valid_bits;
+ u8 reserved[3];
+ /* 3 bits for UP per TC 0-7, 4th byte reserved */
+ __le32 up2tc;
+ u8 tc_bw_share[8];
+ __le32 port_eir_prof_id;
+ __le32 port_cir_prof_id;
+ /* 3 bits per Node priority to TC 0-7, 4th byte reserved */
+ __le32 tc_node_prio;
+#define ICE_TC_NODE_PRIO_S 0x4
+ u8 reserved1[4];
+ __le32 tc_node_teid[8]; /* Used for response, reserved in command */
+};
+
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
@@ -1578,6 +1639,157 @@ struct ice_aqc_nvm_checksum {
+/* Get LLDP MIB (indirect 0x0A00)
+ * Note: This is also used by the LLDP MIB Change Event (0x0A01)
+ * as the format is the same.
+ */
+struct ice_aqc_lldp_get_mib {
+ u8 type;
+#define ICE_AQ_LLDP_MIB_TYPE_S 0
+#define ICE_AQ_LLDP_MIB_TYPE_M (0x3 << ICE_AQ_LLDP_MIB_TYPE_S)
+#define ICE_AQ_LLDP_MIB_LOCAL 0
+#define ICE_AQ_LLDP_MIB_REMOTE 1
+#define ICE_AQ_LLDP_MIB_LOCAL_AND_REMOTE 2
+#define ICE_AQ_LLDP_BRID_TYPE_S 2
+#define ICE_AQ_LLDP_BRID_TYPE_M (0x3 << ICE_AQ_LLDP_BRID_TYPE_S)
+#define ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID 0
+#define ICE_AQ_LLDP_BRID_TYPE_NON_TPMR 1
+/* Tx pause flags in the 0xA01 event use ICE_AQ_LLDP_TX_* */
+#define ICE_AQ_LLDP_TX_S 0x4
+#define ICE_AQ_LLDP_TX_M (0x03 << ICE_AQ_LLDP_TX_S)
+#define ICE_AQ_LLDP_TX_ACTIVE 0
+#define ICE_AQ_LLDP_TX_SUSPENDED 1
+#define ICE_AQ_LLDP_TX_FLUSHED 3
+/* The following bytes are reserved for the Get LLDP MIB command (0x0A00)
+ * and in the LLDP MIB Change Event (0x0A01). They are valid for the
+ * Get LLDP MIB (0x0A00) response only.
+ */
+ u8 reserved1;
+ __le16 local_len;
+ __le16 remote_len;
+ u8 reserved2[2];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Configure LLDP MIB Change Event (direct 0x0A01) */
+/* For MIB Change Event use ice_aqc_lldp_get_mib structure above */
+struct ice_aqc_lldp_set_mib_change {
+ u8 command;
+#define ICE_AQ_LLDP_MIB_UPDATE_ENABLE 0x0
+#define ICE_AQ_LLDP_MIB_UPDATE_DIS 0x1
+ u8 reserved[15];
+};
+
+/* Add LLDP TLV (indirect 0x0A02)
+ * Delete LLDP TLV (indirect 0x0A04)
+ */
+struct ice_aqc_lldp_add_delete_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved1[1];
+ __le16 len;
+ u8 reserved2[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Update LLDP TLV (indirect 0x0A03) */
+struct ice_aqc_lldp_update_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved;
+ __le16 old_len;
+ __le16 new_offset;
+ __le16 new_len;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Stop LLDP (direct 0x0A05) */
+struct ice_aqc_lldp_stop {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_STATE_MASK BIT(0)
+#define ICE_AQ_LLDP_AGENT_STOP 0x0
+#define ICE_AQ_LLDP_AGENT_SHUTDOWN ICE_AQ_LLDP_AGENT_STATE_MASK
+#define ICE_AQ_LLDP_AGENT_PERSIST_DIS BIT(1)
+ u8 reserved[15];
+};
+
+/* Start LLDP (direct 0x0A06) */
+struct ice_aqc_lldp_start {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_START BIT(0)
+#define ICE_AQ_LLDP_AGENT_PERSIST_ENA BIT(1)
+ u8 reserved[15];
+};
+
+/* Get CEE DCBX Oper Config (0x0A07)
+ * The command uses the generic descriptor struct and
+ * returns the struct below as an indirect response.
+ */
+struct ice_aqc_get_cee_dcb_cfg_resp {
+ u8 oper_num_tc;
+ u8 oper_prio_tc[4];
+ u8 oper_tc_bw[8];
+ u8 oper_pfc_en;
+ __le16 oper_app_prio;
+#define ICE_AQC_CEE_APP_FCOE_S 0
+#define ICE_AQC_CEE_APP_FCOE_M (0x7 << ICE_AQC_CEE_APP_FCOE_S)
+#define ICE_AQC_CEE_APP_ISCSI_S 3
+#define ICE_AQC_CEE_APP_ISCSI_M (0x7 << ICE_AQC_CEE_APP_ISCSI_S)
+#define ICE_AQC_CEE_APP_FIP_S 8
+#define ICE_AQC_CEE_APP_FIP_M (0x7 << ICE_AQC_CEE_APP_FIP_S)
+ __le32 tlv_status;
+#define ICE_AQC_CEE_PG_STATUS_S 0
+#define ICE_AQC_CEE_PG_STATUS_M (0x7 << ICE_AQC_CEE_PG_STATUS_S)
+#define ICE_AQC_CEE_PFC_STATUS_S 3
+#define ICE_AQC_CEE_PFC_STATUS_M (0x7 << ICE_AQC_CEE_PFC_STATUS_S)
+#define ICE_AQC_CEE_FCOE_STATUS_S 8
+#define ICE_AQC_CEE_FCOE_STATUS_M (0x7 << ICE_AQC_CEE_FCOE_STATUS_S)
+#define ICE_AQC_CEE_ISCSI_STATUS_S 11
+#define ICE_AQC_CEE_ISCSI_STATUS_M (0x7 << ICE_AQC_CEE_ISCSI_STATUS_S)
+#define ICE_AQC_CEE_FIP_STATUS_S 16
+#define ICE_AQC_CEE_FIP_STATUS_M (0x7 << ICE_AQC_CEE_FIP_STATUS_S)
+ u8 reserved[12];
+};
+
+/* Set Local LLDP MIB (indirect 0x0A08)
+ * Used to replace the local MIB of a given LLDP agent. e.g. DCBx
+ */
+struct ice_aqc_lldp_set_local_mib {
+ u8 type;
+#define SET_LOCAL_MIB_TYPE_DCBX_M BIT(0)
+#define SET_LOCAL_MIB_TYPE_LOCAL_MIB 0
+#define SET_LOCAL_MIB_TYPE_CEE_M BIT(1)
+#define SET_LOCAL_MIB_TYPE_CEE_WILLING 0
+#define SET_LOCAL_MIB_TYPE_CEE_NON_WILLING SET_LOCAL_MIB_TYPE_CEE_M
+ u8 reserved0;
+ __le16 length;
+ u8 reserved1[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_lldp_set_local_mib_resp {
+ u8 status;
+#define SET_LOCAL_MIB_RESP_EVENT_M BIT(0)
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_SILENT 0
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_EVENT SET_LOCAL_MIB_RESP_EVENT_M
+ u8 reserved[15];
+};
+
+/* Stop/Start LLDP Agent (direct 0x0A09)
+ * Used for stopping/starting specific LLDP agent. e.g. DCBx.
+ * The same structure is used for the response, with the command field
+ * being used as the status field.
+ */
+struct ice_aqc_lldp_stop_start_specific_agent {
+ u8 command;
+#define ICE_AQC_START_STOP_AGENT_M BIT(0)
+#define ICE_AQC_START_STOP_AGENT_STOP_DCBX 0
+#define ICE_AQC_START_STOP_AGENT_START_DCBX ICE_AQC_START_STOP_AGENT_M
+ u8 reserved[15];
+};
+
/* Get/Set RSS key (indirect 0x0B04/0x0B02) */
struct ice_aqc_get_set_rss_key {
@@ -1980,10 +2192,22 @@ struct ice_aq_desc {
struct ice_aqc_query_txsched_res query_sched_res;
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
+ struct ice_aqc_query_port_ets port_ets;
struct ice_aqc_rl_profile rl_profile;
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
+ struct ice_aqc_pfc_ignore pfc_ignore;
+ struct ice_aqc_set_query_pfc_mode set_query_pfc_mode;
+ struct ice_aqc_set_dcb_params set_dcb_params;
+ struct ice_aqc_lldp_get_mib lldp_get_mib;
+ struct ice_aqc_lldp_set_mib_change lldp_set_event;
+ struct ice_aqc_lldp_add_delete_tlv lldp_add_delete_tlv;
+ struct ice_aqc_lldp_update_tlv lldp_update_tlv;
+ struct ice_aqc_lldp_stop lldp_stop;
+ struct ice_aqc_lldp_start lldp_start;
+ struct ice_aqc_lldp_set_local_mib lldp_set_mib;
+ struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
struct ice_aqc_add_txqs add_txqs;
@@ -2096,6 +2320,8 @@ enum ice_adminq_opc {
/* PXE */
ice_aqc_opc_clear_pxe_mode = 0x0110,
+ ice_aqc_opc_config_no_drop_policy = 0x0112,
+
/* internal switch commands */
ice_aqc_opc_get_sw_cfg = 0x0200,
@@ -2127,6 +2353,11 @@ enum ice_adminq_opc {
ice_aqc_opc_get_sw_rules = 0x02A3,
ice_aqc_opc_clear_pf_cfg = 0x02A4,
+ /* DCB commands */
+ ice_aqc_opc_pfc_ignore = 0x0301,
+ ice_aqc_opc_query_pfc_mode = 0x0302,
+ ice_aqc_opc_set_pfc_mode = 0x0303,
+ ice_aqc_opc_set_dcb_params = 0x0306,
/* transmit scheduler commands */
ice_aqc_opc_get_dflt_topo = 0x0400,
@@ -2136,6 +2367,7 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
+ ice_aqc_opc_query_port_ets = 0x040E,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
@@ -2166,6 +2398,17 @@ enum ice_adminq_opc {
ice_aqc_opc_nvm_cfg_write = 0x0705,
ice_aqc_opc_nvm_checksum = 0x0706,
+ /* LLDP commands */
+ ice_aqc_opc_lldp_get_mib = 0x0A00,
+ ice_aqc_opc_lldp_set_mib_change = 0x0A01,
+ ice_aqc_opc_lldp_add_tlv = 0x0A02,
+ ice_aqc_opc_lldp_update_tlv = 0x0A03,
+ ice_aqc_opc_lldp_delete_tlv = 0x0A04,
+ ice_aqc_opc_lldp_stop = 0x0A05,
+ ice_aqc_opc_lldp_start = 0x0A06,
+ ice_aqc_opc_get_cee_dcb_cfg = 0x0A07,
+ ice_aqc_opc_lldp_set_local_mib = 0x0A08,
+ ice_aqc_opc_lldp_stop_start_specific_agent = 0x0A09,
/* RSS commands */
ice_aqc_opc_set_rss_key = 0x0B02,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2ebf95eed..202592710 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1930,6 +1930,18 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
number);
}
break;
+ case ICE_AQC_CAPS_DCB:
+ caps->dcb = (number == 1);
+ caps->active_tc_bitmap = logical_id;
+ caps->maxtc = phys_id;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: DCB = %d\n", caps->dcb);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Active TC bitmap = %d\n",
+ caps->active_tc_bitmap);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: TC Max = %d\n", caps->maxtc);
+ break;
case ICE_AQC_CAPS_RSS:
caps->rss_table_size = number;
caps->rss_table_entry_width = logical_id;
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
new file mode 100644
index 000000000..a7810578d
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -0,0 +1,1393 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_sched.h"
+#include "ice_dcb.h"
+
+/**
+ * ice_aq_get_lldp_mib
+ * @hw: pointer to the HW struct
+ * @bridge_type: type of bridge requested
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @local_len: length of the returned Local LLDP MIB
+ * @remote_len: length of the returned Remote LLDP MIB
+ * @cd: pointer to command details structure or NULL
+ *
+ * Requests the complete LLDP MIB (entire packet). (0x0A00)
+ */
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_get_mib *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.lldp_get_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_get_mib);
+
+ cmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M;
+ cmd->type |= (bridge_type << ICE_AQ_LLDP_BRID_TYPE_S) &
+ ICE_AQ_LLDP_BRID_TYPE_M;
+
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status) {
+ if (local_len)
+ *local_len = LE16_TO_CPU(cmd->local_len);
+ if (remote_len)
+ *remote_len = LE16_TO_CPU(cmd->remote_len);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_cfg_lldp_mib_change
+ * @hw: pointer to the HW struct
+ * @ena_update: Enable or Disable event posting
+ * @cd: pointer to command details structure or NULL
+ *
+ * Enable or Disable posting of an event on ARQ when LLDP MIB
+ * associated with the interface changes (0x0A01)
+ */
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_mib_change *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_event;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_mib_change);
+
+ if (!ena_update)
+ cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_stop_lldp
+ * @hw: pointer to the HW struct
+ * @shutdown_lldp_agent: True if LLDP Agent needs to be Shutdown
+ * False if LLDP Agent needs to be Stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Stop or Shutdown the embedded LLDP Agent (0x0A05)
+ */
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_stop;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_stop);
+
+ if (shutdown_lldp_agent)
+ cmd->command |= ICE_AQ_LLDP_AGENT_SHUTDOWN;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_start_lldp
+ * @hw: pointer to the HW struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start the embedded LLDP Agent on all ports. (0x0A06)
+ */
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_start *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_start;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_start);
+
+ cmd->command = ICE_AQ_LLDP_AGENT_START;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_set_lldp_mib - Set the LLDP MIB
+ * @hw: pointer to the HW struct
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set the LLDP MIB. (0x0A08)
+ */
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_local_mib *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib);
+
+ desc.flags |= CPU_TO_LE16((u16)ICE_AQ_FLAG_RD);
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ cmd->type = mib_type;
+ cmd->length = CPU_TO_LE16(buf_size);
+
+ return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+}
+
+/**
+ * ice_get_dcbx_status
+ * @hw: pointer to the HW struct
+ *
+ * Get the DCBX status from the Firmware
+ */
+u8 ice_get_dcbx_status(struct ice_hw *hw)
+{
+ u32 reg;
+
+ reg = rd32(hw, PRTDCB_GENS);
+ return (u8)((reg & PRTDCB_GENS_DCBX_STATUS_M) >>
+ PRTDCB_GENS_DCBX_STATUS_S);
+}
+
+/**
+ * ice_parse_ieee_ets_common_tlv
+ * @buf: Data buffer to be parsed for ETS CFG/REC data
+ * @ets_cfg: Container to store parsed data
+ *
+ * Parses the common data of IEEE 802.1Qaz ETS CFG/REC TLV
+ */
+static void
+ice_parse_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ ets_cfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>
+ ICE_IEEE_ETS_PRIO_1_S);
+ ets_cfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>
+ ICE_IEEE_ETS_PRIO_0_S);
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 9 | 10| 11| 12| 13| 14| 15| 16|
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ ets_cfg->tcbwtable[i] = buf[offset];
+ ets_cfg->tsatable[i] = buf[ICE_MAX_TRAFFIC_CLASS + offset++];
+ }
+}
+
+/**
+ * ice_parse_ieee_etscfg_tlv
+ * @tlv: IEEE 802.1Qaz ETS CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_parse_ieee_etscfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ etscfg->willing = ((buf[0] & ICE_IEEE_ETS_WILLING_M) >>
+ ICE_IEEE_ETS_WILLING_S);
+ etscfg->cbs = ((buf[0] & ICE_IEEE_ETS_CBS_M) >> ICE_IEEE_ETS_CBS_S);
+ etscfg->maxtcs = ((buf[0] & ICE_IEEE_ETS_MAXTC_M) >>
+ ICE_IEEE_ETS_MAXTC_S);
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_parse_ieee_etsrec_tlv
+ * @tlv: IEEE 802.1Qaz ETS REC TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Parses IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_parse_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], &dcbcfg->etsrec);
+}
+
+/**
+ * ice_parse_ieee_pfccfg_tlv
+ * @tlv: IEEE 802.1Qaz PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_parse_ieee_pfccfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ dcbcfg->pfc.willing = ((buf[0] & ICE_IEEE_PFC_WILLING_M) >>
+ ICE_IEEE_PFC_WILLING_S);
+ dcbcfg->pfc.mbc = ((buf[0] & ICE_IEEE_PFC_MBC_M) >> ICE_IEEE_PFC_MBC_S);
+ dcbcfg->pfc.pfccap = ((buf[0] & ICE_IEEE_PFC_CAP_M) >>
+ ICE_IEEE_PFC_CAP_S);
+ dcbcfg->pfc.pfcena = buf[1];
+}
+
+/**
+ * ice_parse_ieee_app_tlv
+ * @tlv: IEEE 802.1Qaz APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses IEEE 802.1Qaz APP PRIO TLV
+ */
+static void
+ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 offset = 0;
+ u16 typelen;
+ int i = 0;
+ u16 len;
+ u8 *buf;
+
+ typelen = NTOHS(tlv->typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ buf = tlv->tlvinfo;
+
+ /* Removing sizeof(ouisubtype) and reserved byte from len.
+ * Remaining len div 3 is number of APP TLVs.
+ */
+ len -= (sizeof(tlv->ouisubtype) + 1);
+
+ /* Move offset to App Priority Table */
+ offset++;
+
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (offset < len) {
+ dcbcfg->app[i].priority = ((buf[offset] &
+ ICE_IEEE_APP_PRIO_M) >>
+ ICE_IEEE_APP_PRIO_S);
+ dcbcfg->app[i].selector = ((buf[offset] &
+ ICE_IEEE_APP_SEL_M) >>
+ ICE_IEEE_APP_SEL_S);
+ dcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |
+ buf[offset + 2];
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+
+ dcbcfg->numapps = i;
+}
+
+/**
+ * ice_parse_ieee_tlv
+ * @tlv: IEEE 802.1Qaz TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_ieee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u8 subtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ switch (subtype) {
+ case ICE_IEEE_SUBTYPE_ETS_CFG:
+ ice_parse_ieee_etscfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_ETS_REC:
+ ice_parse_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_PFC_CFG:
+ ice_parse_ieee_pfccfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_APP_PRI:
+ ice_parse_ieee_app_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_parse_cee_pgcfg_tlv
+ * @tlv: CEE DCBX PG CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses CEE DCBX PG CFG TLV
+ */
+static void
+ice_parse_cee_pgcfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u16 offset = 0;
+ int i;
+
+ etscfg = &dcbcfg->etscfg;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ etscfg->willing = 1;
+
+ etscfg->cbs = 0;
+ /* Priority Group Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ etscfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ etscfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ offset++;
+ }
+
+ /* PG Percentage Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |pg0|pg1|pg2|pg3|pg4|pg5|pg6|pg7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i)
+ etscfg->tcbwtable[i] = buf[offset++];
+
+ /* Number of TCs supported (1 octet) */
+ etscfg->maxtcs = buf[offset];
+}
+
+/**
+ * ice_parse_cee_pfccfg_tlv
+ * @tlv: CEE DCBX PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses CEE DCBX PFC CFG TLV
+ */
+static void
+ice_parse_cee_pfccfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ dcbcfg->pfc.willing = 1;
+
+ /* ------------------------
+ * | PFC Enable | PFC TCs |
+ * ------------------------
+ * | 1 octet | 1 octet |
+ */
+ dcbcfg->pfc.pfcena = buf[0];
+ dcbcfg->pfc.pfccap = buf[1];
+}
+
+/**
+ * ice_parse_cee_app_tlv
+ * @tlv: CEE DCBX APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses CEE DCBX APP PRIO TLV
+ */
+static void
+ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, typelen, offset = 0;
+ struct ice_cee_app_prio *app;
+ u8 i;
+
+ typelen = NTOHS(tlv->hdr.typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+
+ dcbcfg->numapps = len / sizeof(*app);
+ if (!dcbcfg->numapps)
+ return;
+ if (dcbcfg->numapps > ICE_DCBX_MAX_APPS)
+ dcbcfg->numapps = ICE_DCBX_MAX_APPS;
+
+ for (i = 0; i < dcbcfg->numapps; i++) {
+ u8 up, selector;
+
+ app = (struct ice_cee_app_prio *)(tlv->tlvinfo + offset);
+ for (up = 0; up < ICE_MAX_USER_PRIORITY; up++)
+ if (app->prio_map & BIT(up))
+ break;
+
+ dcbcfg->app[i].priority = up;
+
+ /* Get Selector from lower 2 bits, and convert to IEEE */
+ selector = (app->upper_oui_sel & ICE_CEE_APP_SELECTOR_M);
+ switch (selector) {
+ case ICE_CEE_APP_SEL_ETHTYPE:
+ dcbcfg->app[i].selector = ICE_APP_SEL_ETHTYPE;
+ break;
+ case ICE_CEE_APP_SEL_TCPIP:
+ dcbcfg->app[i].selector = ICE_APP_SEL_TCPIP;
+ break;
+ default:
+ /* Keep selector as it is for unknown types */
+ dcbcfg->app[i].selector = selector;
+ }
+
+ dcbcfg->app[i].prot_id = NTOHS(app->protocol);
+ /* Move to next app */
+ offset += sizeof(*app);
+ }
+}
+
+/**
+ * ice_parse_cee_tlv
+ * @tlv: CEE DCBX TLV
+ * @dcbcfg: Local store to update DCBX config data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_cee_feat_tlv *sub_tlv;
+ u8 subtype, feat_tlv_count = 0;
+ u16 len, tlvlen, typelen;
+ u32 ouisubtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ /* Return if not CEE DCBX */
+ if (subtype != ICE_CEE_DCBX_TYPE)
+ return;
+
+ typelen = NTOHS(tlv->typelen);
+ tlvlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ len = sizeof(tlv->typelen) + sizeof(ouisubtype) +
+ sizeof(struct ice_cee_ctrl_tlv);
+ /* Return if no CEE DCBX Feature TLVs */
+ if (tlvlen <= len)
+ return;
+
+ sub_tlv = (struct ice_cee_feat_tlv *)((char *)tlv + len);
+ while (feat_tlv_count < ICE_CEE_MAX_FEAT_TYPE) {
+ u16 sublen;
+
+ typelen = NTOHS(sub_tlv->hdr.typelen);
+ sublen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ subtype = (u8)((typelen & ICE_LLDP_TLV_TYPE_M) >>
+ ICE_LLDP_TLV_TYPE_S);
+ switch (subtype) {
+ case ICE_CEE_SUBTYPE_PG_CFG:
+ ice_parse_cee_pgcfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_PFC_CFG:
+ ice_parse_cee_pfccfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_APP_PRI:
+ ice_parse_cee_app_tlv(sub_tlv, dcbcfg);
+ break;
+ default:
+ return; /* Invalid Sub-type return */
+ }
+ feat_tlv_count++;
+ /* Move to next sub TLV */
+ sub_tlv = (struct ice_cee_feat_tlv *)
+ ((char *)sub_tlv + sizeof(sub_tlv->hdr.typelen) +
+ sublen);
+ }
+}
+
+/**
+ * ice_parse_org_tlv
+ * @tlv: Organization specific TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Currently only IEEE 802.1Qaz TLV is supported, all others
+ * will be returned
+ */
+static void
+ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u32 oui;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ oui = ((ouisubtype & ICE_LLDP_TLV_OUI_M) >> ICE_LLDP_TLV_OUI_S);
+ switch (oui) {
+ case ICE_IEEE_8021QAZ_OUI:
+ ice_parse_ieee_tlv(tlv, dcbcfg);
+ break;
+ case ICE_CEE_DCBX_OUI:
+ ice_parse_cee_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_lldp_to_dcb_cfg
+ * @lldpmib: LLDPDU to be parsed
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Parse DCB configuration from the LLDPDU
+ */
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_lldp_org_tlv *tlv;
+ enum ice_status ret = ICE_SUCCESS;
+ u16 offset = 0;
+ u16 typelen;
+ u16 type;
+ u16 len;
+
+ if (!lldpmib || !dcbcfg)
+ return ICE_ERR_PARAM;
+
+ /* set to the start of LLDPDU */
+ lldpmib += ETH_HEADER_LEN;
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ typelen = NTOHS(tlv->typelen);
+ type = ((typelen & ICE_LLDP_TLV_TYPE_M) >> ICE_LLDP_TLV_TYPE_S);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ offset += sizeof(typelen) + len;
+
+ /* END TLV or beyond LLDPDU size */
+ if (type == ICE_TLV_TYPE_END || offset > ICE_LLDPDU_SIZE)
+ break;
+
+ switch (type) {
+ case ICE_TLV_TYPE_ORG:
+ ice_parse_org_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+
+ /* Move to next TLV */
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_aq_get_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @mib_type: mib type for the query
+ * @bridgetype: bridge type for the query (remote)
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Query DCB configuration from the firmware
+ */
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ enum ice_status ret;
+ u8 *lldpmib;
+
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ ret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,
+ ICE_LLDPDU_SIZE, NULL, NULL, NULL);
+
+ if (ret == ICE_SUCCESS)
+ /* Parse LLDP MIB to get DCB configuration */
+ ret = ice_lldp_to_dcb_cfg(lldpmib, dcbcfg);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_start_stop_dcbx - Start/Stop DCBx service in FW
+ * @hw: pointer to the HW struct
+ * @start_dcbx_agent: True if DCBx Agent needs to be started
+ * False if DCBx Agent needs to be stopped
+ * @dcbx_agent_status: FW indicates back the DCBx agent status
+ * True if DCBx Agent is active
+ * False if DCBx Agent is stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start/Stop the embedded dcbx Agent. In case that this wrapper function
+ * returns ICE_SUCCESS, caller will need to check if FW returns back the same
+ * value as stated in dcbx_agent_status, and react accordingly. (0x0A09)
+ */
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop_start_specific_agent *cmd;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+ u16 opcode;
+
+ cmd = &desc.params.lldp_agent_ctrl;
+
+ opcode = ice_aqc_opc_lldp_stop_start_specific_agent;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, opcode);
+
+ if (start_dcbx_agent)
+ cmd->command = ICE_AQC_START_STOP_AGENT_START_DCBX;
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+
+ *dcbx_agent_status = false;
+
+ if (status == ICE_SUCCESS &&
+ cmd->command == ICE_AQC_START_STOP_AGENT_START_DCBX)
+ *dcbx_agent_status = true;
+
+ return status;
+}
+
+/**
+ * ice_aq_get_cee_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @buff: response buffer that stores CEE operational configuration
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get CEE DCBX mode operational configuration from firmware (0x0A07)
+ */
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cee_dcb_cfg);
+
+ return ice_aq_send_cmd(hw, &desc, (void *)buff, sizeof(*buff), cd);
+}
+
+/**
+ * ice_cee_to_dcb_cfg
+ * @cee_cfg: pointer to CEE configuration struct
+ * @dcbcfg: DCB configuration struct
+ *
+ * Convert CEE configuration from firmware to DCB configuration
+ */
+static void
+ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
+ u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
+ u16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);
+ u8 i, err, sync, oper, app_index, ice_app_sel_type;
+ u16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;
+ u16 ice_app_prot_id_type;
+
+ /* CEE PG data to ETS config */
+ dcbcfg->etscfg.maxtcs = cee_cfg->oper_num_tc;
+
+ /* Note that the FW creates the oper_prio_tc nibbles reversed
+ * from those in the CEE Priority Group sub-TLV.
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ dcbcfg->etscfg.prio_table[i * 2] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ dcbcfg->etscfg.prio_table[i * 2 + 1] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ }
+
+ ice_for_each_traffic_class(i) {
+ dcbcfg->etscfg.tcbwtable[i] = cee_cfg->oper_tc_bw[i];
+
+ if (dcbcfg->etscfg.prio_table[i] == ICE_CEE_PGID_STRICT) {
+ /* Map it to next empty TC */
+ dcbcfg->etscfg.prio_table[i] = cee_cfg->oper_num_tc - 1;
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_STRICT;
+ } else {
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_ETS;
+ }
+ }
+
+ /* CEE PFC data to ETS config */
+ dcbcfg->pfc.pfcena = cee_cfg->oper_pfc_en;
+ dcbcfg->pfc.pfccap = ICE_MAX_TRAFFIC_CLASS;
+
+ app_index = 0;
+ for (i = 0; i < 3; i++) {
+ if (i == 0) {
+ /* FCoE APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FCOE_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FCOE_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FCOE_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FCOE_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FCOE;
+ } else if (i == 1) {
+ /* iSCSI APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_ISCSI_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_ISCSI_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_ISCSI_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_ISCSI_S;
+ ice_app_sel_type = ICE_APP_SEL_TCPIP;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_ISCSI;
+ } else {
+ /* FIP APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FIP_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FIP_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FIP_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FIP_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FIP;
+ }
+
+ status = (tlv_status & ice_aqc_cee_status_mask) >>
+ ice_aqc_cee_status_shift;
+ err = (status & ICE_TLV_STATUS_ERR) ? 1 : 0;
+ sync = (status & ICE_TLV_STATUS_SYNC) ? 1 : 0;
+ oper = (status & ICE_TLV_STATUS_OPER) ? 1 : 0;
+ /* Add FCoE/iSCSI/FIP APP if Error is False and
+ * Oper/Sync is True
+ */
+ if (!err && sync && oper) {
+ dcbcfg->app[app_index].priority =
+ (app_prio & ice_aqc_cee_app_mask) >>
+ ice_aqc_cee_app_shift;
+ dcbcfg->app[app_index].selector = ice_app_sel_type;
+ dcbcfg->app[app_index].prot_id = ice_app_prot_id_type;
+ app_index++;
+ }
+ }
+
+ dcbcfg->numapps = app_index;
+}
+
+/**
+ * ice_get_ieee_dcb_cfg
+ * @pi: port information structure
+ * @dcbx_mode: mode of DCBX (IEEE or CEE)
+ *
+ * Get IEEE or CEE mode DCB configuration from the Firmware
+ */
+STATIC enum ice_status
+ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
+{
+ struct ice_dcbx_cfg *dcbx_cfg = NULL;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ if (dcbx_mode == ICE_DCBX_MODE_IEEE)
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ else if (dcbx_mode == ICE_DCBX_MODE_CEE)
+ dcbx_cfg = &pi->desired_dcbx_cfg;
+
+ /* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE
+ * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE
+ */
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ if (ret)
+ goto out;
+
+ /* Get Remote DCB Config */
+ dcbx_cfg = &pi->remote_dcbx_cfg;
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ /* Don't treat ENOENT as an error for Remote MIBs */
+ if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+ ret = ICE_SUCCESS;
+
+out:
+ return ret;
+}
+
+/**
+ * ice_get_dcb_cfg
+ * @pi: port information structure
+ *
+ * Get DCB configuration from the Firmware
+ */
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
+{
+ struct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;
+ struct ice_dcbx_cfg *dcbx_cfg;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
+ if (ret == ICE_SUCCESS) {
+ /* CEE mode */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
+ dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
+ ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
+ } else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
+ /* CEE mode not enabled try querying IEEE data */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_init_dcb
+ * @hw: pointer to the HW struct
+ *
+ * Update DCB configuration from the Firmware
+ */
+enum ice_status ice_init_dcb(struct ice_hw *hw)
+{
+ struct ice_port_info *pi = hw->port_info;
+ enum ice_status ret = ICE_SUCCESS;
+
+ if (!hw->func_caps.common_cap.dcb)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ pi->is_sw_lldp = true;
+
+ /* Get DCBX status */
+ pi->dcbx_status = ice_get_dcbx_status(hw);
+
+ if (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||
+ pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS) {
+ /* Get current DCBX configuration */
+ ret = ice_get_dcb_cfg(pi);
+ pi->is_sw_lldp = (hw->adminq.sq_last_status == ICE_AQ_RC_EPERM);
+ if (ret)
+ return ret;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {
+ return ICE_ERR_NOT_READY;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_MULTIPLE_PEERS) {
+ }
+
+ /* Configure the LLDP MIB change event */
+ ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);
+ if (!ret)
+ pi->is_sw_lldp = false;
+
+ return ret;
+}
+
+/**
+ * ice_add_ieee_ets_common_tlv
+ * @buf: Data buffer to be populated with ice_dcb_ets_cfg data
+ * @ets_cfg: Container for ice_dcb_ets_cfg data
+ *
+ * Populate the TLV buffer with ice_dcb_ets_cfg data
+ */
+static void
+ice_add_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 priority0, priority1;
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ priority0 = ets_cfg->prio_table[i * 2] & 0xF;
+ priority1 = ets_cfg->prio_table[i * 2 + 1] & 0xF;
+ buf[offset] = (priority0 << ICE_IEEE_ETS_PRIO_1_S) | priority1;
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ buf[offset] = ets_cfg->tcbwtable[i];
+ buf[ICE_MAX_TRAFFIC_CLASS + offset] = ets_cfg->tsatable[i];
+ offset++;
+ }
+}
+
+/**
+ * ice_add_ieee_ets_tlv - Prepare ETS TLV in IEEE format
+ * @tlv: Fill the ETS config data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_add_ieee_ets_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u8 maxtcwilling = 0;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ if (etscfg->willing)
+ maxtcwilling = BIT(ICE_IEEE_ETS_WILLING_S);
+ maxtcwilling |= etscfg->maxtcs & ICE_IEEE_ETS_MAXTC_M;
+ buf[0] = maxtcwilling;
+
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_add_ieee_etsrec_tlv - Prepare ETS Recommended TLV in IEEE format
+ * @tlv: Fill ETS Recommended TLV in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_add_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etsrec;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_REC);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ etsrec = &dcbcfg->etsrec;
+
+ /* First Octet is reserved */
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etsrec);
+}
+
+/**
+ * ice_add_ieee_pfc_tlv - Prepare PFC TLV in IEEE format
+ * @tlv: Fill PFC TLV in IEEE format
+ * @dcbcfg: Local store which holds the PFC CFG data
+ *
+ * Prepare IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_add_ieee_pfc_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_PFC_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_PFC_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ if (dcbcfg->pfc.willing)
+ buf[0] = BIT(ICE_IEEE_PFC_WILLING_S);
+
+ if (dcbcfg->pfc.mbc)
+ buf[0] |= BIT(ICE_IEEE_PFC_MBC_S);
+
+ buf[0] |= dcbcfg->pfc.pfccap & 0xF;
+ buf[1] = dcbcfg->pfc.pfcena;
+}
+
+/**
+ * ice_add_ieee_app_pri_tlv - Prepare APP TLV in IEEE format
+ * @tlv: Fill APP TLV in IEEE format
+ * @dcbcfg: Local store which holds the APP CFG data
+ *
+ * Prepare IEEE 802.1Qaz APP CFG TLV
+ */
+static void
+ice_add_ieee_app_pri_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 typelen, len, offset = 0;
+ u8 priority, selector, i = 0;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+
+ /* No APP TLVs then just return */
+ if (dcbcfg->numapps == 0)
+ return;
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_APP_PRI);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* Move offset to App Priority Table */
+ offset++;
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (i < dcbcfg->numapps) {
+ priority = dcbcfg->app[i].priority & 0x7;
+ selector = dcbcfg->app[i].selector & 0x7;
+ buf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;
+ buf[offset + 1] = (dcbcfg->app[i].prot_id >> 0x8) & 0xFF;
+ buf[offset + 2] = dcbcfg->app[i].prot_id & 0xFF;
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+ /* len includes size of ouisubtype + 1 reserved + 3*numapps */
+ len = sizeof(tlv->ouisubtype) + 1 + (i * 3);
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) | (len & 0x1FF));
+ tlv->typelen = HTONS(typelen);
+}
+
+/**
+ * ice_add_dcb_tlv - Add all IEEE TLVs
+ * @tlv: Fill TLV data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ * @tlvid: Type of IEEE TLV
+ *
+ * Add tlv information
+ */
+static void
+ice_add_dcb_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg,
+ u16 tlvid)
+{
+ switch (tlvid) {
+ case ICE_IEEE_TLV_ID_ETS_CFG:
+ ice_add_ieee_ets_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_ETS_REC:
+ ice_add_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_PFC_CFG:
+ ice_add_ieee_pfc_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_APP_PRI:
+ ice_add_ieee_app_pri_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_dcb_cfg_to_lldp - Convert DCB configuration to MIB format
+ * @lldpmib: pointer to the HW struct
+ * @miblen: length of LLDP mib
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Convert the DCB configuration to MIB format
+ */
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, offset = 0, tlvid = ICE_TLV_ID_START;
+ struct ice_lldp_org_tlv *tlv;
+ u16 typelen;
+
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ ice_add_dcb_tlv(tlv, dcbcfg, tlvid++);
+ typelen = NTOHS(tlv->typelen);
+ len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
+ if (len)
+ offset += len + 2;
+ /* END TLV or beyond LLDPDU size */
+ if (tlvid >= ICE_TLV_ID_END_OF_LLDPPDU ||
+ offset > ICE_LLDPDU_SIZE)
+ break;
+ /* Move to next TLV */
+ if (len)
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+ *miblen = offset;
+}
+
+/**
+ * ice_set_dcb_cfg - Set the local LLDP MIB to FW
+ * @pi: port information structure
+ *
+ * Set DCB configuration to the Firmware
+ */
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
+{
+ u8 mib_type, *lldpmib = NULL;
+ struct ice_dcbx_cfg *dcbcfg;
+ enum ice_status ret;
+ struct ice_hw *hw;
+ u16 miblen;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ hw = pi->hw;
+
+ /* update the HW local config */
+ dcbcfg = &pi->local_dcbx_cfg;
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ mib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;
+ if (dcbcfg->app_mode == ICE_DCBX_APPS_NON_WILLING)
+ mib_type |= SET_LOCAL_MIB_TYPE_CEE_NON_WILLING;
+
+ ice_dcb_cfg_to_lldp(lldpmib, &miblen, dcbcfg);
+ ret = ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen,
+ NULL);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration
+ */
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_query_port_ets *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ cmd = &desc.params.port_ets;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_port_ets);
+ cmd->port_teid = pi->root->info.node_teid;
+
+ status = ice_aq_send_cmd(pi->hw, &desc, buf, buf_size, cd);
+ return status;
+}
+
+/**
+ * ice_update_port_tc_tree_cfg - update TC tree configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ *
+ * update the SW DB with the new TC changes
+ */
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf)
+{
+ struct ice_sched_node *node, *tc_node;
+ struct ice_aqc_get_elem elem;
+ enum ice_status status = ICE_SUCCESS;
+ u32 teid1, teid2;
+ u8 i, j;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ /* suspend the missing TC nodes */
+ for (i = 0; i < pi->root->num_children; i++) {
+ teid1 = LE32_TO_CPU(pi->root->children[i]->info.node_teid);
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid1 == teid2)
+ break;
+ }
+ if (j < ICE_MAX_TRAFFIC_CLASS)
+ continue;
+ /* TC is missing */
+ pi->root->children[i]->in_use = false;
+ }
+ /* add the new TC nodes */
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid2 == ICE_INVAL_TEID)
+ continue;
+ /* Is it already present in the tree ? */
+ for (i = 0; i < pi->root->num_children; i++) {
+ tc_node = pi->root->children[i];
+ if (!tc_node)
+ continue;
+ teid1 = LE32_TO_CPU(tc_node->info.node_teid);
+ if (teid1 == teid2) {
+ tc_node->tc_num = j;
+ tc_node->in_use = true;
+ break;
+ }
+ }
+ if (i < pi->root->num_children)
+ continue;
+ /* new TC */
+ status = ice_sched_query_elem(pi->hw, teid2, &elem);
+ if (!status)
+ status = ice_sched_add_node(pi, 1, &elem.generic[0]);
+ if (status)
+ break;
+ /* update the TC number */
+ node = ice_sched_find_node_by_teid(pi->root, teid2);
+ if (node)
+ node->tc_num = j;
+ }
+ return status;
+}
+
+/**
+ * ice_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration and update the
+ * SW DB with the TC changes
+ */
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ enum ice_status status;
+
+ ice_acquire_lock(&pi->sched_lock);
+ status = ice_aq_query_port_ets(pi, buf, buf_size, cd);
+ if (!status)
+ status = ice_update_port_tc_tree_cfg(pi, buf);
+ ice_release_lock(&pi->sched_lock);
+ return status;
+}
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
new file mode 100644
index 000000000..d922c8a29
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -0,0 +1,223 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_DCB_H_
+#define _ICE_DCB_H_
+
+#include "ice_type.h"
+
+#define ICE_DCBX_OFFLOAD_DIS 0
+#define ICE_DCBX_OFFLOAD_ENABLED 1
+
+#define ICE_DCBX_STATUS_NOT_STARTED 0
+#define ICE_DCBX_STATUS_IN_PROGRESS 1
+#define ICE_DCBX_STATUS_DONE 2
+#define ICE_DCBX_STATUS_MULTIPLE_PEERS 3
+#define ICE_DCBX_STATUS_DIS 7
+
+#define ICE_TLV_TYPE_END 0
+#define ICE_TLV_TYPE_ORG 127
+
+#define ICE_IEEE_8021QAZ_OUI 0x0080C2
+#define ICE_IEEE_SUBTYPE_ETS_CFG 9
+#define ICE_IEEE_SUBTYPE_ETS_REC 10
+#define ICE_IEEE_SUBTYPE_PFC_CFG 11
+#define ICE_IEEE_SUBTYPE_APP_PRI 12
+
+#define ICE_CEE_DCBX_OUI 0x001B21
+#define ICE_CEE_DCBX_TYPE 2
+
+#define ICE_CEE_SUBTYPE_CTRL 1
+#define ICE_CEE_SUBTYPE_PG_CFG 2
+#define ICE_CEE_SUBTYPE_PFC_CFG 3
+#define ICE_CEE_SUBTYPE_APP_PRI 4
+
+#define ICE_CEE_MAX_FEAT_TYPE 3
+#define ICE_LLDP_ADMINSTATUS_DIS 0
+#define ICE_LLDP_ADMINSTATUS_ENA_RX 1
+#define ICE_LLDP_ADMINSTATUS_ENA_TX 2
+#define ICE_LLDP_ADMINSTATUS_ENA_RXTX 3
+
+/* Defines for LLDP TLV header */
+#define ICE_LLDP_TLV_LEN_S 0
+#define ICE_LLDP_TLV_LEN_M (0x01FF << ICE_LLDP_TLV_LEN_S)
+#define ICE_LLDP_TLV_TYPE_S 9
+#define ICE_LLDP_TLV_TYPE_M (0x7F << ICE_LLDP_TLV_TYPE_S)
+#define ICE_LLDP_TLV_SUBTYPE_S 0
+#define ICE_LLDP_TLV_SUBTYPE_M (0xFF << ICE_LLDP_TLV_SUBTYPE_S)
+#define ICE_LLDP_TLV_OUI_S 8
+#define ICE_LLDP_TLV_OUI_M (0xFFFFFFUL << ICE_LLDP_TLV_OUI_S)
+
+/* Defines for IEEE ETS TLV */
+#define ICE_IEEE_ETS_MAXTC_S 0
+#define ICE_IEEE_ETS_MAXTC_M (0x7 << ICE_IEEE_ETS_MAXTC_S)
+#define ICE_IEEE_ETS_CBS_S 6
+#define ICE_IEEE_ETS_CBS_M BIT(ICE_IEEE_ETS_CBS_S)
+#define ICE_IEEE_ETS_WILLING_S 7
+#define ICE_IEEE_ETS_WILLING_M BIT(ICE_IEEE_ETS_WILLING_S)
+#define ICE_IEEE_ETS_PRIO_0_S 0
+#define ICE_IEEE_ETS_PRIO_0_M (0x7 << ICE_IEEE_ETS_PRIO_0_S)
+#define ICE_IEEE_ETS_PRIO_1_S 4
+#define ICE_IEEE_ETS_PRIO_1_M (0x7 << ICE_IEEE_ETS_PRIO_1_S)
+#define ICE_CEE_PGID_PRIO_0_S 0
+#define ICE_CEE_PGID_PRIO_0_M (0xF << ICE_CEE_PGID_PRIO_0_S)
+#define ICE_CEE_PGID_PRIO_1_S 4
+#define ICE_CEE_PGID_PRIO_1_M (0xF << ICE_CEE_PGID_PRIO_1_S)
+#define ICE_CEE_PGID_STRICT 15
+
+/* Defines for IEEE TSA types */
+#define ICE_IEEE_TSA_STRICT 0
+#define ICE_IEEE_TSA_CBS 1
+#define ICE_IEEE_TSA_ETS 2
+#define ICE_IEEE_TSA_VENDOR 255
+
+/* Defines for IEEE PFC TLV */
+#define ICE_IEEE_PFC_CAP_S 0
+#define ICE_IEEE_PFC_CAP_M (0xF << ICE_IEEE_PFC_CAP_S)
+#define ICE_IEEE_PFC_MBC_S 6
+#define ICE_IEEE_PFC_MBC_M BIT(ICE_IEEE_PFC_MBC_S)
+#define ICE_IEEE_PFC_WILLING_S 7
+#define ICE_IEEE_PFC_WILLING_M BIT(ICE_IEEE_PFC_WILLING_S)
+
+/* Defines for IEEE APP TLV */
+#define ICE_IEEE_APP_SEL_S 0
+#define ICE_IEEE_APP_SEL_M (0x7 << ICE_IEEE_APP_SEL_S)
+#define ICE_IEEE_APP_PRIO_S 5
+#define ICE_IEEE_APP_PRIO_M (0x7 << ICE_IEEE_APP_PRIO_S)
+
+/* TLV definitions for preparing MIB */
+#define ICE_TLV_ID_CHASSIS_ID 0
+#define ICE_TLV_ID_PORT_ID 1
+#define ICE_TLV_ID_TIME_TO_LIVE 2
+#define ICE_IEEE_TLV_ID_ETS_CFG 3
+#define ICE_IEEE_TLV_ID_ETS_REC 4
+#define ICE_IEEE_TLV_ID_PFC_CFG 5
+#define ICE_IEEE_TLV_ID_APP_PRI 6
+#define ICE_TLV_ID_END_OF_LLDPPDU 7
+#define ICE_TLV_ID_START ICE_IEEE_TLV_ID_ETS_CFG
+
+#define ICE_IEEE_ETS_TLV_LEN 25
+#define ICE_IEEE_PFC_TLV_LEN 6
+#define ICE_IEEE_APP_TLV_LEN 11
+
+#pragma pack(1)
+/* IEEE 802.1AB LLDP TLV structure */
+struct ice_lldp_generic_tlv {
+ __be16 typelen;
+ u8 tlvinfo[1];
+};
+
+/* IEEE 802.1AB LLDP Organization specific TLV */
+struct ice_lldp_org_tlv {
+ __be16 typelen;
+ __be32 ouisubtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack()
+
+struct ice_cee_tlv_hdr {
+ __be16 typelen;
+ u8 operver;
+ u8 maxver;
+};
+
+struct ice_cee_ctrl_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ __be32 seqno;
+ __be32 ackno;
+};
+
+struct ice_cee_feat_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
+#define ICE_CEE_FEAT_TLV_ENA_M 0x80
+#define ICE_CEE_FEAT_TLV_WILLING_M 0x40
+#define ICE_CEE_FEAT_TLV_ERR_M 0x20
+ u8 subtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack(1)
+struct ice_cee_app_prio {
+ __be16 protocol;
+ u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
+#define ICE_CEE_APP_SELECTOR_M 0x03
+ __be16 lower_oui;
+ u8 prio_map;
+};
+
+#pragma pack()
+
+/* TODO: The below structures related LLDP/DCBX variables
+ * and statistics are defined but need to find how to get
+ * the required information from the Firmware to use them
+ */
+
+/* IEEE 802.1AB LLDP Agent Statistics */
+struct ice_lldp_stats {
+ u64 remtablelastchangetime;
+ u64 remtableinserts;
+ u64 remtabledeletes;
+ u64 remtabledrops;
+ u64 remtableageouts;
+ u64 txframestotal;
+ u64 rxframesdiscarded;
+ u64 rxportframeerrors;
+ u64 rxportframestotal;
+ u64 rxporttlvsdiscardedtotal;
+ u64 rxporttlvsunrecognizedtotal;
+ u64 remtoomanyneighbors;
+};
+
+/* IEEE 802.1Qaz DCBX variables */
+struct ice_dcbx_variables {
+ u32 defmaxtrafficclasses;
+ u32 defprioritytcmapping;
+ u32 deftcbandwidth;
+ u32 deftsaassignment;
+};
+
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd);
+u8 ice_get_dcbx_status(struct ice_hw *hw);
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg);
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_init_dcb(struct ice_hw *hw);
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cmd_details);
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf);
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd);
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd);
+#endif /* _ICE_DCB_H_ */
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index cd561b0a4..ac120fa30 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -13,6 +13,7 @@ enum ice_status {
ICE_ERR_PARAM = -1,
ICE_ERR_NOT_IMPL = -2,
ICE_ERR_NOT_READY = -3,
+ ICE_ERR_NOT_SUPPORTED = -4,
ICE_ERR_BAD_PTR = -5,
ICE_ERR_INVAL_SIZE = -6,
ICE_ERR_DEVICE_NOT_SUPPORTED = -8,
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 90736faa1..6a08b3d28 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -240,6 +240,9 @@ struct ice_hw_common_caps {
u32 os2bmc;
u32 valid_functions;
+ /* DCB capabilities */
+ u32 active_tc_bitmap;
+ u32 maxtc;
/* RSS related capabilities */
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
@@ -276,6 +279,7 @@ struct ice_hw_common_caps {
u8 evb_802_1_qbg; /* Edge Virtual Bridging */
u8 evb_802_1_qbh; /* Bridge Port Extension */
+ u8 dcb;
u8 iscsi;
u8 mgmt_cem;
@@ -527,7 +531,6 @@ struct ice_sched_vsi_info {
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
/* CEE or IEEE 802.1Qaz ETS Configuration data */
struct ice_dcb_ets_cfg {
u8 willing;
@@ -580,7 +583,6 @@ struct ice_dcbx_cfg {
u8 app_mode;
#define ICE_DCBX_APPS_NON_WILLING 0x1
};
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
@@ -601,9 +603,13 @@ struct ice_port_info {
struct ice_lock sched_lock; /* protect access to TXSched tree */
/* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
+ /* DCBX info */
+ struct ice_dcbx_cfg remote_dcbx_cfg; /* Peer Cfg */
+ struct ice_dcbx_cfg desired_dcbx_cfg; /* CEE Desired Cfg */
+ /* LLDP/DCBX Status */
+ u8 dcbx_status;
+ u8 is_sw_lldp;
u8 lport;
#define ICE_LPORT_MASK 0xff
u8 is_vf;
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index d7f8536bc..755d2497b 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -9,6 +9,7 @@ sources = [
'ice_nvm.c',
'ice_flex_pipe.c',
'ice_flow.c',
+ 'ice_dcb.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 32/37] net/ice/base: add FDIR support
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (30 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 31/37] net/ice/base: add DCB support Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 33/37] net/ice/base: change profile priority for RSS reply Qi Zhang
` (7 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Add flow director related support base code.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 13 +
drivers/net/ice/base/ice_common.c | 36 ++
drivers/net/ice/base/ice_common.h | 1 +
drivers/net/ice/base/ice_fdir.c | 742 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++++++++
drivers/net/ice/base/ice_flex_pipe.c | 232 +++++++++++
drivers/net/ice/base/ice_type.h | 55 +++
drivers/net/ice/base/meson.build | 1 +
9 files changed, 1283 insertions(+)
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 89d21334e..a3aabccf1 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -52,6 +52,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_fdir.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 4c5cf5419..d2ab9eeff 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -105,6 +105,7 @@ struct ice_aqc_list_caps_elem {
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
#define ICE_AQC_CAPS_MSIX 0x0043
+#define ICE_AQC_CAPS_FD 0x0045
#define ICE_AQC_CAPS_MAX_MTU 0x0047
u8 major_ver;
@@ -1861,6 +1862,16 @@ struct ice_aqc_get_set_rss_lut {
};
+/* Clear FD Table Command (direct, 0x0B06) */
+struct ice_aqc_clear_fd_table {
+ u8 clear_type;
+#define CL_FD_VM_VF_TYPE_VSI_IDX 1
+#define CL_FD_VM_VF_TYPE_PF_IDX 2
+ u8 rsvd;
+ __le16 vsi_index;
+ u8 reserved[12];
+};
+
@@ -2210,6 +2221,7 @@ struct ice_aq_desc {
struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
+ struct ice_aqc_clear_fd_table clear_fd_table;
struct ice_aqc_add_txqs add_txqs;
struct ice_aqc_dis_txqs dis_txqs;
struct ice_aqc_txqs_cleanup txqs_cleanup;
@@ -2415,6 +2427,7 @@ enum ice_adminq_opc {
ice_aqc_opc_set_rss_lut = 0x0B03,
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
+ ice_aqc_opc_clear_fd_table = 0x0B06,
/* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 202592710..425f76e8d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -805,6 +805,9 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
goto err_unroll_cqinit;
+ /* Set bit to enable Flow Director filters */
+ wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
+ INIT_LIST_HEAD(&hw->fdir_list_head);
ice_clear_pxe_mode(hw);
@@ -901,6 +904,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);
+ /* Obtain counter base index which would be used by flow director */
+ status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
+ if (status)
+ goto err_unroll_fltr_mgmt_struct;
return ICE_SUCCESS;
@@ -926,6 +933,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
*/
void ice_deinit_hw(struct ice_hw *hw)
{
+ ice_free_fd_res_cntr(hw, hw->fd_ctr_base);
ice_cleanup_fltr_mgmt_struct(hw);
ice_sched_cleanup_all(hw);
@@ -1980,6 +1988,34 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
"HW caps: MSIX first vector index = %d\n",
caps->msix_vector_first_id);
break;
+ case ICE_AQC_CAPS_FD:
+ {
+ u32 reg_val, val;
+
+ if (dev_p) {
+ dev_p->num_flow_director_fltr = number;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Dev.fd_fltr =%d\n",
+ dev_p->num_flow_director_fltr);
+ }
+ if (func_p) {
+ reg_val = rd32(hw, GLQF_FD_SIZE);
+ val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>
+ GLQF_FD_SIZE_FD_GSIZE_S;
+ func_p->fd_fltr_guar =
+ ice_get_num_per_func(hw, val);
+ val = (reg_val & GLQF_FD_SIZE_FD_BSIZE_M) >>
+ GLQF_FD_SIZE_FD_BSIZE_S;
+ func_p->fd_fltr_best_effort = val;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr guar= %d\n",
+ func_p->fd_fltr_guar);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr best effort=%d\n",
+ func_p->fd_fltr_best_effort);
+ }
+ break;
+ }
case ICE_AQC_CAPS_MAX_MTU:
caps->max_mtu = number;
if (dev_p)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 9665f3204..4dc43dcfe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -9,6 +9,7 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+#include "ice_fdir.h"
enum ice_fw_modes {
ICE_FW_MODE_NORMAL,
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
new file mode 100644
index 000000000..4bc8e6dcb
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -0,0 +1,742 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_fdir.h"
+
+/* These are dummy packet headers used to program flow director filters. */
+static const u8 ice_fdir_tcpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x28, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00,
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static const u8 ice_fdir_udpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x1C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x20, 0x00, 0x00, 0x40, 0x00, 0x40, 0x84,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x10,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00
+};
+
+static const u8 ice_fdir_tcpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x0C, 0x84, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x3B, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* Flow Director dummy packet table */
+static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ sizeof(ice_fdir_tcpv4_pkt),
+ ice_fdir_tcpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ sizeof(ice_fdir_udpv4_pkt),
+ ice_fdir_udpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ sizeof(ice_fdir_sctpv4_pkt),
+ ice_fdir_sctpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ sizeof(ice_fdir_ipv4_pkt),
+ ice_fdir_ipv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ sizeof(ice_fdir_tcpv6_pkt),
+ ice_fdir_tcpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ sizeof(ice_fdir_udpv6_pkt),
+ ice_fdir_udpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ sizeof(ice_fdir_sctpv6_pkt),
+ ice_fdir_sctpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ sizeof(ice_fdir_ipv6_pkt),
+ ice_fdir_ipv6_pkt,
+ },
+};
+
+#define ICE_FDIR_NUM_PKT ARRAY_SIZE(ice_fdir_pkt)
+
+/* Flow Direcotr (FD) filter program descriptor Context */
+static const struct ice_ctx_ele ice_fd_fltr_desc_ctx_info[] = {
+ /* Field Width LSB */
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, qindex, 11, 0),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_q, 1, 11),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_report, 2, 12),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_space, 2, 14),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_index, 13, 16),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_ena, 2, 29),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, evict_ena, 1, 31),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq, 3, 32),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq_prio, 3, 35),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dpu_recipe, 2, 38),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, drop, 1, 40),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_prio, 3, 41),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_mdid, 4, 44),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_val, 16, 48),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dtype, 4, 64),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, pcmd, 1, 68),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof_prio, 3, 69),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof, 6, 72),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_vsi, 10, 78),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, swap, 1, 88),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_prio, 3, 89),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_mdid, 4, 92),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid, 32, 96),
+ { 0 }
+};
+
+/**
+ * ice_set_dflt_val_fd_desc
+ * @fd_fltr_ctx: pointer to fd filter descriptor
+ */
+void
+ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
+{
+ fd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;
+ fd_fltr_ctx->fd_space = ICE_FXD_FLTR_QW0_FD_SPACE_GUAR_BEST;
+ fd_fltr_ctx->cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fd_fltr_ctx->evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_TRUE;
+ fd_fltr_ctx->toq = ICE_FXD_FLTR_QW0_TO_Q_EQUALS_QINDEX;
+ fd_fltr_ctx->toq_prio = ICE_FXD_FLTR_QW0_TO_Q_PRIO1;
+ fd_fltr_ctx->dpu_recipe = ICE_FXD_FLTR_QW0_DPU_RECIPE_DFLT;
+ fd_fltr_ctx->drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fd_fltr_ctx->flex_prio = ICE_FXD_FLTR_QW0_FLEX_PRI_NONE;
+ fd_fltr_ctx->flex_mdid = ICE_FXD_FLTR_QW0_FLEX_MDID0;
+ fd_fltr_ctx->flex_val = ICE_FXD_FLTR_QW0_FLEX_VAL0;
+ fd_fltr_ctx->dtype = ICE_TX_DESC_DTYPE_FLTR_PROG;
+ fd_fltr_ctx->desc_prof_prio = ICE_FXD_FLTR_QW1_PROF_PRIO_ZERO;
+ fd_fltr_ctx->desc_prof = ICE_FXD_FLTR_QW1_PROF_ZERO;
+ fd_fltr_ctx->swap = ICE_FXD_FLTR_QW1_SWAP_SET;
+ fd_fltr_ctx->fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ZERO;
+ fd_fltr_ctx->fdid_mdid = ICE_FXD_FLTR_QW1_FDID_MDID_FD;
+ fd_fltr_ctx->fdid = ICE_FXD_FLTR_QW1_FDID_ZERO;
+}
+
+/**
+ * ice_fdir_get_prgm_desc - set a fdir descriptor from a fdir filter struct
+ * @hw: pointer to the hardware structure
+ * @input: filter
+ * @fdesc: filter descriptor
+ * @add: if add is true, this is an add operation, false implies delete
+ */
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add)
+{
+ struct ice_fd_fltr_desc_ctx fdir_fltr_ctx = { 0 };
+
+ /* set default context info */
+ ice_set_dflt_val_fd_desc(&fdir_fltr_ctx);
+
+ /* change sideband filtering values */
+ fdir_fltr_ctx.fdid = input->fltr_id;
+ if (input->dest_ctl == ICE_FLTR_PRGM_DESC_DEST_DROP_PKT) {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;
+ fdir_fltr_ctx.qindex = 0;
+ } else {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fdir_fltr_ctx.qindex = input->q_index;
+ }
+ fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fdir_fltr_ctx.cnt_index = input->cnt_index;
+ fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi);
+ fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE;
+ fdir_fltr_ctx.toq_prio = 3;
+ fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+ ICE_FXD_FLTR_QW1_PCMD_REMOVE;
+ fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
+ fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fdir_fltr_ctx.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
+ fdir_fltr_ctx.fdid_prio = 3;
+ fdir_fltr_ctx.desc_prof = 1;
+ fdir_fltr_ctx.desc_prof_prio = 3;
+ ice_set_fd_desc_val(&fdir_fltr_ctx, fdesc);
+}
+
+/**
+ * ice_set_fd_desc_val
+ * @fd_fltr_ctx: pointer to fd filter descriptor context
+ * @fdir_desc: populated with fd filter descriptor values
+ */
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc)
+{
+ u64 ctx_buf[2] = { 0 };
+
+ ice_set_ctx((u8 *)fd_fltr_ctx, (u8 *)ctx_buf,
+ ice_fd_fltr_desc_ctx_info);
+ fdir_desc->qidx_compq_space_stat = CPU_TO_LE64(ctx_buf[0]);
+ fdir_desc->dtype_cmd_vsi_fdid = CPU_TO_LE64(ctx_buf[1]);
+}
+
+/**
+ * ice_alloc_fd_res_cntr - obtain counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ */
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_free_fd_res_cntr - Free counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index to be freed
+ */
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_alloc_fd_guar_item - allocate resource for FD guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_guar_item - Free flow director guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_alloc_fd_shrd_item - allocate resource for flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_shrd_item - Free flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_get_fdir_cnt_all - get the number of Flow Director filters
+ * @hw: hardware data structure
+ *
+ * Returns the number of filters available on device
+ */
+int ice_get_fdir_cnt_all(struct ice_hw *hw)
+{
+ return hw->func_caps.fd_fltr_guar +
+ hw->func_caps.fd_fltr_best_effort;
+}
+
+/**
+ * ice_pkt_insert_ipv6_addr - insert a be32 IPv6 address into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @addr: IPv6 address to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr)
+{
+ int idx;
+
+ for (idx = 0; idx < ICE_IPV6_ADDR_LEN_AS_U32; idx++)
+ ice_memcpy(pkt + offset + idx * sizeof(*addr), &addr[idx],
+ sizeof(*addr), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u16 - insert a be16 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 16 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u16(u8 *pkt, int offset, __be16 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u32 - insert a be32 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 32 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_fdir_get_prgm_pkt - generate a dummy packet
+ * @input: flow director filter data structure
+ * @pkt: pointer to return filter packet
+ * @frag: generate a fragment packet
+ */
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag)
+{
+ enum ice_fltr_ptype flow;
+ u16 idx;
+
+ if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ switch (input->ip.v4.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ switch (input->ip.v6.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else {
+ flow = input->flow_type;
+ }
+
+ for (idx = 0; idx < ICE_FDIR_NUM_PKT; idx++)
+ if (ice_fdir_pkt[idx].flow == flow)
+ break;
+ if (idx == ICE_FDIR_NUM_PKT)
+ return ICE_ERR_PARAM;
+ ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+
+ switch (flow) {
+ case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ if (frag)
+ pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF;
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+
+ if (input->flex_fltr)
+ ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_fdir_has_frag - does flow type have 2 ptypes
+ * @flow: flow ptype
+ *
+ * returns true is there is a fragment packet for this ptype
+ */
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow)
+{
+ if (flow == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ return true;
+ else
+ return false;
+}
+
+/**
+ * ice_fdir_find_by_idx - find filter with idx
+ * @hw: pointer to hardware structure
+ * @fltr_idx: index to find.
+ *
+ * Returns pointer to filter if found or null
+ */
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx)
+{
+ struct ice_fdir_fltr *rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found in the list */
+ if (fltr_idx == rule->fltr_id)
+ return rule;
+ if (fltr_idx < rule->fltr_id)
+ break;
+ }
+ return NULL;
+}
+
+/**
+ * ice_fdir_list_add_fltr - add a new node to the flow director filter list
+ * @hw: hardware structure
+ * @fltr: filter node to add to structure
+ */
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *fltr)
+{
+ struct ice_fdir_fltr *rule, *parent = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found or pass its spot in the list */
+ if (rule->fltr_id >= fltr->fltr_id)
+ break;
+ parent = rule;
+ }
+
+ if (parent)
+ LIST_ADD_AFTER(&fltr->fltr_node, &parent->fltr_node);
+ else
+ LIST_ADD(&fltr->fltr_node, &hw->fdir_list_head);
+}
+
+/**
+ * ice_fdir_update_cntrs - increment / decrement filter counter
+ * @hw: pointer to hardware structure
+ * @flow: filter flow type
+ * @add: true implies filters added
+ */
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add)
+{
+ int incr;
+
+ incr = (add) ? 1 : -1;
+ hw->fdir_active_fltr += incr;
+ if (flow == ICE_FLTR_PTYPE_NONF_NONE || flow >= ICE_FLTR_PTYPE_MAX)
+ ice_debug(hw, ICE_DBG_SW, "Unknown filter type %d\n", flow);
+ else
+ hw->fdir_fltr_cnt[flow] += incr;
+}
+
+/**
+ * ice_cmp_ipv6_addr - compare 2 IP v6 addresses
+ * @a: IP v6 address
+ * @b: IP v6 address
+ *
+ * Returns 0 on equal, returns non-0 if different
+ */
+static int ice_cmp_ipv6_addr(__be32 *a, __be32 *b)
+{
+ return memcmp(a, b, 4 * sizeof(__be32));
+}
+
+/**
+ * ice_fdir_comp_ipv6_rules - compare 2 filters
+ * @a: a Flow Director filter data structure
+ * @b: a Flow Director filter data structure
+ * @v6: bool true if v6 filter
+ *
+ * Returns true if the filters match
+ */
+static bool
+ice_fdir_comp_rules(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b, bool v6)
+{
+ enum ice_fltr_ptype flow_type = a->flow_type;
+
+ /* The calling function already checks that the two filters have the
+ * same flow_type.
+ */
+ if (!v6) {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.dst_port == b->ip.v4.dst_port &&
+ a->ip.v4.src_port == b->ip.v4.src_port)
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.l4_header == b->ip.v4.l4_header &&
+ a->ip.v4.proto == b->ip.v4.proto &&
+ a->ip.v4.ip_ver == b->ip.v4.ip_ver &&
+ a->ip.v4.tos == b->ip.v4.tos)
+ return true;
+ }
+ } else {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_SCTP) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port &&
+ !ice_cmp_ipv6_addr(a->ip.v6.dst_ip,
+ b->ip.v6.dst_ip) &&
+ !ice_cmp_ipv6_addr(a->ip.v6.src_ip,
+ b->ip.v6.src_ip))
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port)
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/**
+ * ice_fdir_is_dup_fltr - test if filter is already in list for PF
+ * @hw: hardware data structure
+ * @input: Flow Director filter data structure
+ *
+ * Returns true if the filter is found in the list
+ */
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input)
+{
+ enum ice_fltr_ptype flow_type;
+ struct ice_fdir_fltr *rule;
+ bool ret = false;
+
+ rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ if (rule->flow_type == input->flow_type) {
+ flow_type = input->flow_type;
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ ret = ice_fdir_comp_rules(rule, input, false);
+ else
+ ret = ice_fdir_comp_rules(rule, input, true);
+ if (ret)
+ break;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * ice_clear_vsi_fd_table - admin command to clear FD table for a VSI
+ * @hw: hardware data structure
+ * @vsi_num: vsi_num (HW VSI num)
+ *
+ * Clears FD table entries by issuing admin command (direct, 0x0B06)
+ * Must to pass valid vsi_num as returned by "AddVSI".
+ */
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_VSI_IDX;
+
+ cmd->vsi_index = CPU_TO_LE16(vsi_num);
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_clear_pf_fd_table - admin command to clear FD table for PF
+ * @hw: hardware data structure
+ *
+ * Clears FD table entries for a PF by issuing admin command (direct, 0x0B06)
+ */
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_PF_IDX;
+ /* vsi_index must be 0 to clear FD table for a PF */
+ cmd->vsi_index = CPU_TO_LE16(0);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
new file mode 100644
index 000000000..2ecb147f1
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -0,0 +1,202 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_FDIR_H_
+#define _ICE_FDIR_H_
+
+#include "ice_common.h"
+
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+ u32 fdid;
+ u16 qindex;
+ u16 cnt_index;
+ u16 fd_vsi;
+ u16 flex_val;
+ u8 comp_q;
+ u8 comp_report;
+ u8 fd_space;
+ u8 cnt_ena;
+ u8 evict_ena;
+ u8 toq;
+ u8 toq_prio;
+ u8 dpu_recipe;
+ u8 drop;
+ u8 flex_prio;
+ u8 flex_mdid;
+ u8 dtype;
+ u8 pcmd;
+ u8 desc_prof_prio;
+ u8 desc_prof;
+ u8 swap;
+ u8 fdid_prio;
+ u8 fdid_mdid;
+};
+
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
+
+#define ICE_FDIR_IP_PROTOCOLS
+#define ICE_IP_PROTO_TCP 6
+#define ICE_IP_PROTO_UDP 17
+#define ICE_IP_PROTO_SCTP 132
+#define ICE_IP_PROTO_IP 0
+#define ICE_IP_PROTO_ESP 50
+
+#define ICE_FDIR_MAX_RAW_PKT_SIZE 512
+#define ICE_FDIR_BUF_FULL_MARGIN 10
+#define ICE_FDIR_BUF_HEAD_ROOM 32
+
+/* macros for offsets into packets for flow director programming */
+#define ICE_IPV4_SRC_ADDR_OFFSET 26
+#define ICE_IPV4_DST_ADDR_OFFSET 30
+#define ICE_IPV4_TCP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_TCP_DST_PORT_OFFSET 36
+#define ICE_IPV4_UDP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_UDP_DST_PORT_OFFSET 36
+#define ICE_IPV4_SCTP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_SCTP_DST_PORT_OFFSET 36
+#define ICE_IPV4_PROTO_OFFSET 23
+#define ICE_IPV6_SRC_ADDR_OFFSET 22
+#define ICE_IPV6_DST_ADDR_OFFSET 38
+#define ICE_IPV6_TCP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_TCP_DST_PORT_OFFSET 56
+#define ICE_IPV6_UDP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_UDP_DST_PORT_OFFSET 56
+#define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_SCTP_DST_PORT_OFFSET 56
+
+#define ICE_FDIR_MAX_FLTRS 16384
+
+/* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF
+ * requests that the packet not be fragmented. MF indicates that a packet has
+ * been fragmented.
+ */
+#define ICE_FDIR_IPV4_PKT_FLAG_DF 0x20
+#define ICE_FDIR_IPV4_PKT_FLAG_MF 0x40
+
+enum ice_fltr_prgm_desc_dest {
+ ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER,
+};
+
+enum ice_fltr_prgm_desc_fd_status {
+ ICE_FLTR_PRGM_DESC_FD_STATUS_NONE,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID_4FLEX_BYTES,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
+};
+
+#define ICE_FLTR_PRGM_FLEX_WORD_SIZE sizeof(__be16)
+
+struct ice_rx_flow_userdef {
+ u16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+};
+
+struct ice_fdir_v4 {
+ __be32 dst_ip;
+ __be32 src_ip;
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header;
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tos;
+ u8 ip_ver;
+ u8 proto;
+};
+
+#define ICE_IPV6_ADDR_LEN_AS_U32 4
+
+struct ice_fdir_v6 {
+ __be32 dst_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be32 src_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header; /* next header */
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tc;
+ u8 proto;
+};
+
+struct ice_fdir_extra {
+ u8 dst_mac[ETH_ALEN]; /* dest MAC address */
+ u32 usr_def[2]; /* user data */
+ __be16 vlan_type; /* VLAN ethertype */
+ __be16 vlan_tag; /* VLAN tag info */
+};
+
+struct ice_fdir_fltr {
+ struct LIST_ENTRY_TYPE fltr_node;
+ enum ice_fltr_ptype flow_type;
+
+ union {
+ struct ice_fdir_v4 v4;
+ struct ice_fdir_v6 v6;
+ } ip, mask;
+
+ struct ice_fdir_extra ext_data;
+ struct ice_fdir_extra ext_mask;
+
+ /* flex byte filter data */
+ __be16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+
+ /* filter control */
+ u16 q_index;
+#ifdef ADQ_SUPPORT
+ u16 orig_q_index;
+#endif /* ADQ_SUPPORT */
+ u16 dest_vsi;
+ u8 dest_ctl;
+ u8 fltr_status;
+ u16 cnt_index;
+ u32 fltr_id;
+};
+
+
+/* Dummy packet filter definition structure. */
+struct ice_fdir_base_pkt {
+ enum ice_fltr_ptype flow;
+ u16 pkt_len;
+ const u8 *pkt;
+};
+
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add);
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
+enum ice_status
+ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add);
+int ice_get_fdir_cnt_all(struct ice_hw *hw);
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+enum ice_status
+ice_update_fdir_list_entry(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ u16 sw_idx);
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add);
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+#endif /* _ICE_FDIR_H_ */
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 99108d81c..37bb4cbb5 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1275,6 +1275,25 @@ void ice_free_seg(struct ice_hw *hw)
}
/**
+ * ice_init_fd_mask_regs - initialize Flow Director mask registers
+ * @hw: pointer to the HW struct
+ *
+ * This function sets up the Flow Director mask registers to allow for complete
+ * masking off of any of the 24 Field Vector words. After this call, mask 0 will
+ * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc.
+ */
+static void ice_init_fd_mask_regs(struct ice_hw *hw)
+{
+ u16 i;
+
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ wr32(hw, GLQF_FDMASK(i), i);
+ ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i,
+ GLQF_FDMASK(i), i);
+ }
+}
+
+/**
* ice_init_pkg_regs - initialize additional package registers
* @hw: pointer to the hardware structure
*/
@@ -1287,6 +1306,8 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
/* setup Switch block input mask, which is 48-bits in two parts */
wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);
+ /* setup default flow director masks */
+ ice_init_fd_mask_regs(hw);
}
/**
@@ -3783,6 +3804,205 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
}
/**
+ * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @mask_sel: mask select
+ *
+ * This function enable any of the masks selected by the mask select parameter
+ * for the profile specified.
+ */
+static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
+{
+ wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
+
+ ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
+ GLQF_FDMASK_SEL(prof_id), mask_sel);
+}
+
+#define ICE_SRC_DST_MAX_COUNT 8
+
+struct ice_fd_src_dst_pair {
+ u8 prot_id;
+ u8 count;
+ u16 off;
+};
+
+static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
+ /* These are defined in pairs */
+ { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
+ { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
+
+ { ICE_PROT_IPV4_IL, 2, 12 },
+ { ICE_PROT_IPV4_IL, 2, 16 },
+
+ { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
+ { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
+
+ { ICE_PROT_IPV6_IL, 8, 8 },
+ { ICE_PROT_IPV6_IL, 8, 24 },
+
+ { ICE_PROT_TCP_IL, 1, 0 },
+ { ICE_PROT_TCP_IL, 1, 2 },
+
+ { ICE_PROT_UDP_OF, 1, 0 },
+ { ICE_PROT_UDP_OF, 1, 2 },
+
+ { ICE_PROT_UDP_IL_OR_S, 1, 0 },
+ { ICE_PROT_UDP_IL_OR_S, 1, 2 },
+
+ { ICE_PROT_SCTP_IL, 1, 0 },
+ { ICE_PROT_SCTP_IL, 1, 2 }
+};
+
+#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
+
+/**
+ * ice_update_fd_swap - set register appropriately for a FD FV extraction
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @es: extraction sequence (length of array is determined by the block)
+ */
+static enum ice_status
+ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
+{
+ ice_declare_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
+ u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
+#define ICE_FD_FV_NOT_FOUND (-2)
+ s8 first_free = ICE_FD_FV_NOT_FOUND;
+ u8 used[ICE_MAX_FV_WORDS] = { 0 };
+ s8 orig_free, si;
+ u32 mask_sel = 0;
+ u8 i, j, k;
+
+ ice_memset(pair_list, 0, sizeof(pair_list), ICE_NONDMA_MEM);
+
+ ice_init_fd_mask_regs(hw);
+
+ /* This code assumes that the Flow Director field vectors are assigned
+ * from the end of the FV indexes working towards the zero index, that
+ * only complete fields will be included and will be consecutive, and
+ * that there are no gaps between valid indexes.
+ */
+
+ /* Determine swap fields present */
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ /* Find the first free entry, assuming right to left population.
+ * This is where we can start adding additional pairs if needed.
+ */
+ if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
+ ICE_PROT_INVALID)
+ first_free = i - 1;
+
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
+ es[i].off == ice_fd_pairs[j].off) {
+ ice_set_bit(j, pair_list);
+ pair_start[j] = i;
+ }
+ }
+ }
+
+ orig_free = first_free;
+
+ /* determine missing swap fields that need to be added */
+ for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
+ u8 bit1 = ice_is_bit_set(pair_list, i + 1);
+ u8 bit0 = ice_is_bit_set(pair_list, i);
+
+ if (bit0 ^ bit1) {
+ u8 index;
+
+ /* add the appropriate 'paired' entry */
+ if (!bit0)
+ index = i;
+ else
+ index = i + 1;
+
+ /* check for room */
+ if (first_free + 1 < ice_fd_pairs[index].count)
+ return ICE_ERR_MAX_LIMIT;
+
+ /* place in extraction sequence */
+ for (k = 0; k < ice_fd_pairs[index].count; k++) {
+ es[first_free - k].prot_id =
+ ice_fd_pairs[index].prot_id;
+ es[first_free - k].off =
+ ice_fd_pairs[index].off + (k * 2);
+
+ /* keep track of non-relevant fields */
+ mask_sel |= 1 << (first_free - k);
+ }
+
+ pair_start[index] = first_free;
+ first_free -= ice_fd_pairs[index].count;
+ }
+ }
+
+ /* fill in the swap array */
+ si = hw->blk[ICE_BLK_FD].es.fvw - 1;
+ do {
+ u8 indexes_used = 1;
+
+ /* assume flat at this index */
+#define ICE_SWAP_VALID 0x80
+ used[si] = si | ICE_SWAP_VALID;
+
+ if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
+ si -= indexes_used;
+ continue;
+ }
+
+ /* check for a swap location */
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
+ es[si].off == ice_fd_pairs[j].off) {
+ u8 idx;
+
+ /* determine the appropriate matching field */
+ idx = j + ((j % 2) ? -1 : 1);
+
+ indexes_used = ice_fd_pairs[idx].count;
+ for (k = 0; k < indexes_used; k++) {
+ used[si - k] = (pair_start[idx] - k) |
+ ICE_SWAP_VALID;
+ }
+
+ break;
+ }
+ }
+
+ si -= indexes_used;
+ } while (si >= 0);
+
+ /* for each set of 4 swap indexes, write the appropriate register */
+ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
+ u32 raw_entry = 0;
+
+ for (k = 0; k < 4; k++) {
+ u8 idx;
+
+ idx = (j * 4) + k;
+ if (used[idx])
+ raw_entry |= used[idx] << (k * 8);
+ }
+
+ /* write the appropriate register set, based on HW block */
+ wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry);
+
+ ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n",
+ prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry);
+ }
+
+ /* update the masks for this profile to be sure we ignore fields that
+ * are not relevant to our match criteria
+ */
+ ice_update_fd_mask(hw, prof_id, mask_sel);
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_add_prof - add profile
* @hw: pointer to the HW struct
* @blk: hardware block
@@ -3812,6 +4032,18 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
+ if (blk == ICE_BLK_FD) {
+ /* For Flow Director block, the extraction sequence may
+ * need to be altered in the case where there are paired
+ * fields that have no match. This is necessary because
+ * for Flow Director, src and dest fields need to paired
+ * for filter programming and these values are swapped
+ * during Tx.
+ */
+ status = ice_update_fd_swap(hw, prof_id, es);
+ if (status)
+ goto err_ice_add_prof;
+ }
/* and write new es */
ice_write_es(hw, blk, prof_id, es);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6a08b3d28..ef0b5bb52 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -164,6 +164,7 @@ enum ice_media_type {
/* Software VSI types. */
enum ice_vsi_type {
ICE_VSI_PF = 0,
+ ICE_VSI_CTRL = 3, /* equates to ICE_VSI_PF with 1 queue pair */
#ifdef ADQ_SUPPORT
ICE_VSI_CHNL = 4,
#endif /* ADQ_SUPPORT */
@@ -218,6 +219,32 @@ struct ice_phy_info {
#define ICE_MAX_NUM_MIRROR_RULES 64
+/* protocol enumeration for filters */
+enum ice_fltr_ptype {
+ /* NONE - used for undef/error */
+ ICE_FLTR_PTYPE_NONF_NONE = 0,
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ ICE_FLTR_PTYPE_FRAG_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ ICE_FLTR_PTYPE_MAX,
+};
+
+/* 6 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL + 4 ICE_VSI_CHNL */
+#define ICE_MAX_FDIR_VSI_PER_FILTER 6
+
+struct ice_fd_hw_prof {
+ struct ice_flow_seg_info *fdir_seg;
+ int cnt;
+ u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+ u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+};
+
/* Common HW capabilities for SW use */
struct ice_hw_common_caps {
/* Write CSR protection */
@@ -297,12 +324,15 @@ struct ice_hw_common_caps {
struct ice_hw_func_caps {
struct ice_hw_common_caps common_cap;
u32 guar_num_vsi;
+ u32 fd_fltr_guar; /* Number of filters guaranteed */
+ u32 fd_fltr_best_effort; /* Number of best effort filters */
};
/* Device wide capabilities */
struct ice_hw_dev_caps {
struct ice_hw_common_caps common_cap;
u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */
+ u32 num_flow_director_fltr; /* Number of FD filters available */
};
@@ -651,6 +681,7 @@ struct ice_hw {
u64 debug_mask; /* BITMAP for debug mask */
enum ice_mac_type mac_type;
+ u16 fd_ctr_base; /* FD counter base index */
/* pci info */
u16 device_id;
u16 vendor_id;
@@ -748,6 +779,19 @@ struct ice_hw {
struct ice_blk_info blk[ICE_BLK_COUNT];
struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */
struct LIST_HEAD_TYPE fl_profs[ICE_BLK_COUNT];
+ /* Flow Director filter info */
+ int fdir_active_fltr;
+
+ struct ice_lock fdir_fltr_lock; /* protect Flow Director */
+ struct LIST_HEAD_TYPE fdir_list_head;
+
+ /* Book-keeping of side-band filter count per flow-type.
+ * This is used to detect and handle input set changes for
+ * respective flow-type.
+ */
+ u16 fdir_fltr_cnt[ICE_FLTR_PTYPE_MAX];
+
+ struct ice_fd_hw_prof **fdir_prof;
};
/* Statistics collected by each port, VSI, VEB, and S-channel */
@@ -792,6 +836,11 @@ struct ice_hw_port_stats {
u64 link_xoff_rx; /* lxoffrxc */
u64 link_xon_tx; /* lxontxc */
u64 link_xoff_tx; /* lxofftxc */
+ u64 priority_xon_rx[8]; /* pxonrxc[8] */
+ u64 priority_xoff_rx[8]; /* pxoffrxc[8] */
+ u64 priority_xon_tx[8]; /* pxontxc[8] */
+ u64 priority_xoff_tx[8]; /* pxofftxc[8] */
+ u64 priority_xon_2_xoff[8]; /* pxon2offc[8] */
u64 rx_size_64; /* prc64 */
u64 rx_size_127; /* prc127 */
u64 rx_size_255; /* prc255 */
@@ -811,6 +860,12 @@ struct ice_hw_port_stats {
u64 tx_size_1522; /* ptc1522 */
u64 tx_size_big; /* ptc9522 */
u64 mac_short_pkt_dropped; /* mspdc */
+ /* flow director stats */
+ u32 fd_sb_status;
+ u64 fd_sb_match;
+#ifdef ADQ_SUPPORT
+ u64 ch_atr_match;
+#endif /* ADQ_SUPPORT */
};
enum ice_sw_fwd_act_type {
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 755d2497b..624202567 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -10,6 +10,7 @@ sources = [
'ice_flex_pipe.c',
'ice_flow.c',
'ice_dcb.c',
+ 'ice_fdir.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 33/37] net/ice/base: change profile priority for RSS reply
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (31 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 32/37] net/ice/base: add FDIR support Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 34/37] net/ice/base: remove duplicate resource allocations Qi Zhang
` (6 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Vignesh Sridhar
1. Add call to replay RSS configurations
2. Add RSS configurations to end of list and not the head to avoid
inversion on replay.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 5 ++++-
drivers/net/ice/base/ice_flow.c | 3 ++-
drivers/net/ice/base/ice_osdep.h | 16 ++++++++++++++++
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 425f76e8d..74f925c03 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3854,7 +3854,10 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
if (status)
return status;
}
-
+ /* Replay per VSI all RSS configurations */
+ status = ice_replay_rss_cfg(hw, vsi_handle);
+ if (status)
+ return status;
/* Replay per VSI all filters */
status = ice_replay_vsi_all_fltr(hw, vsi_handle);
if (!status)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 03a324d49..428002c28 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1672,7 +1672,8 @@ ice_add_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle,
rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match;
rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs;
- LIST_ADD(&rss_cfg->l_entry, &hw->vsi_ctx[vsi_handle]->rss_list_head);
+ LIST_ADD_TAIL(&rss_cfg->l_entry,
+ &hw->vsi_ctx[vsi_handle]->rss_list_head);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 252c8f4e7..560e36c1b 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -462,6 +462,22 @@ LIST_HEAD(ice_list_head, ice_list_entry);
#define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
#define LIST_ADD_AFTER(entry, list_entry) \
LIST_INSERT_AFTER(list_entry, entry, next)
+
+static inline void list_add_tail(struct ice_list_entry *entry,
+ struct ice_list_head *head)
+{
+ struct ice_list_entry *tail = head->lh_first;
+
+ if (tail == NULL) {
+ LIST_INSERT_HEAD(head, entry, next);
+ return;
+ }
+ while (tail->next.le_next != NULL)
+ tail = tail->next.le_next;
+ LIST_INSERT_AFTER(tail, entry, next);
+}
+
+#define LIST_ADD_TAIL(entry, head) list_add_tail(entry, head)
#define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
for ((pos) = (head)->lh_first ? \
container_of((head)->lh_first, struct type, member) : \
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 34/37] net/ice/base: remove duplicate resource allocations
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (32 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 33/37] net/ice/base: change profile priority for RSS reply Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 35/37] net/ice/base: minor fix Qi Zhang
` (5 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Vignesh Sridhar
This patch ensure that TCAM allocations made by a newly added VSIG
that has the same characteristic list of an existing VSIG are removed.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 85 +++++++++++++++++-------------------
1 file changed, 41 insertions(+), 44 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 37bb4cbb5..c9d8730d2 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2302,21 +2302,23 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- /* remove all vsis associated with this VSIG XLT2 entry */
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
-
- vsi_cur->vsig = ICE_DEFAULT_VSIG;
- vsi_cur->changed = 1;
- vsi_cur->next_vsi = NULL;
- vsi_cur = tmp;
- } while (vsi_cur);
-
- /* NULL terminate head of vsi list */
- hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ /* If the VSIG has at least 1 VSI then iterate through the
+ * list and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ /* remove all vsis associated with this VSIG XLT2 entry */
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+
+ vsi_cur->vsig = ICE_DEFAULT_VSIG;
+ vsi_cur->changed = 1;
+ vsi_cur->next_vsi = NULL;
+ vsi_cur = tmp;
+ } while (vsi_cur);
+
+ /* NULL terminate head of VSI list */
+ hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ }
/* free characteristic list */
LIST_FOR_EACH_ENTRY_SAFE(del, dtmp,
@@ -4267,36 +4269,32 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/* Move all VSIS associated with this VSIG to the default VSIG */
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
- struct ice_chs_chg *p;
-
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_vsig;
+ /* If the VSIG has at least 1 VSI then iterate through the list
+ * and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+ struct ice_chs_chg *p;
- p->type = ICE_VSIG_REM;
- p->orig_vsig = vsig;
- p->vsig = ICE_DEFAULT_VSIG;
- p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
+ p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
+ if (!p)
+ return ICE_ERR_NO_MEMORY;
- LIST_ADD(&p->list_entry, chg);
+ p->type = ICE_VSIG_REM;
+ p->orig_vsig = vsig;
+ p->vsig = ICE_DEFAULT_VSIG;
+ p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
- status = ice_vsig_free(hw, blk, vsig);
- if (status)
- return status;
+ LIST_ADD(&p->list_entry, chg);
- vsi_cur = tmp;
- } while (vsi_cur);
+ vsi_cur = tmp;
+ } while (vsi_cur);
+ }
- return ICE_SUCCESS;
+ status = ice_vsig_free(hw, blk, vsig);
-err_ice_rem_vsig:
- /* the caller will free up the change list */
- return ICE_ERR_NO_MEMORY;
+ return status;
}
/**
@@ -4493,7 +4491,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA);
- LIST_ADD(&p->list, lst);
+ LIST_ADD_TAIL(&p->list, lst);
}
return ICE_SUCCESS;
@@ -5000,14 +4998,13 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/* search for an existing VSIG with an exact charc match */
status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
if (!status) {
- /* found an exact match */
- /* move vsi to the VSIG that matches */
+ /* move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
- /* remove original VSIG if we just moved the only VSI
- * from it
+ /* VSI has been moved out of or_vsig. If the or_vsig had
+ * only that VSI it is now empty and can be removed.
*/
if (only_vsi) {
status = ice_rem_vsig(hw, blk, or_vsig, &chg);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 35/37] net/ice/base: minor fix
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (33 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 34/37] net/ice/base: remove duplicate resource allocations Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 36/37] net/ice/base: increase prototol offset size Qi Zhang
` (4 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
1. clean flow entry's action structure after remove it.
2. initialized priority when add a new flow entry
3. remove RSS configuration before deleting the flow profile.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flow.c | 13 ++++++++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c9d8730d2..e4d0b8c0f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2467,7 +2467,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < es->count; i++) {
off = i * es->fvw;
- if (memcmp(&es->t[off], fv, es->fvw * 2))
+ if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
continue;
*prof_id = i;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 428002c28..98727cfeb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -910,8 +910,11 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
if (entry->entry)
ice_free(hw, entry->entry);
- if (entry->acts)
+ if (entry->acts) {
ice_free(hw, entry->acts);
+ entry->acts = NULL;
+ entry->acts_cnt = 0;
+ }
ice_free(hw, entry);
@@ -1306,6 +1309,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
e->id = entry_id;
e->vsi_handle = vsi_handle;
e->prof = prof;
+ e->priority = prio;
switch (blk) {
case ICE_BLK_RSS:
@@ -1852,11 +1856,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
if (status)
goto out;
+ /* Remove RSS configuration from VSI context before deleting
+ * the flow profile.
+ */
+ ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
+
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI))
status = ice_flow_rem_prof_sync(hw, blk, prof);
- ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
-
out:
ice_free(hw, segs);
return status;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 36/37] net/ice/base: increase prototol offset size
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (34 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 35/37] net/ice/base: minor fix Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-03-01 11:19 ` Ferruh Yigit
2019-02-28 5:56 ` [dpdk-dev] [PATCH 37/37] net/ice/base: revert the workaround for resource allocation Qi Zhang
` (3 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang
Increase field vector's protocol offset size from 8 bit to 16 bit.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
---
drivers/net/ice/base/ice_flex_type.h | 8 +++++++-
drivers/net/ice/base/ice_flow.c | 7 +++++--
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 365f33390..f259e1371 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -5,12 +5,18 @@
#ifndef _ICE_FLEX_TYPE_H_
#define _ICE_FLEX_TYPE_H_
+#define ICE_FV_OFFSET_INVAL 0x1FF
+
+#pragma pack(1)
/* Extraction Sequence (Field Vector) Table */
struct ice_fv_word {
u8 prot_id;
- u8 off; /* Offset within the protocol header */
+ u16 off; /* Offset within the protocol header */
+ u8 resvrd;
};
+#pragma pack()
+
#define ICE_MAX_FV_WORDS 48
struct ice_fv {
struct ice_fv_word ew[ICE_MAX_FV_WORDS];
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 98727cfeb..be819e0e9 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -516,7 +516,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
struct ice_flow_fld_info *flds;
u16 cnt, ese_bits, i;
s16 adj = 0;
- u8 off;
+ u16 off;
flds = params->prof->segs[seg].fields;
@@ -956,7 +956,10 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
return ICE_ERR_NO_MEMORY;
/* initialize extraction sequence to all invalid (0xff) */
- ice_memset(params.es, 0xff, sizeof(params.es), ICE_NONDMA_MEM);
+ for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
+ params.es[i].prot_id = ICE_PROT_INVALID;
+ params.es[i].off = ICE_FV_OFFSET_INVAL;
+ }
params.blk = blk;
params.prof->id = prof_id;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index bad925c8c..f0c74a348 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -174,7 +174,7 @@ enum ice_flow_priority {
struct ice_flow_seg_xtrct {
u8 prot_id; /* Protocol ID of extracted header field */
- u8 off; /* Starting offset of the field in header in bytes */
+ u16 off; /* Starting offset of the field in header in bytes */
u8 idx; /* Index of FV entry used */
u8 disp; /* Displacement of field in bits fr. FV entry's start */
};
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 6b3bd6542..e572dd320 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -223,7 +223,7 @@ struct ice_prot_lkup_ext {
u16 prot_type;
u8 n_val_words;
/* create a buffer to hold max words per recipe */
- u8 field_off[ICE_MAX_CHAIN_WORDS];
+ u16 field_off[ICE_MAX_CHAIN_WORDS];
struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH 37/37] net/ice/base: revert the workaround for resource allocation
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (35 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 36/37] net/ice/base: increase prototol offset size Qi Zhang
@ 2019-02-28 5:56 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (2 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-02-28 5:56 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: paul.m.stillwell.jr, dev, ferruh.yigit, Qi Zhang, Dan Nowlin
Revert the workaround for allocating TCAM and FV entries to align
with latest firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 11 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_flex_pipe.c | 235 ++---------------------------------
drivers/net/ice/base/ice_flex_type.h | 2 -
4 files changed, 17 insertions(+), 233 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 74f925c03..3d2e5f347 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1786,11 +1786,11 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
* @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
- * @sh: shared if true, dedicated if false
+ * @btm: allocate from bottom
* @res: pointer to array that will receive the resources
*/
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
{
struct ice_aqc_alloc_free_res_elem *buf;
enum ice_status status;
@@ -1804,8 +1804,11 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
/* Prepare buffer to allocate resource. */
buf->num_elems = CPU_TO_LE16(num);
- buf->res_type = CPU_TO_LE16(type | (sh ? ICE_AQC_RES_TYPE_FLAG_SHARED :
- ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+ buf->res_type = CPU_TO_LE16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED |
+ ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX);
+ if (btm)
+ buf->res_type |= CPU_TO_LE16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM);
+
status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
ice_aqc_opc_alloc_res, NULL);
if (status)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 4dc43dcfe..e8f2ce9d8 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -41,7 +41,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout);
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res);
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
enum ice_status
ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index e4d0b8c0f..14e632fab 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2536,199 +2536,6 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_workaround_get_res_blk - determine the block from a resource type
- * @type: type of resource
- * @blk: pointer to a enum that will receive the block type
- * @tcam: pointer to variable that will be set to true for a TCAM resource type
- */
-static enum
-ice_status ice_workaround_get_res_blk(u16 type, enum ice_block *blk, bool *tcam)
-{
- /* just need to support TCAM entries and Profile IDs for now */
- *tcam = false;
-
- switch (type) {
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_SW;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM:
- *blk = ICE_BLK_ACL;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM:
- *blk = ICE_BLK_FD;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_RSS;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_PE;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_SW;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID:
- *blk = ICE_BLK_ACL;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID:
- *blk = ICE_BLK_FD;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_RSS;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_PE;
- break;
- default:
- return ICE_ERR_PARAM;
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_alloc_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource
- * @num: number of resources to allocate
- * @res: pointer to array that will receive the resources
- */
-static enum ice_status
-ice_alloc_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- u16 count = 0;
- bool tcam;
- u16 first;
- u16 last;
- u16 max;
- u16 i;
-
-/* Number of PFs we support with this workaround */
-#define ICE_WA_PF_COUNT 4
-#define ICE_WA_1ST_TCAM 4
-#define ICE_WA_1ST_FV 4
-
- /* Only allow our supported PFs */
- if (hw->pf_id >= ICE_WA_PF_COUNT)
- return ICE_ERR_AQ_ERROR;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* range of entries based on PF */
- max = hw->blk[blk].prof.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* Profile IDs - start at non-zero index for PROF ID TCAM table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_TCAM;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].prof.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].prof.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- } else {
- /* range of entries based on PF */
- max = hw->blk[blk].es.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* FV index - start at non-zero index for Field vector table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_FV;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].es.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].es.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_free_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource to free
- * @num: number of resources
- * @res: array of resource ids to free
- */
-static enum ice_status
-ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- bool tcam = false;
- u16 i;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* TCAM entries */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].prof.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- }
- }
-
- } else {
- /* Profile IDs */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].es.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- }
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
* ice_alloc_tcam_ent - allocate hardware TCAM entry
* @hw: pointer to the HW struct
* @blk: the block to allocate the TCAM for
@@ -2745,7 +2552,7 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_alloc_res_workaround(hw, res_type, 1, tcam_idx);
+ return ice_alloc_hw_res(hw, res_type, 1, true, tcam_idx);
}
/**
@@ -2764,7 +2571,7 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tcam_idx);
+ return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
}
/**
@@ -2786,7 +2593,7 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- status = ice_alloc_res_workaround(hw, res_type, 1, &get_prof);
+ status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
if (!status)
*prof_id = (u8)get_prof;
@@ -2810,15 +2617,7 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tmp_prof_id);
- /* The following code is a WORKAROUND until DCR 076 is available.
- * DCR 076 - Update to Profile ID TCAM Resource Allocation
- *
- * Once the DCR 076 changes are available in FW, this code can be
- * restored. Original code:
- *
- * return ice_free_res(hw, res_type, 1, &tmp_prof_id);
- */
+ return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
}
/**
@@ -3125,8 +2924,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
LIST_FOR_EACH_ENTRY_SAFE(del, tmp, &hw->blk[blk].es.prof_map,
ice_prof_map, list) {
- LIST_DEL(&del->list);
- ice_free(hw, del);
+ ice_rem_prof(hw, blk, del->profile_cookie);
}
}
@@ -3168,9 +2966,6 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].prof_redir.t);
ice_free(hw, hw->blk[i].es.t);
ice_free(hw, hw->blk[i].es.ref_count);
-
- ice_free(hw, hw->blk[i].es.resource_used_hack);
- ice_free(hw, hw->blk[i].prof.resource_used_hack);
ice_free(hw, hw->blk[i].es.written);
}
@@ -3347,18 +3142,6 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
if (!es->ref_count)
goto err;
- es->resource_used_hack = (u8 *)
- ice_calloc(hw, hw->blk[i].es.count, sizeof(u8));
-
- if (!es->resource_used_hack)
- goto err;
-
- prof->resource_used_hack = (u8 *)ice_calloc(hw, prof->count,
- sizeof(u8));
-
- if (!prof->resource_used_hack)
- goto err;
-
INIT_LIST_HEAD(&es->prof_map);
/* Now that tables are allocated, read in package data */
@@ -4390,13 +4173,13 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
if (!pmap)
return ICE_ERR_DOES_NOT_EXIST;
- status = ice_free_prof_id(hw, blk, pmap->prof_id);
-
+ /* remove all flows with this profile */
+ status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
- /* remove all flows with this profile */
- status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
+ /* remove profile */
+ status = ice_free_prof_id(hw, blk, pmap->prof_id);
if (status)
return status;
/* dereference profile, and possibly remove */
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index f259e1371..f2a5f27e7 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -507,7 +507,6 @@ struct ice_es {
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
- u8 *resource_used_hack; /* hack for testing */
};
/* PTYPE Group management */
@@ -660,7 +659,6 @@ struct ice_prof_tcam {
u16 max_prof_id;
u8 cdid_bits; /* # cdid bits to use in key, 0, 2, 4, or 8 */
struct ice_prof_tcam_entry *t;
- u8 *resource_used_hack;
};
struct ice_prof_redir {
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH 22/37] net/ice/base: add RSS key related macro and structures
2019-02-28 5:56 ` [dpdk-dev] [PATCH 22/37] net/ice/base: add RSS key related macro and structures Qi Zhang
@ 2019-02-28 16:54 ` Greenwalt, Paul
0 siblings, 0 replies; 213+ messages in thread
From: Greenwalt, Paul @ 2019-02-28 16:54 UTC (permalink / raw)
To: Zhang, Qi Z, Lu, Wenzhuo, Yang, Qiming
Cc: Stillwell Jr, Paul M, dev, Yigit, Ferruh
ACK
-----Original Message-----
From: Zhang, Qi Z
Sent: Wednesday, February 27, 2019 9:57 PM
To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming <qiming.yang@intel.com>
Cc: Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; dev@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Greenwalt, Paul <paul.greenwalt@intel.com>
Subject: [PATCH 22/37] net/ice/base: add RSS key related macro and structures
Add define for 52 byte RSS hash key size, and add struct ice_aqc_get_set_rss_keys comments regarding setting 40 bytes and
52 byte hash key.
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index cb1e1ca1a..ed7dfae8c 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1593,7 +1593,20 @@ struct ice_aqc_get_set_rss_key {
#define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28
#define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC
+#define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \
+ (ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE + \
+ ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE)
+/**
+ * struct ice_aqc_get_set_rss_keys - Get/Set RSS hash key command
+buffer
+ * @standard_rss_key: 40 most significant bytes of hash key
+ * @extended_hash_key: 12 least significant bytes of hash key
+ *
+ * Set/Get 40 byte hash key using standard_rss_key field, and set
+ * extended_hash_key field to zero. Set/Get 52 byte hash key using
+ * standard_rss_key field for 40 most significant bytes and the
+ * extended_hash_key field for the 12 least significant bytes of hash key.
+ */
struct ice_aqc_get_set_rss_keys {
u8 standard_rss_key[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH 07/37] net/ice/base: declare functions as external
2019-02-28 5:56 ` [dpdk-dev] [PATCH 07/37] net/ice/base: declare functions as external Qi Zhang
@ 2019-03-01 10:30 ` Ferruh Yigit
2019-03-04 7:24 ` Zhang, Qi Z
0 siblings, 1 reply; 213+ messages in thread
From: Ferruh Yigit @ 2019-03-01 10:30 UTC (permalink / raw)
To: Qi Zhang, wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev
On 2/28/2019 5:56 AM, Qi Zhang wrote:
> Remove static of below functions and declare them as external
> APIs.
>
> ice_aq_add_vsi
> ice_aq_free_vsi
> ice_aq_update_vsi
> ice_aq_add_lan_txq
> ice_init_pkg
Hi Qi,
This is generic comment for the patchset but it is easy to demonstrate in this
patch,
Patch title and comment describes what is done in the code, which is exactly
same with what can be seen from the code, so doesn't add more value.
What can't be seen from the below code is "why you need this change?" and "what
is the impact of the change?".
Can you please update the patch title to describe what is achieved by the patch
but not implementation details.
Also in commit log describe "why it is needed" and "what will be the impact, or
impact of not having this change", and of course if the implementation is
complex describe the implementation too.
And specific to this patch, this is base code update, most probably it is
setting ground to enable some features in driver, wouldn't it be better to do
these changes when the relevant driver change done? It sets the context for the
update and it helps to review the patch.
Right now it just exposes some APIs without really knowing who will use them, or
will anybody use them at all.
>
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
> drivers/net/ice/base/ice_common.c | 2 +-
> drivers/net/ice/base/ice_common.h | 4 ++++
> drivers/net/ice/base/ice_flex_pipe.c | 2 +-
> drivers/net/ice/base/ice_flex_pipe.h | 2 ++
> drivers/net/ice/base/ice_switch.c | 6 +++---
> drivers/net/ice/base/ice_switch.h | 9 +++++++++
> 6 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
> index 86d3be17a..015db11e0 100644
> --- a/drivers/net/ice/base/ice_common.c
> +++ b/drivers/net/ice/base/ice_common.c
> @@ -2935,7 +2935,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
> * Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
> * flow.
> */
> -static enum ice_status
> +enum ice_status
> ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
> struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
> struct ice_sq_cd *cd)
> diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
> index 0b387cdbe..63f4a5ebe 100644
> --- a/drivers/net/ice/base/ice_common.h
> +++ b/drivers/net/ice/base/ice_common.h
> @@ -94,6 +94,10 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
> enum ice_status
> ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
> struct ice_aqc_get_set_rss_keys *keys);
> +enum ice_status
> +ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
> + struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
> + struct ice_sq_cd *cd);
>
> bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
> enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
> diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
> index 2d23c36eb..ff615f94f 100644
> --- a/drivers/net/ice/base/ice_flex_pipe.c
> +++ b/drivers/net/ice/base/ice_flex_pipe.c
> @@ -1314,7 +1314,7 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
> * ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
> * case.
> */
> -static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
> +enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
> {
> struct ice_pkg_hdr *pkg;
> enum ice_status status;
> diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
> index 23fffed75..00c2b6682 100644
> --- a/drivers/net/ice/base/ice_flex_pipe.h
> +++ b/drivers/net/ice/base/ice_flex_pipe.h
> @@ -88,6 +88,8 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);
> struct ice_prof_map *
> ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);
> enum ice_status
> +ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);
> +enum ice_status
> ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
> enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
> void ice_free_seg(struct ice_hw *hw);
> diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
> index 512e64b91..e6fc9fcee 100644
> --- a/drivers/net/ice/base/ice_switch.c
> +++ b/drivers/net/ice/base/ice_switch.c
> @@ -288,7 +288,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
> *
> * Add a VSI context to the hardware (0x0210)
> */
> -static enum ice_status
> +enum ice_status
> ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> struct ice_sq_cd *cd)
> {
> @@ -331,7 +331,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> *
> * Free VSI context info from hardware (0x0213)
> */
> -static enum ice_status
> +enum ice_status
> ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> bool keep_vsi_alloc, struct ice_sq_cd *cd)
> {
> @@ -366,7 +366,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> *
> * Update VSI context in the hardware (0x0211)
> */
> -static enum ice_status
> +enum ice_status
> ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> struct ice_sq_cd *cd)
> {
> diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
> index 90dfdabcb..b28e55a4f 100644
> --- a/drivers/net/ice/base/ice_switch.h
> +++ b/drivers/net/ice/base/ice_switch.h
> @@ -271,6 +271,15 @@ enum ice_promisc_flags {
>
> /* VSI related commands */
> enum ice_status
> +ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> + struct ice_sq_cd *cd);
> +enum ice_status
> +ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> + bool keep_vsi_alloc, struct ice_sq_cd *cd);
> +enum ice_status
> +ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> + struct ice_sq_cd *cd);
> +enum ice_status
> ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
> struct ice_sq_cd *cd);
> enum ice_status
>
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH 27/37] net/ice/base: resolve static analysis reported issues
2019-02-28 5:56 ` [dpdk-dev] [PATCH 27/37] net/ice/base: resolve static analysis reported issues Qi Zhang
@ 2019-03-01 10:36 ` Ferruh Yigit
2019-03-04 1:54 ` Zhang, Qi Z
0 siblings, 1 reply; 213+ messages in thread
From: Ferruh Yigit @ 2019-03-01 10:36 UTC (permalink / raw)
To: Qi Zhang, wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev, Bruce Allan
On 2/28/2019 5:56 AM, Qi Zhang wrote:
> Resolve static analysis reported issue in
> ice_get_itr_intrl_gran and ice_ptg_find_ptype.
Same comment with previous patch, related to the commit log.
Commit log says "static analysis reported issues" are solved, what are they
really? If we know them we can know your intention and say something about the
code below, otherwise is there a way to figure out if something wrong below?
And "impact" part, "what is the impact of the change?" Will those issues create
definite memory corruption? Or protection for possible issue. Knowing this helps
maintainers and LTS maintainers to priorities the patch accordingly.
Also please use "fix" instead of "resolve", fix is kind of keyword we tend to
use, and provide a fixes line for whatever fixed.
>
> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH 36/37] net/ice/base: increase prototol offset size
2019-02-28 5:56 ` [dpdk-dev] [PATCH 36/37] net/ice/base: increase prototol offset size Qi Zhang
@ 2019-03-01 11:19 ` Ferruh Yigit
2019-03-04 6:03 ` Zhang, Qi Z
0 siblings, 1 reply; 213+ messages in thread
From: Ferruh Yigit @ 2019-03-01 11:19 UTC (permalink / raw)
To: Qi Zhang, wenzhuo.lu, qiming.yang; +Cc: paul.m.stillwell.jr, dev
On 2/28/2019 5:56 AM, Qi Zhang wrote:
> Increase field vector's protocol offset size from 8 bit to 16 bit.
Same comment, I can see 'off' & 'field_off' storage size increased from u8 to u16.
But why? and what is the impact of it?
If someone from community hist a problem with this and wants to understand the
code and changes, these commit logs will be valuable resources. Even you guys, a
year later, if wants to understand why 'off' size is changed, this commit log
won't be helpful at all.
Can you please check and revise all commit logs in this patchset?
>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> ---
> drivers/net/ice/base/ice_flex_type.h | 8 +++++++-
> drivers/net/ice/base/ice_flow.c | 7 +++++--
> drivers/net/ice/base/ice_flow.h | 2 +-
> drivers/net/ice/base/ice_protocol_type.h | 2 +-
> 4 files changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
> index 365f33390..f259e1371 100644
> --- a/drivers/net/ice/base/ice_flex_type.h
> +++ b/drivers/net/ice/base/ice_flex_type.h
> @@ -5,12 +5,18 @@
> #ifndef _ICE_FLEX_TYPE_H_
> #define _ICE_FLEX_TYPE_H_
>
> +#define ICE_FV_OFFSET_INVAL 0x1FF
> +
> +#pragma pack(1)
> /* Extraction Sequence (Field Vector) Table */
> struct ice_fv_word {
> u8 prot_id;
> - u8 off; /* Offset within the protocol header */
> + u16 off; /* Offset within the protocol header */
> + u8 resvrd;
> };
>
> +#pragma pack()
> +
> #define ICE_MAX_FV_WORDS 48
> struct ice_fv {
> struct ice_fv_word ew[ICE_MAX_FV_WORDS];
> diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
> index 98727cfeb..be819e0e9 100644
> --- a/drivers/net/ice/base/ice_flow.c
> +++ b/drivers/net/ice/base/ice_flow.c
> @@ -516,7 +516,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
> struct ice_flow_fld_info *flds;
> u16 cnt, ese_bits, i;
> s16 adj = 0;
> - u8 off;
> + u16 off;
>
> flds = params->prof->segs[seg].fields;
>
> @@ -956,7 +956,10 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
> return ICE_ERR_NO_MEMORY;
>
> /* initialize extraction sequence to all invalid (0xff) */
> - ice_memset(params.es, 0xff, sizeof(params.es), ICE_NONDMA_MEM);
> + for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
> + params.es[i].prot_id = ICE_PROT_INVALID;
> + params.es[i].off = ICE_FV_OFFSET_INVAL;
> + }
>
> params.blk = blk;
> params.prof->id = prof_id;
> diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
> index bad925c8c..f0c74a348 100644
> --- a/drivers/net/ice/base/ice_flow.h
> +++ b/drivers/net/ice/base/ice_flow.h
> @@ -174,7 +174,7 @@ enum ice_flow_priority {
>
> struct ice_flow_seg_xtrct {
> u8 prot_id; /* Protocol ID of extracted header field */
> - u8 off; /* Starting offset of the field in header in bytes */
> + u16 off; /* Starting offset of the field in header in bytes */
> u8 idx; /* Index of FV entry used */
> u8 disp; /* Displacement of field in bits fr. FV entry's start */
> };
> diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
> index 6b3bd6542..e572dd320 100644
> --- a/drivers/net/ice/base/ice_protocol_type.h
> +++ b/drivers/net/ice/base/ice_protocol_type.h
> @@ -223,7 +223,7 @@ struct ice_prot_lkup_ext {
> u16 prot_type;
> u8 n_val_words;
> /* create a buffer to hold max words per recipe */
> - u8 field_off[ICE_MAX_CHAIN_WORDS];
> + u16 field_off[ICE_MAX_CHAIN_WORDS];
>
> struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
>
>
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH 27/37] net/ice/base: resolve static analysis reported issues
2019-03-01 10:36 ` Ferruh Yigit
@ 2019-03-04 1:54 ` Zhang, Qi Z
0 siblings, 0 replies; 213+ messages in thread
From: Zhang, Qi Z @ 2019-03-04 1:54 UTC (permalink / raw)
To: Yigit, Ferruh, Lu, Wenzhuo, Yang, Qiming
Cc: Stillwell Jr, Paul M, dev, Allan, Bruce W
> -----Original Message-----
> From: Yigit, Ferruh
> Sent: Friday, March 1, 2019 6:37 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>;
> Yang, Qiming <qiming.yang@intel.com>
> Cc: Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; dev@dpdk.org; Allan,
> Bruce W <bruce.w.allan@intel.com>
> Subject: Re: [PATCH 27/37] net/ice/base: resolve static analysis reported issues
>
> On 2/28/2019 5:56 AM, Qi Zhang wrote:
> > Resolve static analysis reported issue in ice_get_itr_intrl_gran and
> > ice_ptg_find_ptype.
>
> Same comment with previous patch, related to the commit log.
>
> Commit log says "static analysis reported issues" are solved, what are they really?
> If we know them we can know your intention and say something about the code
> below, otherwise is there a way to figure out if something wrong below?
OK, I think we can add more explanation here.
>
> And "impact" part, "what is the impact of the change?" Will those issues create
> definite memory corruption? Or protection for possible issue. Knowing this helps
> maintainers and LTS maintainers to priorities the patch accordingly.
>
The ice driver is claimed as an experimental release in 19.02, only basic function is enabled and the quality is not guaranteed,
We assume user already know this and expected to meet some issue,
Also 19.02 is not LTS release, so maintainer no need to worry about fix back port.
so from my view, the "impact" part is not necessary to be highlighted for this patch but a nice to have, am I right?
> Also please use "fix" instead of "resolve", fix is kind of keyword we tend to use,
> and provide a fixes line for whatever fixed.
OK, will add fix line for this.
Thanks
Qi
>
> >
> > Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
>
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH 36/37] net/ice/base: increase prototol offset size
2019-03-01 11:19 ` Ferruh Yigit
@ 2019-03-04 6:03 ` Zhang, Qi Z
0 siblings, 0 replies; 213+ messages in thread
From: Zhang, Qi Z @ 2019-03-04 6:03 UTC (permalink / raw)
To: Yigit, Ferruh, Lu, Wenzhuo, Yang, Qiming; +Cc: Stillwell Jr, Paul M, dev
> -----Original Message-----
> From: Yigit, Ferruh
> Sent: Friday, March 1, 2019 7:20 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>;
> Yang, Qiming <qiming.yang@intel.com>
> Cc: Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; dev@dpdk.org
> Subject: Re: [PATCH 36/37] net/ice/base: increase prototol offset size
>
> On 2/28/2019 5:56 AM, Qi Zhang wrote:
> > Increase field vector's protocol offset size from 8 bit to 16 bit.
>
> Same comment, I can see 'off' & 'field_off' storage size increased from u8 to u16.
>
> But why? and what is the impact of it?
Since the format of OS package is changed, share code need to align with, I will add more detail information in v2.
>
> If someone from community hist a problem with this and wants to understand
> the code and changes, these commit logs will be valuable resources. Even you
> guys, a year later, if wants to understand why 'off' size is changed, this commit
> log won't be helpful at all.
>
I agree with your point generally.
But just add more background here
ice in 19.02 is claimed as experimental release, quality is not guaranteed, it even does not download OS default package which is mandatory for real usage.
So we assume there will not be the case that "someone from community hit a problem in 19.02 and want to get help from commit log in 19.05 to root cause"
And from our developer's view 19.05 is the real start, all commit log in share code before that is not quite sensitive. ( we even can simply regard this as an "initial commit")
But for release after 19.05, definitely we should statement each commit log carefully, since 19.05 will be validated carefully.
> Can you please check and revise all commit logs in this patchset?
Yes, I will check to see if anything can improved in v2.
Thanks
Qi
>
> >
> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> > ---
> > drivers/net/ice/base/ice_flex_type.h | 8 +++++++-
> > drivers/net/ice/base/ice_flow.c | 7 +++++--
> > drivers/net/ice/base/ice_flow.h | 2 +-
> > drivers/net/ice/base/ice_protocol_type.h | 2 +-
> > 4 files changed, 14 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/net/ice/base/ice_flex_type.h
> > b/drivers/net/ice/base/ice_flex_type.h
> > index 365f33390..f259e1371 100644
> > --- a/drivers/net/ice/base/ice_flex_type.h
> > +++ b/drivers/net/ice/base/ice_flex_type.h
> > @@ -5,12 +5,18 @@
> > #ifndef _ICE_FLEX_TYPE_H_
> > #define _ICE_FLEX_TYPE_H_
> >
> > +#define ICE_FV_OFFSET_INVAL 0x1FF
> > +
> > +#pragma pack(1)
> > /* Extraction Sequence (Field Vector) Table */ struct ice_fv_word {
> > u8 prot_id;
> > - u8 off; /* Offset within the protocol header */
> > + u16 off; /* Offset within the protocol header */
> > + u8 resvrd;
> > };
> >
> > +#pragma pack()
> > +
> > #define ICE_MAX_FV_WORDS 48
> > struct ice_fv {
> > struct ice_fv_word ew[ICE_MAX_FV_WORDS]; diff --git
> > a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
> > index 98727cfeb..be819e0e9 100644
> > --- a/drivers/net/ice/base/ice_flow.c
> > +++ b/drivers/net/ice/base/ice_flow.c
> > @@ -516,7 +516,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct
> ice_flow_prof_params *params,
> > struct ice_flow_fld_info *flds;
> > u16 cnt, ese_bits, i;
> > s16 adj = 0;
> > - u8 off;
> > + u16 off;
> >
> > flds = params->prof->segs[seg].fields;
> >
> > @@ -956,7 +956,10 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum
> ice_block blk,
> > return ICE_ERR_NO_MEMORY;
> >
> > /* initialize extraction sequence to all invalid (0xff) */
> > - ice_memset(params.es, 0xff, sizeof(params.es), ICE_NONDMA_MEM);
> > + for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
> > + params.es[i].prot_id = ICE_PROT_INVALID;
> > + params.es[i].off = ICE_FV_OFFSET_INVAL;
> > + }
> >
> > params.blk = blk;
> > params.prof->id = prof_id;
> > diff --git a/drivers/net/ice/base/ice_flow.h
> > b/drivers/net/ice/base/ice_flow.h index bad925c8c..f0c74a348 100644
> > --- a/drivers/net/ice/base/ice_flow.h
> > +++ b/drivers/net/ice/base/ice_flow.h
> > @@ -174,7 +174,7 @@ enum ice_flow_priority {
> >
> > struct ice_flow_seg_xtrct {
> > u8 prot_id; /* Protocol ID of extracted header field */
> > - u8 off; /* Starting offset of the field in header in bytes */
> > + u16 off; /* Starting offset of the field in header in bytes */
> > u8 idx; /* Index of FV entry used */
> > u8 disp; /* Displacement of field in bits fr. FV entry's start */
> > };
> > diff --git a/drivers/net/ice/base/ice_protocol_type.h
> > b/drivers/net/ice/base/ice_protocol_type.h
> > index 6b3bd6542..e572dd320 100644
> > --- a/drivers/net/ice/base/ice_protocol_type.h
> > +++ b/drivers/net/ice/base/ice_protocol_type.h
> > @@ -223,7 +223,7 @@ struct ice_prot_lkup_ext {
> > u16 prot_type;
> > u8 n_val_words;
> > /* create a buffer to hold max words per recipe */
> > - u8 field_off[ICE_MAX_CHAIN_WORDS];
> > + u16 field_off[ICE_MAX_CHAIN_WORDS];
> >
> > struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
> >
> >
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH 07/37] net/ice/base: declare functions as external
2019-03-01 10:30 ` Ferruh Yigit
@ 2019-03-04 7:24 ` Zhang, Qi Z
0 siblings, 0 replies; 213+ messages in thread
From: Zhang, Qi Z @ 2019-03-04 7:24 UTC (permalink / raw)
To: Yigit, Ferruh, Lu, Wenzhuo, Yang, Qiming; +Cc: Stillwell Jr, Paul M, dev
Hi Ferruh:
> -----Original Message-----
> From: Yigit, Ferruh
> Sent: Friday, March 1, 2019 6:31 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>;
> Yang, Qiming <qiming.yang@intel.com>
> Cc: Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; dev@dpdk.org
> Subject: Re: [PATCH 07/37] net/ice/base: declare functions as external
>
> On 2/28/2019 5:56 AM, Qi Zhang wrote:
> > Remove static of below functions and declare them as external APIs.
> >
> > ice_aq_add_vsi
> > ice_aq_free_vsi
> > ice_aq_update_vsi
> > ice_aq_add_lan_txq
> > ice_init_pkg
>
> Hi Qi,
>
> This is generic comment for the patchset but it is easy to demonstrate in this
> patch,
OK, I will give generic reply :)
>
> Patch title and comment describes what is done in the code, which is exactly
> same with what can be seen from the code, so doesn't add more value.
>
> What can't be seen from the below code is "why you need this change?" and
> "what is the impact of the change?".
Yes, the patch set include a lot changes that impact nothing from user's view.
For examples it adds API not be used in this release but will be used in future.
The reason we do this early is we want to sync with the latest share code that kernel team delivered to DPDK.
And I think this gives below benefits:
1. Generally, stripped the code only we needed from a kernel delivery will take developer more effort compare to just simply sync to a new delivery. (if we take 5000+ ice_flex_pipe.c for example)
2. Exposed some unused share code API early help developers out of Intel to contribute some new features that rely on those APIs and avoid license issue ( they can reference kernel's share code but can't submit the patch with that part of share code)
3. it help us to deliver succinct RFC patch base on an official release for customer for some new feature evaluation.
3. Same benefit for internal develop for some features for new release, it's easy for team to start a code base that include all the share code we needed.
BTW, as I know this is the same way we do on other Intel drivers ( i40e and ixgbe).
>
> Can you please update the patch title to describe what is achieved by the patch
> but not implementation details.
> Also in commit log describe "why it is needed" and "what will be the impact, or
> impact of not having this change", and of course if the implementation is complex
> describe the implementation too.
>
Yes, I think it's better to add more explanation base on my previous comment.
>
> And specific to this patch, this is base code update, most probably it is setting
> ground to enable some features in driver, wouldn't it be better to do these
> changes when the relevant driver change done? It sets the context for the
> update and it helps to review the patch.
> Right now it just exposes some APIs without really knowing who will use them, or
> will anybody use them at all.
As I explained above.
Thanks
Qi
>
> >
> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> > ---
> > drivers/net/ice/base/ice_common.c | 2 +-
> > drivers/net/ice/base/ice_common.h | 4 ++++
> > drivers/net/ice/base/ice_flex_pipe.c | 2 +-
> > drivers/net/ice/base/ice_flex_pipe.h | 2 ++
> > drivers/net/ice/base/ice_switch.c | 6 +++---
> > drivers/net/ice/base/ice_switch.h | 9 +++++++++
> > 6 files changed, 20 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/net/ice/base/ice_common.c
> > b/drivers/net/ice/base/ice_common.c
> > index 86d3be17a..015db11e0 100644
> > --- a/drivers/net/ice/base/ice_common.c
> > +++ b/drivers/net/ice/base/ice_common.c
> > @@ -2935,7 +2935,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16
> vsi_handle,
> > * Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
> > * flow.
> > */
> > -static enum ice_status
> > +enum ice_status
> > ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
> > struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
> > struct ice_sq_cd *cd)
> > diff --git a/drivers/net/ice/base/ice_common.h
> > b/drivers/net/ice/base/ice_common.h
> > index 0b387cdbe..63f4a5ebe 100644
> > --- a/drivers/net/ice/base/ice_common.h
> > +++ b/drivers/net/ice/base/ice_common.h
> > @@ -94,6 +94,10 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16
> > vsi_handle, enum ice_status ice_aq_set_rss_key(struct ice_hw *hw,
> > u16 vsi_handle,
> > struct ice_aqc_get_set_rss_keys *keys);
> > +enum ice_status
> > +ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
> > + struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
> > + struct ice_sq_cd *cd);
> >
> > bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info
> > *cq); enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool
> > unloading); diff --git a/drivers/net/ice/base/ice_flex_pipe.c
> > b/drivers/net/ice/base/ice_flex_pipe.c
> > index 2d23c36eb..ff615f94f 100644
> > --- a/drivers/net/ice/base/ice_flex_pipe.c
> > +++ b/drivers/net/ice/base/ice_flex_pipe.c
> > @@ -1314,7 +1314,7 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
> > * ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
> > * case.
> > */
> > -static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32
> > len)
> > +enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
> > {
> > struct ice_pkg_hdr *pkg;
> > enum ice_status status;
> > diff --git a/drivers/net/ice/base/ice_flex_pipe.h
> > b/drivers/net/ice/base/ice_flex_pipe.h
> > index 23fffed75..00c2b6682 100644
> > --- a/drivers/net/ice/base/ice_flex_pipe.h
> > +++ b/drivers/net/ice/base/ice_flex_pipe.h
> > @@ -88,6 +88,8 @@ ice_set_prof_context(struct ice_hw *hw, enum
> > ice_block blk, u64 id, u64 cntxt); struct ice_prof_map *
> > ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id,
> > u64 *cntxt); enum ice_status
> > +ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); enum ice_status
> > ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
> > enum ice_status ice_init_hw_tbls(struct ice_hw *hw); void
> > ice_free_seg(struct ice_hw *hw); diff --git
> > a/drivers/net/ice/base/ice_switch.c
> > b/drivers/net/ice/base/ice_switch.c
> > index 512e64b91..e6fc9fcee 100644
> > --- a/drivers/net/ice/base/ice_switch.c
> > +++ b/drivers/net/ice/base/ice_switch.c
> > @@ -288,7 +288,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16
> sw_id, u16 counter_id)
> > *
> > * Add a VSI context to the hardware (0x0210)
> > */
> > -static enum ice_status
> > +enum ice_status
> > ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> > struct ice_sq_cd *cd)
> > {
> > @@ -331,7 +331,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx
> *vsi_ctx,
> > *
> > * Free VSI context info from hardware (0x0213)
> > */
> > -static enum ice_status
> > +enum ice_status
> > ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> > bool keep_vsi_alloc, struct ice_sq_cd *cd) { @@ -366,7 +366,7 @@
> > ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> > *
> > * Update VSI context in the hardware (0x0211)
> > */
> > -static enum ice_status
> > +enum ice_status
> > ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> > struct ice_sq_cd *cd)
> > {
> > diff --git a/drivers/net/ice/base/ice_switch.h
> > b/drivers/net/ice/base/ice_switch.h
> > index 90dfdabcb..b28e55a4f 100644
> > --- a/drivers/net/ice/base/ice_switch.h
> > +++ b/drivers/net/ice/base/ice_switch.h
> > @@ -271,6 +271,15 @@ enum ice_promisc_flags {
> >
> > /* VSI related commands */
> > enum ice_status
> > +ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> > + struct ice_sq_cd *cd);
> > +enum ice_status
> > +ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> > + bool keep_vsi_alloc, struct ice_sq_cd *cd); enum ice_status
> > +ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
> > + struct ice_sq_cd *cd);
> > +enum ice_status
> > ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
> > struct ice_sq_cd *cd);
> > enum ice_status
> >
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 00/37] ice share code update.
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (36 preceding siblings ...)
2019-02-28 5:56 ` [dpdk-dev] [PATCH 37/37] net/ice/base: revert the workaround for resource allocation Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
` (36 more replies)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
39 siblings, 37 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Sync to latest kernel driver, main changes:
1. add DCB/FDIR support.
2. add more APIs in switch module.
3. code clean and bug fix.
v2:
- Enhanced the commit log.
- Add missing fixed line.
Qi Zhang (37):
net/ice/base: add switch resource allocation and free
net/ice/base: improve comments
net/ice/base: add two helper functions
net/ice/base: add helper macros
net/ice/base: allow package copy to be used after resets
net/ice/base: code clean
net/ice/base: declare functions as external
net/ice/base: add more APIs in switch module
net/ice/base: add VSI queue context framework
net/ice/base: add APIs to add remove ethertype filter
net/ice/base: add APIs to get allocated resources
net/ice/base: add APIs to alloc/free resource counter
net/ice/base: add APIs to get VSI promiscuous mode
net/ice/base: add MAC filter with marker and counter
net/ice/base: add two helper functions for flow management
net/ice/base: minor fix
net/ice/base: update macros
net/ice/base: code clean
net/ice/base: enable VSI queue context
net/ice/base: ensure only valid bits are set
net/ice/base: enhance get link status command
net/ice/base: add RSS key related macro and structures
net/ice/base: do not write TCAM entries back
net/ice/base: remove local VSIG allocations
net/ice/base: minor fix
net/ice/base: update copyright time
net/ice/base: fix static analysis reported issues
net/ice/base: return config error without queue to disable
net/ice/base: add function to check FW recovery mode
net/ice/base: change profile id reference counting
net/ice/base: add DCB support
net/ice/base: add FDIR support
net/ice/base: change profile priority for RSS reply
net/ice/base: fix duplicate resource allocations
net/ice/base: minor fix
net/ice/base: increase prototol offset size
net/ice/base: revert the workaround for resource allocation
drivers/net/ice/Makefile | 2 +
drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 650 ++++++--
drivers/net/ice/base/ice_common.h | 36 +-
drivers/net/ice/base/ice_controlq.c | 10 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 +++
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_fdir.c | 742 +++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++
drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
drivers/net/ice/base/ice_flex_pipe.h | 4 +-
drivers/net/ice/base/ice_flex_type.h | 19 +-
drivers/net/ice/base/ice_flow.c | 224 +--
drivers/net/ice/base/ice_flow.h | 22 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
drivers/net/ice/base/ice_nvm.c | 17 +-
drivers/net/ice/base/ice_osdep.h | 16 +
drivers/net/ice/base/ice_protocol_type.h | 8 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 34 +-
drivers/net/ice/base/ice_status.h | 3 +-
drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
drivers/net/ice/base/ice_switch.h | 109 +-
drivers/net/ice/base/ice_type.h | 119 +-
drivers/net/ice/base/meson.build | 2 +
drivers/net/ice/ice_rxtx.c | 11 +-
31 files changed, 7111 insertions(+), 2362 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 01/37] net/ice/base: add switch resource allocation and free
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 02/37] net/ice/base: improve comments Qi Zhang
` (35 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two APIs ice_alloc_sw and ice_free_sw to support
switch related resource allocation and free.
These APIs is required when we enable switch flow.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 150 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 ++
2 files changed, 155 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 0379cd045..a7b712e17 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
}
+/**
+ * ice_alloc_sw - allocate resources specific to switch
+ * @hw: pointer to the HW struct
+ * @ena_stats: true to turn on VEB stats
+ * @shared_res: true for shared resource, false for dedicated resource
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * allocates switch resources (SWID and VEB counter) (0x0208)
+ */
+enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ struct ice_aqc_res_elem *sw_ele;
+ enum ice_status status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer for switch ID.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is allocated, and hence a single sw_id
+ * is requested.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |
+ (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+
+ if (status)
+ goto ice_alloc_sw_exit;
+
+ sw_ele = &sw_buf->elem[0];
+ *sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);
+
+ if (ena_stats) {
+ /* Prepare buffer for VEB Counter */
+ enum ice_adminq_opc opc = ice_aqc_opc_alloc_res;
+ struct ice_aqc_alloc_free_res_elem *counter_buf;
+ struct ice_aqc_res_elem *counter_ele;
+
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ status = ICE_ERR_NO_MEMORY;
+ goto ice_alloc_sw_exit;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since
+ * only a single switch/VEB instance is allocated, and hence a
+ * single VEB counter is requested.
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED);
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ opc, NULL);
+
+ if (status) {
+ ice_free(hw, counter_buf);
+ goto ice_alloc_sw_exit;
+ }
+ counter_ele = &counter_buf->elem[0];
+ *counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);
+ ice_free(hw, counter_buf);
+ }
+
+ice_alloc_sw_exit:
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_free_sw - free resources specific to switch
+ * @hw: pointer to the HW struct
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * free switch resources (SWID and VEB counter) (0x0209)
+ *
+ * NOTE: This function frees multiple resources. It continues
+ * releasing other resources even after it encounters error.
+ * The error code returned is the last error it encountered.
+ */
+enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
+ enum ice_status status, ret_status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer to free for switch ID res.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single sw_id
+ * is released.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);
+ sw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);
+
+ ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+
+ if (ret_status)
+ ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
+
+ /* Prepare buffer to free for VEB Counter resource */
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ ice_free(hw, sw_buf);
+ return ICE_ERR_NO_MEMORY;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single VEB counter
+ * is released
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);
+ counter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status) {
+ ice_debug(hw, ICE_DBG_SW,
+ "VEB counter resource could not be freed\n");
+ ret_status = status;
+ }
+
+ ice_free(hw, counter_buf);
+ ice_free(hw, sw_buf);
+ return ret_status;
+}
/**
* ice_aq_add_vsi
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 66a172fc2..dd21781f7 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id);
+enum ice_status
+ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 02/37] net/ice/base: improve comments
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 03/37] net/ice/base: add two helper functions Qi Zhang
` (34 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Improve comments to follow naming rules.
Also the patch include some minor cleanup.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 27 +-
drivers/net/ice/base/ice_common.c | 148 +++----
drivers/net/ice/base/ice_common.h | 4 +-
drivers/net/ice/base/ice_controlq.c | 8 +-
drivers/net/ice/base/ice_flex_pipe.c | 364 ++++++++--------
drivers/net/ice/base/ice_flex_pipe.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 4 +-
drivers/net/ice/base/ice_flow.c | 65 +--
drivers/net/ice/base/ice_flow.h | 1 -
drivers/net/ice/base/ice_lan_tx_rx.h | 70 +--
drivers/net/ice/base/ice_nvm.c | 8 +-
drivers/net/ice/base/ice_protocol_type.h | 4 +-
drivers/net/ice/base/ice_sched.c | 719 ++++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 8 +-
drivers/net/ice/base/ice_switch.c | 120 +++---
drivers/net/ice/base/ice_switch.h | 20 +-
drivers/net/ice/base/ice_type.h | 34 +-
17 files changed, 804 insertions(+), 802 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a1b9edd14..5a599280e 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -71,7 +71,7 @@ struct ice_aqc_req_res {
#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000
#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000
#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000
- /* For SDP: pin id of the SDP */
+ /* For SDP: pin ID of the SDP */
__le32 res_number;
/* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */
__le16 status;
@@ -854,7 +854,6 @@ struct ice_aqc_delete_elem {
-
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
* Query RL profile (indirect 0x0411)
@@ -1154,8 +1153,8 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
-#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
-#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
+#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
+#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
#define ICE_AQ_PHY_ENA_LINK BIT(3)
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
@@ -1228,7 +1227,7 @@ struct ice_aqc_get_link_status_data {
u8 ext_info;
#define ICE_AQ_LINK_PHY_TEMP_ALARM BIT(0)
#define ICE_AQ_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
- /* Port TX Suspended */
+ /* Port Tx Suspended */
#define ICE_AQ_LINK_TX_S 2
#define ICE_AQ_LINK_TX_M (0x03 << ICE_AQ_LINK_TX_S)
#define ICE_AQ_LINK_TX_ACTIVE 0
@@ -1441,7 +1440,7 @@ struct ice_aqc_get_set_rss_lut {
-/* Add TX LAN Queues (indirect 0x0C30) */
+/* Add Tx LAN Queues (indirect 0x0C30) */
struct ice_aqc_add_txqs {
u8 num_qgrps;
u8 reserved[3];
@@ -1451,7 +1450,7 @@ struct ice_aqc_add_txqs {
};
-/* This is the descriptor of each queue entry for the Add TX LAN Queues
+/* This is the descriptor of each queue entry for the Add Tx LAN Queues
* command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp.
*/
struct ice_aqc_add_txqs_perq {
@@ -1464,7 +1463,7 @@ struct ice_aqc_add_txqs_perq {
};
-/* The format of the command buffer for Add TX LAN Queues (0x0C30)
+/* The format of the command buffer for Add Tx LAN Queues (0x0C30)
* is an array of the following structs. Please note that the length of
* each struct ice_aqc_add_tx_qgrp is variable due
* to the variable number of queues in each group!
@@ -1477,7 +1476,7 @@ struct ice_aqc_add_tx_qgrp {
};
-/* Disable TX LAN Queues (indirect 0x0C31) */
+/* Disable Tx LAN Queues (indirect 0x0C31) */
struct ice_aqc_dis_txqs {
u8 cmd_type;
#define ICE_AQC_Q_DIS_CMD_S 0
@@ -1500,7 +1499,7 @@ struct ice_aqc_dis_txqs {
};
-/* The buffer for Disable TX LAN Queues (indirect 0x0C31)
+/* The buffer for Disable Tx LAN Queues (indirect 0x0C31)
* contains the following structures, arrayed one after the
* other.
* Note: Since the q_id is 16 bits wide, if the
@@ -1528,7 +1527,7 @@ struct ice_aqc_dis_txq {
};
-/* TX LAN Queues Cleanup Event (0x0C31) */
+/* Tx LAN Queues Cleanup Event (0x0C31) */
struct ice_aqc_txqs_cleanup {
__le16 caller_opc;
__le16 cmd_tag;
@@ -1536,7 +1535,7 @@ struct ice_aqc_txqs_cleanup {
};
-/* Move / Reconfigure TX Queues (indirect 0x0C32) */
+/* Move / Reconfigure Tx Queues (indirect 0x0C32) */
struct ice_aqc_move_txqs {
u8 cmd_type;
#define ICE_AQC_Q_CMD_TYPE_S 0
@@ -1557,7 +1556,7 @@ struct ice_aqc_move_txqs {
};
-/* This is the descriptor of each queue entry for the move TX LAN Queues
+/* This is the descriptor of each queue entry for the move Tx LAN Queues
* command (0x0C32).
*/
struct ice_aqc_move_txqs_elem {
@@ -1950,7 +1949,7 @@ enum ice_adminq_opc {
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
- /* TX queue handling commands/events */
+ /* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
ice_aqc_opc_dis_txqs = 0x0C31,
ice_aqc_opc_txqs_cleanup = 0x0C31,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 145f66a90..bcfa3014b 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -36,7 +36,7 @@
* @hw: pointer to the HW structure
*
* This function sets the MAC type of the adapter based on the
- * vendor ID and device ID stored in the hw structure.
+ * vendor ID and device ID stored in the HW structure.
*/
static enum ice_status ice_set_mac_type(struct ice_hw *hw)
{
@@ -79,7 +79,7 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
/**
* ice_aq_manage_mac_read - manage MAC address read command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the manage MAC read response
* @buf_size: Size of the virtual buffer
* @cd: pointer to command details structure or NULL
@@ -338,7 +338,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
/* flag cleared so calling functions don't call AQ again */
pi->phy.get_link_info = false;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -426,7 +426,7 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -446,7 +446,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -503,7 +503,7 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cfg_fw_log - configure FW logging
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @enable: enable certain FW logging events if true, disable all if false
*
* This function enables/disables the FW logging via Rx CQ events and a UART
@@ -652,7 +652,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
/**
* ice_output_fw_log
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: pointer to the AQ message descriptor
* @buf: pointer to the buffer accompanying the AQ message
*
@@ -668,7 +668,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
/**
* ice_get_itr_intrl_gran - determine int/intrl granularity
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
@@ -763,7 +763,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
goto err_unroll_cqinit;
}
- /* set the back pointer to hw */
+ /* set the back pointer to HW */
hw->port_info->hw = hw;
/* Initialize port_info struct with switch configuration data */
@@ -1034,7 +1034,7 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
* @ice_rxq_ctx: pointer to the rxq context
* @rxq_index: the index of the Rx queue
*
- * Copies rxq context from dense structure to hw register space
+ * Copies rxq context from dense structure to HW register space
*/
static enum ice_status
ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
@@ -1047,7 +1047,7 @@ ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
if (rxq_index > QRX_CTRL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, QRX_CONTEXT(i, rxq_index),
*((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
@@ -1091,7 +1091,7 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = {
* @rxq_index: the index of the Rx queue
*
* Converts rxq context from sparse to dense structure and then writes
- * it to hw register space
+ * it to HW register space
*/
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -1109,7 +1109,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
* @hw: pointer to the hardware structure
* @rxq_index: the index of the Rx queue to clear
*
- * Clears rxq context in hw register space
+ * Clears rxq context in HW register space
*/
enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
{
@@ -1166,7 +1166,7 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {
* @ice_tx_cmpltnq_ctx: pointer to the Tx completion queue context
* @tx_cmpltnq_index: the index of the completion queue
*
- * Copies Tx completion q context from dense structure to hw register space
+ * Copies Tx completion queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
@@ -1180,7 +1180,7 @@ ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
if (tx_cmpltnq_index > GLTCLAN_CQ_CNTX0_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index),
*((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
@@ -1215,7 +1215,7 @@ static const struct ice_ctx_ele ice_tx_cmpltnq_ctx_info[] = {
* @tx_cmpltnq_index: the index of the completion queue
*
* Converts completion queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
@@ -1233,7 +1233,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_cmpltnq_index: the index of the completion queue to clear
*
- * Clears Tx completion queue context in hw register space
+ * Clears Tx completion queue context in HW register space
*/
enum ice_status
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
@@ -1256,7 +1256,7 @@ ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
* @ice_tx_drbell_q_ctx: pointer to the doorbell queue context
* @tx_drbell_q_index: the index of the doorbell queue
*
- * Copies doorbell q context from dense structure to hw register space
+ * Copies doorbell queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
@@ -1270,7 +1270,7 @@ ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
if (tx_drbell_q_index > QTX_COMM_DBLQ_DBELL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS; i++) {
wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index),
*((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
@@ -1306,7 +1306,7 @@ static const struct ice_ctx_ele ice_tx_drbell_q_ctx_info[] = {
* @tx_drbell_q_index: the index of the doorbell queue
*
* Converts doorbell queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
@@ -1324,7 +1324,7 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_drbell_q_index: the index of the doorbell queue to clear
*
- * Clears doorbell queue context in hw register space
+ * Clears doorbell queue context in HW register space
*/
enum ice_status
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
@@ -1394,7 +1394,7 @@ ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf, u16 buf_len)
/**
* ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: descriptor describing the command
* @buf: buffer to use for indirect commands (NULL for direct commands)
* @buf_size: size of buffer for indirect commands (0 for direct commands)
@@ -1411,7 +1411,7 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
/**
* ice_aq_get_fw_ver
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cd: pointer to command details structure or NULL
*
* Get the firmware version (0x0001) from the admin queue commands
@@ -1446,7 +1446,7 @@ enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
/**
* ice_aq_q_shutdown
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @unloading: is the driver unloading itself
*
* Tell the Firmware that we're shutting down the AdminQ and whether
@@ -1469,8 +1469,8 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
/**
* ice_aq_req_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @access: access type
* @sdp_number: resource number
* @timeout: the maximum time in ms that the driver may hold the resource
@@ -1557,8 +1557,8 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_aq_release_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @sdp_number: resource number
* @cd: pointer to command details structure or NULL
*
@@ -1586,7 +1586,7 @@ ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
/**
* ice_acquire_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
* @access: access type (read or write)
* @timeout: timeout in milliseconds
*
@@ -1650,7 +1650,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_release_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
*
* This function will release a resource using the proper Admin Command.
*/
@@ -1664,7 +1664,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
status = ice_aq_release_res(hw, res, 0, NULL);
/* there are some rare cases when trying to release the resource
- * results in an admin Q timeout, so handle them correctly
+ * results in an admin queue timeout, so handle them correctly
*/
while ((status == ICE_ERR_AQ_TIMEOUT) &&
(total_delay < hw->adminq.sq_cmd_timeout)) {
@@ -1676,7 +1676,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
/**
* ice_aq_alloc_free_res - command to allocate/free resources
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_entries: number of resource entries in buffer
* @buf: Indirect buffer to hold data parameters and response
* @buf_size: size of buffer for indirect commands
@@ -1714,7 +1714,7 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
/**
* ice_alloc_hw_res - allocate resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
* @sh: shared if true, dedicated if false
@@ -1751,8 +1751,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
}
/**
- * ice_free_hw_res - free allocated hw resource
- * @hw: pointer to the hw struct
+ * ice_free_hw_res - free allocated HW resource
+ * @hw: pointer to the HW struct
* @type: type of resource to free
* @num: number of resources
* @res: pointer to array that contains the resources to free
@@ -1786,7 +1786,7 @@ ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
/**
* ice_get_num_per_func - determine number of resources per PF
- * @hw: pointer to the hw structure
+ * @hw: pointer to the HW structure
* @max: value to be evenly split between each PF
*
* Determine the number of valid functions by going through the bitmap returned
@@ -1809,7 +1809,7 @@ static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)
/**
* ice_parse_caps - parse function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: pointer to a buffer containing function/device capability records
* @cap_count: number of capability records in the list
* @opc: type of capabilities list to parse
@@ -1929,7 +1929,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
/**
* ice_aq_discover_caps - query function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the capabilities
* @buf_size: Size of the virtual buffer
* @cap_count: cap count needed if AQ err==ENOMEM
@@ -2028,7 +2028,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
/**
* ice_aq_manage_mac_write - manage MAC address write command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address
* @flags: flags to control write behavior
* @cd: pointer to command details structure or NULL
@@ -2057,7 +2057,7 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
/**
* ice_aq_clear_pxe_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Tell the firmware that the driver is taking over from PXE (0x0110).
*/
@@ -2073,7 +2073,7 @@ static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw)
/**
* ice_clear_pxe_mode - clear pxe operations mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Make sure all PXE mode settings are cleared, including things
* like descriptor fetch/write-back mode.
@@ -2090,10 +2090,10 @@ void ice_clear_pxe_mode(struct ice_hw *hw)
* @phy_type_low: lower part of phy_type
* @phy_type_high: higher part of phy_type
*
- * This helper function will convert an entry in phy type structure
+ * This helper function will convert an entry in PHY type structure
* [phy_type_low, phy_type_high] to its corresponding link speed.
* Note: In the structure of [phy_type_low, phy_type_high], there should
- * be one bit set, as this function will convert one phy type to its
+ * be one bit set, as this function will convert one PHY type to its
* speed.
* If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
* If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
@@ -2263,7 +2263,7 @@ ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
/**
* ice_aq_set_phy_cfg
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @cfg: structure with PHY configuration data to be set
* @cd: pointer to command details structure or NULL
@@ -2372,7 +2372,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
if (!pcaps)
return ICE_ERR_NO_MEMORY;
- /* Get the current phy config */
+ /* Get the current PHY config */
status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
NULL);
if (status) {
@@ -2561,7 +2561,7 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
/**
* ice_aq_set_event_mask
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @port_num: port number of the physical function
* @mask: event mask to be set
* @cd: pointer to command details structure or NULL
@@ -2587,7 +2587,7 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
/**
* ice_aq_set_mac_loopback
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @ena_lpbk: Enable or Disable loopback
* @cd: pointer to command details structure or NULL
*
@@ -2775,7 +2775,7 @@ ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type,
/**
* __ice_aq_get_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_id: VSI FW index
* @key: pointer to key info struct
* @set: set true to set the key, false to get the key
@@ -2810,7 +2810,7 @@ ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
/**
* ice_aq_get_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @key: pointer to key info struct
*
@@ -2829,7 +2829,7 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
/**
* ice_aq_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @keys: pointer to key info struct
*
@@ -2916,8 +2916,8 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
* @num_qgrps: number of groups in the list
* @qg_list: the list of groups to disable
* @buf_size: the total size of the qg_list buffer in bytes
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* Disable LAN Tx queue (0x0C31)
@@ -2993,7 +2993,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",
vmvf_num, hw->adminq.sq_last_status);
else
- ice_debug(hw, ICE_DBG_SCHED, "disable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",
LE16_TO_CPU(qg_list[0].q_id[0]),
hw->adminq.sq_last_status);
}
@@ -3232,13 +3232,13 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @tc: tc number
+ * @tc: TC number
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
* @cd: pointer to command details structure or NULL
*
- * This function adds one lan q
+ * This function adds one LAN queue
*/
enum ice_status
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
@@ -3282,14 +3282,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* Bit 5-6.
* - Bit 7 is reserved.
* Without setting the generic section as valid in valid_sections, the
- * Admin Q command will fail with error code ICE_AQ_RC_EINVAL.
+ * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
*/
buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
- /* add the lan q */
+ /* add the LAN queue */
status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
if (status != ICE_SUCCESS) {
- ice_debug(hw, ICE_DBG_SCHED, "enable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n",
LE16_TO_CPU(buf->txqs[0].txq_id),
hw->adminq.sq_last_status);
goto ena_txq_exit;
@@ -3298,7 +3298,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
- /* add a leaf node into schduler tree q layer */
+ /* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
ena_txq_exit:
@@ -3312,8 +3312,8 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* @num_queues: number of queues
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* This function removes queues and their corresponding nodes in SW DB
@@ -3363,12 +3363,12 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
}
/**
- * ice_cfg_vsi_qs - configure the new/exisiting VSI queues
+ * ice_cfg_vsi_qs - configure the new/existing VSI queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
* @maxqs: max queues array per TC
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
* This function adds/updates the VSI queues per TC.
*/
@@ -3403,13 +3403,13 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
}
/**
- * ice_cfg_vsi_lan - configure VSI lan queues
+ * ice_cfg_vsi_lan - configure VSI LAN queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
- * @max_lanqs: max lan queues array per TC
+ * @max_lanqs: max LAN queues array per TC
*
- * This function adds/updates the VSI lan queues per TC.
+ * This function adds/updates the VSI LAN queues per TC.
*/
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
@@ -3423,7 +3423,7 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
/**
* ice_replay_pre_init - replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Initializes required config data for VSI, FD, ACL, and RSS before replay.
*/
@@ -3447,9 +3447,9 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
}
/**
- * ice_replay_vsi - replay vsi configuration
- * @hw: pointer to the hw struct
- * @vsi_handle: driver vsi handle
+ * ice_replay_vsi - replay VSI configuration
+ * @hw: pointer to the HW struct
+ * @vsi_handle: driver VSI handle
*
* Restore all VSI configuration after reset. It is required to call this
* function with main VSI first.
@@ -3477,7 +3477,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_post - post replay configuration cleanup
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Post replay cleanup.
*/
@@ -3553,9 +3553,9 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
/**
- * ice_sched_query_elem - query element information from hw
- * @hw: pointer to the hw struct
- * @node_teid: node teid to be queried
+ * ice_sched_query_elem - query element information from HW
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID to be queried
* @buf: buffer to element information
*
* This function queries HW element information
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 5ac991ef2..f2ad86182 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -61,8 +61,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw);
* ... the value of pointer would equal 0x1008, since 0x1008 is the next
* address after 0x1006 which is divisible by 4.
*/
-#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
-
+#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -149,7 +148,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
-
enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index cbc4cb4c2..1c0830cec 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -54,7 +54,7 @@ static void ice_mailbox_init_regs(struct ice_hw *hw)
/**
* ice_check_sq_alive
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if Queue is enabled else false.
@@ -729,7 +729,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_done - check if FW has processed the Admin Send Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if the firmware has processed all descriptors on the
@@ -745,7 +745,7 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_send_cmd - send command to Control Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @desc: prefilled descriptor describing the command (non DMA mem)
* @buf: buffer to use for indirect commands (or NULL for direct commands)
@@ -990,7 +990,7 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
/**
* ice_clean_rq_elem
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @e: event info from the receive descriptor, includes any buffers
* @pending: number of events that could be left to process
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 493bc4e9b..c87424601 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -325,11 +325,11 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
* ice_boost_tcam_handler
* @sect_type: section type
* @section: pointer to section
- * @index: index of the boost tcam entry to be returned
- * @offset: pointer to receive absolute offset, always 0 for boost tcam sections
+ * @index: index of the boost TCAM entry to be returned
+ * @offset: pointer to receive absolute offset, always 0 for boost TCAM sections
*
* This is a callback function that can be passed to ice_pkg_enum_entry.
- * Handles enumeration of individual boost tcam entries.
+ * Handles enumeration of individual boost TCAM entries.
*/
static void *
ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
@@ -501,7 +501,7 @@ void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
label_name = ice_enum_labels(NULL, 0, &state, &val);
}
- /* Cache the appropriate boost tcam entry pointers */
+ /* Cache the appropriate boost TCAM entry pointers */
for (i = 0; i < hw->tnl.count; i++) {
ice_find_boost_entry(ice_seg, hw->tnl.tbl[i].boost_addr,
&hw->tnl.tbl[i].boost_entry);
@@ -1078,7 +1078,7 @@ enum ice_status ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg)
* @hw: pointer to the hardware structure
* @pkg_hdr: pointer to the driver's package hdr
*
- * Saves off the package details into the hw structure.
+ * Saves off the package details into the HW structure.
*/
enum ice_status
ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
@@ -1468,14 +1468,14 @@ ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
/**
* ice_get_sw_fv_list
* @hw: pointer to the HW structure
- * @prot_ids: field vector to search for with a given protocol id
+ * @prot_ids: field vector to search for with a given protocol ID
* @ids_cnt: lookup/protocol count
* @fv_list: Head of a list
*
* Finds all the field vector entries from switch block that contain
- * a given protocol id and returns a list of structures of type
+ * a given protocol ID and returns a list of structures of type
* "ice_sw_fv_list_entry". Every structure in the list has a field vector
- * definition and profile id information
+ * definition and profile ID information
* NOTE: The caller of the function is responsible for freeing the memory
* allocated for every list entry.
*/
@@ -1782,11 +1782,11 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
/* PTG Management */
/**
- * ice_ptg_update_xlt1 - Updates packet type groups in hw via xlt1 table
+ * ice_ptg_update_xlt1 - Updates packet type groups in HW via XLT1 table
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt1 hardware table to reflect the new
+ * This function will update the XLT1 hardware table to reflect the new
* packet type group configuration.
*/
enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
@@ -1817,7 +1817,7 @@ enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to search for
* @ptg: pointer to variable that receives the PTG
*
@@ -1838,7 +1838,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
/**
* ice_ptg_alloc_val - Allocates a new packet type group ID by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg to allocate
*
* This function allocates a given packet type group ID specified by the ptg
@@ -1853,7 +1853,7 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_alloc - Find a free entry and allocates a new packet type group ID
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function allocates and returns a new packet type group ID. Note
* that 0 is the default packet type group, so successfully created PTGs will
@@ -1877,7 +1877,7 @@ u8 ice_ptg_alloc(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_free - Frees a packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg ID to free
*
* This function frees a packet type group, and returns all the current ptypes
@@ -1902,7 +1902,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_remove_ptype - Removes ptype from a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to remove
* @ptg: the ptg to remove the ptype from
*
@@ -1947,7 +1947,7 @@ ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/**
* ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to add or move
* @ptg: the ptg to add or move the ptype to
*
@@ -1998,10 +1998,10 @@ ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/* Block / table size info */
struct ice_blk_size_details {
- u16 xlt1; /* # xlt1 entries */
- u16 xlt2; /* # xlt2 entries */
- u16 prof_tcam; /* # profile id tcam entries */
- u16 prof_id; /* # profile ids */
+ u16 xlt1; /* # XLT1 entries */
+ u16 xlt2; /* # XLT2 entries */
+ u16 prof_tcam; /* # profile ID TCAM entries */
+ u16 prof_id; /* # profile IDs */
u8 prof_cdid_bits; /* # cdid one-hot bits used in key */
u16 prof_redir; /* # profile redirection entries */
u16 es; /* # extraction sequence entries */
@@ -2079,7 +2079,7 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* profile cookies must compare, and in the exact same order to take
* into account priority
*/
- while (--count) {
+ while (count--) {
if (tmp2->profile_cookie != tmp1->profile_cookie)
return false;
@@ -2093,13 +2093,13 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* VSIG Management */
/**
- * ice_vsig_update_xlt2_sect - update one section of xlt2 table
+ * ice_vsig_update_xlt2_sect - update one section of XLT2 table
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: hw vsi number to program
- * @vsig: vsig for the vsi
+ * @blk: HW block
+ * @vsi: HW VSI number to program
+ * @vsig: vsig for the VSI
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration.
*/
static enum ice_status
@@ -2128,11 +2128,11 @@ ice_vsig_update_xlt2_sect(struct ice_hw *hw, enum ice_block blk, u16 vsi,
}
/**
- * ice_vsig_update_xlt2 - update xlt2 table with VSIG configuration
+ * ice_vsig_update_xlt2 - update XLT2 table with VSIG configuration
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration of used vsis.
*/
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
@@ -2158,14 +2158,14 @@ enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_vsig_find_vsi - find a VSIG that contains a specified vsi
+ * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi of interest
- * @vsig: pointer to receive the vsi group
+ * @blk: HW block
+ * @vsi: VSI of interest
+ * @vsig: pointer to receive the VSI group
*
- * This function will lookup the vsi entry in the XLT2 list and return
- * the vsi group its associated with.
+ * This function will lookup the VSI entry in the XLT2 list and return
+ * the VSI group its associated with.
*/
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
@@ -2174,7 +2174,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
return ICE_ERR_PARAM;
/* As long as there's a default or valid VSIG associated with the input
- * vsi, the functions returns a success. Any handling of VSIG will be
+ * VSI, the functions returns a success. Any handling of VSIG will be
* done by the following add, update or remove functions.
*/
*vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
@@ -2185,7 +2185,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
/**
* ice_vsig_alloc_val - allocate a new VSIG by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: the vsig to allocate
*
* This function will allocate a given VSIG specified by the vsig parameter.
@@ -2205,7 +2205,7 @@ static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
/**
* ice_vsig_alloc - Finds a free entry and allocates a new VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function will iterate through the VSIG list and mark the first
* unused entry for the new VSIG entry as used and return that value.
@@ -2222,16 +2222,16 @@ static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_find_dup_props_vsig - find vsi group with a specified set of properties
+ * ice_find_dup_props_vsig - find VSI group with a specified set of properties
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @chs: characteristic list
* @vsig: returns the VSIG with the matching profiles, if found
*
- * Each VSIG is associated with a characteristic set; i.e. all vsis under
+ * Each VSIG is associated with a characteristic set; i.e. all VSIs under
* a group have the same characteristic set. To check if there exists a VSIG
* which has the same characteristics as the input characteristics; this
- * function will iterate through the xlt2 list and return the VSIG that has a
+ * function will iterate through the XLT2 list and return the VSIG that has a
* matching configuration. In order to make sure that priorities are accounted
* for, the list must match exactly, including the order in which the
* characteristics are listed.
@@ -2257,12 +2257,12 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_vsig_free - free vsi group
+ * ice_vsig_free - free VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to remove
*
- * The function will remove all vsis associated with the input VSIG and move
+ * The function will remove all VSIs associated with the input VSIG and move
* them to the DEFAULT_VSIG and mark the VSIG available.
*/
enum ice_status
@@ -2310,14 +2310,14 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_vsig_add_mv_vsi - add or move a vsi to a vsi group
+ * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to move
- * @vsig: destination vsi group
+ * @blk: HW block
+ * @vsi: VSI to move
+ * @vsig: destination VSI group
*
- * This function will move or add the input vsi to the target VSIG.
- * The function will find the original VSIG the vsi belongs to and
+ * This function will move or add the input VSI to the target VSIG.
+ * The function will find the original VSIG the VSI belongs to and
* move the entry to the DEFAULT_VSIG, update the original VSIG and
* then move entry to the new VSIG.
*/
@@ -2358,7 +2358,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
- /* Create vsi entry and add VSIG and prop_mask values */
+ /* Create VSI entry and add VSIG and prop_mask values */
hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
hw->blk[blk].xlt2.vsis[vsi].changed = 1;
@@ -2373,13 +2373,13 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_vsig_remove_vsi - remove vsi from VSIG
+ * ice_vsig_remove_vsi - remove VSI from VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to remove
- * @vsig: vsi group to remove from
+ * @blk: HW block
+ * @vsi: VSI to remove
+ * @vsig: VSI group to remove from
*
- * The function will remove the input vsi from its vsi group and move it
+ * The function will remove the input VSI from its VSI group and move it
* to the DEFAULT_VSIG.
*/
enum ice_status
@@ -2396,7 +2396,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
return ICE_ERR_DOES_NOT_EXIST;
- /* entry already in default VSIG, dont have to remove */
+ /* entry already in default VSIG, don't have to remove */
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
@@ -2407,7 +2407,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
vsi_cur = (*vsi_head);
- /* iterate the vsi list, skip over the entry to be removed */
+ /* iterate the VSI list, skip over the entry to be removed */
while (vsi_cur) {
if (vsi_tgt == vsi_cur) {
(*vsi_head) = vsi_cur->next_vsi;
@@ -2417,7 +2417,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_cur = vsi_cur->next_vsi;
}
- /* verify if vsi was removed from group list */
+ /* verify if VSI was removed from group list */
if (!vsi_cur)
return ICE_ERR_DOES_NOT_EXIST;
@@ -2429,11 +2429,11 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_find_prof_id - find profile id for a given field vector
+ * ice_find_prof_id - find profile ID for a given field vector
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @fv: field vector to search for
- * @prof_id: receives the profile id
+ * @prof_id: receives the profile ID
*/
static enum ice_status
ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
@@ -2456,7 +2456,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_id_rsrc_type - get profile id resource type for a block type
+ * ice_prof_id_rsrc_type - get profile ID resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2485,7 +2485,7 @@ static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_tcam_ent_rsrc_type - get tcam entry resource type for a block type
+ * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2707,10 +2707,10 @@ ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
}
/**
- * ice_alloc_tcam_ent - allocate hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the tcam for
- * @tcam_idx: pointer to variable to receive the tcam entry
+ * ice_alloc_tcam_ent - allocate hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the TCAM for
+ * @tcam_idx: pointer to variable to receive the TCAM entry
*
* This function allocates a new entry in a Profile ID TCAM for a specific
* block.
@@ -2727,10 +2727,10 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
}
/**
- * ice_free_tcam_ent - free hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the tcam entry
- * @tcam_idx: the tcam entry to free
+ * ice_free_tcam_ent - free hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the TCAM entry
+ * @tcam_idx: the TCAM entry to free
*
* This function frees an entry in a Profile ID TCAM for a specific block.
*/
@@ -2746,12 +2746,12 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
}
/**
- * ice_alloc_prof_id - allocate profile id
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the profile id for
- * @prof_id: pointer to variable to receive the profile id
+ * ice_alloc_prof_id - allocate profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the profile ID for
+ * @prof_id: pointer to variable to receive the profile ID
*
- * This function allocates a new profile id, which also corresponds to a Field
+ * This function allocates a new profile ID, which also corresponds to a Field
* Vector (Extraction Sequence) entry.
*/
static enum ice_status
@@ -2772,12 +2772,12 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
}
/**
- * ice_free_prof_id - free profile id
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id to free
+ * ice_free_prof_id - free profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID to free
*
- * This function frees a profile id, which also corresponds to a Field Vector.
+ * This function frees a profile ID, which also corresponds to a Field Vector.
*/
static enum ice_status
ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2801,9 +2801,9 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_inc_ref - increment reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to increment the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to increment the reference count
*/
static enum ice_status
ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2818,9 +2818,9 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_dec_ref - decrement reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to decrement the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to decrement the reference count
*/
static enum ice_status
ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2838,9 +2838,9 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block in which to write the extraction sequence
- * @prof_id: the profile id to write
+ * @prof_id: the profile ID to write
* @fv: pointer to the extraction sequence to write
*/
static void
@@ -2921,7 +2921,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
u8 *src, *dst;
void *sect;
- /* if the hw segment pointer is null then the first iteration of
+ /* if the HW segment pointer is null then the first iteration of
* ice_pkg_enum_section() will fail. In this case the Hw tables will
* not be filled and return success.
*/
@@ -3072,7 +3072,7 @@ static void ice_free_flow_profs(struct ice_hw *hw)
/**
* ice_free_prof_map - frees the profile map
* @hw: pointer to the hardware structure
- * @blk: the hw block which contains the profile map to be freed
+ * @blk: the HW block which contains the profile map to be freed
*/
static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
{
@@ -3091,7 +3091,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
/**
* ice_free_vsig_tbl - free complete VSIG table entries
* @hw: pointer to the hardware structure
- * @blk: the hw block on which to free the VSIG table entries
+ * @blk: the HW block on which to free the VSIG table entries
*/
static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
{
@@ -3151,9 +3151,9 @@ static void ice_init_flow_profs(struct ice_hw *hw)
}
/**
- * ice_init_sw_xlt1_db - init software xlt1 database from hw tables
+ * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
@@ -3172,9 +3172,9 @@ void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_xlt2_db - init software xlt2 database from hw tables
+ * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
@@ -3197,7 +3197,7 @@ void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_db - init software database from hw tables
+ * ice_init_sw_db - init software database from HW tables
* @hw: pointer to the hardware structure
*/
static
@@ -3329,9 +3329,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
}
/**
- * ice_prof_gen_key - generate profile id key
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_prof_gen_key - generate profile ID key
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3339,7 +3339,7 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
* @vl_msk: valid mask
* @dc_msk: don't care mask
* @nm_msk: never match mask
- * @key: output of profile id key
+ * @key: output of profile ID key
*/
static enum ice_status
ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
@@ -3384,11 +3384,11 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
}
/**
- * ice_tcam_write_entry - write tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_tcam_write_entry - write TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @idx: the entry index to write to
- * @prof_id: profile id
+ * @prof_id: profile ID
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3418,9 +3418,9 @@ ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
}
/**
- * ice_vsig_get_ref - returns number of vsis belong to a VSIG
+ * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to query
* @refs: pointer to variable to receive the reference count
*/
@@ -3446,7 +3446,7 @@ ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
/**
* ice_get_ptg - get or allocate a ptg for a ptype
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to retrieve the PTG for
* @ptg: receives the PTG of the ptype
* @add: receive boolean indicating whether PTG was added or not
@@ -3483,7 +3483,7 @@ ice_get_ptg(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg,
/**
* ice_has_prof_vsig - check to see if VSIG has a specific profile
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to check against
* @hdl: profile handle
*/
@@ -3500,14 +3500,14 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
}
ice_debug(hw, ICE_DBG_INIT,
- "Characteristic list for vsi group %d not found.\n",
+ "Characteristic list for VSI group %d not found.\n",
vsig);
return false;
}
/**
- * ice_prof_bld_es - build profile id extraction sequence changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_es - build profile ID extraction sequence changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3546,8 +3546,8 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_tcam - build profile id tcam changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_tcam - build profile ID TCAM changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3586,7 +3586,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_xlt1 - build xlt1 changes
+ * ice_prof_bld_xlt1 - build XLT1 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3619,7 +3619,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
}
/**
- * ice_prof_bld_xlt2 - build xlt2 changes
+ * ice_prof_bld_xlt2 - build XLT2 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3662,7 +3662,7 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
/**
* ice_upd_prof_hw - update hardware using the change list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @chgs: the list of changes to make in hardware
*/
@@ -3763,16 +3763,16 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
/**
* ice_add_prof - add profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @id: profile tracking id
+ * @id: profile tracking ID
* @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
* @es: extraction sequence (length of array is determined by the block)
*
* This function registers a profile, which matches a set of PTYPES with a
* particular extraction sequence. While the hardware profile is allocated
* it will not be written until the first call to ice_add_flow that specifies
- * the id value used here.
+ * the ID value used here.
*/
enum ice_status
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
@@ -3787,7 +3787,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/* search for existing profile */
status = ice_find_prof_id(hw, blk, es, &prof_id);
if (status) {
- /* allocate profile id */
+ /* allocate profile ID */
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
@@ -3851,7 +3851,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/**
* ice_search_prof_id - Search for a profile tracking ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
@@ -3876,7 +3876,7 @@ ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_set_prof_context - Set context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: context
@@ -3895,7 +3895,7 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt)
/**
* ice_get_prof_context - Get context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: pointer to variable to receive the context
@@ -3914,7 +3914,7 @@ ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt)
/**
* ice_vsig_prof_id_count - count profiles in a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
*/
@@ -3933,8 +3933,8 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_rel_tcam_idx - release a tcam index
- * @hw: pointer to the hw struct
+ * ice_rel_tcam_idx - release a TCAM index
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @idx: the index to release
*/
@@ -3947,13 +3947,13 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
enum ice_status status;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
dc_msk, nm_msk);
if (status)
return status;
- /* release the tcam entry */
+ /* release the TCAM entry */
status = ice_free_tcam_ent(hw, blk, idx);
return status;
@@ -3961,7 +3961,7 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
/**
* ice_rem_prof_id - remove one profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
@@ -4007,7 +4007,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_vsig - remove VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to remove
* @chg: the change list
@@ -4069,7 +4069,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_prof_id_vsig - remove a specific profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @hdl: profile handle indicating which profile to remove
@@ -4105,7 +4105,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_rem_flow_all - remove all flows with a particular profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*/
@@ -4143,11 +4143,11 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_rem_prof - remove profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
- * This will remove the profile specified by the id parameter, which was
+ * This will remove the profile specified by the ID parameter, which was
* previously created through ice_add_prof. If any existing entries
* are associated with this profile, they will be removed as well.
*/
@@ -4177,7 +4177,7 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_get_prof_ptgs - get ptgs for profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: profile handle
* @chg: change list
@@ -4190,7 +4190,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4231,7 +4231,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
/**
* ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG from which to copy the list
* @lst: output list
@@ -4272,7 +4272,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_to_lst - add profile entry to a list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @lst: the list to be added to
* @hdl: profile handle of entry to add
@@ -4320,7 +4320,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
/**
* ice_move_vsi - move VSI to another VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the VSI to move
* @vsig: the VSIG to move the VSI to
@@ -4357,15 +4357,15 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
}
/**
- * ice_prof_tcam_ena_dis - add enable or disable tcam change
- * @hw: pointer to the hw struct
+ * ice_prof_tcam_ena_dis - add enable or disable TCAM change
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @enable: true to enable, false to disable
- * @vsig: the vsig of the tcam entry
- * @tcam: pointer the tcam info structure of the tcam to disable
+ * @vsig: the vsig of the TCAM entry
+ * @tcam: pointer the TCAM info structure of the TCAM to disable
* @chg: the change list
*
- * This function appends an enable or disable tcam entry in the change log
+ * This function appends an enable or disable TCAM entry in the change log
*/
static enum ice_status
ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
@@ -4418,7 +4418,7 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
/**
* ice_adj_prof_priorities - adjust profile based on priorities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG for which to adjust profile priorities
* @chg: the change list
@@ -4487,7 +4487,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_id_vsig - add profile to VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to which this profile is to be added
* @hdl: the profile handle indicating the profile to add
@@ -4506,7 +4506,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4524,7 +4524,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
t->prof_id = map->prof_id;
t->tcam_count = map->ptype_count;
- /* create tcam entries */
+ /* create TCAM entries */
for (i = 0; i < map->ptype_count; i++) {
enum ice_status status;
u16 tcam_idx;
@@ -4543,7 +4543,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (!p)
goto err_ice_add_prof_id_vsig;
- /* allocate the tcam entry index */
+ /* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
if (status)
goto err_ice_add_prof_id_vsig;
@@ -4560,7 +4560,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
p->vsig = vsig;
p->tcam_idx = t->tcam[i].tcam_idx;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
t->tcam[i].prof_id,
t->tcam[i].ptg, vsig, 0, 0,
@@ -4568,8 +4568,8 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many tcam entries
- * are using this hw profile id
+ /* this increments the reference count of how many TCAM entries
+ * are using this HW profile ID
*/
status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
@@ -4590,7 +4590,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_create_prof_id_vsig - add a new VSIG with a single profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @hdl: the profile handle of the profile that will be added to the VSIG
@@ -4632,7 +4632,7 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
/**
* ice_create_vsig_from_list - create a new VSIG with a list of profiles
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @lst: the list of profile that will be added to the VSIG
@@ -4666,7 +4666,7 @@ ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
/**
* ice_find_prof_vsig - find a VSIG with a specific profile handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: the profile handle of the profile to search for
* @vsig: returns the VSIG with the matching profile
@@ -4697,13 +4697,13 @@ ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
/**
* ice_add_prof_id_flow - add profile flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi to enable with the profile specified by id
+ * @vsi: the VSI to enable with the profile specified by ID
* @hdl: profile handle
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4725,7 +4725,7 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
return status;
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool only_vsi;
@@ -4805,10 +4805,10 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
}
} else {
/* need to find or add a VSIG */
- /* search for an exising VSIG with an exact charc match */
+ /* search for an existing VSIG with an exact charc match */
if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
@@ -4847,14 +4847,14 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_add_flow - add flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs to enable with the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs to enable with the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4875,7 +4875,7 @@ ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,
/**
* ice_rem_prof_from_list - remove a profile from list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lst: list to remove the profile from
* @hdl: the profile handle indicating the profile to remove
*/
@@ -4897,13 +4897,13 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
/**
* ice_rem_prof_id_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi from which to remove the profile specified by id
+ * @vsi: the VSI from which to remove the profile specified by ID
* @hdl: profile tracking handle
*
* Calling this function will update the hardware tables to remove the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be disabled.
*/
enum ice_status
@@ -4918,7 +4918,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
INIT_LIST_HEAD(©);
INIT_LIST_HEAD(&chg);
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool last_profile;
@@ -4979,7 +4979,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else if (ice_find_dup_props_vsig(hw, blk, ©,
&vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
* list
*/
@@ -4991,7 +4991,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else {
/* since no existing VSIG supports this
* characteristic pattern, we need to create a
- * new VSIG and tcam entries
+ * new VSIG and TCAM entries
*/
status = ice_create_vsig_from_lst(hw, blk, vsi,
©, &chg);
@@ -5029,14 +5029,14 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_rem_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs from which to remove the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs from which to remove the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* The function will remove flows from the specified VSIs that were enabled
- * using ice_add_flow. The id value will indicated which profile will be
+ * using ice_add_flow. The ID value will indicated which profile will be
* removed. Once successfully called, the flow will be disabled.
*/
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 81e89aeeb..23fffed75 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -59,7 +59,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg);
enum ice_status
ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg);
-/* XLT2/Vsi group functions */
+/* XLT2/VSI group functions */
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 9f98f4f2a..aed23a067 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -350,7 +350,7 @@ struct ice_sw_fv_list_entry {
};
#pragma pack(1)
-/* The BOOST tcam stores the match packet header in reverse order, meaning
+/* The BOOST TCAM stores the match packet header in reverse order, meaning
* the fields are reversed; in addition, this means that the normally big endian
* fields of the packet are now little endian.
*/
@@ -602,7 +602,7 @@ struct ice_xlt2 {
};
/* Extraction sequence - list of match fields:
- * protocol id, offset, profile length
+ * protocol ID, offset, profile length
*/
union ice_match_fld {
struct {
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index cc3f69b51..574c927c4 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -292,6 +292,9 @@ struct ice_flow_prof_params {
u16 entry_length; /* # of bytes formatted entry will require */
u8 es_cnt;
+ /* For ACL, the es[0] will have the data of ICE_RX_MDID_PKT_FLAGS_15_0
+ * This will give us the direction flags.
+ */
struct ice_fv_word es[ICE_MAX_FV_WORDS];
ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
@@ -494,7 +497,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
/**
* ice_flow_xtract_fld - Create an extraction sequence entry for the given field
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: packet segment index of the field to be extracted
* @fld: ID of field to be extracted
@@ -656,7 +659,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_xtract_raws - Create extract sequence entries for raw bytes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: index of packet segment whose raw fields are to be be extracted
*/
@@ -728,7 +731,7 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_create_xtrct_seq - Create an extraction sequence for given segments
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*
* This function iterates through all matched fields in the given segments, and
@@ -768,7 +771,7 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
/**
* ice_flow_proc_segs - process all packet segments associated with a profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*/
static enum ice_status
@@ -807,7 +810,7 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
/**
* ice_flow_find_prof_conds - Find a profile matching headers and conditions
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -852,7 +855,7 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_find_prof - Look up a profile matching headers and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -874,7 +877,7 @@ ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_find_prof_id - Look up a profile with given profile ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: unique ID to identify this flow profile
*/
@@ -893,7 +896,7 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
/**
* ice_flow_rem_entry_sync - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry: flow entry to be removed
*/
static enum ice_status
@@ -917,7 +920,7 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
/**
* ice_flow_add_prof_sync - Add a flow profile for packet segments and fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1057,7 +1060,7 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1089,7 +1092,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1115,7 +1118,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_add_prof - Add a flow profile for packet segments and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1160,7 +1163,7 @@ ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_rem_prof - Remove a flow profile and all entries associated with it
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block for which the flow profile is to be removed
* @prof_id: unique ID of the flow profile to be removed
*/
@@ -1188,11 +1191,11 @@ ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
}
/**
- * ice_flow_get_hw_prof - return the hw profile for a specific profile id handle
- * @hw: pointer to the hw struct
+ * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
+ * @hw: pointer to the HW struct
* @blk: classification stage
- * @prof_id: the profile id handle
- * @hw_prof_id: pointer to variable to receive the hw profile id
+ * @prof_id: the profile ID handle
+ * @hw_prof_id: pointer to variable to receive the HW profile ID
*/
enum ice_status
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
@@ -1211,7 +1214,7 @@ ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_find_entry - look for a flow entry using its unique ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @entry_id: unique ID to identify this flow entry
*
@@ -1249,7 +1252,7 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
/**
* ice_flow_add_entry - Add a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: ID of the profile to add a new flow entry to
* @entry_id: unique ID to identify this flow entry
@@ -1335,7 +1338,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_rem_entry - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry_h: handle to the flow entry to be removed
*/
enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h)
@@ -1712,12 +1715,12 @@ void ice_rem_all_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_rem_vsi_rss_cfg - remove RSS configurations associated with vsi
+ * ice_rem_vsi_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*
* This function will iterate through all flow profiles and disassociate
- * the vsi from that profile. If the flow profile has no vsis it will
+ * the VSI from that profile. If the flow profile has no VSIs it will
* be removed.
*/
enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
@@ -1847,7 +1850,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Search for a flow profile that has matching headers, hash fields
- * and has the input vsi associated to it. If found, no further
+ * and has the input VSI associated to it. If found, no further
* operations required and exit.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1858,8 +1861,8 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Check if a flow profile exists with the same protocol headers and
- * associated with the input vsi. If so disasscociate the vsi from
- * this profile. The vsi will be added to a new profile created with
+ * associated with the input VSI. If so disasscociate the VSI from
+ * this profile. The VSI will be added to a new profile created with
* the protocol header and new hash field configuration.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1871,7 +1874,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
else
goto exit;
- /* Remove profile if it has no vsis associated */
+ /* Remove profile if it has no VSIs associated */
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI)) {
status = ice_flow_rem_prof_sync(hw, blk, prof);
if (status)
@@ -1880,7 +1883,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/* Search for a profile that has same match fields only. If this
- * exists then associate the vsi to this profile.
+ * exists then associate the VSI to this profile.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
vsi_handle,
@@ -2003,7 +2006,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
*
* This function will lookup the flow profile based on the input
* hash field bitmap, iterate through the profile entry list of
- * that profile and find entry associated with input vsi to be
+ * that profile and find entry associated with input VSI to be
* removed. Calls are made to underlying flow apis which will in
* turn build or update buffers for RSS XLT1 section.
*/
@@ -2025,7 +2028,7 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/**
- * ice_replay_rss_cfg - remove RSS configurations associated with vsi
+ * ice_replay_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*/
@@ -2057,13 +2060,13 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
* @hdrs: protocol header type
*
* This function will return the match fields of the first instance of flow
- * profile having the given header types and containing input vsi
+ * profile having the given header types and containing input VSI
*/
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
{
struct ice_rss_cfg *r, *rss_cfg = NULL;
- /* verify if the protocol header is non zero and vsi is valid */
+ /* verify if the protocol header is non zero and VSI is valid */
if (hdrs == ICE_FLOW_SEG_HDR_NONE || !ice_is_vsi_valid(hw, vsi_handle))
return ICE_HASH_INVALID;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 51d7c3ac9..265e1ee3e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -227,7 +227,6 @@ struct ice_flow_entry {
u64 id;
u16 vsi_handle;
enum ice_flow_priority priority;
-
struct ice_flow_prof *prof;
/* Flow entry's content */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index d27045f7e..4a1ea0c7d 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -6,7 +6,7 @@
#define _ICE_LAN_TX_RX_H_
#include "ice_osdep.h"
-/* RX Descriptors */
+/* Rx Descriptors */
union ice_16byte_rx_desc {
struct {
__le64 pkt_addr; /* Packet buffer address */
@@ -20,7 +20,7 @@ union ice_16byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -46,7 +46,7 @@ union ice_32byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -181,15 +181,15 @@ enum ice_rx_desc_status_bits {
ICE_RX_DESC_STATUS_L2TAG1P_S = 2,
ICE_RX_DESC_STATUS_L3L4P_S = 3,
ICE_RX_DESC_STATUS_CRCP_S = 4,
- ICE_RX_DESC_STATUS_TSYNINDX_S = 5, /* 2 BITS */
+ ICE_RX_DESC_STATUS_TSYNINDX_S = 5,
ICE_RX_DESC_STATUS_TSYNVALID_S = 7,
ICE_RX_DESC_STATUS_EXT_UDP_0_S = 8,
- ICE_RX_DESC_STATUS_UMBCAST_S = 9, /* 2 BITS */
+ ICE_RX_DESC_STATUS_UMBCAST_S = 9,
ICE_RX_DESC_STATUS_FLM_S = 11,
- ICE_RX_DESC_STATUS_FLTSTAT_S = 12, /* 2 BITS */
+ ICE_RX_DESC_STATUS_FLTSTAT_S = 12,
ICE_RX_DESC_STATUS_LPBK_S = 14,
ICE_RX_DESC_STATUS_IPV6EXADD_S = 15,
- ICE_RX_DESC_STATUS_RESERVED2_S = 16, /* 2 BITS */
+ ICE_RX_DESC_STATUS_RESERVED2_S = 16,
ICE_RX_DESC_STATUS_INT_UDP_0_S = 18,
ICE_RX_DESC_STATUS_LAST /* this entry must be last!!! */
};
@@ -325,8 +325,8 @@ enum ice_rx_desc_ext_status_bits {
/* Note: These are predefined bit offsets */
ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0,
ICE_RX_DESC_EXT_STATUS_L2TAG3P_S = 1,
- ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2, /* 2 BITS */
- ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4, /* 2 BITS */
+ ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2,
+ ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4,
ICE_RX_DESC_EXT_STATUS_FDLONGB_S = 9,
ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11,
};
@@ -373,7 +373,7 @@ enum ice_rx_prog_status_desc_error_bits {
ICE_RX_PROG_STATUS_DESC_NO_FD_ENTRY_S = 1,
};
-/* RX Flex Descriptor
+/* Rx Flex Descriptor
* This descriptor is used instead of the legacy version descriptor when
* ice_rlan_ctx.adv_desc is set
*/
@@ -387,7 +387,7 @@ union ice_32b_rx_flex_desc {
} read;
struct {
/* Qword 0 */
- u8 rxdid; /* descriptor builder profile id */
+ u8 rxdid; /* descriptor builder profile ID */
u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */
__le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */
__le16 pkt_len; /* [15:14] are reserved */
@@ -422,12 +422,12 @@ union ice_32b_rx_flex_desc {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 2
+ * RxDID Profile ID 2
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Flow Id higher 16-bits
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Flow ID higher 16-bits
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic {
/* Qword 0 */
@@ -461,8 +461,8 @@ struct ice_32b_rx_flex_desc_nic {
};
/* Rx Flex Descriptor Switch Profile
- * RxDID Profile Id 3
- * Flex-field 0: Source Vsi
+ * RxDID Profile ID 3
+ * Flex-field 0: Source VSI
*/
struct ice_32b_rx_flex_desc_sw {
/* Qword 0 */
@@ -491,8 +491,8 @@ struct ice_32b_rx_flex_desc_sw {
};
/* Rx Flex Descriptor NIC VEB Profile
- * RxDID Profile Id 4
- * Flex-field 0: Destination Vsi
+ * RxDID Profile ID 4
+ * Flex-field 0: Destination VSI
*/
struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 0 */
@@ -505,8 +505,8 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 1 */
__le16 status_error0;
__le16 l2tag1;
- __le16 dst_vsi; /* [0:12]: destination vsi */
- /* 13: vsi valid bit */
+ __le16 dst_vsi; /* [0:12]: destination VSI */
+ /* 13: VSI valid bit */
/* [14:15] are reserved */
__le16 flex_field_1;
@@ -523,7 +523,7 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
};
/* Rx Flex Descriptor NIC ACL Profile
- * RxDID Profile Id 5
+ * RxDID Profile ID 5
* Flex-field 0: ACL Counter 0
* Flex-field 1: ACL Counter 1
* Flex-field 2: ACL Counter 2
@@ -556,12 +556,12 @@ struct ice_32b_rx_flex_desc_nic_acl_dbg {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 6
+ * RxDID Profile ID 6
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Source Vsi
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Source VSI
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic_2 {
/* Qword 0 */
@@ -818,7 +818,7 @@ enum ice_rlan_ctx_rx_hsplit_1 {
ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS = 2,
};
-/* TX Descriptor */
+/* Tx Descriptor */
struct ice_tx_desc {
__le64 buf_addr; /* Address of descriptor's data buf */
__le64 cmd_type_offset_bsz;
@@ -846,15 +846,15 @@ enum ice_tx_desc_cmd_bits {
ICE_TX_DESC_CMD_RSVD = 0x0004,
ICE_TX_DESC_CMD_IL2TAG1 = 0x0008,
ICE_TX_DESC_CMD_DUMMY = 0x0010,
- ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060, /* 2 BITS */
+ ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000,
+ ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020,
+ ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040,
+ ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060,
ICE_TX_DESC_CMD_RSVD2 = 0x0080,
- ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300, /* 2 BITS */
+ ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000,
+ ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100,
+ ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200,
+ ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300,
ICE_TX_DESC_CMD_RE = 0x0400,
ICE_TX_DESC_CMD_RSVD3 = 0x0800,
};
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 25a2ca4cb..92de2ec3b 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -7,7 +7,7 @@
/**
* ice_aq_read_nvm
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @module_typeid: module pointer location in words from the NVM beginning
* @offset: byte offset from the module beginning
* @length: length of the section to be read (in bytes from the offset)
@@ -248,7 +248,7 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
/**
* ice_init_nvm - initializes NVM setting
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function reads and populates NVM settings such as Shadow RAM size,
* max_timeout, and blank_nvm_mode
@@ -264,7 +264,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
ice_debug(hw, ICE_DBG_TRACE, "ice_init_nvm");
- /* The SR size is stored regardless of the nvm programming mode
+ /* The SR size is stored regardless of the NVM programming mode
* as the blank mode may be used in the factory line.
*/
gens_stat = rd32(hw, GLNVM_GENS);
@@ -357,7 +357,7 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
/**
* ice_nvm_validate_checksum
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Verify NVM PFA checksum validity (0x0706)
*/
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 7b92c7105..f96964d86 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -18,7 +18,7 @@
/* Max recipes that can be chained */
#define ICE_MAX_CHAIN_RECIPE 5
-/* 1 word reserved for switch id from allowed 5 words.
+/* 1 word reserved for switch ID from allowed 5 words.
* So a recipe can have max 4 words. And you can chain 5 such recipes
* together. So maximum words that can be programmed for look up is 5 * 4.
*/
@@ -128,7 +128,7 @@ enum ice_prot_id {
#define ICE_PROTOCOL_MAX_ENTRIES 16
-/* Mapping of software defined protocol id to hardware defined protocol id */
+/* Mapping of software defined protocol ID to hardware defined protocol ID */
struct ice_protocol_entry {
enum ice_protocol_type type;
u8 protocol_id;
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 7acbae62c..2edc305b5 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -45,9 +45,9 @@ ice_sched_add_root_node(struct ice_port_info *pi,
/**
* ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
* @start_node: pointer to the starting ice_sched_node struct in a sub-tree
- * @teid: node teid to search
+ * @teid: node TEID to search
*
- * This function searches for a node matching the teid in the scheduling tree
+ * This function searches for a node matching the TEID in the scheduling tree
* from the SW DB. The search is recursive and is restricted by the number of
* layers it has searched through; stopping at the max supported layer.
*
@@ -68,7 +68,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
return NULL;
- /* Check if teid matches to any of the children nodes */
+ /* Check if TEID matches to any of the children nodes */
for (i = 0; i < start_node->num_children; i++)
if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
return start_node->children[i];
@@ -88,7 +88,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
/**
* ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cmd_opc: cmd opcode
* @elems_req: number of elements to request
* @buf: pointer to buffer
@@ -120,7 +120,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
/**
* ice_aq_query_sched_elems - query scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -201,7 +201,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
/**
* ice_aq_delete_sched_elems - delete scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to delete
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -221,13 +221,13 @@ ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
}
/**
- * ice_sched_remove_elems - remove nodes from hw
- * @hw: pointer to the hw struct
+ * ice_sched_remove_elems - remove nodes from HW
+ * @hw: pointer to the HW struct
* @parent: pointer to the parent node
* @num_nodes: number of nodes
* @node_teids: array of node teids to be deleted
*
- * This function remove nodes from hw
+ * This function remove nodes from HW
*/
static enum ice_status
ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
@@ -260,7 +260,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
/**
* ice_sched_get_first_node - get the first node of the given layer
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @parent: pointer the base node of the subtree
* @layer: layer number
*
@@ -381,7 +381,7 @@ void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
/**
* ice_aq_get_dflt_topo - gets default scheduler topology
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -411,7 +411,7 @@ ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
/**
* ice_aq_add_sched_elems - adds scheduling element
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: the number of groups that are requested to be added
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -432,7 +432,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_cfg_sched_elems - configures scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -453,7 +453,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_move_sched_elems - move scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to move
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -474,7 +474,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_suspend_sched_elems - suspend scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to suspend
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -495,7 +495,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_resume_sched_elems - resume scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to resume
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -516,7 +516,7 @@ ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_query_sched_res - query scheduler resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf_size: buffer size in bytes
* @buf: pointer to buffer
* @cd: pointer to command details structure or NULL
@@ -535,13 +535,13 @@ ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
}
/**
- * ice_sched_suspend_resume_elems - suspend or resume hw nodes
- * @hw: pointer to the hw struct
+ * ice_sched_suspend_resume_elems - suspend or resume HW nodes
+ * @hw: pointer to the HW struct
* @num_nodes: number of nodes
* @node_teids: array of node teids to be suspended or resumed
* @suspend: true means suspend / false means resume
*
- * This function suspends or resumes hw nodes
+ * This function suspends or resumes HW nodes
*/
static enum ice_status
ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
@@ -577,7 +577,7 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
/**
* ice_aq_rl_profile - performs a rate limiting task
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
* @num_profiles: the number of profiles
* @buf: pointer to buffer
@@ -609,14 +609,14 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
/**
* ice_aq_add_rl_profile - adds rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to be add
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_added: total number of profiles added to return
* @cd: pointer to command details structure
*
- * Add rl profile (0x0410)
+ * Add RL profile (0x0410)
*/
static enum ice_status
ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -631,13 +631,13 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
/**
* ice_aq_query_rl_profile - query rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure
*
- * Query rl profile (0x0411)
+ * Query RL profile (0x0411)
*/
enum ice_status
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -649,15 +649,15 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_aq_remove_rl_profile - removes rl profile(s)
- * @hw: pointer to the hw struct
+ * ice_aq_remove_rl_profile - removes RL profile(s)
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to remove
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_removed: total number of profiles removed to return
* @cd: pointer to command details structure or NULL
*
- * Remove rl profile (0x0415)
+ * Remove RL profile (0x0415)
*/
static enum ice_status
ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -671,10 +671,10 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_sched_clear_rl_prof - clears rl prof entries
+ * ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
- * This function removes all rl profile from hw as well as from SW DB.
+ * This function removes all RL profile from HW as well as from SW DB.
*/
static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
{
@@ -704,10 +704,10 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
}
/**
- * ice_sched_clear_agg - clears the agg related information
+ * ice_sched_clear_agg - clears the aggregator related information
* @hw: pointer to the hardware structure
*
- * This function removes agg list and free up agg related memory
+ * This function removes aggregator list and free up aggregator related memory
* previously allocated.
*/
void ice_sched_clear_agg(struct ice_hw *hw)
@@ -742,7 +742,7 @@ static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
{
if (!pi)
return;
- /* remove rl profiles related lists */
+ /* remove RL profiles related lists */
ice_sched_clear_rl_prof(pi);
if (pi->root) {
ice_free_sched_node(pi, pi->root);
@@ -770,7 +770,7 @@ void ice_sched_clear_port(struct ice_port_info *pi)
/**
* ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Cleanup scheduling elements from SW DB for all the ports
*/
@@ -795,7 +795,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
/**
* ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_l2_nodes: the number of L2 nodes whose CGDs to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -821,16 +821,16 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
/**
- * ice_sched_add_elems - add nodes to hw and SW DB
+ * ice_sched_add_elems - add nodes to HW and SW DB
* @pi: port information structure
* @tc_node: pointer to the branch node
* @parent: pointer to the parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes
* @num_nodes_added: pointer to num nodes added
- * @first_node_teid: if new nodes are added then return the teid of first node
+ * @first_node_teid: if new nodes are added then return the TEID of first node
*
- * This function add nodes to hw as well as to SW DB for a given layer
+ * This function add nodes to HW as well as to SW DB for a given layer
*/
static enum ice_status
ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
@@ -924,7 +924,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
* @parent: pointer to parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes to be added
- * @first_node_teid: pointer to the first node teid
+ * @first_node_teid: pointer to the first node TEID
* @num_nodes_added: pointer to number of nodes added
*
* This function add nodes to a given layer.
@@ -976,7 +976,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
*num_nodes_added += num_added;
}
- /* Don't modify the first node teid memory if the first node was
+ /* Don't modify the first node TEID memory if the first node was
* added already in the above call. Instead send some temp
* memory for all other recursive calls.
*/
@@ -1008,7 +1008,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
/**
* ice_sched_get_qgrp_layer - get the current queue group layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current queue group layer number
*/
@@ -1020,7 +1020,7 @@ static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
/**
* ice_sched_get_vsi_layer - get the current VSI layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current VSI layer number
*/
@@ -1031,7 +1031,7 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
* 7 4
* 5 or less sw_entry_point_layer
*/
- /* calculate the vsi layer based on number of layers. */
+ /* calculate the VSI layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
@@ -1043,17 +1043,17 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
/**
* ice_sched_get_agg_layer - get the current aggregator layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current aggregator layer number
*/
static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
{
- /* Num Layers agg layer
+ /* Num Layers aggregator layer
* 9 4
* 7 or less sw_entry_point_layer
*/
- /* calculate the agg layer based on number of layers. */
+ /* calculate the aggregator layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
@@ -1226,11 +1226,11 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)
}
/**
- * ice_sched_get_node - Get the struct ice_sched_node for given teid
+ * ice_sched_get_node - Get the struct ice_sched_node for given TEID
* @pi: port information structure
* @teid: Scheduler node TEID
*
- * This function retrieves the ice_sched_node struct for given teid from
+ * This function retrieves the ice_sched_node struct for given TEID from
* the SW DB and returns it to the caller.
*/
struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
@@ -1313,7 +1313,7 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
/**
* ice_sched_find_node_in_subtree - Find node in part of base node subtree
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @base: pointer to the base node
* @node: pointer to the node to search
*
@@ -1345,13 +1345,13 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
}
/**
- * ice_sched_get_free_qparent - Get a free lan or rdma q group node
+ * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: branch number
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function retrieves a free lan or rdma q group node
+ * This function retrieves a free LAN or RDMA queue group node
*/
struct ice_sched_node *
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -1369,11 +1369,11 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
if (!vsi_ctx)
return NULL;
vsi_node = vsi_ctx->sched.vsi_node[tc];
- /* validate invalid VSI id */
+ /* validate invalid VSI ID */
if (!vsi_node)
goto lan_q_exit;
- /* get the first q group node from VSI sub-tree */
+ /* get the first queue group node from VSI sub-tree */
qgrp_node = ice_sched_get_first_node(pi->hw, vsi_node, qgrp_layer);
while (qgrp_node) {
/* make sure the qgroup node is part of the VSI subtree */
@@ -1389,12 +1389,12 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_get_vsi_node - Get a VSI node based on VSI id
- * @hw: pointer to the hw struct
+ * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
* @vsi_handle: software VSI handle
*
- * This function retrieves a VSI node for a given VSI id from a given
+ * This function retrieves a VSI node for a given VSI ID from a given
* TC branch
*/
struct ice_sched_node *
@@ -1418,13 +1418,13 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
}
/**
- * ice_sched_get_agg_node - Get an aggregator node based on agg id
- * @hw: pointer to the hw struct
+ * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function retrieves an aggregator node for a given agg id from a given
- * TC branch
+ * This function retrieves an aggregator node for a given aggregator ID from
+ * a given TC branch
*/
struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
@@ -1448,7 +1448,7 @@ ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
/**
* ice_sched_check_node - Compare node parameters between SW DB and HW DB
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function queries and compares the HW element with SW DB node parameters
@@ -1475,7 +1475,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
/**
* ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_qs: number of queues
* @num_nodes: num nodes array
*
@@ -1491,7 +1491,7 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
qgl = ice_sched_get_qgrp_layer(hw);
vsil = ice_sched_get_vsi_layer(hw);
- /* calculate num nodes from q group to VSI layer */
+ /* calculate num nodes from queue group to VSI layer */
for (i = qgl; i > vsil; i--) {
/* round to the next integer if there is a remainder */
num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
@@ -1507,10 +1507,10 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
* @vsi_handle: software VSI handle
* @tc_node: pointer to the TC node
* @num_nodes: pointer to the num nodes that needs to be added per layer
- * @owner: node owner (lan or rdma)
+ * @owner: node owner (LAN or RDMA)
*
* This function adds the VSI child nodes to tree. It gets called for
- * lan and rdma separately.
+ * LAN and RDMA separately.
*/
static enum ice_status
ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
@@ -1559,7 +1559,7 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @tc_node: pointer to TC node
* @num_nodes: pointer to num nodes array
*
@@ -1678,7 +1678,7 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
/* calculate number of supported nodes needed for this VSI */
ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes);
- /* add vsi supported nodes to tc subtree */
+ /* add VSI supported nodes to TC subtree */
return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
num_nodes);
}
@@ -1740,7 +1740,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
return status;
vsi_ctx->sched.max_lanq[tc] = new_numqs;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -1749,7 +1749,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
* @vsi_handle: software VSI handle
* @tc: TC number
* @maxqs: max number of queues
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
* @enable: TC enabled or disabled
*
* This function adds/updates VSI nodes based on the number of queues. If TC is
@@ -1774,7 +1774,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
return ICE_ERR_PARAM;
vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
- /* suspend the VSI if tc is not enabled */
+ /* suspend the VSI if TC is not enabled */
if (!enable) {
if (vsi_node && vsi_node->in_use) {
u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
@@ -1825,11 +1825,11 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
}
/**
- * ice_sched_rm_agg_vsi_entry - remove agg related vsi info entry
+ * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function removes single aggregator vsi info entry from
+ * This function removes single aggregator VSI info entry from
* aggregator list.
*/
static void
@@ -1876,9 +1876,9 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
* ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function removes the VSI and its lan or rdma children nodes from the
+ * This function removes the VSI and its LAN or RDMA children nodes from the
* scheduler tree.
*/
static enum ice_status
@@ -1931,7 +1931,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
ice_free_sched_node(pi, vsi_node);
vsi_ctx->sched.vsi_node[i] = NULL;
- /* clean up agg related vsi info if any */
+ /* clean up aggregator related VSI info if any */
ice_sched_rm_agg_vsi_info(pi, vsi_handle);
}
if (owner == ICE_SCHED_NODE_OWNER_LAN)
@@ -1945,11 +1945,11 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
}
/**
- * ice_rm_vsi_lan_cfg - remove VSI and its lan children nodes
+ * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function clears the VSI and its lan children nodes from scheduler tree
+ * This function clears the VSI and its LAN children nodes from scheduler tree
* for all TCs.
*/
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
@@ -1960,7 +1960,7 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
/**
* ice_sched_is_tree_balanced - Check tree nodes are identical or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function compares all the nodes for a given tree against HW DB nodes
@@ -1983,15 +1983,15 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
}
/**
- * ice_aq_query_node_to_root - retrieve the tree topology for a given node teid
- * @hw: pointer to the hw struct
- * @node_teid: node teid
+ * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure or NULL
*
* This function retrieves the tree topology from the firmware for a given
- * node teid to the root node.
+ * node TEID to the root node.
*/
enum ice_status
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
@@ -2008,12 +2008,12 @@ ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
}
/**
- * ice_get_agg_info - get the agg id
+ * ice_get_agg_info - get the aggregator ID
* @hw: pointer to the hardware structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function validates agg id. The function returns info if agg id is
- * prsent in list otherwise it returns null.
+ * This function validates aggregator ID. The function returns info if
+ * aggregator ID is present in list otherwise it returns null.
*/
static struct ice_sched_agg_info*
ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
@@ -2029,14 +2029,14 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
- * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default agg
+ * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
* @tc: traffic class number
* @rm_vsi_info: true or false
*
* This function move all the VSI(s) to the default aggregator and delete
- * agg vsi info based on passed in boolean parameter rm_vsi_info. The
+ * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
* caller holds the scheduler lock.
*/
static enum ice_status
@@ -2052,7 +2052,7 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
ice_sched_agg_vsi_info, list_entry) {
u16 vsi_handle = agg_vsi_info->vsi_handle;
- /* Move VSI to default agg */
+ /* Move VSI to default aggregator */
if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
continue;
@@ -2072,15 +2072,15 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove agg configuration for tc
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
* @pi: port information structure
- * @agg_info: aggregator id
- * @tc: tc number
+ * @agg_info: aggregator ID
+ * @tc: TC number
* @rm_vsi_info: bool value true or false
*
- * This function removes agg reference to vsi of given tc. It removes the agg
- * configuration completely for requested tc. The caller needs to hold the
- * scheduler lock.
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
*/
static enum ice_status
ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
@@ -2107,12 +2107,12 @@ ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
}
/**
- * ice_save_agg_tc_bitmap - save agg TC bitmap
+ * ice_save_agg_tc_bitmap - save aggregator TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc_bitmap: 8 bits TC bitmap
*
- * Save agg TC bitmap. This function needs to be called with scheduler
+ * Save aggregator TC bitmap. This function needs to be called with scheduler
* lock held.
*/
static enum ice_status
@@ -2130,19 +2130,19 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_sched_cfg_agg - configure agg node
+ * ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* It registers a unique aggregator node into scheduler services. It
* allows a user to register with a unique ID to track it's resources.
* The aggregator type determines if this is a queue group, VSI group
- * or aggregator group. It then creates the agg node(s) for requested
- * tc(s) or removes an existing agg node including its configuration
- * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release agg
- * resources and remove agg id.
+ * or aggregator group. It then creates the aggregator node(s) for requested
+ * TC(s) or removes an existing aggregator node including its configuration
+ * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
+ * resources and remove aggregator ID.
* This function needs to be called with scheduler lock held.
*/
static enum ice_status
@@ -2156,7 +2156,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info = ice_get_agg_info(hw, agg_id);
if (!agg_info) {
- /* Creat new entry for new agg id */
+ /* Create new entry for new aggregator ID */
agg_info = (struct ice_sched_agg_info *)
ice_malloc(hw, sizeof(*agg_info));
if (!agg_info) {
@@ -2167,32 +2167,32 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info->agg_type = agg_type;
agg_info->tc_bitmap[0] = 0;
- /* Initialize the aggregator vsi list head */
+ /* Initialize the aggregator VSI list head */
INIT_LIST_HEAD(&agg_info->agg_vsi_list);
- /* Add new entry in agg list */
+ /* Add new entry in aggregator list */
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
- /* Create agg node(s) for requested tc(s) */
+ /* Create aggregator node(s) for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
- /* Delete agg cfg tc if it exists previously */
+ /* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
if (status)
break;
continue;
}
- /* Check if agg node for tc already exists */
+ /* Check if aggregator node for TC already exists */
if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
continue;
- /* Create new agg node for tc */
+ /* Create new aggregator node for TC */
status = ice_sched_add_agg_cfg(pi, agg_id, tc);
if (status)
break;
- /* Save agg node's tc information */
+ /* Save aggregator node's TC information */
ice_set_bit(tc, agg_info->tc_bitmap);
}
exit_reg_agg:
@@ -2200,10 +2200,10 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_agg - config agg node
+ * ice_cfg_agg - config aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* This function configures aggregator node(s).
@@ -2226,12 +2226,12 @@ ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
}
/**
- * ice_get_agg_vsi_info - get the agg id
+ * ice_get_agg_vsi_info - get the aggregator ID
* @agg_info: aggregator info
* @vsi_handle: software VSI handle
*
- * The function returns agg VSI info based on VSI handle. This function needs
- * to be called with scheduler lock held.
+ * The function returns aggregator VSI info based on VSI handle. This function
+ * needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_vsi_info*
ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
@@ -2247,13 +2247,13 @@ ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
}
/**
- * ice_get_vsi_agg_info - get the agg info of VSI
+ * ice_get_vsi_agg_info - get the aggregator info of VSI
* @hw: pointer to the hardware structure
* @vsi_handle: Sw VSI handle
*
- * The function returns agg info of VSI represented via vsi_handle. The VSI has
- * in this case a different aggregator than the default one. This function
- * needs to be called with scheduler lock held.
+ * The function returns aggregator info of VSI represented via vsi_handle. The
+ * VSI has in this case a different aggregator than the default one. This
+ * function needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_info*
ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
@@ -2274,9 +2274,9 @@ ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Save VSI to aggregator TC bitmap. This function needs to call with scheduler
* lock held.
@@ -2301,15 +2301,15 @@ ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_sched_assoc_vsi_to_agg - associate or move VSI to new or default agg
+ * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* This function moves VSI to a new or default aggregator node. If VSI is
- * already associated to the agg node then no operation is performed on the
- * tree. This function needs to be called with scheduler lock held.
+ * already associated to the aggregator node then no operation is performed on
+ * the tree. This function needs to be called with scheduler lock held.
*/
static enum ice_status
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
@@ -2329,22 +2329,22 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
/* check if entry already exist */
agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
if (!agg_vsi_info) {
- /* Create new entry for vsi under agg list */
+ /* Create new entry for VSI under aggregator list */
agg_vsi_info = (struct ice_sched_agg_vsi_info *)
ice_malloc(hw, sizeof(*agg_vsi_info));
if (!agg_vsi_info)
return ICE_ERR_PARAM;
- /* add vsi id into the agg list */
+ /* add VSI ID into the aggregator list */
agg_vsi_info->vsi_handle = vsi_handle;
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
- /* Move vsi node to new agg node for requested tc(s) */
+ /* Move VSI node to new aggregator node for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
- /* Move VSI to new agg */
+ /* Move VSI to new aggregator */
status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
if (status)
break;
@@ -2354,7 +2354,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
else
ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
}
- /* If vsi moved back to default agg then delete entry agg_vsi_info. */
+ /* If VSI moved back to default aggregator, delete agg_vsi_info. */
if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
LIST_DEL(&agg_vsi_info->list_entry);
@@ -2364,11 +2364,11 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_move_vsi_to_agg - moves VSI to new or default agg
+ * ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: tc bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Move or associate VSI to a new or default aggregator node.
*/
@@ -2390,12 +2390,12 @@ ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_rm_agg_cfg - remove agg configuration
+ * ice_rm_agg_cfg - remove aggregator configuration
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes agg reference to vsi and delete agg id info.
- * It removes the agg configuration completely.
+ * This function removes aggregator reference to VSI and delete aggregator ID
+ * info. It removes the aggregator configuration completely.
*/
enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
{
@@ -2425,7 +2425,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
LIST_DEL(&agg_info->list_entry);
ice_free(pi->hw, agg_info);
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
exit_ice_rm_agg_cfg:
@@ -2434,11 +2434,11 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_set_clear_cir_bw_alloc - set or clear CIR bw alloc information
+ * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear CIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear CIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2452,11 +2452,11 @@ ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_set_clear_eir_bw_alloc - set or clear EIR bw alloc information
+ * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear EIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear EIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2470,14 +2470,14 @@ ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_sched_save_vsi_bw_alloc - save VSI node's bw alloc information
+ * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2506,11 +2506,11 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_set_clear_cir_bw - set or clear CIR bw
+ * ice_set_clear_cir_bw - set or clear CIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear CIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2519,18 +2519,18 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = 0;
} else {
- /* Save type of bw information */
+ /* Save type of BW information */
ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = bw;
}
}
/**
- * ice_set_clear_eir_bw - set or clear EIR bw
+ * ice_set_clear_eir_bw - set or clear EIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear EIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2539,24 +2539,24 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved shared bw information.
+ * First clear earlier saved shared BW information.
*/
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
- /* save EIR bw information */
+ /* save EIR BW information */
ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = bw;
}
}
/**
- * ice_set_clear_shared_bw - set or clear shared bw
+ * ice_set_clear_shared_bw - set or clear shared BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear shared bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2565,27 +2565,27 @@ ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved EIR bw information.
+ * First clear earlier saved EIR BW information.
*/
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
- /* save shared bw information */
+ /* save shared BW information */
ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = bw;
}
}
/**
- * ice_sched_save_vsi_bw - save VSI node's bw information
+ * ice_sched_save_vsi_bw - save VSI node's BW information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of VSI type node for post replay use.
+ * Save BW information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2658,14 +2658,14 @@ ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_save_agg_bw_alloc - save agg node's bw alloc information
+ * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: bandwidth alloc information
*
- * Save bw alloc information of AGG type node for post replay use.
+ * Save BW alloc information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2692,14 +2692,14 @@ ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_sched_save_agg_bw - save agg node's bw information
+ * ice_sched_save_agg_bw - save aggregator node's BW information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of AGG type node for post replay use.
+ * Save BW information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2729,14 +2729,14 @@ ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_lmt_per_tc - configure VSI bw limit per tc
+ * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of VSI scheduling node based on tc
+ * This function configures BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2757,13 +2757,13 @@ ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI bw limit per tc
+ * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
*
- * This function configures default bw limit of VSI scheduling node based on tc
+ * This function configures default BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2786,14 +2786,14 @@ ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_agg_bw_lmt_per_tc - configure aggregator bw limit per tc
+ * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function applies bw limit to aggregator scheduling node based on tc
+ * This function applies BW limit to aggregator scheduling node based on TC
* information.
*/
enum ice_status
@@ -2813,14 +2813,14 @@ ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator bw default limit per tc
+ * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
*
- * This function applies default bw limit to aggregator scheduling node based
- * on tc information.
+ * This function applies default BW limit to aggregator scheduling node based
+ * on TC information.
*/
enum ice_status
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2841,10 +2841,10 @@ ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_shared_lmt - configure VSI bw shared limit
+ * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
* across all traffic classes for VSI matching handle.
@@ -2856,7 +2856,7 @@ ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
}
/**
- * ice_cfg_vsi_bw_no_shared_lmt - configure VSI bw for no shared limiter
+ * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
* @pi: port information structure
* @vsi_handle: software VSI handle
*
@@ -2871,13 +2871,13 @@ ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_cfg_agg_bw_shared_lmt - configure aggregator bw shared limit
+ * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function configures the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
@@ -2886,12 +2886,12 @@ ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/**
- * ice_cfg_agg_bw_no_shared_lmt - configure aggregator bw for no shared limiter
+ * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function removes the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
@@ -2903,12 +2903,12 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
* ice_config_vsi_queue_priority - config VSI queue priority of node
* @pi: port information structure
* @num_qs: number of VSI queues
- * @q_ids: queue ids array
- * @q_ids: queue ids array
+ * @q_ids: queue IDs array
+ * @q_ids: queue IDs array
* @q_prio: queue priority array
*
* This function configures the queue node priority (Sibling Priority) of the
- * passed in VSI's queue(s) for a given traffic class (tc).
+ * passed in VSI's queue(s) for a given traffic class (TC).
*/
enum ice_status
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
@@ -2940,16 +2940,16 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
}
/**
- * ice_cfg_agg_vsi_priority_per_tc - config agg's VSI priority per tc
+ * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
* @pi: port information structure
- * @agg_id: Aggregator id
+ * @agg_id: Aggregator ID
* @num_vsis: number of VSI(s)
* @vsi_handle_arr: array of software VSI handles
* @node_prio: pointer to node priority
* @tc: traffic class
*
* This function configures the node priority (Sibling Priority) of the
- * passed in VSI's for a given traffic class (tc) of an Aggregator id.
+ * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
*/
enum ice_status
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
@@ -3027,14 +3027,14 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_vsi_bw_alloc - config VSI bw alloc per tc
+ * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @ena_tcmap: enabled tc map
+ * @ena_tcmap: enabled TC map
* @rl_type: Rate limit type CIR/EIR
- * @bw_alloc: Array of bw alloc
+ * @bw_alloc: Array of BW alloc
*
- * This function configures the bw allocation of the passed in VSI's
+ * This function configures the BW allocation of the passed in VSI's
* node(s) for enabled traffic class.
*/
enum ice_status
@@ -3049,7 +3049,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
@@ -3079,14 +3079,14 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
}
/**
- * ice_cfg_agg_bw_alloc - config agg bw alloc
+ * ice_cfg_agg_bw_alloc - config aggregator BW alloc
* @pi: port information structure
- * @agg_id: aggregator id
- * @ena_tcmap: enabled tc map
+ * @agg_id: aggregator ID
+ * @ena_tcmap: enabled TC map
* @rl_type: rate limit type CIR/EIR
- * @bw_alloc: array of bw alloc
+ * @bw_alloc: array of BW alloc
*
- * This function configures the bw allocation of passed in aggregator for
+ * This function configures the BW allocation of passed in aggregator for
* enabled traffic class(s).
*/
enum ice_status
@@ -3111,7 +3111,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
goto exit_cfg_agg_bw_alloc;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
@@ -3142,10 +3142,10 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/**
- * ice_sched_calc_wakeup - calculate rl profile wakeup parameter
- * @bw: bandwidth in kbps
+ * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
+ * @bw: bandwidth in Kbps
*
- * This function calculates the wakeup parameter of rl profile.
+ * This function calculates the wakeup parameter of RL profile.
*/
static u16 ice_sched_calc_wakeup(s32 bw)
{
@@ -3183,11 +3183,11 @@ static u16 ice_sched_calc_wakeup(s32 bw)
}
/**
- * ice_sched_bw_to_rl_profile - convert bw to profile parameters
- * @bw: bandwidth in kbps
+ * ice_sched_bw_to_rl_profile - convert BW to profile parameters
+ * @bw: bandwidth in Kbps
* @profile: profile parameters to return
*
- * This function converts the bw to profile structure format.
+ * This function converts the BW to profile structure format.
*/
static enum ice_status
ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
@@ -3203,7 +3203,7 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
return status;
- /* Bytes per second from kbps */
+ /* Bytes per second from Kbps */
bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
/* encode is 6 bits but really useful are 5 bits */
@@ -3247,16 +3247,16 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
}
/**
- * ice_sched_add_rl_profile - add rl profile
+ * ice_sched_add_rl_profile - add RL profile
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: specifies in which layer to create profile
*
- * This function first checks the existing list for corresponding bw
+ * This function first checks the existing list for corresponding BW
* parameter. If it exists, it returns the associated profile otherwise
- * it creates a new rate limit profile for requested bw, and adds it to
- * the hw db and local list. It returns the new profile or null on error.
+ * it creates a new rate limit profile for requested BW, and adds it to
+ * the HW DB and local list. It returns the new profile or null on error.
* The caller needs to hold the scheduler lock.
*/
static struct ice_aqc_rl_profile_info *
@@ -3291,10 +3291,10 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
rl_prof_elem->bw == bw)
- /* Return existing profile id info */
+ /* Return existing profile ID info */
return rl_prof_elem;
- /* Create new profile id */
+ /* Create new profile ID */
rl_prof_elem = (struct ice_aqc_rl_profile_info *)
ice_malloc(hw, sizeof(*rl_prof_elem));
@@ -3311,7 +3311,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
rl_prof_elem->profile.flags = profile_type;
rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
- /* Create new entry in hw db */
+ /* Create new entry in HW DB */
buf = (struct ice_aqc_rl_profile_generic_elem *)
&rl_prof_elem->profile;
status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
@@ -3435,12 +3435,12 @@ ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @rl_prof_id: rate limit profile id
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @rl_prof_id: rate limit profile ID
*
- * This function configures node element's bw limit.
+ * This function configures node element's BW limit.
*/
static enum ice_status
ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
@@ -3457,7 +3457,7 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_MAX_BW:
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
@@ -3466,11 +3466,11 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_SHARED_BW:
- /* Check for removing shared bw */
+ /* Check for removing shared BW */
if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
/* remove shared profile */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
- data->srl_id = 0; /* clear srl field */
+ data->srl_id = 0; /* clear SRL field */
/* enable back EIR to default profile */
data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
@@ -3478,16 +3478,16 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
break;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
(LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
ICE_SCHED_DFLT_RL_PROF_ID))
return ICE_ERR_CFG;
- /* EIR bw is set to default, disable it */
+ /* EIR BW is set to default, disable it */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
- /* Okay to enable shared bw now */
+ /* Okay to enable shared BW now */
data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
data->srl_id = CPU_TO_LE16(rl_prof_id);
break;
@@ -3501,12 +3501,12 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_get_node_rl_prof_id - get node's rate limit profile id
+ * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
* @node: sched node
* @rl_type: rate limit type
*
* If existing profile matches, it returns the corresponding rate
- * limit profile id, otherwise it returns an invalid id as error.
+ * limit profile ID, otherwise it returns an invalid ID as error.
*/
static u16
ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
@@ -3539,7 +3539,7 @@ ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
/**
* ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @layer_index: layer index
*
* This function returns requested profile creation layer.
@@ -3603,14 +3603,14 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
}
/**
- * ice_sched_rm_rl_profile - remove rl profile id
+ * ice_sched_rm_rl_profile - remove RL profile ID
* @pi: port information structure
* @layer_num: layer number where profiles are saved
* @profile_type: profile type like EIR, CIR, or SRL
- * @profile_id: profile id to remove
+ * @profile_id: profile ID to remove
*
* This function removes rate limit profile from layer 'layer_num' of type
- * 'profile_type' and profile id as 'profile_id'. The caller needs to hold
+ * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
* scheduler lock.
*/
static enum ice_status
@@ -3620,7 +3620,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
struct ice_aqc_rl_profile_info *rl_prof_elem;
enum ice_status status = ICE_SUCCESS;
- /* Check the existing list for rl profile */
+ /* Check the existing list for RL profile */
LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
@@ -3629,7 +3629,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
if (rl_prof_elem->prof_id_ref)
rl_prof_elem->prof_id_ref--;
- /* Remove old profile id from database */
+ /* Remove old profile ID from database */
status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
if (status && status != ICE_ERR_IN_USE)
ice_debug(pi->hw, ICE_DBG_SCHED,
@@ -3646,10 +3646,10 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
- * @layer_num: layer number where rl profiles are saved
+ * @layer_num: layer number where RL profiles are saved
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3681,17 +3681,18 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
default:
return ICE_ERR_PARAM;
}
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
- /* Remove stale rl profile id */
+ /* Remove stale RL profile ID */
if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
old_id == ICE_SCHED_INVAL_PROF_ID)
- return status;
+ return ICE_SUCCESS;
+
return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
}
@@ -3704,7 +3705,7 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
* @bw: bandwidth value
*
* This function prepares node element's bandwidth to SRL or EIR exclusively.
- * EIR bw and Shared bw profiles are mutually exclusive and hence only one of
+ * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
* them may be set for any given element. This function needs to be called
* with the scheduler lock held.
*/
@@ -3730,7 +3731,7 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
layer_num);
} else if (rl_type == ICE_MAX_BW &&
node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
- /* Remove Shared profile. Set default shared bw call
+ /* Remove Shared profile. Set default shared BW call
* removes shared profile for a node.
*/
return ice_sched_set_node_bw_dflt(pi, node,
@@ -3748,9 +3749,9 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: layer number
*
- * This function adds new profile corresponding to requested bw, configures
- * node's rl profile id of type cir, eir, or srl, and removes old profile
- * id from local database. The caller needs to hold scheduler lock.
+ * This function adds new profile corresponding to requested BW, configures
+ * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
+ * ID from local database. The caller needs to hold scheduler lock.
*/
static enum ice_status
ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3767,21 +3768,21 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
/* New changes has been applied */
- /* Increment the profile id reference count */
+ /* Increment the profile ID reference count */
rl_prof_info->prof_id_ref++;
- /* Check for old id removal */
+ /* Check for old ID removal */
if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
- return status;
+ return ICE_SUCCESS;
return ice_sched_rm_rl_profile(pi, layer_num,
rl_prof_info->profile.flags,
@@ -3789,14 +3790,14 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_lmt - set node's bw limit
+ * ice_sched_set_node_bw_lmt - set node's BW limit
* @pi: port information structure
* @node: tree node
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * It updates node's bw limit parameters like bw rl profile id of type cir,
- * eir, or srl. The caller needs to hold scheduler lock.
+ * It updates node's BW limit parameters like BW RL profile ID of type CIR,
+ * EIR, or SRL. The caller needs to hold scheduler lock.
*/
enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3811,7 +3812,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!pi)
return ICE_ERR_PARAM;
hw = pi->hw;
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
node->tx_sched_layer);
@@ -3824,7 +3825,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!cfg_node)
return ICE_ERR_CFG;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
@@ -3838,13 +3839,13 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_dflt_lmt - set node's bw limit to default
+ * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3884,13 +3885,13 @@ ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
}
/**
- * ice_sched_set_q_bw_lmt - sets queue bw limit
+ * ice_sched_set_q_bw_lmt - sets queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of queue scheduling node.
+ * This function sets BW limit of queue scheduling node.
*/
static enum ice_status
ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3937,13 +3938,13 @@ ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_cfg_q_bw_lmt - configure queue bw limit
+ * ice_cfg_q_bw_lmt - configure queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of queue scheduling node.
+ * This function configures BW limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
@@ -3953,12 +3954,12 @@ ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
}
/**
- * ice_cfg_q_bw_dflt_lmt - configure queue bw default limit
+ * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
*
- * This function configures bw default limit of queue scheduling node.
+ * This function configures BW default limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3968,11 +3969,11 @@ ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_sched_save_tc_node_bw - save tc node bw limit
+ * ice_sched_save_tc_node_bw - save TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function saves the modified values of bandwidth settings for later
* replay purpose (restore) after reset.
@@ -4002,13 +4003,13 @@ ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_lmt - sets tc node bw limit
+ * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bandwidth limit of tc node.
+ * This function configures bandwidth limit of TC node.
*/
static enum ice_status
ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
@@ -4036,13 +4037,13 @@ ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_lmt - configure tc node bw limit
+ * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4053,12 +4054,12 @@ ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_dflt_lmt - configure tc node bw default limit
+ * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
*
- * This function configures bw default limit of tc node.
+ * This function configures BW default limit of TC node.
*/
enum ice_status
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
@@ -4068,13 +4069,13 @@ ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_save_tc_node_bw_alloc - save tc node's bw alloc information
+ * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
* @pi: port information structure
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
@@ -4100,13 +4101,13 @@ ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_alloc - set tc node bw alloc
+ * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bandwidth alloc of tc node, also saves the
+ * This function configures bandwidth alloc of TC node, also saves the
* changed settings for replay purpose, and return success if it succeeds
* in modifying bandwidth alloc setting.
*/
@@ -4135,13 +4136,13 @@ ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_alloc - configure tc node bw alloc
+ * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4152,12 +4153,12 @@ ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_agg_bw_dflt_lmt - set agg node's bw limit to default
+ * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function retrieves the aggregator id based on VSI id and tc,
- * and sets node's bw limit to default. This function needs to be
+ * This function retrieves the aggregator ID based on VSI ID and TC,
+ * and sets node's BW limit to default. This function needs to be
* called with the scheduler lock held.
*/
enum ice_status
@@ -4201,14 +4202,14 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_get_node_by_id_type - get node from id type
+ * ice_sched_get_node_by_id_type - get node from ID type
* @pi: port information structure
* @id: identifier
* @agg_type: type of aggregator
* @tc: traffic class
*
- * This function returns node identified by id of type aggregator, and
- * based on traffic class (tc). This function needs to be called with
+ * This function returns node identified by ID of type aggregator, and
+ * based on traffic class (TC). This function needs to be called with
* the scheduler lock held.
*/
static struct ice_sched_node *
@@ -4263,16 +4264,16 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
}
/**
- * ice_sched_set_node_bw_lmt_per_tc - set node bw limit per tc
+ * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
* @pi: port information structure
- * @id: id (software VSI handle or AGG id)
+ * @id: ID (software VSI handle or AGG ID)
* @agg_type: aggregator type (VSI or AGG type node)
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of VSI or Aggregator scheduling node
- * based on tc information from passed in argument bw.
+ * This function sets BW limit of VSI or Aggregator scheduling node
+ * based on TC information from passed in argument BW.
*/
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -4310,7 +4311,7 @@ ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
* @vsi_handle: software VSI handle
*
* This function validates SRL node of the VSI node if available SRL layer is
- * different than the VSI node layer on all tc(s).This function needs to be
+ * different than the VSI node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4322,7 +4323,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4356,13 +4357,13 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_set_vsi_bw_shared_lmt - set VSI bw shared limit
+ * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
- * across all traffic classes for VSI matching handle. When bw value of
+ * across all traffic classes for VSI matching handle. When BW value of
* ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
*/
enum ice_status
@@ -4382,7 +4383,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
if (status)
goto exit_set_vsi_bw_shared_lmt;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4417,10 +4418,10 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_validate_agg_srl_node - validate AGG SRL node
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
* This function validates SRL node of the AGG node if available SRL layer is
- * different than the AGG node layer on all tc(s).This function needs to be
+ * different than the AGG node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4440,7 +4441,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
if (!agg_id_present)
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4472,14 +4473,14 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_sched_set_agg_bw_shared_lmt - set aggregator bw shared limit
+ * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type
+ * This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id. When
- * bw value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
+ * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
* node(s).
*/
enum ice_status
@@ -4511,7 +4512,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
goto exit_agg_bw_shared_lmt;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -4975,7 +4976,7 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
/**
* ice_cfg_rl_burst_size - Set burst size value
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @bytes: burst size in bytes
*
* This function configures/set the burst size to requested new value. The new
@@ -4995,7 +4996,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_BYTE_GRANULARITY;
/* round number to nearest 256 granularity */
bytes = ice_round_to_num(bytes, 256);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_BYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_BYTE_GRANULARITY;
burst_size_to_prog |= (u16)bytes;
@@ -5005,7 +5006,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_KBYTE_GRANULARITY;
/* round number to nearest 1024 granularity */
bytes = ice_round_to_num(bytes, 1024);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
/* The value is in k bytes */
@@ -5017,7 +5018,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
/*
* ice_sched_replay_node_prio - re-configure node priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: priority value
*
@@ -5043,12 +5044,12 @@ ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_node_bw - replay node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_node_bw - replay node(s) BW
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @bw_t_info: bw type information
+ * @bw_t_info: BW type information
*
- * This function restores node's bw from bw_t_info. The caller needs
+ * This function restores node's BW from bw_t_info. The caller needs
* to hold the scheduler lock.
*/
static enum ice_status
@@ -5102,8 +5103,8 @@ ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_agg_bw - replay aggregator node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_agg_bw - replay aggregator node(s) BW
+ * @hw: pointer to the HW struct
* @agg_info: aggregator data structure
*
* This function re-creates aggregator type nodes. The caller needs to hold
@@ -5157,7 +5158,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
{
u8 tc;
- /* Some tc(s) may be missing after reset, adjust for replay */
+ /* Some TC(s) may be missing after reset, adjust for replay */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
@@ -5166,10 +5167,10 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
/**
* ice_sched_replay_agg - recreate aggregator node(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function recreate aggregator type nodes which are not replayed earlier.
- * It also replay aggregator bw information. These aggregator nodes are not
+ * It also replay aggregator BW information. These aggregator nodes are not
* associated with VSI type node yet.
*/
void ice_sched_replay_agg(struct ice_hw *hw)
@@ -5180,7 +5181,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
ice_acquire_lock(&pi->sched_lock);
LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
list_entry) {
- /* replay agg (re-create aggregator node) */
+ /* replay aggregator (re-create aggregator node) */
if (!ice_cmp_bitmap(agg_info->tc_bitmap,
agg_info->replay_tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
@@ -5203,7 +5204,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/* Move on to next one */
continue;
}
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
ice_info(hw, "Replay agg bw [id=%d] failed\n",
@@ -5215,7 +5216,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/**
* ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function initialize aggregator(s) TC bitmap to zero. A required
* preinit step for replaying aggregators.
@@ -5239,10 +5240,10 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
}
/**
- * ice_sched_replay_tc_node_bw - replay tc node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_tc_node_bw - replay TC node(s) BW
+ * @hw: pointer to the HW struct
*
- * This function replay tc nodes. The caller needs to hold the scheduler lock.
+ * This function replay TC nodes. The caller needs to hold the scheduler lock.
*/
enum ice_status
ice_sched_replay_tc_node_bw(struct ice_hw *hw)
@@ -5257,7 +5258,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
if (!tc_node)
- continue; /* tc not present */
+ continue; /* TC not present */
status = ice_sched_replay_node_bw(hw, tc_node,
&hw->tc_node_bw_t_info[tc]);
if (status)
@@ -5268,8 +5269,8 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
}
/**
- * ice_sched_replay_vsi_bw - replay VSI type node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @tc_bitmap: 8 bits TC bitmap
*
@@ -5308,8 +5309,8 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
}
/**
- * ice_sched_replay_vsi_agg - replay agg & VSI to aggregator node(s)
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays aggregator node, VSI to aggregator type nodes, and
@@ -5336,12 +5337,12 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
return ICE_SUCCESS; /* Not present in list - default Agg case */
ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
replay_bitmap);
- /* Replay agg node associated to vsi_handle */
+ /* Replay aggregator node associated to vsi_handle */
status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
ICE_AGG_TYPE_AGG, replay_bitmap);
if (status)
return status;
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
return status;
@@ -5354,14 +5355,14 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
replay_bitmap);
if (status)
return status;
- /* Replay VSI bw (restore VSI bw) */
+ /* Replay VSI BW (restore VSI BW) */
return ice_sched_replay_vsi_bw(hw, vsi_handle,
agg_vsi_info->tc_bitmap);
}
/**
* ice_replay_vsi_agg - replay VSI to aggregator node
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays association of VSI to aggregator type nodes, and
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index a5565945e..61fa6a85b 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -43,14 +43,14 @@ struct ice_aqc_rl_profile_info {
struct ice_aqc_rl_profile_elem profile;
struct LIST_ENTRY_TYPE list_entry;
u32 bw; /* requested */
- u16 prof_id_ref; /* profile id to node association ref count */
+ u16 prof_id_ref; /* profile ID to node association ref count */
};
struct ice_sched_agg_vsi_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u16 vsi_handle;
- /* save agg vsi TC bitmap */
+ /* save aggregator VSI TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
@@ -60,9 +60,9 @@ struct ice_sched_agg_info {
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u32 agg_id;
enum ice_agg_type agg_type;
- /* bw_t_info saves agg bw information */
+ /* bw_t_info saves aggregator BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
- /* save agg TC bitmap */
+ /* save aggregator TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a7b712e17..512e64b91 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -21,7 +21,7 @@
* byte 6 = 0x2: to identify it as locally administered SA MAC
* byte 12 = 0x81 & byte 13 = 0x00:
* In case of VLAN filter first two bytes defines ether type (0x8100)
- * and remaining two bytes are placeholder for programming a given VLAN id
+ * and remaining two bytes are placeholder for programming a given VLAN ID
* In case of Ether type filter it is treated as header without VLAN tag
* and byte 12 and 13 is used to program a given Ether type instead
*/
@@ -54,7 +54,7 @@ static const u8 dummy_eth_header[DUMMY_ETH_HDR_LEN] = { 0x2, 0, 0, 0, 0, 0,
/**
* ice_init_def_sw_recp - initialize the recipe book keeping tables
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Allocate memory for the entire recipe table and initialize the structures/
* entries corresponding to basic recipes.
@@ -282,7 +282,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
/**
* ice_aq_add_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -324,7 +324,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_free_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
* @cd: pointer to command details structure or NULL
@@ -360,7 +360,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -397,7 +397,7 @@ ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_is_vsi_valid - check whether the VSI is valid or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* check whether the VSI is valid or not
@@ -408,11 +408,11 @@ bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_get_hw_vsi_num - return the hw VSI number
- * @hw: pointer to the hw struct
+ * ice_get_hw_vsi_num - return the HW VSI number
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
- * return the hw VSI number
+ * return the HW VSI number
* Caution: call this function only if VSI is valid (ice_is_vsi_valid)
*/
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
@@ -422,7 +422,7 @@ u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_get_vsi_ctx - return the VSI context entry for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* return the VSI context entry for a given VSI handle
@@ -434,7 +434,7 @@ struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_vsi_ctx - save the VSI context for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
* @vsi: VSI context pointer
*
@@ -448,7 +448,7 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
/**
* ice_clear_vsi_ctx - clear the VSI context entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* clear the VSI context entry
@@ -467,7 +467,7 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_clear_all_vsi_ctx - clear all the VSI context entries
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
void ice_clear_all_vsi_ctx(struct ice_hw *hw)
{
@@ -479,13 +479,13 @@ void ice_clear_all_vsi_ctx(struct ice_hw *hw)
/**
* ice_add_vsi - add VSI context to the hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle provided by drivers
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
* Add a VSI context to the hardware also add it into the VSI handle list.
- * If this function gets called after reset for exisiting VSIs then update
+ * If this function gets called after reset for existing VSIs then update
* with the new HW VSI number in the corresponding VSI handle list entry.
*/
enum ice_status
@@ -502,7 +502,7 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return status;
tmp_vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
if (!tmp_vsi_ctx) {
- /* Create a new vsi context */
+ /* Create a new VSI context */
tmp_vsi_ctx = (struct ice_vsi_ctx *)
ice_malloc(hw, sizeof(*tmp_vsi_ctx));
if (!tmp_vsi_ctx) {
@@ -519,12 +519,12 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
tmp_vsi_ctx->vsi_num = vsi_ctx->vsi_num;
}
- return status;
+ return ICE_SUCCESS;
}
/**
* ice_free_vsi- free VSI context from hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
@@ -549,7 +549,7 @@ ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
@@ -570,8 +570,8 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_alloc_free_vsi_list
- * @hw: pointer to the hw struct
- * @vsi_list_id: VSI list id returned or used for lookup
+ * @hw: pointer to the HW struct
+ * @vsi_list_id: VSI list ID returned or used for lookup
* @lkup_type: switch rule filter lookup type
* @opc: switch rules population command type - pass in the command opcode
*
@@ -629,7 +629,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
/**
* ice_aq_sw_rules - add/update/remove switch rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @rule_list: pointer to switch rule population list
* @rule_list_sz: total size of the rule list in bytes
* @num_rules: number of switch rules in the rule_list
@@ -798,7 +798,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
* 1. The switch is a VEB AND
* 2
* 2.1 The lookup is a directional lookup like ethertype,
- * promiscuous, ethertype-mac, promiscuous-vlan
+ * promiscuous, ethertype-MAC, promiscuous-VLAN
* and default-port OR
* 2.2 The lookup is VLAN, OR
* 2.3 The lookup is MAC with mcast or bcast addr for MAC, OR
@@ -829,7 +829,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
}
/**
- * ice_ilog2 - Caculates integer log base 2 of a number
+ * ice_ilog2 - Calculates integer log base 2 of a number
* @n: number on which to perform operation
*/
static int ice_ilog2(u64 n)
@@ -984,7 +984,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,
* @hw: pointer to the hardware structure
* @m_ent: the management entry for which sw marker needs to be added
* @sw_marker: sw marker to tag the Rx descriptor with
- * @l_id: large action resource id
+ * @l_id: large action resource ID
*
* Create a large action to hold software marker and update the switch rule
* entry pointed by m_ent with newly created large action
@@ -996,8 +996,8 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
struct ice_aqc_sw_rules_elem *lg_act, *rx_tx;
/* For software marker we need 3 large actions
* 1. FWD action: FWD TO VSI or VSI LIST
- * 2. GENERIC VALUE action to hold the profile id
- * 3. GENERIC VALUE action to hold the software marker id
+ * 2. GENERIC VALUE action to hold the profile ID
+ * 3. GENERIC VALUE action to hold the software marker ID
*/
const u16 num_lg_acts = 3;
enum ice_status status;
@@ -1060,13 +1060,13 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
ice_aqc_opc_update_sw_rules);
- /* Update the action to point to the large action id */
+ /* Update the action to point to the large action ID */
rx_tx->pdata.lkup_tx_rx.act =
CPU_TO_LE32(ICE_SINGLE_ACT_PTR |
((l_id << ICE_SINGLE_ACT_PTR_VAL_S) &
ICE_SINGLE_ACT_PTR_VAL_M));
- /* Use the filter rule id of the previously created rule with single
+ /* Use the filter rule ID of the previously created rule with single
* act. Once the update happens, hardware will treat this as large
* action
*/
@@ -1090,10 +1090,10 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to set in the VSI mapping
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
*
- * Helper function to create a new entry of VSI list id to VSI mapping
- * using the given VSI list id
+ * Helper function to create a new entry of VSI list ID to VSI mapping
+ * using the given VSI list ID
*/
static struct ice_vsi_list_map_info *
ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1122,13 +1122,13 @@ ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @remove: Boolean value to indicate if this is a remove action
* @opc: switch rules population command type - pass in the command opcode
* @lkup_type: lookup type of the filter
*
* Call AQ command to add a new switch rule or update existing switch rule
- * using the given VSI list id
+ * using the given VSI list ID
*/
static enum ice_status
ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1185,7 +1185,7 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
/**
* ice_create_vsi_list_rule - Creates and populates a VSI list rule
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
* @vsi_list_id: stores the ID of the VSI list to be created
@@ -1279,7 +1279,7 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw,
* @f_info: filter information for switch rule
*
* Call AQ command to update a previously created switch rule with a
- * VSI list id
+ * VSI list ID
*/
static enum ice_status
ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
@@ -1306,7 +1306,7 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
/**
* ice_update_sw_rule_bridge_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Updates unicast switch filter rules based on VEB/VEPA mode
*/
@@ -1362,7 +1362,7 @@ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
* Allocate a new VSI list and add two VSIs
* to this list using switch rule command
* Update the previously created switch rule with the
- * newly created VSI list id
+ * newly created VSI list ID
* if a VSI list was previously created
* Add the new VSI to the previously created VSI list set
* using the update switch rule command
@@ -1443,7 +1443,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
return ICE_SUCCESS;
/* Update the previously created VSI list set with
- * the new VSI id passed in
+ * the new VSI ID passed in
*/
vsi_list_id = cur_fltr->fwd_id.vsi_list_id;
opcode = ice_aqc_opc_update_sw_rules;
@@ -1451,7 +1451,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
status = ice_update_vsi_list_rule(hw, &vsi_handle, 1,
vsi_list_id, false, opcode,
new_fltr->lkup_type);
- /* update VSI list mapping info with new VSI id */
+ /* update VSI list mapping info with new VSI ID */
if (!status)
ice_set_bit(vsi_handle,
m_entry->vsi_list_info->vsi_map);
@@ -1495,7 +1495,7 @@ ice_find_rule_entry(struct ice_hw *hw, u8 recp_id, struct ice_fltr_info *f_info)
* @hw: pointer to the hardware structure
* @recp_id: lookup type for which VSI lists needs to be searched
* @vsi_handle: VSI handle to be found in VSI list
- * @vsi_list_id: VSI list id found contaning vsi_handle
+ * @vsi_list_id: VSI list ID found containing vsi_handle
*
* Helper function to search a VSI list with single entry containing given VSI
* handle element. This can be extended further to search VSI list with more
@@ -1527,7 +1527,7 @@ ice_find_vsi_list_entry(struct ice_hw *hw, u8 recp_id, u16 vsi_handle,
/**
* ice_add_rule_internal - add rule for a given lookup type
* @hw: pointer to the hardware structure
- * @recp_id: lookup type (recipe id) for which rule has to be added
+ * @recp_id: lookup type (recipe ID) for which rule has to be added
* @f_entry: structure containing MAC forwarding information
*
* Adds or updates the rule lists for a given recipe
@@ -1576,7 +1576,7 @@ ice_add_rule_internal(struct ice_hw *hw, u8 recp_id,
/**
* ice_remove_vsi_list_rule
* @hw: pointer to the hardware structure
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @lkup_type: switch rule filter lookup type
*
* The VSI list should be emptied before this function is called to remove the
@@ -1702,7 +1702,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
* ice_remove_rule_internal - Remove a filter rule of a given type
*
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @f_entry: rule entry containing filter information
*/
static enum ice_status
@@ -1752,7 +1752,7 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
status = ice_rem_update_vsi_list(hw, vsi_handle, list_elem);
if (status)
goto exit;
- /* if vsi count goes to zero after updating the vsi list */
+ /* if VSI count goes to zero after updating the VSI list */
if (list_elem->vsi_count == 0)
remove_rule = true;
}
@@ -1830,7 +1830,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
return ICE_ERR_PARAM;
hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
m_list_itr->fltr_info.fwd_id.hw_vsi_id = hw_vsi_id;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (m_list_itr->fltr_info.src_id != ICE_SRC_ID_VSI)
return ICE_ERR_PARAM;
m_list_itr->fltr_info.src = hw_vsi_id;
@@ -1907,7 +1907,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
((u8 *)r_iter + (elem_sent * s_rule_size));
}
- /* Fill up rule id based on the value returned from FW */
+ /* Fill up rule ID based on the value returned from FW */
r_iter = s_rule;
LIST_FOR_EACH_ENTRY(m_list_itr, m_list, ice_fltr_list_entry,
list_entry) {
@@ -1968,7 +1968,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);
new_fltr = &f_entry->fltr_info;
- /* VLAN id should only be 12 bits */
+ /* VLAN ID should only be 12 bits */
if (new_fltr->l_data.vlan.vlan_id > ICE_MAX_VLAN_ID)
return ICE_ERR_PARAM;
@@ -2026,7 +2026,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
}
}
} else if (v_list_itr->vsi_list_info->ref_cnt == 1) {
- /* Update existing VSI list to add new VSI id only if it used
+ /* Update existing VSI list to add new VSI ID only if it used
* by one VLAN rule.
*/
cur_fltr = &v_list_itr->fltr_info;
@@ -2036,7 +2036,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
/* If VLAN rule exists and VSI list being used by this rule is
* referenced by more than 1 VLAN rule. Then create a new VSI
* list appending previous VSI with new VSI and update existing
- * VLAN rule to point to new VSI list id
+ * VLAN rule to point to new VSI list ID
*/
struct ice_fltr_info tmp_fltr;
u16 vsi_handle_arr[2];
@@ -2130,9 +2130,9 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
* @hw: pointer to the hardware structure
* @mv_list: list of MAC and VLAN filters
*
- * If the VSI on which the mac-vlan pair has to be added has RX and Tx VLAN
+ * If the VSI on which the MAC-VLAN pair has to be added has Rx and Tx VLAN
* pruning bits enabled, then it is the responsibility of the caller to make
- * sure to add a vlan only filter on the same VSI. Packets belonging to that
+ * sure to add a VLAN only filter on the same VSI. Packets belonging to that
* VLAN won't be received on that VSI otherwise.
*/
enum ice_status
@@ -2446,7 +2446,7 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
struct ice_fltr_mgmt_list_entry *fm_entry;
enum ice_status status = ICE_SUCCESS;
- /* check to make sure VSI id is valid and within boundary */
+ /* check to make sure VSI ID is valid and within boundary */
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -2504,7 +2504,7 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
/**
* ice_remove_promisc - Remove promisc based filter rules
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @v_list: list of promisc entries
*/
static enum ice_status
@@ -2851,8 +2851,8 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
- * @recp_id: Recipe id for which rules need to be replayed
+ * @vsi_handle: driver VSI handle
+ * @recp_id: Recipe ID for which rules need to be replayed
* @list_head: list for which filters need to be replayed
*
* Replays the filter of recipe recp_id for a VSI represented via vsi_handle.
@@ -2877,7 +2877,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
f_entry.fltr_info = itr->fltr_info;
if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN &&
itr->fltr_info.vsi_handle == vsi_handle) {
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
status = ice_add_rule_internal(hw, recp_id, &f_entry);
@@ -2892,7 +2892,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
f_entry.fltr_info.vsi_handle = vsi_handle;
f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
if (recp_id == ICE_SW_LKUP_VLAN)
@@ -2910,7 +2910,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
/**
* ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
+ * @vsi_handle: driver VSI handle
*
* Replays filters for requested VSI via vsi_handle.
*/
@@ -2938,7 +2938,7 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_rm_all_sw_replay_rule_info - deletes filter replay rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Deletes the filter replay rules.
*/
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index dd21781f7..90dfdabcb 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -40,10 +40,10 @@ enum ice_sw_lkup_type {
ICE_SW_LKUP_DFLT = 5,
ICE_SW_LKUP_ETHERTYPE_MAC = 8,
ICE_SW_LKUP_PROMISC_VLAN = 9,
- ICE_SW_LKUP_LAST,
+ ICE_SW_LKUP_LAST
};
-/* type of filter src id */
+/* type of filter src ID */
enum ice_src_id {
ICE_SRC_ID_UNKNOWN = 0,
ICE_SRC_ID_VSI,
@@ -94,8 +94,8 @@ struct ice_fltr_info {
/* Depending on filter action */
union {
- /* queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 hw_vsi_id:10;
@@ -134,8 +134,8 @@ struct ice_sw_act_ctrl {
enum ice_sw_fwd_act_type fltr_act;
/* Depending on filter action */
union {
- /* This is a queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* This is a queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 vsi_id:10;
@@ -178,7 +178,7 @@ struct ice_sw_recipe {
u8 chain_idx;
/* if this recipe is a collection of other recipe then count of other
- * recipes and recipe ids of those recipes
+ * recipes and recipe IDs of those recipes
*/
u8 n_grp_count;
@@ -211,9 +211,11 @@ struct ice_sw_recipe {
/* AQ buffer associated with this recipe */
struct ice_aqc_recipe_data_elem *root_buf;
+ /* This struct saves the fv_words for a given lookup */
+ struct ice_prot_lkup_ext lkup_exts;
};
-/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list id */
+/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list ID */
struct ice_vsi_list_map_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(vsi_map, ICE_MAX_VSI);
@@ -235,7 +237,7 @@ struct ice_fltr_list_entry {
* used for VLAN membership.
*/
struct ice_fltr_mgmt_list_entry {
- /* back pointer to VSI list id to VSI list mapping */
+ /* back pointer to VSI list ID to VSI list mapping */
struct ice_vsi_list_map_info *vsi_list_info;
u16 vsi_count;
#define ICE_INVAL_LG_ACT_INDEX 0xffff
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 17d79ba21..08c974004 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -196,7 +196,7 @@ enum ice_q {
};
/* Different reset sources for which a disable queue AQ call has to be made in
- * order to clean the TX scheduler as a part of the reset
+ * order to clean the Tx scheduler as a part of the reset
*/
enum ice_disq_rst_src {
ICE_NO_RESET = 0,
@@ -242,11 +242,11 @@ struct ice_hw_common_caps {
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
u32 rss_table_entry_width; /* RSS Entry width in bits */
- /* TX/RX queues */
- u32 num_rxq; /* Number/Total RX queues */
- u32 rxq_first_id; /* First queue ID for RX queues */
- u32 num_txq; /* Number/Total TX queues */
- u32 txq_first_id; /* First queue ID for TX queues */
+ /* Tx/Rx queues */
+ u32 num_rxq; /* Number/Total Rx queues */
+ u32 rxq_first_id; /* First queue ID for Rx queues */
+ u32 num_txq; /* Number/Total Tx queues */
+ u32 txq_first_id; /* First queue ID for Tx queues */
/* MSI-X vectors */
u32 num_msix_vectors;
@@ -390,7 +390,7 @@ struct ice_sched_node {
struct ice_sched_node *sibling; /* next sibling in the same layer */
struct ice_sched_node **children;
struct ice_aqc_txsched_elem_data info;
- u32 agg_id; /* aggregator group id */
+ u32 agg_id; /* aggregator group ID */
u16 vsi_handle;
u8 in_use; /* suspended or in use */
u8 tx_sched_layer; /* Logical Layer (1-9) */
@@ -435,8 +435,8 @@ enum ice_agg_type {
/* Rate limit types */
enum ice_rl_type {
ICE_UNKNOWN_BW = 0,
- ICE_MIN_BW, /* for cir profile */
- ICE_MAX_BW, /* for eir profile */
+ ICE_MIN_BW, /* for CIR profile */
+ ICE_MAX_BW, /* for EIR profile */
ICE_SHARED_BW /* for shared profile */
};
@@ -475,7 +475,7 @@ enum ice_rl_type {
*
* (a) is the last_node_teid(not of type Leaf). A leaf node is created under
* (a) as child node where queues get added, add Tx/Rx queue admin commands;
- * need teid of (a) to add queues.
+ * need TEID of (a) to add queues.
*
* This tree
* -> has 8 branches (one for each TC)
@@ -487,7 +487,7 @@ enum ice_rl_type {
* Refer to the documentation for more info.
*/
- /* Data structure for saving bw information */
+ /* Data structure for saving BW information */
enum ice_bw_type {
ICE_BW_TYPE_PRIO,
ICE_BW_TYPE_CIR,
@@ -511,12 +511,12 @@ struct ice_bw_type_info {
u32 shared_bw;
};
-/* vsi type list entry to locate corresponding vsi/ag nodes */
+/* VSI type list entry to locate corresponding VSI/aggregator nodes */
struct ice_sched_vsi_info {
struct ice_sched_node *vsi_node[ICE_MAX_TRAFFIC_CLASS];
struct ice_sched_node *ag_node[ICE_MAX_TRAFFIC_CLASS];
u16 max_lanq[ICE_MAX_TRAFFIC_CLASS];
- /* bw_t_info saves VSI bw information */
+ /* bw_t_info saves VSI BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
@@ -577,7 +577,7 @@ struct ice_dcbx_cfg {
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
- struct ice_hw *hw; /* back pointer to hw instance */
+ struct ice_hw *hw; /* back pointer to HW instance */
u32 last_node_teid; /* scheduler last node info */
u16 sw_id; /* Initial switch ID belongs to port */
u16 pf_vf_num;
@@ -592,7 +592,7 @@ struct ice_port_info {
struct ice_mac_info mac;
struct ice_phy_info phy;
struct ice_lock sched_lock; /* protect access to TXSched tree */
- /* List contain profile id(s) and other params per layer */
+ /* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
@@ -648,7 +648,7 @@ struct ice_hw {
u8 pf_id; /* device profile info */
u16 max_burst_size; /* driver sets this value */
- /* TX Scheduler values */
+ /* Tx Scheduler values */
u16 num_tx_sched_layers;
u16 num_tx_sched_phys_layers;
u8 flattened_layers;
@@ -659,7 +659,7 @@ struct ice_hw {
struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
struct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];
u8 evb_veb; /* true for VEB, false for VEPA */
- u8 reset_ongoing; /* true if hw is in reset, false otherwise */
+ u8 reset_ongoing; /* true if HW is in reset, false otherwise */
struct ice_bus_info bus;
struct ice_nvm_info nvm;
struct ice_hw_dev_caps dev_caps; /* device capabilities */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 03/37] net/ice/base: add two helper functions
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 02/37] net/ice/base: improve comments Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 04/37] net/ice/base: add helper macros Qi Zhang
` (33 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two helper functions in common module.
1. ice_aq_set_mac_cfg to help configure maximum frame size with AQ
command
2. ice_get_ctx help to extract context bits from a packet structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 20 +++
drivers/net/ice/base/ice_common.c | 282 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_common.h | 4 +
3 files changed, 306 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 5a599280e..feb980475 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1168,6 +1168,25 @@ struct ice_aqc_set_phy_cfg_data {
};
+/* Set MAC Config command data structure (direct 0x0603) */
+struct ice_aqc_set_mac_cfg {
+ __le16 max_frame_size;
+ u8 params;
+#define ICE_AQ_SET_MAC_PACE_S 3
+#define ICE_AQ_SET_MAC_PACE_M (0xF << ICE_AQ_SET_MAC_PACE_S)
+#define ICE_AQ_SET_MAC_PACE_TYPE_M BIT(7)
+#define ICE_AQ_SET_MAC_PACE_TYPE_RATE 0
+#define ICE_AQ_SET_MAC_PACE_TYPE_FIXED ICE_AQ_SET_MAC_PACE_TYPE_M
+ u8 tx_tmr_priority;
+ __le16 tx_tmr_value;
+ __le16 fc_refresh_threshold;
+ u8 drop_opts;
+#define ICE_AQ_SET_MAC_AUTO_DROP_MASK BIT(0)
+#define ICE_AQ_SET_MAC_AUTO_DROP_NONE 0
+#define ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS BIT(0)
+ u8 reserved[7];
+};
+
/* Restart AN command data structure (direct 0x0605)
* Also used for response, with only the lport_num field present.
@@ -1782,6 +1801,7 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
} params;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index bcfa3014b..392183375 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -423,6 +423,74 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
}
}
+/**
+ * ice_aq_set_mac_cfg
+ * @hw: pointer to the HW struct
+ * @max_frame_size: Maximum Frame Size to be supported
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set MAC configuration (0x0603)
+ */
+enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
+{
+ u16 fc_threshold_val, tx_timer_val;
+ struct ice_aqc_set_mac_cfg *cmd;
+ struct ice_port_info *pi;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ u8 port_num = 0;
+ bool link_up;
+ u32 reg_val;
+
+ cmd = &desc.params.set_mac_cfg;
+
+ if (max_frame_size == 0)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_cfg);
+
+ cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
+
+ /* Retrieve the current data_pacing value in FW*/
+ pi = &hw->port_info[port_num];
+
+ /* We turn on the get_link_info so that ice_update_link_info(...)
+ * can be called.
+ */
+ pi->phy.get_link_info = 1;
+
+ status = ice_get_link_status(pi, &link_up);
+
+ if (status)
+ return status;
+
+ cmd->params = pi->phy.link_info.pacing;
+
+ /* We read back the transmit timer and fc threshold value of
+ * LFC. Thus, we will use index =
+ * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+ *
+ * Also, because we are opearating on transmit timer and fc
+ * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+ */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+ /* Retrieve the transmit timer */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+ tx_timer_val = reg_val &
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+ cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+ /* Retrieve the fc threshold */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+ fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
+ cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
@@ -3227,6 +3295,220 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+/**
+ * ice_read_byte - read context byte into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_byte(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u8 dest_byte, mask;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = (u8)(BIT(ce_info->width) - 1);
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&dest_byte, src, sizeof(dest_byte), ICE_DMA_TO_NONDMA);
+
+ dest_byte &= ~(mask);
+
+ dest_byte >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_byte, sizeof(dest_byte), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_word - read context word into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_word(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u16 dest_word, mask;
+ u8 *src, *target;
+ __le16 src_word;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = BIT(ce_info->width) - 1;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_word, src, sizeof(src_word), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_word &= ~(CPU_TO_LE16(mask));
+
+ /* get the data back into host order before shifting */
+ dest_word = LE16_TO_CPU(src_word);
+
+ dest_word >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_word, sizeof(dest_word), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_dword - read context dword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_dword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u32 dest_dword, mask;
+ __le32 src_dword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 32 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 5 bits so the shift will do nothing
+ */
+ if (ce_info->width < 32)
+ mask = BIT(ce_info->width) - 1;
+ else
+ mask = (u32)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_dword, src, sizeof(src_dword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_dword &= ~(CPU_TO_LE32(mask));
+
+ /* get the data back into host order before shifting */
+ dest_dword = LE32_TO_CPU(src_dword);
+
+ dest_dword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_dword, sizeof(dest_dword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_qword - read context qword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_qword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u64 dest_qword, mask;
+ __le64 src_qword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 64 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 6 bits so the shift will do nothing
+ */
+ if (ce_info->width < 64)
+ mask = BIT_ULL(ce_info->width) - 1;
+ else
+ mask = (u64)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_qword, src, sizeof(src_qword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_qword &= ~(CPU_TO_LE64(mask));
+
+ /* get the data back into host order before shifting */
+ dest_qword = LE64_TO_CPU(src_qword);
+
+ dest_qword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_qword, sizeof(dest_qword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_get_ctx - extract context bits from a packed structure
+ * @src_ctx: pointer to a generic packed context structure
+ * @dest_ctx: pointer to a generic non-packed context structure
+ * @ce_info: a description of the structure to be read from
+ */
+enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ int f;
+
+ for (f = 0; ce_info[f].width; f++) {
+ switch (ce_info[f].size_of) {
+ case 1:
+ ice_read_byte(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 2:
+ ice_read_word(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 4:
+ ice_read_dword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 8:
+ ice_read_qword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ default:
+ /* nothing to do, just keep going */
+ break;
+ }
+ }
+
+ return ICE_SUCCESS;
+}
/**
* ice_ena_vsi_txq
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index f2ad86182..0b387cdbe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -133,6 +133,8 @@ enum ice_status
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd);
enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
+enum ice_status
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd);
enum ice_status
@@ -149,6 +151,8 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
+enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cmd_details);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 04/37] net/ice/base: add helper macros
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (2 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 03/37] net/ice/base: add two helper functions Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 05/37] net/ice/base: allow package copy to be used after resets Qi Zhang
` (32 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Add macro ice_for_each_traffic_class to loop for each
traffic class.
2. Add macro MIN_T to wrap min with type conversion.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_nvm.c | 7 ++++---
drivers/net/ice/base/ice_sched.c | 30 +++++++++++++++---------------
drivers/net/ice/base/ice_type.h | 7 +++++++
4 files changed, 27 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 392183375..86d3be17a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3669,7 +3669,7 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
ice_acquire_lock(&pi->sched_lock);
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
/* configuration is possible only if TC node is present */
if (!ice_sched_get_tc_node(pi, i))
continue;
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 92de2ec3b..8d3d0b0ed 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -163,9 +163,10 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
*/
off_w = offset % ICE_SR_SECTOR_SIZE_IN_WORDS;
read_size = off_w ?
- min(*words,
- (u16)(ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
- min((*words - words_read), ICE_SR_SECTOR_SIZE_IN_WORDS);
+ MIN_T(u16, *words,
+ (ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
+ MIN_T(u16, (*words - words_read),
+ ICE_SR_SECTOR_SIZE_IN_WORDS);
/* Check if this is last command, if so set proper flag */
if ((words_read + read_size) >= *words)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2edc305b5..237bf7350 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1896,7 +1896,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
if (!vsi_ctx)
goto exit_sched_rm_vsi_cfg;
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
struct ice_sched_node *vsi_node, *tc_node;
u8 j = 0;
@@ -2174,7 +2174,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
/* Create aggregator node(s) for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
/* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
@@ -2340,7 +2340,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
/* Move VSI node to new aggregator node for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
@@ -2410,7 +2410,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
goto exit_ice_rm_agg_cfg;
}
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
if (status)
goto exit_ice_rm_agg_cfg;
@@ -3050,7 +3050,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -3112,7 +3112,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -4174,7 +4174,7 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *node;
node = vsi_ctx->sched.ag_node[tc];
@@ -4324,7 +4324,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
enum ice_status status;
@@ -4384,7 +4384,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
if (status)
goto exit_set_vsi_bw_shared_lmt;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4442,7 +4442,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
if (!agg_id_present)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4513,7 +4513,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -5119,7 +5119,7 @@ ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
if (!agg_info)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
ICE_BW_TYPE_CNT))
continue;
@@ -5159,7 +5159,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
u8 tc;
/* Some TC(s) may be missing after reset, adjust for replay */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
+ ice_for_each_traffic_class(tc)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
ice_set_bit(tc, ena_tc_bitmap);
@@ -5253,7 +5253,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
u8 tc;
ice_acquire_lock(&pi->sched_lock);
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node;
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
@@ -5291,7 +5291,7 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
tc_node = ice_sched_get_tc_node(pi, tc);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 08c974004..2e865a78f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -18,6 +18,9 @@
#define ICE_BYTES_PER_DWORD 4
#define ICE_MAX_TRAFFIC_CLASS 8
+#ifndef MIN_T
+#define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b))
+#endif
#include "ice_status.h"
#include "ice_hw_autogen.h"
@@ -379,6 +382,10 @@ struct ice_nvm_info {
/* Max number of port to queue branches w.r.t topology */
#define ICE_TXSCHED_MAX_BRANCHES ICE_MAX_TRAFFIC_CLASS
+
+#define ice_for_each_traffic_class(_i) \
+ for ((_i) = 0; (_i) < ICE_MAX_TRAFFIC_CLASS; (_i)++)
+
/* ICE_DFLT_AGG_ID means that all new VM(s)/VSI node connects
* to driver defined policy for default aggregator
*/
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 05/37] net/ice/base: allow package copy to be used after resets
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (3 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 04/37] net/ice/base: add helper macros Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 06/37] net/ice/base: code clean Qi Zhang
` (31 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
For components that make a copy of an external pipeline package file (i.e.
the Linux and FreeBSD drivers), save the size of the package file along
with the copy so that both can be used when calling ice_init_pkg() after a
CORER/GLOBR reset. Also, do not free the copy of the package file in
ice_init_pkg() since it is needed afterward for subsequent resets.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 9 +++++----
drivers/net/ice/base/ice_type.h | 1 +
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c87424601..66c47abda 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1269,6 +1269,7 @@ void ice_free_seg(struct ice_hw *hw)
if (hw->pkg_copy) {
ice_free(hw, hw->pkg_copy);
hw->pkg_copy = NULL;
+ hw->pkg_size = 0;
}
hw->seg = NULL;
}
@@ -1351,8 +1352,6 @@ static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
status = ICE_SUCCESS;
}
- /* Free a previous segment, if necessary */
- ice_free_seg(hw);
if (!status) {
hw->seg = seg;
/* on successful package download, update other required
@@ -1401,12 +1400,14 @@ enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
buf_copy = (u8 *)ice_memdup(hw, buf, len, ICE_NONDMA_TO_NONDMA);
status = ice_init_pkg(hw, buf_copy, len);
- if (status)
+ if (status) {
/* Free the copy, since we failed to initialize the package */
ice_free(hw, buf_copy);
- else
+ } else {
/* Track the copied pkg so we can free it later */
hw->pkg_copy = buf_copy;
+ hw->pkg_size = len;
+ }
return status;
}
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 2e865a78f..6bd73ed04 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -728,6 +728,7 @@ struct ice_hw {
/* Pointer to allocated copy of pkg memory */
u8 *pkg_copy;
+ u32 pkg_size;
/* tunneling info */
struct ice_tunnel_table tnl;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 06/37] net/ice/base: code clean
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (4 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 05/37] net/ice/base: allow package copy to be used after resets Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 07/37] net/ice/base: declare functions as external Qi Zhang
` (30 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove unnecessary macro and data structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 -
drivers/net/ice/base/ice_flex_pipe.c | 2 -
drivers/net/ice/base/ice_flow.c | 136 ----------------------------------
drivers/net/ice/base/ice_type.h | 6 --
4 files changed, 146 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index feb980475..056a9fbef 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1930,8 +1930,6 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
- ice_aqc_opc_suspend_sched_traffic = 0x040B,
- ice_aqc_opc_resume_sched_traffic = 0x040C,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 66c47abda..2d23c36eb 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2247,8 +2247,6 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < xlt2->count; i++) {
if (xlt2->vsig_tbl[i].in_use &&
ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
- *vsig = (i | ((hw->pf_id << ICE_PF_NUM_S) &
- ICE_PF_NUM_M));
*vsig = ICE_VSIG_VALUE(i, hw->pf_id);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 574c927c4..03a324d49 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1554,142 +1554,6 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
return ICE_SUCCESS;
}
-/* Mapping of AVF hash bit fields to an L3-L4 hash combination.
- * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash,
- * convert its values to their appropriate flow L3, L4 values.
- */
-#define ICE_FLOW_AVF_RSS_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4))
-#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP))
-#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \
- ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP))
-
-#define ICE_FLOW_AVF_RSS_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6))
-#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP))
-#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \
- ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP))
-
-#define ICE_FLOW_MAX_CFG 10
-
-/**
- * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver
- * @hw: pointer to the hardware structure
- * @vsi_handle: software VSI handle
- * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure
- *
- * This function will take the hash bitmap provided by the AVF driver via a
- * message, convert it to ICE-compatible values, and configure RSS flow
- * profiles.
- */
-enum ice_status
-ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
-{
- u64 added_cfg[ICE_FLOW_MAX_CFG], hash_flds;
- enum ice_status status = ICE_SUCCESS;
- u8 i, idx = 0;
-
- if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||
- !ice_is_vsi_valid(hw, vsi_handle))
- return ICE_ERR_PARAM;
-
- /* Make sure no unsupported bits are specified */
- if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS |
- ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS))
- return ICE_ERR_CFG;
-
- hash_flds = avf_hash;
-
- /* Always create an L3 RSS configuration for any L4 RSS configuration */
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS;
-
- /* Create the corresponding RSS configuration for each valid hash bit */
- while (hash_flds) {
- u64 rss_hash = ICE_HASH_INVALID;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS;
- }
- } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS;
- }
- }
-
- if (rss_hash == ICE_HASH_INVALID)
- return ICE_ERR_OUT_OF_RANGE;
-
- status = ice_add_rss_cfg(hw, vsi_handle, rss_hash,
- ICE_FLOW_SEG_HDR_NONE);
- if (status)
- break;
- added_cfg[idx++] = rss_hash;
- }
-
- /* If status is not success, we must remove all hash configurations
- * that were successfully added previously in this call for the vsi
- */
- if (status)
- for (i = 0; i < idx; i++)
- ice_rem_rss_cfg(hw, vsi_handle, added_cfg[i],
- ICE_FLOW_SEG_HDR_NONE);
-
- return status;
-}
-
/**
* ice_rem_all_rss_vsi_ctx - remove all RSS configurations from VSI context
* @hw: pointer to the hardware structure
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6bd73ed04..25d64477f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -733,12 +733,6 @@ struct ice_hw {
/* tunneling info */
struct ice_tunnel_table tnl;
- /* PTYPE group and XLT1 management */
-#define ICE_MAX_PTGS 256
- struct ice_ptg_entry ptg_tbl[ICE_BLK_COUNT][ICE_MAX_PTGS];
-
-#define ICE_XLT1_CNT 1024
- struct ice_ptg_ptype xlt1_tbl[ICE_BLK_COUNT][ICE_XLT1_CNT];
#define ICE_PKG_FILENAME "package_file"
#define ICE_PKG_FILENAME_EXT "pkg"
#define ICE_PKG_FILE_MAJ_VER 1
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 07/37] net/ice/base: declare functions as external
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (5 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 06/37] net/ice/base: code clean Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 08/37] net/ice/base: add more APIs in switch module Qi Zhang
` (29 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove static of below functions and declare them as external
APIs.
ice_aq_add_vsi
ice_aq_free_vsi
ice_aq_update_vsi
ice_aq_add_lan_txq
ice_init_pkg
So far the purpose is just to sync with kernel driver.
They are reserved for future use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 4 ++++
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.h | 2 ++
drivers/net/ice/base/ice_switch.c | 6 +++---
drivers/net/ice/base/ice_switch.h | 9 +++++++++
6 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 86d3be17a..015db11e0 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2935,7 +2935,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
* Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
* flow.
*/
-static enum ice_status
+enum ice_status
ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 0b387cdbe..63f4a5ebe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -94,6 +94,10 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
enum ice_status
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
+enum ice_status
+ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
+ struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
+ struct ice_sq_cd *cd);
bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 2d23c36eb..ff615f94f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1314,7 +1314,7 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
* ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
* case.
*/
-static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
+enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
{
struct ice_pkg_hdr *pkg;
enum ice_status status;
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 23fffed75..00c2b6682 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -88,6 +88,8 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);
struct ice_prof_map *
ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);
enum ice_status
+ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);
+enum ice_status
ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
void ice_free_seg(struct ice_hw *hw);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 512e64b91..e6fc9fcee 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -288,7 +288,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
*
* Add a VSI context to the hardware (0x0210)
*/
-static enum ice_status
+enum ice_status
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
@@ -331,7 +331,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Free VSI context info from hardware (0x0213)
*/
-static enum ice_status
+enum ice_status
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd)
{
@@ -366,7 +366,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Update VSI context in the hardware (0x0211)
*/
-static enum ice_status
+enum ice_status
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 90dfdabcb..b28e55a4f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -271,6 +271,15 @@ enum ice_promisc_flags {
/* VSI related commands */
enum ice_status
+ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ bool keep_vsi_alloc, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 08/37] net/ice/base: add more APIs in switch module
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (6 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 07/37] net/ice/base: declare functions as external Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 09/37] net/ice/base: add VSI queue context framework Qi Zhang
` (28 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add below APIs in switch module
1. ice_aq_get_vsi_params - get VSI context info
2. ice_aq_add_update_mir_rule - add/update mirror rule
3. ice_aq_delete_mir_rule - delete mirror rule
4. ice_aq_set_storm_ctrl - set storm control configuration
5. ice_aq_get_storm_ctrl - get storm control configuration
PMD can use these APIs to enable mirror rule and storm control
related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 136 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.c | 228 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 29 +++++
3 files changed, 393 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 056a9fbef..724657af6 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -177,6 +177,13 @@ struct ice_aqc_clear_pxe {
};
+/* Configure No-Drop Policy Command (direct 0x0112) */
+struct ice_aqc_config_no_drop_policy {
+ u8 opts;
+#define ICE_AQC_FORCE_NO_DROP BIT(0)
+ u8 rsvd[15];
+};
+
/* Get switch configuration (0x0200) */
struct ice_aqc_get_sw_cfg {
/* Reserved for command and copy of request flags for response */
@@ -350,6 +357,19 @@ struct ice_aqc_add_update_free_vsi_resp {
};
+struct ice_aqc_get_vsi_resp {
+ __le16 vsi_num;
+ u8 vf_id;
+ /* The vsi_flags field uses the ICE_AQ_VSI_TYPE_* defines for values.
+ * These are found above in struct ice_aqc_add_get_update_free_vsi.
+ */
+ u8 vsi_flags;
+ __le16 vsi_used;
+ __le16 vsi_free;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
struct ice_aqc_vsi_props {
__le16 valid_sections;
@@ -506,6 +526,110 @@ struct ice_aqc_vsi_props {
};
+/* Add/update mirror rule - direct (0x0260) */
+#define ICE_AQC_RULE_ID_VALID_S 7
+#define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S)
+#define ICE_AQC_RULE_ID_S 0
+#define ICE_AQC_RULE_ID_M (0x3F << ICE_AQC_RULE_ID_S)
+
+/* Following defines to be used while processing caller specified mirror list
+ * of VSI indexes.
+ */
+/* Action: Byte.bit (1.7)
+ * 0 = Remove VSI from mirror rule
+ * 1 = Add VSI to mirror rule
+ */
+#define ICE_AQC_RULE_ACT_S 15
+#define ICE_AQC_RULE_ACT_M (0x1 << ICE_AQC_RULE_ACT_S)
+/* Action: 1.2:0.0 = Mirrored VSI */
+#define ICE_AQC_RULE_MIRRORED_VSI_S 0
+#define ICE_AQC_RULE_MIRRORED_VSI_M (0x7FF << ICE_AQC_RULE_MIRRORED_VSI_S)
+
+/* This is to be used by add/update mirror rule Admin Queue command.
+ * In case of add mirror rule - if rule ID is specified as
+ * INVAL_MIRROR_RULE_ID, new rule ID is allocated from shared pool.
+ * If specified rule_id is valid, then it is used. If specified rule_id
+ * is in use then new mirroring rule is added.
+ */
+#define ICE_INVAL_MIRROR_RULE_ID 0xFFFF
+
+struct ice_aqc_add_update_mir_rule {
+ __le16 rule_id;
+
+ __le16 rule_type;
+#define ICE_AQC_RULE_TYPE_S 0
+#define ICE_AQC_RULE_TYPE_M (0x7 << ICE_AQC_RULE_TYPE_S)
+ /* VPORT ingress/egress */
+#define ICE_AQC_RULE_TYPE_VPORT_INGRESS 0x1
+#define ICE_AQC_RULE_TYPE_VPORT_EGRESS 0x2
+ /* Physical port ingress mirroring.
+ * All traffic received by this port
+ */
+#define ICE_AQC_RULE_TYPE_PPORT_INGRESS 0x6
+ /* Physical port egress mirroring. All traffic sent by this port */
+#define ICE_AQC_RULE_TYPE_PPORT_EGRESS 0x7
+
+ /* Number of mirrored entries.
+ * The values are in the command buffer
+ */
+ __le16 num_entries;
+
+ /* Destination VSI */
+ __le16 dest;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Delete mirror rule - direct(0x0261) */
+struct ice_aqc_delete_mir_rule {
+ __le16 rule_id;
+ __le16 rsvd;
+
+ /* Byte.bit: 20.0 = Keep allocation. If set VSI stays part of
+ * the PF allocated resources, otherwise it is returned to the
+ * shared pool
+ */
+#define ICE_AQC_FLAG_KEEP_ALLOCD_S 0
+#define ICE_AQC_FLAG_KEEP_ALLOCD_M (0x1 << ICE_AQC_FLAG_KEEP_ALLOCD_S)
+ __le16 flags;
+
+ u8 reserved[10];
+};
+
+/* Set/Get storm config - (direct 0x0280, 0x0281) */
+/* This structure holds get storm configuration response and same structure
+ * is used to perform set_storm_cfg
+ */
+struct ice_aqc_storm_cfg {
+ __le32 bcast_thresh_size;
+ __le32 mcast_thresh_size;
+ /* Bit 18:0 - Traffic upper threshold size
+ * Bit 31:19 - Reserved
+ */
+#define ICE_AQ_THRESHOLD_S 0
+#define ICE_AQ_THRESHOLD_M (0x7FFFF << ICE_AQ_THRESHOLD_S)
+
+ __le32 storm_ctrl_ctrl;
+ /* Bit 0: MDIPW - Drop Multicast packets in previous window
+ * Bit 1: MDICW - Drop multicast packets in current window
+ * Bit 2: BDIPW - Drop broadcast packets in previous window
+ * Bit 3: BDICW - Drop broadcast packets in current window
+ */
+#define ICE_AQ_STORM_CTRL_MDIPW_DROP_MULTICAST BIT(0)
+#define ICE_AQ_STORM_CTRL_MDICW_DROP_MULTICAST BIT(1)
+#define ICE_AQ_STORM_CTRL_BDIPW_DROP_MULTICAST BIT(2)
+#define ICE_AQ_STORM_CTRL_BDICW_DROP_MULTICAST BIT(3)
+ /* Bit 7:5 : Reserved */
+ /* Bit 27:8 : Interval - BSC/MSC Time-interval specification: The
+ * interval size for applying ingress broadcast or multicast storm
+ * control.
+ */
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S 8
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_M \
+ (0xFFFFF << ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S)
+ __le32 reserved;
+};
+
#define ICE_MAX_NUM_RECIPES 64
@@ -1771,6 +1895,9 @@ struct ice_aq_desc {
struct ice_aqc_manage_mac_read mac_read;
struct ice_aqc_manage_mac_write mac_write;
struct ice_aqc_clear_pxe clear_pxe;
+ struct ice_aqc_config_no_drop_policy no_drop;
+ struct ice_aqc_add_update_mir_rule add_update_rule;
+ struct ice_aqc_delete_mir_rule del_rule;
struct ice_aqc_list_caps get_cap;
struct ice_aqc_get_phy_caps get_phy;
struct ice_aqc_set_phy_cfg set_phy;
@@ -1778,6 +1905,7 @@ struct ice_aq_desc {
struct ice_aqc_set_port_id_led set_port_id_led;
struct ice_aqc_get_sw_cfg get_sw_conf;
struct ice_aqc_sw_rules sw_rules;
+ struct ice_aqc_storm_cfg storm_conf;
struct ice_aqc_get_topo get_topo;
struct ice_aqc_sched_elem_cmd sched_elem_cmd;
struct ice_aqc_query_txsched_res query_sched_res;
@@ -1795,6 +1923,7 @@ struct ice_aq_desc {
struct ice_aqc_txqs_cleanup txqs_cleanup;
struct ice_aqc_add_get_update_free_vsi vsi_cmd;
struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res;
+ struct ice_aqc_get_vsi_resp get_vsi_resp;
struct ice_aqc_download_pkg download_pkg;
struct ice_aqc_get_pkg_info_list get_pkg_info_list;
struct ice_aqc_fw_logging fw_logging;
@@ -1912,6 +2041,13 @@ enum ice_adminq_opc {
ice_aqc_opc_get_vsi_params = 0x0212,
ice_aqc_opc_free_vsi = 0x0213,
+ /* Mirroring rules - add/update, delete */
+ ice_aqc_opc_add_update_mir_rule = 0x0260,
+ ice_aqc_opc_del_mir_rule = 0x0261,
+
+ /* storm configuration */
+ ice_aqc_opc_set_storm_cfg = 0x0280,
+ ice_aqc_opc_get_storm_cfg = 0x0281,
/* switch rules population commands */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e6fc9fcee..34637c1be 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -566,7 +566,174 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return ice_aq_update_vsi(hw, vsi_ctx, cd);
}
+/**
+ * ice_aq_get_vsi_params
+ * @hw: pointer to the HW struct
+ * @vsi_ctx: pointer to a VSI context struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get VSI context info from hardware (0x0212)
+ */
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_add_get_update_free_vsi *cmd;
+ struct ice_aqc_get_vsi_resp *resp;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.vsi_cmd;
+ resp = &desc.params.get_vsi_resp;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_vsi_params);
+
+ cmd->vsi_num = CPU_TO_LE16(vsi_ctx->vsi_num | ICE_AQ_VSI_IS_VALID);
+
+ status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,
+ sizeof(vsi_ctx->info), cd);
+ if (!status) {
+ vsi_ctx->vsi_num = LE16_TO_CPU(resp->vsi_num) &
+ ICE_AQ_VSI_NUM_M;
+ vsi_ctx->vsis_allocd = LE16_TO_CPU(resp->vsi_used);
+ vsi_ctx->vsis_unallocated = LE16_TO_CPU(resp->vsi_free);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_add_update_mir_rule - add/update a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_type: Rule Type
+ * @dest_vsi: VSI number to which packets will be mirrored
+ * @count: length of the list
+ * @mr_buf: buffer for list of mirrored VSI numbers
+ * @cd: pointer to command details structure or NULL
+ * @rule_id: Rule ID
+ *
+ * Add/Update Mirror Rule (0x260).
+ */
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id)
+{
+ struct ice_aqc_add_update_mir_rule *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ __le16 *mr_list = NULL;
+ u16 buf_size = 0;
+
+ switch (rule_type) {
+ case ICE_AQC_RULE_TYPE_VPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_VPORT_EGRESS:
+ /* Make sure count and mr_buf are set for these rule_types */
+ if (!(count && mr_buf))
+ return ICE_ERR_PARAM;
+
+ buf_size = count * sizeof(__le16);
+ mr_list = (__le16 *)ice_malloc(hw, buf_size);
+ if (!mr_list)
+ return ICE_ERR_NO_MEMORY;
+ break;
+ case ICE_AQC_RULE_TYPE_PPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_PPORT_EGRESS:
+ /* Make sure count and mr_buf are not set for these
+ * rule_types
+ */
+ if (count || mr_buf)
+ return ICE_ERR_PARAM;
+ break;
+ default:
+ ice_debug(hw, ICE_DBG_SW,
+ "Error due to unsupported rule_type %u\n", rule_type);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_update_mir_rule);
+
+ /* Pre-process 'mr_buf' items for add/update of virtual port
+ * ingress/egress mirroring (but not physical port ingress/egress
+ * mirroring)
+ */
+ if (mr_buf) {
+ int i;
+
+ for (i = 0; i < count; i++) {
+ u16 id;
+
+ id = mr_buf[i].vsi_idx & ICE_AQC_RULE_MIRRORED_VSI_M;
+
+ /* Validate specified VSI number, make sure it is less
+ * than ICE_MAX_VSI, if not return with error.
+ */
+ if (id >= ICE_MAX_VSI) {
+ ice_debug(hw, ICE_DBG_SW,
+ "Error VSI index (%u) out-of-range\n",
+ id);
+ ice_free(hw, mr_list);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ /* add VSI to mirror rule */
+ if (mr_buf[i].add)
+ mr_list[i] =
+ CPU_TO_LE16(id | ICE_AQC_RULE_ACT_M);
+ else /* remove VSI from mirror rule */
+ mr_list[i] = CPU_TO_LE16(id);
+ }
+ }
+
+ cmd = &desc.params.add_update_rule;
+ if ((*rule_id) != ICE_INVAL_MIRROR_RULE_ID)
+ cmd->rule_id = CPU_TO_LE16(((*rule_id) & ICE_AQC_RULE_ID_M) |
+ ICE_AQC_RULE_ID_VALID_M);
+ cmd->rule_type = CPU_TO_LE16(rule_type & ICE_AQC_RULE_TYPE_M);
+ cmd->num_entries = CPU_TO_LE16(count);
+ cmd->dest = CPU_TO_LE16(dest_vsi);
+
+ status = ice_aq_send_cmd(hw, &desc, mr_list, buf_size, cd);
+ if (!status)
+ *rule_id = LE16_TO_CPU(cmd->rule_id) & ICE_AQC_RULE_ID_M;
+ ice_free(hw, mr_list);
+
+ return status;
+}
+
+/**
+ * ice_aq_delete_mir_rule - delete a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_id: Mirror rule ID (to be deleted)
+ * @keep_allocd: if set, the VSI stays part of the PF allocated res,
+ * otherwise it is returned to the shared pool
+ * @cd: pointer to command details structure or NULL
+ *
+ * Delete Mirror Rule (0x261).
+ */
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_delete_mir_rule *cmd;
+ struct ice_aq_desc desc;
+
+ /* rule_id should be in the range 0...63 */
+ if (rule_id >= ICE_MAX_NUM_MIRROR_RULES)
+ return ICE_ERR_OUT_OF_RANGE;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_del_mir_rule);
+
+ cmd = &desc.params.del_rule;
+ rule_id |= ICE_AQC_RULE_ID_VALID_M;
+ cmd->rule_id = CPU_TO_LE16(rule_id);
+
+ if (keep_allocd)
+ cmd->flags = CPU_TO_LE16(ICE_AQC_FLAG_KEEP_ALLOCD_M);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_aq_alloc_free_vsi_list
@@ -626,6 +793,67 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
return status;
}
+/**
+ * ice_aq_set_storm_ctrl - Sets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Sets the storm control configuration (0x0280)
+ */
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask)
+{
+ struct ice_aqc_storm_cfg *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.storm_conf;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_storm_cfg);
+
+ cmd->bcast_thresh_size = CPU_TO_LE32(bcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->mcast_thresh_size = CPU_TO_LE32(mcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->storm_ctrl_ctrl = CPU_TO_LE32(ctl_bitmask);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_aq_get_storm_ctrl - gets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Gets the storm control configuration (0x0281)
+ */
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask)
+{
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_storm_cfg);
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+ if (!status) {
+ struct ice_aqc_storm_cfg *resp = &desc.params.storm_conf;
+
+ if (bcast_thresh)
+ *bcast_thresh = LE32_TO_CPU(resp->bcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (mcast_thresh)
+ *mcast_thresh = LE32_TO_CPU(resp->mcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (ctl_bitmask)
+ *ctl_bitmask = LE32_TO_CPU(resp->storm_ctrl_ctrl);
+ }
+
+ return status;
+}
/**
* ice_aq_sw_rules - add/update/remove switch rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b28e55a4f..ebcfaa120 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -29,6 +29,19 @@ struct ice_vsi_ctx {
struct LIST_HEAD_TYPE rss_list_head;
};
+/* This is to be used by add/update mirror rule Admin Queue command */
+struct ice_mir_rule_buf {
+ u16 vsi_idx; /* VSI index */
+
+ /* For each VSI, user can specify whether corresponding VSI
+ * should be added/removed to/from mirror rule
+ *
+ * add mirror rule: this should always be TRUE.
+ * update mirror rule: add(true) or remove(false) VSI to/from
+ * mirror rule
+ */
+ u8 add;
+};
/* Switch recipe ID enum values are specific to hardware */
enum ice_sw_lkup_type {
@@ -290,6 +303,22 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id);
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask);
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask);
/* Switch config */
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 09/37] net/ice/base: add VSI queue context framework
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (7 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 08/37] net/ice/base: add more APIs in switch module Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 10/37] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
` (27 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Added code to allocate VSI queue contexts to save the queue specific
information like bandwidth etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_sched.c | 52 +++++++++++++++++++++++++++++++++++----
drivers/net/ice/base/ice_switch.c | 26 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 8 ++++++
3 files changed, 81 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 237bf7350..ab6097237 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -576,6 +576,48 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
}
/**
+ * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ * @tc: TC number
+ * @new_numqs: number of queues
+ */
+static enum ice_status
+ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
+{
+ struct ice_vsi_ctx *vsi_ctx;
+ struct ice_q_ctx *q_ctx;
+
+ vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi_ctx)
+ return ICE_ERR_PARAM;
+ /* allocate LAN queue contexts */
+ if (!vsi_ctx->lan_q_ctx[tc]) {
+ vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!vsi_ctx->lan_q_ctx[tc])
+ return ICE_ERR_NO_MEMORY;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ return ICE_SUCCESS;
+ }
+ /* num queues are increased, update the queue contexts */
+ if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
+ u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
+
+ q_ctx = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!q_ctx)
+ return ICE_ERR_NO_MEMORY;
+ ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
+ prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
+ ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
+ vsi_ctx->lan_q_ctx[tc] = q_ctx;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
* ice_aq_rl_profile - performs a rate limiting task
* @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
@@ -1717,14 +1759,14 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
if (!vsi_ctx)
return ICE_ERR_PARAM;
- if (owner == ICE_SCHED_NODE_OWNER_LAN)
- prev_numqs = vsi_ctx->sched.max_lanq[tc];
- else
- return ICE_ERR_PARAM;
-
+ prev_numqs = vsi_ctx->sched.max_lanq[tc];
/* num queues are not changed or less than the previous number */
if (new_numqs <= prev_numqs)
return status;
+ status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
+ if (status)
+ return status;
+
if (new_numqs)
ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
/* Keep the max number of queue configuration all the time. Update the
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 34637c1be..4b53636b4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3,6 +3,8 @@
*/
#include "ice_switch.h"
+#include "ice_flex_type.h"
+#include "ice_flow.h"
#define ICE_ETH_DA_OFFSET 0
@@ -447,6 +449,27 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
}
/**
+ * ice_clear_vsi_q_ctx - clear VSI queue contexts for all TCs
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ */
+static void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ u8 i;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return;
+ ice_for_each_traffic_class(i) {
+ if (vsi->lan_q_ctx[i]) {
+ ice_free(hw, vsi->lan_q_ctx[i]);
+ vsi->lan_q_ctx[i] = NULL;
+ }
+ }
+}
+
+/**
* ice_clear_vsi_ctx - clear the VSI context entry
* @hw: pointer to the HW struct
* @vsi_handle: VSI handle
@@ -459,6 +482,9 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
vsi = ice_get_vsi_ctx(hw, vsi_handle);
if (vsi) {
+ if (!LIST_EMPTY(&vsi->rss_list_head))
+ ice_rem_all_rss_vsi_ctx(hw, vsi_handle);
+ ice_clear_vsi_q_ctx(hw, vsi_handle);
ice_destroy_lock(&vsi->rss_locks);
ice_free(hw, vsi);
hw->vsi_ctx[vsi_handle] = NULL;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index ebcfaa120..c6d31475c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -15,6 +15,12 @@
#define ICE_VSI_INVAL_ID 0xFFFF
+#define ICE_INVAL_Q_HANDLE 0xFFFF
+
+/* VSI queue context structure */
+struct ice_q_ctx {
+ u16 q_handle;
+};
/* VSI context structure for add/get/update/free operations */
struct ice_vsi_ctx {
@@ -25,6 +31,8 @@ struct ice_vsi_ctx {
struct ice_aqc_vsi_props info;
struct ice_sched_vsi_info sched;
u8 alloc_from_pool;
+ u16 num_lan_q_entries[ICE_MAX_TRAFFIC_CLASS];
+ struct ice_q_ctx *lan_q_ctx[ICE_MAX_TRAFFIC_CLASS];
struct ice_lock rss_locks; /* protect rss config in VSI ctx */
struct LIST_HEAD_TYPE rss_list_head;
};
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 10/37] net/ice/base: add APIs to add remove ethertype filter
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (8 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 09/37] net/ice/base: add VSI queue context framework Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 11/37] net/ice/base: add APIs to get allocated resources Qi Zhang
` (26 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add API ice_remove_eth_mac and ice_add_eth_mac to support
adding / removing ethertype (or MAC) based filter rules.
PMD driver can use these APIs to enable related rte_flow rule.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 57 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 4 +++
2 files changed, 61 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4b53636b4..4af6a323c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2415,6 +2415,63 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
}
#endif
+/**
+ * ice_add_eth_mac - Add ethertype and MAC based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ether type MAC filter, MAC is optional
+ */
+enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr;
+
+ LIST_FOR_EACH_ENTRY(em_list_itr, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->fltr_info.flag = ICE_FLTR_TX;
+ em_list_itr->status = ice_add_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_remove_eth_mac - Remove an ethertype (or MAC) based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ethertype or ethertype MAC entries
+ */
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr, *tmp;
+
+ if (!em_list || !hw)
+ return ICE_ERR_PARAM;
+
+ LIST_FOR_EACH_ENTRY_SAFE(em_list_itr, tmp, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->status = ice_remove_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
/**
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index c6d31475c..f331621e1 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -347,6 +347,10 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#ifndef NO_MACVLAN_SUPPORT
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 11/37] net/ice/base: add APIs to get allocated resources
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (9 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 10/37] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 12/37] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
` (25 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_aq_get_res_alloc - get allocated resources.
2. ice_aq_get_res_descs - get allocated resource descriptors.
These APIs may help to PMD to enable some debug utilities to
dump the resource allocation status.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 53 +++++++++++++++++++++-
drivers/net/ice/base/ice_switch.c | 83 +++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 12 +++++
3 files changed, 147 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 724657af6..ca3d40c8b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -281,6 +281,34 @@ struct ice_aqc_get_sw_cfg_resp {
#define ICE_AQC_RES_TYPE_FLAG_DEDICATED 0x00
+#define ICE_AQC_RES_TYPE_S 0
+#define ICE_AQC_RES_TYPE_M (0x07F << ICE_AQC_RES_TYPE_S)
+
+/* Get Resource Allocation command (indirect 0x0204) */
+struct ice_aqc_get_res_alloc {
+ __le16 resp_elem_num; /* Used in response, reserved in command */
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Resource Allocation Response Buffer per response */
+struct ice_aqc_get_res_resp_elem {
+ __le16 res_type; /* Types defined above cmd 0x0204 */
+ __le16 total_capacity; /* Resources available to all PF's */
+ __le16 total_function; /* Resources allocated for a PF */
+ __le16 total_shared; /* Resources allocated as shared */
+ __le16 total_free; /* Resources un-allocated/not reserved by any PF */
+};
+
+/* Buffer for Get Resource command */
+struct ice_aqc_get_res_resp {
+ /* Number of resource entries to be calculated using
+ * datalen/sizeof(struct ice_aqc_cmd_resp)).
+ * Value of 'datalen' gets updated as part of response.
+ */
+ struct ice_aqc_get_res_resp_elem elem[1];
+};
/* Allocate Resources command (indirect 0x0208)
@@ -314,6 +342,28 @@ struct ice_aqc_alloc_free_res_elem {
};
+/* Get Allocated Resource Descriptors Command (indirect 0x020A) */
+struct ice_aqc_get_allocd_res_desc {
+ union {
+ struct {
+ __le16 res; /* Types defined above cmd 0x0204 */
+ __le16 first_desc;
+ __le32 reserved;
+ } cmd;
+ struct {
+ __le16 res;
+ __le16 next_desc;
+ __le16 num_desc;
+ __le16 reserved;
+ } resp;
+ } ops;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_get_allocd_res_desc_resp {
+ struct ice_aqc_res_elem elem[1];
+};
/* Add VSI (indirect 0x0210)
@@ -1912,7 +1962,6 @@ struct ice_aq_desc {
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
struct ice_aqc_rl_profile rl_profile;
-
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
@@ -1930,6 +1979,8 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_get_res_alloc get_res;
+ struct ice_aqc_get_allocd_res_desc get_res_desc;
struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4af6a323c..c985c1e31 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2042,6 +2042,89 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
return status;
}
+/**
+ * ice_aq_get_res_alloc - get allocated resources
+ * @hw: pointer to the HW struct
+ * @num_entries: pointer to u16 to store the number of resource entries returned
+ * @buf: pointer to user-supplied buffer
+ * @buf_size: size of buff
+ * @cd: pointer to command details structure or NULL
+ *
+ * The user-supplied buffer must be large enough to store the resource
+ * information for all resource types. Each resource type is an
+ * ice_aqc_get_res_resp_data_elem structure.
+ */
+enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_res_alloc *resp;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ if (!buf)
+ return ICE_ERR_BAD_PTR;
+
+ if (buf_size < ICE_AQ_GET_RES_ALLOC_BUF_LEN)
+ return ICE_ERR_INVAL_SIZE;
+
+ resp = &desc.params.get_res;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_res_alloc);
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+
+ if (!status && num_entries)
+ *num_entries = LE16_TO_CPU(resp->resp_elem_num);
+
+ return status;
+}
+
+/**
+ * ice_aq_get_res_descs - get allocated resource descriptors
+ * @hw: pointer to the hardware structure
+ * @num_entries: number of resource entries in buffer
+ * @buf: Indirect buffer to hold data parameters and response
+ * @buf_size: size of buffer for indirect commands
+ * @res_type: resource type
+ * @res_shared: is resource shared
+ * @desc_id: input - first desc ID to start; output - next desc ID
+ * @cd: pointer to command details structure or NULL
+ */
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_allocd_res_desc *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ ice_debug(hw, ICE_DBG_TRACE, "ice_aq_get_res_descs");
+
+ cmd = &desc.params.get_res_desc;
+
+ if (!buf)
+ return ICE_ERR_PARAM;
+
+ if (buf_size != (num_entries * sizeof(*buf)))
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_allocd_res_desc);
+
+ cmd->ops.cmd.res = CPU_TO_LE16(((res_type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | (res_shared ?
+ ICE_AQC_RES_TYPE_FLAG_SHARED : 0));
+ cmd->ops.cmd.first_desc = CPU_TO_LE16(*desc_id);
+
+ desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status)
+ *desc_id = LE16_TO_CPU(cmd->ops.resp.next_desc);
+
+ return status;
+}
/**
* ice_add_mac - Add a MAC address based filter rule
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index f331621e1..4b77d920f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -13,6 +13,10 @@
#define ICE_DFLT_VSI_INVAL 0xff
+/* Worst case buffer length for ice_aqc_opc_get_res_alloc */
+#define ICE_MAX_RES_TYPES 0x80
+#define ICE_AQ_GET_RES_ALLOC_BUF_LEN \
+ (ICE_MAX_RES_TYPES * sizeof(struct ice_aqc_get_res_resp_elem))
#define ICE_VSI_INVAL_ID 0xFFFF
#define ICE_INVAL_Q_HANDLE 0xFFFF
@@ -343,6 +347,14 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
enum ice_status
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 12/37] net/ice/base: add APIs to alloc/free resource counter
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (10 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 11/37] net/ice/base: add APIs to get allocated resources Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 13/37] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
` (24 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_alloc_res_cntr - allocate resource counter
2. ice_free_res_cntr - free resource counter
3. ice_alloc_vlan_res_counter - allocate vlan resource counter
4. ice_free_vlan_res_counter - free vlan resource counter
These APIs will be used when try to count the number of a flow be
hitted.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 97 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 6 +++
2 files changed, 103 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index c985c1e31..26fc0b46b 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3238,9 +3238,106 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_PROMISC_VLAN);
}
+/**
+ * ice_alloc_res_cntr - allocating resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries requested for FD resource type
+ * @counter_id: counter index returned by AQ call
+ */
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ /* Allocate resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (status)
+ goto exit;
+
+ *counter_id = LE16_TO_CPU(buf->elem[0].e.sw_resp);
+
+exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_free_res_cntr - free resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries to be freed for FD resource type
+ * @counter_id: counter ID resource which needs to be freed
+ */
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+ /* Free resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+ buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status)
+ ice_debug(hw, ICE_DBG_SW,
+ "counter resource could not be freed\n");
+
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_alloc_vlan_res_counter - obtain counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: returns counter index
+ */
+enum ice_status ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
+
+/**
+ * ice_free_vlan_res_counter - Free counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: counter index to be freed
+ */
+enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 4b77d920f..364083eb4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -338,6 +338,12 @@ enum ice_status
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
enum ice_status
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id);
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 13/37] net/ice/base: add APIs to get VSI promiscuous mode
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (11 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 12/37] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 14/37] net/ice/base: add MAC filter with marker and counter Qi Zhang
` (23 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_get_vsi_promisc - get promiscuous mode of give VSI.
2. ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI.
PMD may use these APIs to check the real HW status, but not rely on
a software flag when something abnormal.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 79 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 7 ++++
2 files changed, 86 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 26fc0b46b..e4024a0b0 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2894,6 +2894,85 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
return promisc_mask;
}
+/**
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head,
+ ice_fltr_mgmt_list_entry, list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
/**
* ice_remove_promisc - Remove promisc based filter rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 364083eb4..0d70b38f4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -394,6 +394,13 @@ enum ice_status
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc);
+/* Get VSIs Promisc/defport settings */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 14/37] net/ice/base: add MAC filter with marker and counter
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (12 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 13/37] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 15/37] net/ice/base: add two helper functions for flow management Qi Zhang
` (22 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_add_mac_with_sw_marker - add filter with software marker.
2. ice_add_mac_with_counter - add filter with counter enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 328 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 +
2 files changed, 333 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e4024a0b0..bfcb33ea6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1338,6 +1338,95 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
return status;
}
+/**
+ * ice_add_counter_act - add/update filter rule with counter action
+ * @hw: pointer to the hardware structure
+ * @m_ent: the management entry for which counter needs to be added
+ * @counter_id: VLAN counter ID returned as part of allocate resource
+ * @l_id: large action resource ID
+ */
+static enum ice_status
+ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
+ u16 counter_id, u16 l_id)
+{
+ struct ice_aqc_sw_rules_elem *lg_act;
+ struct ice_aqc_sw_rules_elem *rx_tx;
+ enum ice_status status;
+ /* 2 actions will be added while adding a large action counter */
+ const int num_acts = 2;
+ u16 lg_act_size;
+ u16 rules_size;
+ u16 f_rule_id;
+ u32 act;
+ u16 id;
+
+ if (m_ent->fltr_info.lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ /* Create two back-to-back switch rules and submit them to the HW using
+ * one memory buffer:
+ * 1. Large Action
+ * 2. Look up Tx Rx
+ */
+ lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts);
+ rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE;
+ lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
+ rules_size);
+ if (!lg_act)
+ return ICE_ERR_NO_MEMORY;
+
+ rx_tx = (struct ice_aqc_sw_rules_elem *)
+ ((u8 *)lg_act + lg_act_size);
+
+ /* Fill in the first switch rule i.e. large action */
+ lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT);
+ lg_act->pdata.lg_act.index = CPU_TO_LE16(l_id);
+ lg_act->pdata.lg_act.size = CPU_TO_LE16(num_acts);
+
+ /* First action VSI forwarding or VSI list forwarding depending on how
+ * many VSIs
+ */
+ id = (m_ent->vsi_count > 1) ? m_ent->fltr_info.fwd_id.vsi_list_id :
+ m_ent->fltr_info.fwd_id.hw_vsi_id;
+
+ act = ICE_LG_ACT_VSI_FORWARDING | ICE_LG_ACT_VALID_BIT;
+ act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) &
+ ICE_LG_ACT_VSI_LIST_ID_M;
+ if (m_ent->vsi_count > 1)
+ act |= ICE_LG_ACT_VSI_LIST;
+ lg_act->pdata.lg_act.act[0] = CPU_TO_LE32(act);
+
+ /* Second action counter ID */
+ act = ICE_LG_ACT_STAT_COUNT;
+ act |= (counter_id << ICE_LG_ACT_STAT_COUNT_S) &
+ ICE_LG_ACT_STAT_COUNT_M;
+ lg_act->pdata.lg_act.act[1] = CPU_TO_LE32(act);
+
+ /* call the fill switch rule to fill the lookup Tx Rx structure */
+ ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
+ ice_aqc_opc_update_sw_rules);
+
+ act = ICE_SINGLE_ACT_PTR;
+ act |= (l_id << ICE_SINGLE_ACT_PTR_VAL_S) & ICE_SINGLE_ACT_PTR_VAL_M;
+ rx_tx->pdata.lkup_tx_rx.act = CPU_TO_LE32(act);
+
+ /* Use the filter rule ID of the previously created rule with single
+ * act. Once the update happens, hardware will treat this as large
+ * action
+ */
+ f_rule_id = m_ent->fltr_info.fltr_rule_id;
+ rx_tx->pdata.lkup_tx_rx.index = CPU_TO_LE16(f_rule_id);
+
+ status = ice_aq_sw_rules(hw, lg_act, rules_size, 2,
+ ice_aqc_opc_update_sw_rules, NULL);
+ if (!status) {
+ m_ent->lg_act_idx = l_id;
+ m_ent->counter_index = counter_id;
+ }
+
+ ice_free(hw, lg_act);
+ return status;
+}
/**
* ice_create_vsi_list_map
@@ -3419,6 +3508,245 @@ enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
}
/**
+ * ice_alloc_res_lg_act - add large action resource
+ * @hw: pointer to the hardware structure
+ * @l_id: large action ID to fill it in
+ * @num_acts: number of actions to hold with a large action entry
+ */
+static enum ice_status
+ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ if (num_acts > ICE_MAX_LG_ACT || num_acts == 0)
+ return ICE_ERR_PARAM;
+
+ /* Allocate resource for large action */
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ sw_buf->num_elems = CPU_TO_LE16(1);
+
+ /* If num_acts is 1, use ICE_AQC_RES_TYPE_WIDE_TABLE_1.
+ * If num_acts is 2, use ICE_AQC_RES_TYPE_WIDE_TABLE_3.
+ * If num_acts is greater than 2, then use
+ * ICE_AQC_RES_TYPE_WIDE_TABLE_4.
+ * The num_acts cannot exceed 4. This was ensured at the
+ * beginning of the function.
+ */
+ if (num_acts == 1)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_1);
+ else if (num_acts == 2)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_2);
+ else
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_4);
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (!status)
+ *l_id = LE16_TO_CPU(sw_buf->elem[0].e.sw_resp);
+
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_add_mac_with_sw_marker - add filter with sw marker
+ * @hw: pointer to the hardware structure
+ * @f_info: filter info structure containing the MAC filter information
+ * @sw_marker: sw marker to tag the Rx descriptor with
+ */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exists;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (sw_marker == ICE_INVAL_SW_MARKER_ID)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+
+ INIT_LIST_HEAD(&l_head);
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ entry_exists = false;
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exists = true;
+ else if (ret)
+ return ret;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+ ice_acquire_lock(rule_lock);
+ /* Get the book keeping entry for the filter */
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry)
+ goto exit_error;
+
+ /* If counter action was enabled for this rule then don't enable
+ * sw marker large action
+ */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* if same marker was added before */
+ if (m_entry->sw_marker_id == sw_marker) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to hold large act. Three actions
+ * for marker based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 3);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the marker action */
+ ret = ice_add_marker_act(hw, m_entry, sw_marker, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exists)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
+ * ice_add_mac_with_counter - add filter with counter enabled
+ * @hw: pointer to the hardware structure
+ * @f_info: pointer to filter info structure containing the MAC filter
+ * information
+ */
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exist;
+ u16 counter_id;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ entry_exist = false;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+ INIT_LIST_HEAD(&l_head);
+
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exist = true;
+ else if (ret)
+ return ret;
+
+ ice_acquire_lock(rule_lock);
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry) {
+ ret = ICE_ERR_BAD_PTR;
+ goto exit_error;
+ }
+
+ /* Don't enable counter for a filter for which sw marker was enabled */
+ if (m_entry->sw_marker_id != ICE_INVAL_SW_MARKER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* If a counter was already enabled then don't need to add again */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to VLAN counter */
+ ret = ice_alloc_vlan_res_counter(hw, &counter_id);
+ if (ret)
+ goto exit_error;
+
+ /* Allocate a hardware table entry to hold large act. Two actions for
+ * counter based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 2);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the counter action */
+ ret = ice_add_counter_act(hw, m_entry, counter_id, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exist)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 0d70b38f4..b396a486c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -377,6 +377,11 @@ enum ice_status
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#endif /* !NO_MACVLAN_SUPPORT */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker);
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 15/37] net/ice/base: add two helper functions for flow management
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (13 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 14/37] net/ice/base: add MAC filter with marker and counter Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 16/37] net/ice/base: minor fix Qi Zhang
` (21 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_rem_all_sw_rules_info - remove all switch rules.
2. ice_reply_all_fltr - replay all filters stored in book keeping list.
These APIs will be used when switch rule feature is enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 107 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 2 +
2 files changed, 109 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index bfcb33ea6..a0c39b5d7 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2667,6 +2667,23 @@ ice_rem_sw_rule_info(struct ice_hw *hw, struct LIST_HEAD_TYPE *rule_head)
}
+/**
+ * ice_rem_all_sw_rules_info
+ * @hw: pointer to the hardware structure
+ */
+void ice_rem_all_sw_rules_info(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *rule_head;
+
+ rule_head = &sw->recp_list[i].filt_rules;
+ if (!sw->recp_list[i].adv_rule)
+ ice_rem_sw_rule_info(hw, rule_head);
+ }
+}
/**
* ice_cfg_dflt_vsi - change state of VSI to set/clear default
@@ -3747,6 +3764,96 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
}
/**
+ * ice_replay_fltr - Replay all the filters stored by a specific list head
+ * @hw: pointer to the hardware structure
+ * @list_head: list for which filters needs to be replayed
+ * @recp_id: Recipe ID for which rules need to be replayed
+ */
+static enum ice_status
+ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
+{
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE l_head;
+ enum ice_status status = ICE_SUCCESS;
+
+ if (LIST_EMPTY(list_head))
+ return status;
+
+ /* Move entries from the given list_head to a temporary l_head so that
+ * they can be replayed. Otherwise when trying to re-add the same
+ * filter, the function will return already exists
+ */
+ LIST_REPLACE_INIT(list_head, &l_head);
+
+ /* Mark the given list_head empty by reinitializing it so filters
+ * could be added again by *handler
+ */
+ LIST_FOR_EACH_ENTRY(itr, &l_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ struct ice_fltr_list_entry f_entry;
+
+ f_entry.fltr_info = itr->fltr_info;
+ if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) {
+ status = ice_add_rule_internal(hw, recp_id, &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ continue;
+ }
+
+ /* Add a filter per VSI separately */
+ while (1) {
+ u16 vsi_handle;
+
+ vsi_handle =
+ ice_find_first_bit(itr->vsi_list_info->vsi_map,
+ ICE_MAX_VSI);
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ break;
+
+ ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
+ f_entry.fltr_info.vsi_handle = vsi_handle;
+ f_entry.fltr_info.fwd_id.hw_vsi_id =
+ ice_get_hw_vsi_num(hw, vsi_handle);
+ f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
+ if (recp_id == ICE_SW_LKUP_VLAN)
+ status = ice_add_vlan_internal(hw, &f_entry);
+ else
+ status = ice_add_rule_internal(hw, recp_id,
+ &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ }
+ }
+end:
+ /* Clear the filter management list */
+ ice_rem_sw_rule_info(hw, &l_head);
+ return status;
+}
+
+/**
+ * ice_replay_all_fltr - replay all filters stored in bookkeeping lists
+ * @hw: pointer to the hardware structure
+ *
+ * NOTE: This function does not clean up partially added filters on error.
+ * It is up to caller of the function to issue a reset or fail early.
+ */
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ enum ice_status status = ICE_SUCCESS;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *head = &sw->recp_list[i].filt_rules;
+
+ status = ice_replay_fltr(hw, i, head);
+ if (status != ICE_SUCCESS)
+ return status;
+ }
+ return status;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b396a486c..3cc2c10e8 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -362,6 +362,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
+void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
@@ -409,6 +410,7 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
enum ice_status ice_init_def_sw_recp(struct ice_hw *hw);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 16/37] net/ice/base: minor fix
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (14 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 15/37] net/ice/base: add two helper functions for flow management Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 17/37] net/ice/base: update macros Qi Zhang
` (20 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ICE_SW_LKUP_LAST need to be handled correctly in
ice_aq_alloc_free_vsi_list and ice_update_vsi_list_rule
2. ICE_SW_LKUP_ETHERTYPE_MAC need to be handled correctly in
ice_update_vsi_lkup_fltr
3. free package segment pointer during ice_deinit_hw
Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 1 +
drivers/net/ice/base/ice_switch.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 015db11e0..4085ccc12 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -938,6 +938,7 @@ void ice_deinit_hw(struct ice_hw *hw)
ice_sched_cleanup_all(hw);
ice_sched_clear_agg(hw);
+ ice_free_seg(hw);
if (hw->port_info) {
ice_free(hw, hw->port_info);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a0c39b5d7..e47c1d845 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -792,7 +792,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN) {
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST) {
sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VSI_LIST_REP);
} else if (lkup_type == ICE_SW_LKUP_VLAN) {
sw_buf->res_type =
@@ -1492,7 +1493,8 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN)
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST)
type = remove ? ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR :
ICE_AQC_SW_RULES_T_VSI_LIST_SET;
else if (lkup_type == ICE_SW_LKUP_VLAN)
@@ -3388,6 +3390,8 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
break;
case ICE_SW_LKUP_ETHERTYPE:
case ICE_SW_LKUP_ETHERTYPE_MAC:
+ ice_remove_eth_mac(hw, &remove_list_head);
+ break;
case ICE_SW_LKUP_DFLT:
ice_debug(hw, ICE_DBG_SW,
"Remove filters for this lookup type hasn't been implemented yet\n");
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 17/37] net/ice/base: update macros
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (15 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 16/37] net/ice/base: minor fix Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 18/37] net/ice/base: code clean Qi Zhang
` (19 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update macros for metadata and package flags.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 36 ++++++++---------
drivers/net/ice/base/ice_flow.h | 17 ++++++--
drivers/net/ice/base/ice_lan_tx_rx.h | 77 +++++++++++++++++++++++-------------
3 files changed, 80 insertions(+), 50 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4085ccc12..e0fe06e9c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -365,22 +365,22 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_FIN, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,
+ ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,
+ ICE_FLG_FIN, idx++);
/* flex flag 1 is not used for flexi-flag programming, skipping
* these four FLG64 bits.
*/
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100,
- ICE_RXFLG_EVLAN_x9100, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC,
- ICE_RXFLG_TNL0, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,
+ ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,
+ ICE_FLG_EVLAN_x9100, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,
+ ICE_FLG_TNL0, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);
break;
default:
@@ -399,17 +399,17 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
{
- enum ice_flex_rx_mdid mdid;
+ enum ice_flex_mdid mdid;
switch (prof_id) {
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?
- ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;
+ ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH;
ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 265e1ee3e..3db10cd6f 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -278,14 +278,23 @@ enum ice_flow_action_type {
ICE_FLOW_ACT_NOP,
ICE_FLOW_ACT_ALLOW,
ICE_FLOW_ACT_DROP,
- ICE_FLOW_ACT_COUNT,
+ ICE_FLOW_ACT_CNTR_PKT,
ICE_FLOW_ACT_FWD_VSI,
ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
- ICE_FLOW_ACTION_PUSH,
- ICE_FLOW_ACTION_POP,
- ICE_FLOW_ACTION_MODIFY,
+ ICE_FLOW_ACT_PUSH,
+ ICE_FLOW_ACT_POP,
+ ICE_FLOW_ACT_MODIFY,
+ ICE_FLOW_ACT_CNTR_BYTES,
+ ICE_FLOW_ACT_CNTR_PKT_BYTES,
+ ICE_FLOW_ACT_GENERIC_0,
+ ICE_FLOW_ACT_GENERIC_1,
+ ICE_FLOW_ACT_GENERIC_2,
+ ICE_FLOW_ACT_GENERIC_3,
+ ICE_FLOW_ACT_GENERIC_4,
+ ICE_FLOW_ACT_RPT_FLOW_ID,
+ ICE_FLOW_ACT_BUILD_PROF_IDX,
};
struct ice_flow_action {
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 4a1ea0c7d..b1963b5eb 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -627,39 +627,60 @@ enum ice_flex_opcode {
ICE_RX_OPC_PROTID
};
-/* Receive Descriptor MDID values */
-enum ice_flex_rx_mdid {
- ICE_RX_MDID_FLOW_ID_LOWER = 5,
- ICE_RX_MDID_FLOW_ID_HIGH,
- ICE_RX_MDID_DST_VSI = 13,
- ICE_RX_MDID_SRC_VSI = 19,
- ICE_RX_MDID_HASH_LOW = 56,
- ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR0 = ICE_RX_MDID_HASH_LOW,
- ICE_RX_MDID_ACL_CTR1 = ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR2 = 59
+/* Receive Descriptor MDID values that access packet flags */
+enum ice_flex_mdid_pkt_flags {
+ ICE_RX_MDID_PKT_FLAGS_15_0 = 20,
+ ICE_RX_MDID_PKT_FLAGS_31_16,
+ ICE_RX_MDID_PKT_FLAGS_47_32,
+ ICE_RX_MDID_PKT_FLAGS_63_48,
+};
+
+/* Generic descriptor MDID values */
+enum ice_flex_mdid {
+ ICE_MDID_GENERIC_WORD_0,
+ ICE_MDID_GENERIC_WORD_1,
+ ICE_MDID_GENERIC_WORD_2,
+ ICE_MDID_GENERIC_WORD_3,
+ ICE_MDID_GENERIC_WORD_4,
+ ICE_MDID_FLOW_ID_LOWER,
+ ICE_MDID_FLOW_ID_HIGH,
+ ICE_MDID_RX_DESCR_PROF_IDX,
+ ICE_MDID_RX_PKT_DROP,
+ ICE_MDID_RX_DST_Q = 12,
+ ICE_MDID_RX_DST_VSI,
+ ICE_MDID_SRC_VSI = 19,
+ ICE_MDID_ACL_NOP = 55,
+ /* Entry 56 */
+ ICE_MDID_RX_HASH_LOW,
+ ICE_MDID_ACL_CNTR_PKT = ICE_MDID_RX_HASH_LOW,
+ /* Entry 57 */
+ ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_BYTES = ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_PKT_BYTES
};
/* for ice_32byte_rx_flex_desc.mir_id_umb_cast member */
#define ICE_RX_FLEX_DESC_MIRROR_M (0x3F) /* 6-bits */
-/* Rx Flag64 packet flag bits */
-enum ice_rx_flg64_bits {
- ICE_RXFLG_PKT_DSI = 0,
- ICE_RXFLG_EVLAN_x8100 = 15,
- ICE_RXFLG_EVLAN_x9100,
- ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_MAC = 22,
- ICE_RXFLG_TNL_VLAN,
- ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_FIN = 32,
- ICE_RXFLG_SYN,
- ICE_RXFLG_RST,
- ICE_RXFLG_TNL0 = 38,
- ICE_RXFLG_TNL1,
- ICE_RXFLG_TNL2,
- ICE_RXFLG_UDP_GRE,
- ICE_RXFLG_RSVD = 63
+/* Rx/Tx Flag64 packet flag bits */
+enum ice_flg64_bits {
+ ICE_FLG_PKT_DSI = 0,
+ /* If there is a 1 in this bit position then that means Rx packet */
+ ICE_FLG_PKT_DIR = 4,
+ ICE_FLG_EVLAN_x8100 = 15,
+ ICE_FLG_EVLAN_x9100,
+ ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_MAC = 22,
+ ICE_FLG_TNL_VLAN,
+ ICE_FLG_PKT_FRG,
+ ICE_FLG_FIN = 32,
+ ICE_FLG_SYN,
+ ICE_FLG_RST,
+ ICE_FLG_TNL0 = 38,
+ ICE_FLG_TNL1,
+ ICE_FLG_TNL2,
+ ICE_FLG_UDP_GRE,
+ ICE_FLG_RSVD = 63
};
enum ice_rx_flex_desc_umb_cast_bits { /* field is 2 bits long */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 18/37] net/ice/base: code clean
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (16 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 17/37] net/ice/base: update macros Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 19/37] net/ice/base: enable VSI queue context Qi Zhang
` (18 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Change below function as static and also relocated code line
to align with kernel driver.
ice_aq_move_sched_elems
ice_sched_get_agg_node
ice_sched_set_node_bw_lmt
ice_sched_cfg_node_bw_alloc
ice_sched_add_agg_cfg
ice_sched_rm_agg_cfg
ice_sched_move_vsi_to_agg
ice_sched_del_rl_profile
ice_sched_rm_unused_rl_prof
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_sched.c | 1038 +++++++++++++++++++-------------------
drivers/net/ice/base/ice_sched.h | 24 -
2 files changed, 519 insertions(+), 543 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index ab6097237..2dd9f6f6c 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -462,7 +462,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
*
* Move scheduling elements (0x0408)
*/
-enum ice_status
+static enum ice_status
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd)
@@ -713,6 +713,41 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
+ * ice_sched_del_rl_profile - remove RL profile
+ * @hw: pointer to the HW struct
+ * @rl_info: rate limit profile information
+ *
+ * If the profile ID is not referenced anymore, it removes profile ID with
+ * its associated parameters from HW DB,and locally. The caller needs to
+ * hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_del_rl_profile(struct ice_hw *hw,
+ struct ice_aqc_rl_profile_info *rl_info)
+{
+ struct ice_aqc_rl_profile_generic_elem *buf;
+ u16 num_profiles_removed;
+ enum ice_status status;
+ u16 num_profiles = 1;
+
+ if (rl_info->prof_id_ref != 0)
+ return ICE_ERR_IN_USE;
+
+ /* Safe to remove profile ID */
+ buf = (struct ice_aqc_rl_profile_generic_elem *)
+ &rl_info->profile;
+ status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
+ &num_profiles_removed, NULL);
+ if (status || num_profiles_removed != num_profiles)
+ return ICE_ERR_CFG;
+
+ /* Delete stale entry now */
+ LIST_DEL(&rl_info->list_entry);
+ ice_free(hw, rl_info);
+ return status;
+}
+
+/**
* ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
@@ -1468,7 +1503,7 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
* This function retrieves an aggregator node for a given aggregator ID from
* a given TC branch
*/
-struct ice_sched_node *
+static struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u32 agg_id)
{
@@ -2071,6 +2106,220 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
+ * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
+ * @hw: pointer to the HW struct
+ * @node: pointer to a child node
+ * @num_nodes: num nodes count array
+ *
+ * This function walks through the aggregator subtree to find a free parent
+ * node
+ */
+static struct ice_sched_node *
+ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
+ u16 *num_nodes)
+{
+ u8 l = node->tx_sched_layer;
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(hw);
+
+ /* Is it VSI parent layer ? */
+ if (l == vsil - 1)
+ return (node->num_children < hw->max_children[l]) ? node : NULL;
+
+ /* We have intermediate nodes. Let's walk through the subtree. If the
+ * intermediate node has space to add a new node then clear the count
+ */
+ if (node->num_children < hw->max_children[l])
+ num_nodes[l] = 0;
+ /* The below recursive call is intentional and wouldn't go more than
+ * 2 or 3 iterations.
+ */
+
+ for (i = 0; i < node->num_children; i++) {
+ struct ice_sched_node *parent;
+
+ parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
+ num_nodes);
+ if (parent)
+ return parent;
+ }
+
+ return NULL;
+}
+
+/**
+ * ice_sched_update_parent - update the new parent in SW DB
+ * @new_parent: pointer to a new parent node
+ * @node: pointer to a child node
+ *
+ * This function removes the child from the old parent and adds it to a new
+ * parent
+ */
+static void
+ice_sched_update_parent(struct ice_sched_node *new_parent,
+ struct ice_sched_node *node)
+{
+ struct ice_sched_node *old_parent;
+ u8 i, j;
+
+ old_parent = node->parent;
+
+ /* update the old parent children */
+ for (i = 0; i < old_parent->num_children; i++)
+ if (old_parent->children[i] == node) {
+ for (j = i + 1; j < old_parent->num_children; j++)
+ old_parent->children[j - 1] =
+ old_parent->children[j];
+ old_parent->num_children--;
+ break;
+ }
+
+ /* now move the node to a new parent */
+ new_parent->children[new_parent->num_children++] = node;
+ node->parent = new_parent;
+ node->info.parent_teid = new_parent->info.node_teid;
+}
+
+/**
+ * ice_sched_move_nodes - move child nodes to a given parent
+ * @pi: port information structure
+ * @parent: pointer to parent node
+ * @num_items: number of child nodes to be moved
+ * @list: pointer to child node teids
+ *
+ * This function move the child nodes to a given parent.
+ */
+static enum ice_status
+ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
+ u16 num_items, u32 *list)
+{
+ struct ice_aqc_move_elem *buf;
+ struct ice_sched_node *node;
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw;
+ u16 grps_movd = 0;
+ u8 i;
+
+ hw = pi->hw;
+
+ if (!parent || !num_items)
+ return ICE_ERR_PARAM;
+
+ /* Does parent have enough space */
+ if (parent->num_children + num_items >=
+ hw->max_children[parent->tx_sched_layer])
+ return ICE_ERR_AQ_FULL;
+
+ buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ for (i = 0; i < num_items; i++) {
+ node = ice_sched_find_node_by_teid(pi->root, list[i]);
+ if (!node) {
+ status = ICE_ERR_PARAM;
+ goto move_err_exit;
+ }
+
+ buf->hdr.src_parent_teid = node->info.parent_teid;
+ buf->hdr.dest_parent_teid = parent->info.node_teid;
+ buf->teid[0] = node->info.node_teid;
+ buf->hdr.num_elems = CPU_TO_LE16(1);
+ status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
+ &grps_movd, NULL);
+ if (status && grps_movd != 1) {
+ status = ICE_ERR_CFG;
+ goto move_err_exit;
+ }
+
+ /* update the SW DB */
+ ice_sched_update_parent(parent, node);
+ }
+
+move_err_exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_sched_move_vsi_to_agg - move VSI to aggregator node
+ * @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function moves a VSI to an aggregator node or its subtree.
+ * Intermediate nodes may be created if required.
+ */
+static enum ice_status
+ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
+ u8 tc)
+{
+ struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ u32 first_node_teid, vsi_teid;
+ enum ice_status status;
+ u16 num_nodes_added;
+ u8 aggl, vsil, i;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
+ if (!vsi_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ aggl = ice_sched_get_agg_layer(pi->hw);
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+
+ /* set intermediate node count to 1 between aggregator and VSI layers */
+ for (i = aggl + 1; i < vsil; i++)
+ num_nodes[i] = 1;
+
+ /* Check if the aggregator subtree has any free node to add the VSI */
+ for (i = 0; i < agg_node->num_children; i++) {
+ parent = ice_sched_get_free_vsi_parent(pi->hw,
+ agg_node->children[i],
+ num_nodes);
+ if (parent)
+ goto move_nodes;
+ }
+
+ /* add new nodes */
+ parent = agg_node;
+ for (i = aggl + 1; i < vsil; i++) {
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added)
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ else
+ parent = parent->children[0];
+
+ if (!parent)
+ return ICE_ERR_CFG;
+ }
+
+move_nodes:
+ vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
+ return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
+}
+
+/**
* ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
@@ -2114,20 +2363,89 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
* @pi: port information structure
- * @agg_info: aggregator ID
- * @tc: TC number
- * @rm_vsi_info: bool value true or false
+ * @node: node pointer
*
- * This function removes aggregator reference to VSI of given TC. It removes
- * the aggregator configuration completely for requested TC. The caller needs
- * to hold the scheduler lock.
+ * This function checks whether the aggregator is attached with any VSI or not.
*/
-static enum ice_status
-ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
- u8 tc, bool rm_vsi_info)
-{
+static bool
+ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
+{
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+ if (node->tx_sched_layer < vsil - 1) {
+ for (i = 0; i < node->num_children; i++)
+ if (ice_sched_is_agg_inuse(pi, node->children[i]))
+ return true;
+ return false;
+ } else {
+ return node->num_children ? true : false;
+ }
+}
+
+/**
+ * ice_sched_rm_agg_cfg - remove the aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function removes the aggregator node and intermediate nodes if any
+ * from the given TC
+ */
+static enum ice_status
+ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *tc_node, *agg_node;
+ struct ice_hw *hw = pi->hw;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ /* Can't remove the aggregator node if it has children */
+ if (ice_sched_is_agg_inuse(pi, agg_node))
+ return ICE_ERR_IN_USE;
+
+ /* need to remove the whole subtree if aggregator node is the
+ * only child.
+ */
+ while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
+ struct ice_sched_node *parent = agg_node->parent;
+
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ if (parent->num_children > 1)
+ break;
+
+ agg_node = parent;
+ }
+
+ ice_free_sched_node(pi, agg_node);
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * @pi: port information structure
+ * @agg_info: aggregator ID
+ * @tc: TC number
+ * @rm_vsi_info: bool value true or false
+ *
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
+ */
+static enum ice_status
+ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
+ u8 tc, bool rm_vsi_info)
+{
enum ice_status status = ICE_SUCCESS;
/* If nothing to remove - return success */
@@ -2172,6 +2490,89 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_add_agg_cfg - create an aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function creates an aggregator node and intermediate nodes if required
+ * for the given TC
+ */
+static enum ice_status
+ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *parent, *agg_node, *tc_node;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw = pi->hw;
+ u32 first_node_teid;
+ u16 num_nodes_added;
+ u8 i, aggl;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ /* Does Agg node already exist ? */
+ if (agg_node)
+ return status;
+
+ aggl = ice_sched_get_agg_layer(hw);
+
+ /* need one node in Agg layer */
+ num_nodes[aggl] = 1;
+
+ /* Check whether the intermediate nodes have space to add the
+ * new aggregator. If they are full, then SW needs to allocate a new
+ * intermediate node on those layers
+ */
+ for (i = hw->sw_entry_point_layer; i < aggl; i++) {
+ parent = ice_sched_get_first_node(hw, tc_node, i);
+
+ /* scan all the siblings */
+ while (parent) {
+ if (parent->num_children < hw->max_children[i])
+ break;
+ parent = parent->sibling;
+ }
+
+ /* all the nodes are full, reserve one for this layer */
+ if (!parent)
+ num_nodes[i]++;
+ }
+
+ /* add the aggregator node */
+ parent = tc_node;
+ for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added) {
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ /* register aggregator ID with the aggregator node */
+ if (parent && i == aggl)
+ parent->agg_id = agg_id;
+ } else {
+ parent = parent->children[0];
+ }
+ }
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
* @agg_id: aggregator ID
@@ -2406,6 +2807,109 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_rm_unused_rl_prof - remove unused RL profile
+ * @pi: port information structure
+ *
+ * This function removes unused rate limit profiles from the HW and
+ * SW DB. The caller needs to hold scheduler lock.
+ */
+static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
+{
+ u8 ln;
+
+ for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+ struct ice_aqc_rl_profile_info *rl_prof_elem;
+ struct ice_aqc_rl_profile_info *rl_prof_tmp;
+
+ LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
+ &pi->rl_prof_list[ln],
+ ice_aqc_rl_profile_info, list_entry) {
+ if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
+ ice_debug(pi->hw, ICE_DBG_SCHED,
+ "Removed rl profile\n");
+ }
+ }
+}
+
+/**
+ * ice_sched_update_elem - update element
+ * @hw: pointer to the HW struct
+ * @node: pointer to node
+ * @info: node info to update
+ *
+ * It updates the HW DB, and local SW DB of node. It updates the scheduling
+ * parameters of node from argument info data buffer (Info->data buf) and
+ * returns success or error on config sched element failure. The caller
+ * needs to hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
+ struct ice_aqc_txsched_elem_data *info)
+{
+ struct ice_aqc_conf_elem buf;
+ enum ice_status status;
+ u16 elem_cfgd = 0;
+ u16 num_elems = 1;
+
+ buf.generic[0] = *info;
+ /* Parent TEID is reserved field in this aq call */
+ buf.generic[0].parent_teid = 0;
+ /* Element type is reserved field in this aq call */
+ buf.generic[0].data.elem_type = 0;
+ /* Flags is reserved field in this aq call */
+ buf.generic[0].data.flags = 0;
+
+ /* Update HW DB */
+ /* Configure element node */
+ status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
+ &elem_cfgd, NULL);
+ if (status || elem_cfgd != num_elems) {
+ ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
+ return ICE_ERR_CFG;
+ }
+
+ /* Config success case */
+ /* Now update local SW DB */
+ /* Only copy the data portion of info buffer */
+ node->info.data = info->data;
+ return status;
+}
+
+/**
+ * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
+ * @hw: pointer to the HW struct
+ * @node: sched node to configure
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @bw_alloc: BW weight/allocation
+ *
+ * This function configures node element's BW allocation.
+ */
+static enum ice_status
+ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
+ enum ice_rl_type rl_type, u8 bw_alloc)
+{
+ struct ice_aqc_txsched_elem_data buf;
+ struct ice_aqc_txsched_elem *data;
+ enum ice_status status;
+
+ buf = node->info;
+ data = &buf.data;
+ if (rl_type == ICE_MIN_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
+ data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else if (rl_type == ICE_MAX_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
+ data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else {
+ return ICE_ERR_PARAM;
+ }
+
+ /* Configure element */
+ status = ice_sched_update_elem(hw, node, &buf);
+ return status;
+}
+
+/**
* ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
* @agg_id: aggregator ID
@@ -3372,110 +3876,6 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
}
/**
- * ice_sched_del_rl_profile - remove rl profile
- * @hw: pointer to the hw struct
- * @rl_info: rate limit profile information
- *
- * If the profile id is not referenced anymore, it removes profile id with
- * its associated parameters from hw db,and locally. The caller needs to
- * hold scheduler lock.
- */
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info)
-{
- struct ice_aqc_rl_profile_generic_elem *buf;
- u16 num_profiles_removed;
- enum ice_status status;
- u16 num_profiles = 1;
-
- if (rl_info->prof_id_ref != 0)
- return ICE_ERR_IN_USE;
-
- /* Safe to remove profile id */
- buf = (struct ice_aqc_rl_profile_generic_elem *)
- &rl_info->profile;
- status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
- &num_profiles_removed, NULL);
- if (status || num_profiles_removed != num_profiles)
- return ICE_ERR_CFG;
-
- /* Delete stale entry now */
- LIST_DEL(&rl_info->list_entry);
- ice_free(hw, rl_info);
- return status;
-}
-
-/**
- * ice_sched_rm_unused_rl_prof - remove unused rl profile
- * @pi: port information structure
- *
- * This function removes unused rate limit profiles from the hw and
- * SW DB. The caller needs to hold scheduler lock.
- */
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
-{
- u8 ln;
-
- for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
- struct ice_aqc_rl_profile_info *rl_prof_elem;
- struct ice_aqc_rl_profile_info *rl_prof_tmp;
-
- LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
- &pi->rl_prof_list[ln],
- ice_aqc_rl_profile_info, list_entry) {
- if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
- ice_debug(pi->hw, ICE_DBG_SCHED,
- "Removed rl profile\n");
- }
- }
-}
-
-/**
- * ice_sched_update_elem - update element
- * @hw: pointer to the hw struct
- * @node: pointer to node
- * @info: node info to update
- *
- * It updates the HW DB, and local SW DB of node. It updates the scheduling
- * parameters of node from argument info data buffer (Info->data buf) and
- * returns success or error on config sched element failure. The caller
- * needs to hold scheduler lock.
- */
-static enum ice_status
-ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
- struct ice_aqc_txsched_elem_data *info)
-{
- struct ice_aqc_conf_elem buf;
- enum ice_status status;
- u16 elem_cfgd = 0;
- u16 num_elems = 1;
-
- buf.generic[0] = *info;
- /* Parent teid is reserved field in this aq call */
- buf.generic[0].parent_teid = 0;
- /* Element type is reserved field in this aq call */
- buf.generic[0].data.elem_type = 0;
- /* Flags is reserved field in this aq call */
- buf.generic[0].data.flags = 0;
-
- /* Update HW DB */
- /* Configure element node */
- status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
- &elem_cfgd, NULL);
- if (status || elem_cfgd != num_elems) {
- ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
- return ICE_ERR_CFG;
- }
-
- /* Config success case */
- /* Now update local SW DB */
- /* Only copy the data portion of info buffer */
- node->info.data = info->data;
- return status;
-}
-
-/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
* @hw: pointer to the HW struct
* @node: sched node to configure
@@ -3841,7 +4241,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
* It updates node's BW limit parameters like BW RL profile ID of type CIR,
* EIR, or SRL. The caller needs to hold scheduler lock.
*/
-enum ice_status
+static enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4588,7 +4988,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
/**
* ice_sched_cfg_sibl_node_prio - configure node sibling priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: sibling priority
*
@@ -4617,406 +5017,6 @@ ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_cfg_node_bw_alloc - configure node bw weight/alloc params
- * @hw: pointer to the hw struct
- * @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @bw_alloc: bw weight/allocation
- *
- * This function configures node element's bw allocation.
- */
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc)
-{
- struct ice_aqc_txsched_elem_data buf;
- struct ice_aqc_txsched_elem *data;
- enum ice_status status;
-
- buf = node->info;
- data = &buf.data;
- if (rl_type == ICE_MIN_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
- data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else if (rl_type == ICE_MAX_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
- data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else {
- return ICE_ERR_PARAM;
- }
-
- /* Configure element */
- status = ice_sched_update_elem(hw, node, &buf);
- return status;
-}
-
-/**
- * ice_sched_add_agg_cfg - create an aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function creates an aggregator node and intermediate nodes if required
- * for the given TC
- */
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *parent, *agg_node, *tc_node;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw = pi->hw;
- u32 first_node_teid;
- u16 num_nodes_added;
- u8 i, aggl;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- /* Does Agg node already exist ? */
- if (agg_node)
- return status;
-
- aggl = ice_sched_get_agg_layer(hw);
-
- /* need one node in Agg layer */
- num_nodes[aggl] = 1;
-
- /* Check whether the intermediate nodes have space to add the
- * new agg. If they are full, then SW needs to allocate a new
- * intermediate node on those layers
- */
- for (i = hw->sw_entry_point_layer; i < aggl; i++) {
- parent = ice_sched_get_first_node(hw, tc_node, i);
-
- /* scan all the siblings */
- while (parent) {
- if (parent->num_children < hw->max_children[i])
- break;
- parent = parent->sibling;
- }
-
- /* all the nodes are full, reserve one for this layer */
- if (!parent)
- num_nodes[i]++;
- }
-
- /* add the agg node */
- parent = tc_node;
- for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
- if (!parent)
- return ICE_ERR_CFG;
-
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added) {
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- /* register the aggregator id with the agg node */
- if (parent && i == aggl)
- parent->agg_id = agg_id;
- } else {
- parent = parent->children[0];
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_is_agg_inuse - check whether the agg is in use or not
- * @pi: port information structure
- * @node: node pointer
- *
- * This function checks whether the agg is attached with any vsi or not.
- */
-static bool
-ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
-{
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(pi->hw);
- if (node->tx_sched_layer < vsil - 1) {
- for (i = 0; i < node->num_children; i++)
- if (ice_sched_is_agg_inuse(pi, node->children[i]))
- return true;
- return false;
- } else {
- return node->num_children ? true : false;
- }
-}
-
-/**
- * ice_sched_rm_agg_cfg - remove the aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function removes the aggregator node and intermediate nodes if any
- * from the given TC
- */
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *tc_node, *agg_node;
- struct ice_hw *hw = pi->hw;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- /* Can't remove the agg node if it has children */
- if (ice_sched_is_agg_inuse(pi, agg_node))
- return ICE_ERR_IN_USE;
-
- /* need to remove the whole subtree if agg node is the
- * only child.
- */
- while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
- struct ice_sched_node *parent = agg_node->parent;
-
- if (!parent)
- return ICE_ERR_CFG;
-
- if (parent->num_children > 1)
- break;
-
- agg_node = parent;
- }
-
- ice_free_sched_node(pi, agg_node);
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_get_free_vsi_parent - Find a free parent node in agg subtree
- * @hw: pointer to the hw struct
- * @node: pointer to a child node
- * @num_nodes: num nodes count array
- *
- * This function walks through the aggregator subtree to find a free parent
- * node
- */
-static struct ice_sched_node *
-ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
- u16 *num_nodes)
-{
- u8 l = node->tx_sched_layer;
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(hw);
-
- /* Is it VSI parent layer ? */
- if (l == vsil - 1)
- return (node->num_children < hw->max_children[l]) ? node : NULL;
-
- /* We have intermediate nodes. Let's walk through the subtree. If the
- * intermediate node has space to add a new node then clear the count
- */
- if (node->num_children < hw->max_children[l])
- num_nodes[l] = 0;
- /* The below recursive call is intentional and wouldn't go more than
- * 2 or 3 iterations.
- */
-
- for (i = 0; i < node->num_children; i++) {
- struct ice_sched_node *parent;
-
- parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
- num_nodes);
- if (parent)
- return parent;
- }
-
- return NULL;
-}
-
-/**
- * ice_sched_update_new_parent - update the new parent in SW DB
- * @new_parent: pointer to a new parent node
- * @node: pointer to a child node
- *
- * This function removes the child from the old parent and adds it to a new
- * parent
- */
-static void
-ice_sched_update_parent(struct ice_sched_node *new_parent,
- struct ice_sched_node *node)
-{
- struct ice_sched_node *old_parent;
- u8 i, j;
-
- old_parent = node->parent;
-
- /* update the old parent children */
- for (i = 0; i < old_parent->num_children; i++)
- if (old_parent->children[i] == node) {
- for (j = i + 1; j < old_parent->num_children; j++)
- old_parent->children[j - 1] =
- old_parent->children[j];
- old_parent->num_children--;
- break;
- }
-
- /* now move the node to a new parent */
- new_parent->children[new_parent->num_children++] = node;
- node->parent = new_parent;
- node->info.parent_teid = new_parent->info.node_teid;
-}
-
-/**
- * ice_sched_move_nodes - move child nodes to a given parent
- * @pi: port information structure
- * @parent: pointer to parent node
- * @num_items: number of child nodes to be moved
- * @list: pointer to child node teids
- *
- * This function move the child nodes to a given parent.
- */
-static enum ice_status
-ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
- u16 num_items, u32 *list)
-{
- struct ice_aqc_move_elem *buf;
- struct ice_sched_node *node;
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw;
- u16 grps_movd = 0;
- u8 i;
-
- hw = pi->hw;
-
- if (!parent || !num_items)
- return ICE_ERR_PARAM;
-
- /* Does parent have enough space */
- if (parent->num_children + num_items >=
- hw->max_children[parent->tx_sched_layer])
- return ICE_ERR_AQ_FULL;
-
- buf = (struct ice_aqc_move_elem *) ice_malloc(hw, sizeof(*buf));
- if (!buf)
- return ICE_ERR_NO_MEMORY;
-
- for (i = 0; i < num_items; i++) {
- node = ice_sched_find_node_by_teid(pi->root, list[i]);
- if (!node) {
- status = ICE_ERR_PARAM;
- goto move_err_exit;
- }
-
- buf->hdr.src_parent_teid = node->info.parent_teid;
- buf->hdr.dest_parent_teid = parent->info.node_teid;
- buf->teid[0] = node->info.node_teid;
- buf->hdr.num_elems = CPU_TO_LE16(1);
- status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
- &grps_movd, NULL);
- if (status && grps_movd != 1) {
- status = ICE_ERR_CFG;
- goto move_err_exit;
- }
-
- /* update the SW DB */
- ice_sched_update_parent(parent, node);
- }
-
-move_err_exit:
- ice_free(hw, buf);
- return status;
-}
-
-/**
- * ice_sched_move_vsi_to_agg - move VSI to aggregator node
- * @pi: port information structure
- * @vsi_handle: software VSI handle
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function moves a VSI to an aggregator node or its subtree.
- * Intermediate nodes may be created if required.
- */
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc)
-{
- struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- u32 first_node_teid, vsi_teid;
- enum ice_status status;
- u16 num_nodes_added;
- u8 aggl, vsil, i;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
- if (!vsi_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- aggl = ice_sched_get_agg_layer(pi->hw);
- vsil = ice_sched_get_vsi_layer(pi->hw);
-
- /* initialize intermediate node count to 1 between agg and VSI layers */
- for (i = aggl + 1; i < vsil; i++)
- num_nodes[i] = 1;
-
- /* Check whether the agg subtree has any free node to add the VSI */
- for (i = 0; i < agg_node->num_children; i++) {
- parent = ice_sched_get_free_vsi_parent(pi->hw,
- agg_node->children[i],
- num_nodes);
- if (parent)
- goto move_nodes;
- }
-
- /* add new nodes */
- parent = agg_node;
- for (i = aggl + 1; i < vsil; i++) {
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added)
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- else
- parent = parent->children[0];
-
- if (!parent)
- return ICE_ERR_CFG;
- }
-
-move_nodes:
- vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
- return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
-}
-
-/**
* ice_cfg_rl_burst_size - Set burst size value
* @hw: pointer to the HW struct
* @bytes: burst size in bytes
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 61fa6a85b..09de765ff 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -76,10 +76,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
-ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
- struct ice_aqc_move_elem *buf, u16 buf_size,
- u16 *grps_movd, struct ice_sq_cd *cd);
-enum ice_status
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_get_elem *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd);
@@ -109,9 +105,6 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable);
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
struct ice_sched_node *
-ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
- u32 agg_id);
-struct ice_sched_node *
ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u16 vsi_handle);
bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
@@ -177,9 +170,6 @@ bool
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
struct ice_sched_node *node);
enum ice_status
-ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u32 bw);
-enum ice_status
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -193,18 +183,4 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);
enum ice_status
ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
u8 priority);
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc);
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc);
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info);
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi);
#endif /* _ICE_SCHED_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 19/37] net/ice/base: enable VSI queue context
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (17 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 18/37] net/ice/base: code clean Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 20/37] net/ice/base: ensure only valid bits are set Qi Zhang
` (17 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
The patch added to retrieve the queue context and update the queue
handle for lan queues.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 60 ++++++++++++++++++++++++++++++++++++---
drivers/net/ice/base/ice_common.h | 11 +++----
drivers/net/ice/ice_rxtx.c | 11 +++++--
3 files changed, 70 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e0fe06e9c..f5cbd47c3 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3512,10 +3512,35 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
}
/**
+ * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
+ * @q_handle: software queue handle
+ */
+static struct ice_q_ctx *
+ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ struct ice_q_ctx *q_ctx;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return NULL;
+ if (q_handle >= vsi->num_lan_q_entries[tc])
+ return NULL;
+ if (!vsi->lan_q_ctx[tc])
+ return NULL;
+ q_ctx = vsi->lan_q_ctx[tc];
+ return &q_ctx[q_handle];
+}
+
+/**
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: TC number
+ * @q_handle: software queue handle
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
@@ -3524,12 +3549,13 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
* This function adds one LAN queue
*/
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_txsched_elem_data node = { 0 };
struct ice_sched_node *parent;
+ struct ice_q_ctx *q_ctx;
enum ice_status status;
struct ice_hw *hw;
@@ -3546,6 +3572,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
ice_acquire_lock(&pi->sched_lock);
+ q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle);
+ if (!q_ctx) {
+ ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n",
+ q_handle);
+ status = ICE_ERR_PARAM;
+ goto ena_txq_exit;
+ }
+
/* find a parent node */
parent = ice_sched_get_free_qparent(pi, vsi_handle, tc,
ICE_SCHED_NODE_OWNER_LAN);
@@ -3580,6 +3614,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
+ q_ctx->q_handle = q_handle;
/* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
@@ -3592,7 +3627,10 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
/**
* ice_dis_vsi_txq
* @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
* @num_queues: number of queues
+ * @q_handles: pointer to software queue handle array
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
* @rst_src: if called due to reset, specifies the reset source
@@ -3602,12 +3640,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* This function removes queues and their corresponding nodes in SW DB
*/
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handles, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd)
{
enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_aqc_dis_txq_item qg_list;
+ struct ice_q_ctx *q_ctx;
u16 i;
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
@@ -3630,6 +3670,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
if (!node)
continue;
+ q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);
+ if (!q_ctx) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
+ q_handles[i]);
+ continue;
+ }
+ if (q_ctx->q_handle != q_handles[i]) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
+ q_ctx->q_handle, q_handles[i]);
+ continue;
+ }
qg_list.parent_teid = node->info.parent_teid;
qg_list.num_qs = 1;
qg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);
@@ -3640,6 +3691,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
if (status != ICE_SUCCESS)
break;
ice_free_sched_node(pi, node);
+ q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
}
ice_release_lock(&pi->sched_lock);
return status;
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 63f4a5ebe..72560fbbf 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -157,15 +157,16 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
- struct ice_sq_cd *cmd_details);
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handle, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ struct ice_sq_cd *cd);
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
u16 *max_lanqs);
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
void ice_replay_post(struct ice_hw *hw);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index c794ee861..b65bb4a51 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -453,7 +453,8 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
/* Init the Tx tail register*/
ICE_PCI_REG_WRITE(txq->qtx_tail, 0);
- err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, 1, &txq_elem,
+ /* Fix me, we assume TC always 0 here */
+ err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, 0, 1, &txq_elem,
sizeof(txq_elem), NULL);
if (err) {
PMD_DRV_LOG(ERR, "Failed to add lan txq");
@@ -528,9 +529,12 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct ice_tx_queue *txq;
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct ice_vsi *vsi = pf->main_vsi;
enum ice_status status;
uint16_t q_ids[1];
uint32_t q_teids[1];
+ uint16_t q_handle = 0;
if (tx_queue_id >= dev->data->nb_tx_queues) {
PMD_DRV_LOG(ERR, "TX queue %u is out of range %u",
@@ -548,8 +552,9 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
q_ids[0] = txq->reg_idx;
q_teids[0] = txq->q_teid;
- status = ice_dis_vsi_txq(hw->port_info, 1, q_ids, q_teids,
- ICE_NO_RESET, 0, NULL);
+ /* Fix me, we assume TC always 0 here */
+ status = ice_dis_vsi_txq(hw->port_info, vsi->idx, 0, 1, &q_handle,
+ q_ids, q_teids, ICE_NO_RESET, 0, NULL);
if (status != ICE_SUCCESS) {
PMD_DRV_LOG(DEBUG, "Failed to disable Lan Tx queue");
return -EINVAL;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 20/37] net/ice/base: ensure only valid bits are set
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (18 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 19/37] net/ice/base: enable VSI queue context Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 21/37] net/ice/base: enhance get link status command Qi Zhang
` (16 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Chinh T Cao
In the ice_aq_set_phy_cfg AQ command, the 16.4 bit is reserved.
This patch will make sure that this bit will never be set to 1.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 1 +
drivers/net/ice/base/ice_common.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ca3d40c8b..70cd0604b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1327,6 +1327,7 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
+#define ICE_AQ_PHY_ENA_VALID_MASK MAKEMASK(0xef, 0)
#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index f5cbd47c3..1c381b5e2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2351,6 +2351,15 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport,
if (!cfg)
return ICE_ERR_PARAM;
+ /* Ensure that only valid bits of cfg->caps can be turned on. */
+ if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
+ ice_debug(hw, ICE_DBG_PHY,
+ "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
+ cfg->caps);
+
+ cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
+ }
+
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg);
desc.params.set_phy.lport_num = lport;
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 21/37] net/ice/base: enhance get link status command
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (19 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 20/37] net/ice/base: ensure only valid bits are set Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 22/37] net/ice/base: add RSS key related macro and structures Qi Zhang
` (15 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Matthew Vick
Extend the functionality of the admin queue command by including
additional status and ID bits to improve link topology configuration.
Signed-off-by: Matthew Vick <matthew.vick@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 70cd0604b..cb1e1ca1a 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1399,7 +1399,12 @@ struct ice_aqc_get_link_status_data {
#define ICE_AQ_LINK_TOPO_CONFLICT BIT(0)
#define ICE_AQ_LINK_MEDIA_CONFLICT BIT(1)
#define ICE_AQ_LINK_TOPO_CORRUPT BIT(2)
- u8 reserved1;
+#define ICE_AQ_LINK_TOPO_UNREACH_PRT BIT(4)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_PRT BIT(5)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA BIT(6)
+#define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA BIT(7)
+ u8 link_cfg_err;
+#define ICE_AQ_LINK_CFG_ERR BIT(0)
u8 link_info;
#define ICE_AQ_LINK_UP BIT(0) /* Link Status */
#define ICE_AQ_LINK_FAULT BIT(1)
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 22/37] net/ice/base: add RSS key related macro and structures
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (20 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 21/37] net/ice/base: enhance get link status command Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 23/37] net/ice/base: do not write TCAM entries back Qi Zhang
` (14 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Paul Greenwalt
Add define for 52 byte RSS hash key size, and add struct
ice_aqc_get_set_rss_keys comments regarding setting 40 bytes and
52 byte hash key.
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index cb1e1ca1a..ed7dfae8c 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1593,7 +1593,20 @@ struct ice_aqc_get_set_rss_key {
#define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28
#define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC
+#define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \
+ (ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE + \
+ ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE)
+/**
+ * struct ice_aqc_get_set_rss_keys - Get/Set RSS hash key command buffer
+ * @standard_rss_key: 40 most significant bytes of hash key
+ * @extended_hash_key: 12 least significant bytes of hash key
+ *
+ * Set/Get 40 byte hash key using standard_rss_key field, and set
+ * extended_hash_key field to zero. Set/Get 52 byte hash key using
+ * standard_rss_key field for 40 most significant bytes and the
+ * extended_hash_key field for the 12 least significant bytes of hash key.
+ */
struct ice_aqc_get_set_rss_keys {
u8 standard_rss_key[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 23/37] net/ice/base: do not write TCAM entries back
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (21 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 22/37] net/ice/base: add RSS key related macro and structures Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 24/37] net/ice/base: remove local VSIG allocations Qi Zhang
` (13 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Profile TCAM entry removal is handled by the firmware when
freeing the resource, so the driver does not need to write these
default entries back with an update Package action.
This patch removes writing of the TCAM entry using Update Package
command when removing it, since the entry has already been freed
by firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 41 +++++++++---------------------------
drivers/net/ice/base/ice_flex_type.h | 2 --
2 files changed, 10 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index ff615f94f..900a19387 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -3558,8 +3558,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
struct ice_chs_chg *tmp;
LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
- if ((tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) ||
- tmp->type == ICE_TCAM_REM) {
+ if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
struct ice_prof_id_section *p;
u32 id;
@@ -3689,7 +3688,6 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
es++;
break;
case ICE_TCAM_ADD:
- case ICE_TCAM_REM:
tcam++;
break;
case ICE_VSIG_ADD:
@@ -3962,46 +3960,27 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
* ice_rem_prof_id - remove one profile from a VSIG
* @hw: pointer to the HW struct
* @blk: hardware block
- * @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
- * @chg: pointer to list to record changes
*/
static enum ice_status
-ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
- struct ice_vsig_prof *prof, struct LIST_HEAD_TYPE *chg)
+ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
+ struct ice_vsig_prof *prof)
{
enum ice_status status;
- struct ice_chs_chg *p;
u16 i;
for (i = 0; i < prof->tcam_count; i++) {
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_prof_id;
-
- p->type = ICE_TCAM_REM;
- p->vsig = vsig;
- p->prof_id = prof->tcam[i].prof_id;
- p->tcam_idx = prof->tcam[i].tcam_idx;
-
- p->ptg = prof->tcam[i].ptg;
prof->tcam[i].in_use = false;
- p->orig_ent = hw->blk[blk].prof.t[p->tcam_idx];
- status = ice_rel_tcam_idx(hw, blk, p->tcam_idx);
+ status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
if (!status)
- status = ice_prof_dec_ref(hw, blk, p->prof_id);
-
- LIST_ADD(&p->list_entry, chg);
+ status = ice_prof_dec_ref(hw, blk,
+ prof->tcam[i].prof_id);
if (status)
- goto err_ice_rem_prof_id;
+ return ICE_ERR_HW_TABLE;
}
return ICE_SUCCESS;
-
-err_ice_rem_prof_id:
- /* caller will clean up the change list */
- return ICE_ERR_NO_MEMORY;
}
/**
@@ -4024,9 +4003,9 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
LIST_FOR_EACH_ENTRY_SAFE(d, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list) {
- status = ice_rem_prof_id(hw, blk, vsig, d, chg);
+ status = ice_rem_prof_id(hw, blk, d);
if (status)
- goto err_ice_rem_vsig;
+ return status;
LIST_DEL(&d->list);
ice_free(hw, d);
@@ -4090,7 +4069,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* this is the last profile, remove the VSIG */
return ice_rem_vsig(hw, blk, vsig, chg);
- status = ice_rem_prof_id(hw, blk, vsig, p, chg);
+ status = ice_rem_prof_id(hw, blk, p);
if (!status) {
LIST_DEL(&p->list);
ice_free(hw, p);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index aed23a067..1bb865896 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -676,7 +676,6 @@ enum ice_chg_type {
ICE_TCAM_NONE = 0,
ICE_PTG_ES_ADD,
ICE_TCAM_ADD,
- ICE_TCAM_REM,
ICE_VSIG_ADD,
ICE_VSIG_REM,
ICE_VSI_MOVE,
@@ -697,7 +696,6 @@ struct ice_chs_chg {
u16 vsig;
u16 orig_vsig;
u16 tcam_idx;
- struct ice_prof_tcam_entry orig_ent;
};
#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 24/37] net/ice/base: remove local VSIG allocations
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (22 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 23/37] net/ice/base: do not write TCAM entries back Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 25/37] net/ice/base: minor fix Qi Zhang
` (12 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
If allocating a VSI to a VSIG fails the local allocations made for VSIG
profiles and change-lists will not be removed. Adding calls to free these
entries on error in VSIG management calls.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 900a19387..887609204 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4523,8 +4523,10 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
- if (status)
+ if (status) {
+ ice_free(hw, p);
goto err_ice_add_prof_id_vsig;
+ }
t->tcam[i].ptg = ptg;
t->tcam[i].prof_id = map->prof_id;
@@ -4563,6 +4565,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
err_ice_add_prof_id_vsig:
/* let caller clean up the change list */
+ ice_free(hw, t);
return ICE_ERR_NO_MEMORY;
}
@@ -4587,16 +4590,18 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
return ICE_ERR_NO_MEMORY;
new_vsig = ice_vsig_alloc(hw, blk);
- if (!new_vsig)
- return ICE_ERR_HW_TABLE;
+ if (!new_vsig) {
+ status = ICE_ERR_HW_TABLE;
+ goto err_ice_create_prof_id_vsig;
+ }
status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
p->type = ICE_VSIG_ADD;
p->vsi = vsi;
@@ -4606,6 +4611,11 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
LIST_ADD(&p->list_entry, chg);
return ICE_SUCCESS;
+
+err_ice_create_prof_id_vsig:
+ /* let caller clean up the change list */
+ ice_free(hw, p);
+ return status;
}
/**
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 25/37] net/ice/base: minor fix
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (23 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 24/37] net/ice/base: remove local VSIG allocations Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 26/37] net/ice/base: update copyright time Qi Zhang
` (11 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Fix some problems with filling the HW tables.
2. Fix a logic error in ice_rem_prof_from_list.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 887609204..1dd121b28 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2935,9 +2935,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
while (sect) {
switch (sid) {
+ case ICE_SID_XLT1_SW:
case ICE_SID_XLT1_FD:
case ICE_SID_XLT1_RSS:
case ICE_SID_XLT1_ACL:
+ case ICE_SID_XLT1_PE:
xlt1 = (struct ice_xlt1_section *)sect;
src = xlt1->value;
sect_len = LE16_TO_CPU(xlt1->count) *
@@ -2946,9 +2948,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt1.count *
sizeof(*hw->blk[block_id].xlt1.t);
break;
+ case ICE_SID_XLT2_SW:
case ICE_SID_XLT2_FD:
case ICE_SID_XLT2_RSS:
case ICE_SID_XLT2_ACL:
+ case ICE_SID_XLT2_PE:
xlt2 = (struct ice_xlt2_section *)sect;
src = (u8 *)xlt2->value;
sect_len = LE16_TO_CPU(xlt2->count) *
@@ -2957,9 +2961,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt2.count *
sizeof(*hw->blk[block_id].xlt2.t);
break;
+ case ICE_SID_PROFID_TCAM_SW:
case ICE_SID_PROFID_TCAM_FD:
case ICE_SID_PROFID_TCAM_RSS:
case ICE_SID_PROFID_TCAM_ACL:
+ case ICE_SID_PROFID_TCAM_PE:
pid = (struct ice_prof_id_section *)sect;
src = (u8 *)pid->entry;
sect_len = LE16_TO_CPU(pid->count) *
@@ -2968,9 +2974,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof.count *
sizeof(*hw->blk[block_id].prof.t);
break;
+ case ICE_SID_PROFID_REDIR_SW:
case ICE_SID_PROFID_REDIR_FD:
case ICE_SID_PROFID_REDIR_RSS:
case ICE_SID_PROFID_REDIR_ACL:
+ case ICE_SID_PROFID_REDIR_PE:
pr = (struct ice_prof_redir_section *)sect;
src = pr->redir_value;
sect_len = LE16_TO_CPU(pr->count) *
@@ -2979,15 +2987,19 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof_redir.count *
sizeof(*hw->blk[block_id].prof_redir.t);
break;
+ case ICE_SID_FLD_VEC_SW:
case ICE_SID_FLD_VEC_FD:
case ICE_SID_FLD_VEC_RSS:
case ICE_SID_FLD_VEC_ACL:
+ case ICE_SID_FLD_VEC_PE:
es = (struct ice_sw_fv_section *)sect;
src = (u8 *)es->fv;
sect_len = LE16_TO_CPU(es->count) *
- sizeof(*hw->blk[block_id].prof_redir.t);
+ hw->blk[block_id].es.fvw *
+ sizeof(*hw->blk[block_id].es.t);
dst = (u8 *)hw->blk[block_id].es.t;
dst_len = hw->blk[block_id].es.count *
+ hw->blk[block_id].es.fvw *
sizeof(*hw->blk[block_id].es.t);
break;
default:
@@ -4964,8 +4976,8 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
goto err_ice_rem_prof_id_flow;
- } else if (ice_find_dup_props_vsig(hw, blk, ©,
- &vsig)) {
+ } else if (!ice_find_dup_props_vsig(hw, blk, ©,
+ &vsig)) {
/* found an exact match */
/* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 26/37] net/ice/base: update copyright time
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (24 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 25/37] net/ice/base: minor fix Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 27/37] net/ice/base: fix static analysis reported issues Qi Zhang
` (10 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update copyright time to 2019.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_controlq.c | 2 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 2 +-
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 2 +-
drivers/net/ice/base/ice_nvm.c | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2 +-
drivers/net/ice/base/ice_sched.h | 2 +-
drivers/net/ice/base/ice_status.h | 2 +-
drivers/net/ice/base/ice_switch.c | 2 +-
drivers/net/ice/base/ice_switch.h | 2 +-
drivers/net/ice/base/ice_type.h | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ed7dfae8c..81a331b41 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ADMINQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_alloc.h b/drivers/net/ice/base/ice_alloc.h
index 78831045b..cf823a2c2 100644
--- a/drivers/net/ice/base/ice_alloc.h
+++ b/drivers/net/ice/base/ice_alloc.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ALLOC_H_
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1c381b5e2..ae0e7fc5f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 72560fbbf..cc7a77747 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_COMMON_H_
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 1c0830cec..f3404023a 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h
index db2db9389..182db6754 100644
--- a/drivers/net/ice/base/ice_controlq.h
+++ b/drivers/net/ice/base/ice_controlq.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_CONTROLQ_H_
diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h
index 87f17ab91..5f1ac0422 100644
--- a/drivers/net/ice/base/ice_devids.h
+++ b/drivers/net/ice/base/ice_devids.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_DEVIDS_H_
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 1bb865896..951c2051f 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLEX_TYPE_H_
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 3db10cd6f..bad925c8c 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLOW_H_
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 8c79891ad..e63e41133 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
/* Machine-generated file; do not edit */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index b1963b5eb..8c9902994 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_LAN_TX_RX_H_
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 8d3d0b0ed..b770abfd0 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index f96964d86..6b3bd6542 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_PROTOCOL_TYPE_H_
diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h
index 6dff37871..70a019292 100644
--- a/drivers/net/ice/base/ice_sbq_cmd.h
+++ b/drivers/net/ice/base/ice_sbq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SBQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2dd9f6f6c..8773e62a9 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_sched.h"
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 09de765ff..92377a82e 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SCHED_H_
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index 898bfa6d8..cd561b0a4 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_STATUS_H_
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e47c1d845..a1c29d606 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_switch.h"
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 3cc2c10e8..13525d8d0 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SWITCH_H_
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 25d64477f..90736faa1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_TYPE_H_
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 27/37] net/ice/base: fix static analysis reported issues
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (25 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 26/37] net/ice/base: update copyright time Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 28/37] net/ice/base: return config error without queue to disable Qi Zhang
` (9 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
Klocwork points out some code is unreachable in
ice_get_itr_intrl_gran and ice_ptg_find_ptype.
The patch removed the unreachable code and resolved the static
analysis reported issues.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 12 ++----------
drivers/net/ice/base/ice_flex_pipe.c | 7 +------
2 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ae0e7fc5f..2362dd774 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -741,7 +741,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
*/
-static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
+static void ice_get_itr_intrl_gran(struct ice_hw *hw)
{
u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &
GL_PWR_MODE_CTL_CAR_MAX_BW_M) >>
@@ -758,13 +758,7 @@ static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
hw->itr_gran = ICE_ITR_GRAN_MAX_25;
hw->intrl_gran = ICE_INTRL_GRAN_MAX_25;
break;
- default:
- ice_debug(hw, ICE_DBG_INIT,
- "Failed to determine itr/intrl granularity\n");
- return ICE_ERR_CFG;
}
-
- return ICE_SUCCESS;
}
/**
@@ -795,9 +789,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
return status;
- status = ice_get_itr_intrl_gran(hw);
- if (status)
- return status;
+ ice_get_itr_intrl_gran(hw);
status = ice_init_all_ctrlq(hw);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 1dd121b28..525378079 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4288,17 +4288,12 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
p->tcam_count = map->ptype_count;
for (i = 0; i < map->ptype_count; i++) {
- enum ice_status status;
u8 ptg;
p->tcam[i].prof_id = map->prof_id;
p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
- status = ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
- if (status) {
- ice_free(hw, p);
- return status;
- }
+ ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
p->tcam[i].ptg = ptg;
}
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 28/37] net/ice/base: return config error without queue to disable
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (26 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 27/37] net/ice/base: fix static analysis reported issues Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 29/37] net/ice/base: add function to check FW recovery mode Qi Zhang
` (8 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Akeem G Abodunrin
If there is no queue to disable, return appropriate configuration error
earlier without acquiring the lock.
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2362dd774..c35a2f91d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3654,14 +3654,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
return ICE_ERR_CFG;
- /* if queue is disabled already yet the disable queue command has to be
- * sent to complete the VF reset, then call ice_aq_dis_lan_txq without
- * any queue information
- */
- if (!num_queues && rst_src)
- return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src, vmvf_num,
- NULL);
+ if (!num_queues) {
+ /* if queue is disabled already yet the disable queue command
+ * has to be sent to complete the VF reset, then call
+ * ice_aq_dis_lan_txq without any queue information
+ */
+ if (rst_src)
+ return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,
+ vmvf_num, NULL);
+ return ICE_ERR_CFG;
+ }
ice_acquire_lock(&pi->sched_lock);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 29/37] net/ice/base: add function to check FW recovery mode
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (27 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 28/37] net/ice/base: return config error without queue to disable Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 30/37] net/ice/base: change profile id reference counting Qi Zhang
` (7 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Code added to check the FW recovery mode. This function will be
used by the drivers during init to check whether the FW is in
recovery mode or not. If FW is in recovery mode then the drivers
need to run in a recovery mode where it can allow only limited
operations. Link should be down, allow only certain AQ commands
etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 15 +++++++++++++++
drivers/net/ice/base/ice_common.h | 8 ++++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index c35a2f91d..2ebf95eed 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3915,3 +3915,18 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
ice_debug(hw, ICE_DBG_SCHED, "query element failed\n");
return status;
}
+
+/**
+ * ice_is_fw_in_rec_mode
+ * @hw: pointer to the HW struct
+ *
+ * This function returns true if fw is in recovery mode
+ */
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw)
+{
+ u32 reg;
+
+ /* check the current FW mode */
+ reg = rd32(hw, GL_MNG_FWSM);
+ return (reg & GL_MNG_FWSM_FW_MODES_M) > ICE_FW_MODE_DBG;
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index cc7a77747..9665f3204 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -10,6 +10,13 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+enum ice_fw_modes {
+ ICE_FW_MODE_NORMAL,
+ ICE_FW_MODE_DBG,
+ ICE_FW_MODE_REC,
+ ICE_FW_MODE_DBG_REC
+};
+
enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
void
@@ -188,4 +195,5 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
enum ice_status
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_get_elem *buf);
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw);
#endif /* _ICE_COMMON_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 30/37] net/ice/base: change profile id reference counting
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (28 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 29/37] net/ice/base: add function to check FW recovery mode Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 31/37] net/ice/base: add DCB support Qi Zhang
` (6 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Improved the profile reference counting, by moving it from being
based on how many TCAM entries using the profile to how many
profile map entries are using the profile.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 70 ++++++++++++++++++++----------------
drivers/net/ice/base/ice_flex_type.h | 1 +
2 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 525378079..99108d81c 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2816,6 +2816,30 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
}
/**
+ * ice_write_es - write an extraction sequence to hardware
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write the extraction sequence
+ * @prof_id: the profile ID to write
+ * @fv: pointer to the extraction sequence to write - NULL to clear extraction
+ */
+static void
+ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
+ struct ice_fv_word *fv)
+{
+ u16 off;
+
+ off = prof_id * hw->blk[blk].es.fvw;
+ if (!fv) {
+ ice_memset(&hw->blk[blk].es.t[off], 0, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_MEM);
+ hw->blk[blk].es.written[prof_id] = false;
+ } else {
+ ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_TO_NONDMA);
+ }
+}
+
+/**
* ice_prof_dec_ref - decrement reference count for profile
* @hw: pointer to the HW struct
* @blk: the block from which to free the profile ID
@@ -2828,31 +2852,15 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
return ICE_ERR_PARAM;
if (hw->blk[blk].es.ref_count[prof_id] > 0) {
- if (!--hw->blk[blk].es.ref_count[prof_id])
+ if (!--hw->blk[blk].es.ref_count[prof_id]) {
+ ice_write_es(hw, blk, prof_id, NULL);
return ice_free_prof_id(hw, blk, prof_id);
+ }
}
return ICE_SUCCESS;
}
-/**
- * ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the HW struct
- * @blk: the block in which to write the extraction sequence
- * @prof_id: the profile ID to write
- * @fv: pointer to the extraction sequence to write
- */
-static void
-ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
- struct ice_fv_word *fv)
-{
- u16 off;
-
- off = prof_id * hw->blk[blk].es.fvw;
- ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw * 2,
- ICE_NONDMA_TO_NONDMA);
-}
-
/* Block / table section IDs */
static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
/* SWITCH */
@@ -3140,6 +3148,7 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].es.resource_used_hack);
ice_free(hw, hw->blk[i].prof.resource_used_hack);
+ ice_free(hw, hw->blk[i].es.written);
}
ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);
@@ -3309,6 +3318,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
es->ref_count = (u16 *)
ice_calloc(hw, es->count, sizeof(*es->ref_count));
+ es->written = (u8 *)
+ ice_calloc(hw, es->count, sizeof(*es->written));
+
if (!es->ref_count)
goto err;
@@ -3805,6 +3817,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
ice_write_es(hw, blk, prof_id, es);
}
+ ice_prof_inc_ref(hw, blk, prof_id);
+
/* add profile info */
prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof));
@@ -3984,10 +3998,6 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < prof->tcam_count; i++) {
prof->tcam[i].in_use = false;
status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
- if (!status)
- status = ice_prof_dec_ref(hw, blk,
- prof->tcam[i].prof_id);
-
if (status)
return ICE_ERR_HW_TABLE;
}
@@ -4159,6 +4169,9 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
+ /* dereference profile, and possibly remove */
+ ice_prof_dec_ref(hw, blk, pmap->prof_id);
+
LIST_DEL(&pmap->list);
ice_free(hw, pmap);
@@ -4194,7 +4207,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
if (status)
goto err_ice_get_prof_ptgs;
- if (add || !hw->blk[blk].es.ref_count[map->prof_id]) {
+ if (add || !hw->blk[blk].es.written[map->prof_id]) {
/* add PTG to change list */
p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
if (!p)
@@ -4205,9 +4218,11 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
p->ptg = ptg;
p->add_ptg = add;
- p->add_prof = !hw->blk[blk].es.ref_count[map->prof_id];
+ p->add_prof = !hw->blk[blk].es.written[map->prof_id];
p->prof_id = map->prof_id;
+ hw->blk[blk].es.written[map->prof_id] = true;
+
LIST_ADD(&p->list_entry, chg);
}
}
@@ -4555,11 +4570,6 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many TCAM entries
- * are using this HW profile ID
- */
- status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
-
/* log change */
LIST_ADD(&p->list_entry, chg);
}
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 951c2051f..365f33390 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -497,6 +497,7 @@ struct ice_es {
u16 count;
u16 fvw;
u16 *ref_count;
+ u8 *written;
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 31/37] net/ice/base: add DCB support
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (29 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 30/37] net/ice/base: change profile id reference counting Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 32/37] net/ice/base: add FDIR support Qi Zhang
` (5 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add module to support DCB related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 243 ++++++
drivers/net/ice/base/ice_common.c | 12 +
drivers/net/ice/base/ice_dcb.c | 1393 +++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 ++++++
drivers/net/ice/base/ice_status.h | 1 +
drivers/net/ice/base/ice_type.h | 14 +-
drivers/net/ice/base/meson.build | 1 +
8 files changed, 1884 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 61846cae2..89d21334e 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -51,6 +51,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_switch.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 81a331b41..4c5cf5419 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -100,6 +100,7 @@ struct ice_aqc_list_caps_elem {
__le16 cap;
#define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005
#define ICE_AQC_CAPS_VSI 0x0017
+#define ICE_AQC_CAPS_DCB 0x0018
#define ICE_AQC_CAPS_RSS 0x0040
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
@@ -894,6 +895,40 @@ struct ice_aqc_sw_rules_elem {
#pragma pack()
+/* PFC Ignore (direct 0x0301)
+ * The command and response use the same descriptor structure
+ */
+struct ice_aqc_pfc_ignore {
+ u8 tc_bitmap;
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_PFC_IGNORE_SET BIT(7)
+#define ICE_AQC_PFC_IGNORE_CLEAR 0
+ u8 reserved[14];
+};
+
+/* Set PFC Mode (direct 0x0303)
+ * Query PFC Mode (direct 0x0302)
+ */
+struct ice_aqc_set_query_pfc_mode {
+ u8 pfc_mode;
+/* For Set Command response, reserved in all other cases */
+#define ICE_AQC_PFC_NOT_CONFIGURED 0
+/* For Query Command response, reserved in all other cases */
+#define ICE_AQC_DCB_DIS 0
+#define ICE_AQC_PFC_VLAN_BASED_PFC 1
+#define ICE_AQC_PFC_DSCP_BASED_PFC 2
+ u8 rsvd[15];
+};
+
+/* Set DCB Parameters (direct 0x0306) */
+struct ice_aqc_set_dcb_params {
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG BIT(0)
+ u8 valid_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG_VALID BIT(0)
+ u8 rsvd[14];
+};
+
/* Get Default Topology (indirect 0x0400) */
struct ice_aqc_get_topo {
@@ -1027,6 +1062,32 @@ struct ice_aqc_delete_elem {
};
+/* Query Port ETS (indirect 0x040E)
+ *
+ * This indirect command is used to query port TC node configuration.
+ */
+struct ice_aqc_query_port_ets {
+ __le32 port_teid;
+ __le32 reserved;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_port_ets_elem {
+ u8 tc_valid_bits;
+ u8 reserved[3];
+ /* 3 bits for UP per TC 0-7, 4th byte reserved */
+ __le32 up2tc;
+ u8 tc_bw_share[8];
+ __le32 port_eir_prof_id;
+ __le32 port_cir_prof_id;
+ /* 3 bits per Node priority to TC 0-7, 4th byte reserved */
+ __le32 tc_node_prio;
+#define ICE_TC_NODE_PRIO_S 0x4
+ u8 reserved1[4];
+ __le32 tc_node_teid[8]; /* Used for response, reserved in command */
+};
+
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
@@ -1578,6 +1639,157 @@ struct ice_aqc_nvm_checksum {
+/* Get LLDP MIB (indirect 0x0A00)
+ * Note: This is also used by the LLDP MIB Change Event (0x0A01)
+ * as the format is the same.
+ */
+struct ice_aqc_lldp_get_mib {
+ u8 type;
+#define ICE_AQ_LLDP_MIB_TYPE_S 0
+#define ICE_AQ_LLDP_MIB_TYPE_M (0x3 << ICE_AQ_LLDP_MIB_TYPE_S)
+#define ICE_AQ_LLDP_MIB_LOCAL 0
+#define ICE_AQ_LLDP_MIB_REMOTE 1
+#define ICE_AQ_LLDP_MIB_LOCAL_AND_REMOTE 2
+#define ICE_AQ_LLDP_BRID_TYPE_S 2
+#define ICE_AQ_LLDP_BRID_TYPE_M (0x3 << ICE_AQ_LLDP_BRID_TYPE_S)
+#define ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID 0
+#define ICE_AQ_LLDP_BRID_TYPE_NON_TPMR 1
+/* Tx pause flags in the 0xA01 event use ICE_AQ_LLDP_TX_* */
+#define ICE_AQ_LLDP_TX_S 0x4
+#define ICE_AQ_LLDP_TX_M (0x03 << ICE_AQ_LLDP_TX_S)
+#define ICE_AQ_LLDP_TX_ACTIVE 0
+#define ICE_AQ_LLDP_TX_SUSPENDED 1
+#define ICE_AQ_LLDP_TX_FLUSHED 3
+/* The following bytes are reserved for the Get LLDP MIB command (0x0A00)
+ * and in the LLDP MIB Change Event (0x0A01). They are valid for the
+ * Get LLDP MIB (0x0A00) response only.
+ */
+ u8 reserved1;
+ __le16 local_len;
+ __le16 remote_len;
+ u8 reserved2[2];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Configure LLDP MIB Change Event (direct 0x0A01) */
+/* For MIB Change Event use ice_aqc_lldp_get_mib structure above */
+struct ice_aqc_lldp_set_mib_change {
+ u8 command;
+#define ICE_AQ_LLDP_MIB_UPDATE_ENABLE 0x0
+#define ICE_AQ_LLDP_MIB_UPDATE_DIS 0x1
+ u8 reserved[15];
+};
+
+/* Add LLDP TLV (indirect 0x0A02)
+ * Delete LLDP TLV (indirect 0x0A04)
+ */
+struct ice_aqc_lldp_add_delete_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved1[1];
+ __le16 len;
+ u8 reserved2[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Update LLDP TLV (indirect 0x0A03) */
+struct ice_aqc_lldp_update_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved;
+ __le16 old_len;
+ __le16 new_offset;
+ __le16 new_len;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Stop LLDP (direct 0x0A05) */
+struct ice_aqc_lldp_stop {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_STATE_MASK BIT(0)
+#define ICE_AQ_LLDP_AGENT_STOP 0x0
+#define ICE_AQ_LLDP_AGENT_SHUTDOWN ICE_AQ_LLDP_AGENT_STATE_MASK
+#define ICE_AQ_LLDP_AGENT_PERSIST_DIS BIT(1)
+ u8 reserved[15];
+};
+
+/* Start LLDP (direct 0x0A06) */
+struct ice_aqc_lldp_start {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_START BIT(0)
+#define ICE_AQ_LLDP_AGENT_PERSIST_ENA BIT(1)
+ u8 reserved[15];
+};
+
+/* Get CEE DCBX Oper Config (0x0A07)
+ * The command uses the generic descriptor struct and
+ * returns the struct below as an indirect response.
+ */
+struct ice_aqc_get_cee_dcb_cfg_resp {
+ u8 oper_num_tc;
+ u8 oper_prio_tc[4];
+ u8 oper_tc_bw[8];
+ u8 oper_pfc_en;
+ __le16 oper_app_prio;
+#define ICE_AQC_CEE_APP_FCOE_S 0
+#define ICE_AQC_CEE_APP_FCOE_M (0x7 << ICE_AQC_CEE_APP_FCOE_S)
+#define ICE_AQC_CEE_APP_ISCSI_S 3
+#define ICE_AQC_CEE_APP_ISCSI_M (0x7 << ICE_AQC_CEE_APP_ISCSI_S)
+#define ICE_AQC_CEE_APP_FIP_S 8
+#define ICE_AQC_CEE_APP_FIP_M (0x7 << ICE_AQC_CEE_APP_FIP_S)
+ __le32 tlv_status;
+#define ICE_AQC_CEE_PG_STATUS_S 0
+#define ICE_AQC_CEE_PG_STATUS_M (0x7 << ICE_AQC_CEE_PG_STATUS_S)
+#define ICE_AQC_CEE_PFC_STATUS_S 3
+#define ICE_AQC_CEE_PFC_STATUS_M (0x7 << ICE_AQC_CEE_PFC_STATUS_S)
+#define ICE_AQC_CEE_FCOE_STATUS_S 8
+#define ICE_AQC_CEE_FCOE_STATUS_M (0x7 << ICE_AQC_CEE_FCOE_STATUS_S)
+#define ICE_AQC_CEE_ISCSI_STATUS_S 11
+#define ICE_AQC_CEE_ISCSI_STATUS_M (0x7 << ICE_AQC_CEE_ISCSI_STATUS_S)
+#define ICE_AQC_CEE_FIP_STATUS_S 16
+#define ICE_AQC_CEE_FIP_STATUS_M (0x7 << ICE_AQC_CEE_FIP_STATUS_S)
+ u8 reserved[12];
+};
+
+/* Set Local LLDP MIB (indirect 0x0A08)
+ * Used to replace the local MIB of a given LLDP agent. e.g. DCBx
+ */
+struct ice_aqc_lldp_set_local_mib {
+ u8 type;
+#define SET_LOCAL_MIB_TYPE_DCBX_M BIT(0)
+#define SET_LOCAL_MIB_TYPE_LOCAL_MIB 0
+#define SET_LOCAL_MIB_TYPE_CEE_M BIT(1)
+#define SET_LOCAL_MIB_TYPE_CEE_WILLING 0
+#define SET_LOCAL_MIB_TYPE_CEE_NON_WILLING SET_LOCAL_MIB_TYPE_CEE_M
+ u8 reserved0;
+ __le16 length;
+ u8 reserved1[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_lldp_set_local_mib_resp {
+ u8 status;
+#define SET_LOCAL_MIB_RESP_EVENT_M BIT(0)
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_SILENT 0
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_EVENT SET_LOCAL_MIB_RESP_EVENT_M
+ u8 reserved[15];
+};
+
+/* Stop/Start LLDP Agent (direct 0x0A09)
+ * Used for stopping/starting specific LLDP agent. e.g. DCBx.
+ * The same structure is used for the response, with the command field
+ * being used as the status field.
+ */
+struct ice_aqc_lldp_stop_start_specific_agent {
+ u8 command;
+#define ICE_AQC_START_STOP_AGENT_M BIT(0)
+#define ICE_AQC_START_STOP_AGENT_STOP_DCBX 0
+#define ICE_AQC_START_STOP_AGENT_START_DCBX ICE_AQC_START_STOP_AGENT_M
+ u8 reserved[15];
+};
+
/* Get/Set RSS key (indirect 0x0B04/0x0B02) */
struct ice_aqc_get_set_rss_key {
@@ -1980,10 +2192,22 @@ struct ice_aq_desc {
struct ice_aqc_query_txsched_res query_sched_res;
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
+ struct ice_aqc_query_port_ets port_ets;
struct ice_aqc_rl_profile rl_profile;
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
+ struct ice_aqc_pfc_ignore pfc_ignore;
+ struct ice_aqc_set_query_pfc_mode set_query_pfc_mode;
+ struct ice_aqc_set_dcb_params set_dcb_params;
+ struct ice_aqc_lldp_get_mib lldp_get_mib;
+ struct ice_aqc_lldp_set_mib_change lldp_set_event;
+ struct ice_aqc_lldp_add_delete_tlv lldp_add_delete_tlv;
+ struct ice_aqc_lldp_update_tlv lldp_update_tlv;
+ struct ice_aqc_lldp_stop lldp_stop;
+ struct ice_aqc_lldp_start lldp_start;
+ struct ice_aqc_lldp_set_local_mib lldp_set_mib;
+ struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
struct ice_aqc_add_txqs add_txqs;
@@ -2096,6 +2320,8 @@ enum ice_adminq_opc {
/* PXE */
ice_aqc_opc_clear_pxe_mode = 0x0110,
+ ice_aqc_opc_config_no_drop_policy = 0x0112,
+
/* internal switch commands */
ice_aqc_opc_get_sw_cfg = 0x0200,
@@ -2127,6 +2353,11 @@ enum ice_adminq_opc {
ice_aqc_opc_get_sw_rules = 0x02A3,
ice_aqc_opc_clear_pf_cfg = 0x02A4,
+ /* DCB commands */
+ ice_aqc_opc_pfc_ignore = 0x0301,
+ ice_aqc_opc_query_pfc_mode = 0x0302,
+ ice_aqc_opc_set_pfc_mode = 0x0303,
+ ice_aqc_opc_set_dcb_params = 0x0306,
/* transmit scheduler commands */
ice_aqc_opc_get_dflt_topo = 0x0400,
@@ -2136,6 +2367,7 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
+ ice_aqc_opc_query_port_ets = 0x040E,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
@@ -2166,6 +2398,17 @@ enum ice_adminq_opc {
ice_aqc_opc_nvm_cfg_write = 0x0705,
ice_aqc_opc_nvm_checksum = 0x0706,
+ /* LLDP commands */
+ ice_aqc_opc_lldp_get_mib = 0x0A00,
+ ice_aqc_opc_lldp_set_mib_change = 0x0A01,
+ ice_aqc_opc_lldp_add_tlv = 0x0A02,
+ ice_aqc_opc_lldp_update_tlv = 0x0A03,
+ ice_aqc_opc_lldp_delete_tlv = 0x0A04,
+ ice_aqc_opc_lldp_stop = 0x0A05,
+ ice_aqc_opc_lldp_start = 0x0A06,
+ ice_aqc_opc_get_cee_dcb_cfg = 0x0A07,
+ ice_aqc_opc_lldp_set_local_mib = 0x0A08,
+ ice_aqc_opc_lldp_stop_start_specific_agent = 0x0A09,
/* RSS commands */
ice_aqc_opc_set_rss_key = 0x0B02,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2ebf95eed..202592710 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1930,6 +1930,18 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
number);
}
break;
+ case ICE_AQC_CAPS_DCB:
+ caps->dcb = (number == 1);
+ caps->active_tc_bitmap = logical_id;
+ caps->maxtc = phys_id;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: DCB = %d\n", caps->dcb);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Active TC bitmap = %d\n",
+ caps->active_tc_bitmap);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: TC Max = %d\n", caps->maxtc);
+ break;
case ICE_AQC_CAPS_RSS:
caps->rss_table_size = number;
caps->rss_table_entry_width = logical_id;
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
new file mode 100644
index 000000000..a7810578d
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -0,0 +1,1393 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_sched.h"
+#include "ice_dcb.h"
+
+/**
+ * ice_aq_get_lldp_mib
+ * @hw: pointer to the HW struct
+ * @bridge_type: type of bridge requested
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @local_len: length of the returned Local LLDP MIB
+ * @remote_len: length of the returned Remote LLDP MIB
+ * @cd: pointer to command details structure or NULL
+ *
+ * Requests the complete LLDP MIB (entire packet). (0x0A00)
+ */
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_get_mib *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.lldp_get_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_get_mib);
+
+ cmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M;
+ cmd->type |= (bridge_type << ICE_AQ_LLDP_BRID_TYPE_S) &
+ ICE_AQ_LLDP_BRID_TYPE_M;
+
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status) {
+ if (local_len)
+ *local_len = LE16_TO_CPU(cmd->local_len);
+ if (remote_len)
+ *remote_len = LE16_TO_CPU(cmd->remote_len);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_cfg_lldp_mib_change
+ * @hw: pointer to the HW struct
+ * @ena_update: Enable or Disable event posting
+ * @cd: pointer to command details structure or NULL
+ *
+ * Enable or Disable posting of an event on ARQ when LLDP MIB
+ * associated with the interface changes (0x0A01)
+ */
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_mib_change *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_event;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_mib_change);
+
+ if (!ena_update)
+ cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_stop_lldp
+ * @hw: pointer to the HW struct
+ * @shutdown_lldp_agent: True if LLDP Agent needs to be Shutdown
+ * False if LLDP Agent needs to be Stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Stop or Shutdown the embedded LLDP Agent (0x0A05)
+ */
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_stop;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_stop);
+
+ if (shutdown_lldp_agent)
+ cmd->command |= ICE_AQ_LLDP_AGENT_SHUTDOWN;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_start_lldp
+ * @hw: pointer to the HW struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start the embedded LLDP Agent on all ports. (0x0A06)
+ */
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_start *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_start;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_start);
+
+ cmd->command = ICE_AQ_LLDP_AGENT_START;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_set_lldp_mib - Set the LLDP MIB
+ * @hw: pointer to the HW struct
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set the LLDP MIB. (0x0A08)
+ */
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_local_mib *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib);
+
+ desc.flags |= CPU_TO_LE16((u16)ICE_AQ_FLAG_RD);
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ cmd->type = mib_type;
+ cmd->length = CPU_TO_LE16(buf_size);
+
+ return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+}
+
+/**
+ * ice_get_dcbx_status
+ * @hw: pointer to the HW struct
+ *
+ * Get the DCBX status from the Firmware
+ */
+u8 ice_get_dcbx_status(struct ice_hw *hw)
+{
+ u32 reg;
+
+ reg = rd32(hw, PRTDCB_GENS);
+ return (u8)((reg & PRTDCB_GENS_DCBX_STATUS_M) >>
+ PRTDCB_GENS_DCBX_STATUS_S);
+}
+
+/**
+ * ice_parse_ieee_ets_common_tlv
+ * @buf: Data buffer to be parsed for ETS CFG/REC data
+ * @ets_cfg: Container to store parsed data
+ *
+ * Parses the common data of IEEE 802.1Qaz ETS CFG/REC TLV
+ */
+static void
+ice_parse_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ ets_cfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>
+ ICE_IEEE_ETS_PRIO_1_S);
+ ets_cfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>
+ ICE_IEEE_ETS_PRIO_0_S);
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 9 | 10| 11| 12| 13| 14| 15| 16|
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ ets_cfg->tcbwtable[i] = buf[offset];
+ ets_cfg->tsatable[i] = buf[ICE_MAX_TRAFFIC_CLASS + offset++];
+ }
+}
+
+/**
+ * ice_parse_ieee_etscfg_tlv
+ * @tlv: IEEE 802.1Qaz ETS CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_parse_ieee_etscfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ etscfg->willing = ((buf[0] & ICE_IEEE_ETS_WILLING_M) >>
+ ICE_IEEE_ETS_WILLING_S);
+ etscfg->cbs = ((buf[0] & ICE_IEEE_ETS_CBS_M) >> ICE_IEEE_ETS_CBS_S);
+ etscfg->maxtcs = ((buf[0] & ICE_IEEE_ETS_MAXTC_M) >>
+ ICE_IEEE_ETS_MAXTC_S);
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_parse_ieee_etsrec_tlv
+ * @tlv: IEEE 802.1Qaz ETS REC TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Parses IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_parse_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], &dcbcfg->etsrec);
+}
+
+/**
+ * ice_parse_ieee_pfccfg_tlv
+ * @tlv: IEEE 802.1Qaz PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_parse_ieee_pfccfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ dcbcfg->pfc.willing = ((buf[0] & ICE_IEEE_PFC_WILLING_M) >>
+ ICE_IEEE_PFC_WILLING_S);
+ dcbcfg->pfc.mbc = ((buf[0] & ICE_IEEE_PFC_MBC_M) >> ICE_IEEE_PFC_MBC_S);
+ dcbcfg->pfc.pfccap = ((buf[0] & ICE_IEEE_PFC_CAP_M) >>
+ ICE_IEEE_PFC_CAP_S);
+ dcbcfg->pfc.pfcena = buf[1];
+}
+
+/**
+ * ice_parse_ieee_app_tlv
+ * @tlv: IEEE 802.1Qaz APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses IEEE 802.1Qaz APP PRIO TLV
+ */
+static void
+ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 offset = 0;
+ u16 typelen;
+ int i = 0;
+ u16 len;
+ u8 *buf;
+
+ typelen = NTOHS(tlv->typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ buf = tlv->tlvinfo;
+
+ /* Removing sizeof(ouisubtype) and reserved byte from len.
+ * Remaining len div 3 is number of APP TLVs.
+ */
+ len -= (sizeof(tlv->ouisubtype) + 1);
+
+ /* Move offset to App Priority Table */
+ offset++;
+
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (offset < len) {
+ dcbcfg->app[i].priority = ((buf[offset] &
+ ICE_IEEE_APP_PRIO_M) >>
+ ICE_IEEE_APP_PRIO_S);
+ dcbcfg->app[i].selector = ((buf[offset] &
+ ICE_IEEE_APP_SEL_M) >>
+ ICE_IEEE_APP_SEL_S);
+ dcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |
+ buf[offset + 2];
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+
+ dcbcfg->numapps = i;
+}
+
+/**
+ * ice_parse_ieee_tlv
+ * @tlv: IEEE 802.1Qaz TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_ieee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u8 subtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ switch (subtype) {
+ case ICE_IEEE_SUBTYPE_ETS_CFG:
+ ice_parse_ieee_etscfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_ETS_REC:
+ ice_parse_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_PFC_CFG:
+ ice_parse_ieee_pfccfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_APP_PRI:
+ ice_parse_ieee_app_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_parse_cee_pgcfg_tlv
+ * @tlv: CEE DCBX PG CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses CEE DCBX PG CFG TLV
+ */
+static void
+ice_parse_cee_pgcfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u16 offset = 0;
+ int i;
+
+ etscfg = &dcbcfg->etscfg;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ etscfg->willing = 1;
+
+ etscfg->cbs = 0;
+ /* Priority Group Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ etscfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ etscfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ offset++;
+ }
+
+ /* PG Percentage Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |pg0|pg1|pg2|pg3|pg4|pg5|pg6|pg7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i)
+ etscfg->tcbwtable[i] = buf[offset++];
+
+ /* Number of TCs supported (1 octet) */
+ etscfg->maxtcs = buf[offset];
+}
+
+/**
+ * ice_parse_cee_pfccfg_tlv
+ * @tlv: CEE DCBX PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses CEE DCBX PFC CFG TLV
+ */
+static void
+ice_parse_cee_pfccfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ dcbcfg->pfc.willing = 1;
+
+ /* ------------------------
+ * | PFC Enable | PFC TCs |
+ * ------------------------
+ * | 1 octet | 1 octet |
+ */
+ dcbcfg->pfc.pfcena = buf[0];
+ dcbcfg->pfc.pfccap = buf[1];
+}
+
+/**
+ * ice_parse_cee_app_tlv
+ * @tlv: CEE DCBX APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses CEE DCBX APP PRIO TLV
+ */
+static void
+ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, typelen, offset = 0;
+ struct ice_cee_app_prio *app;
+ u8 i;
+
+ typelen = NTOHS(tlv->hdr.typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+
+ dcbcfg->numapps = len / sizeof(*app);
+ if (!dcbcfg->numapps)
+ return;
+ if (dcbcfg->numapps > ICE_DCBX_MAX_APPS)
+ dcbcfg->numapps = ICE_DCBX_MAX_APPS;
+
+ for (i = 0; i < dcbcfg->numapps; i++) {
+ u8 up, selector;
+
+ app = (struct ice_cee_app_prio *)(tlv->tlvinfo + offset);
+ for (up = 0; up < ICE_MAX_USER_PRIORITY; up++)
+ if (app->prio_map & BIT(up))
+ break;
+
+ dcbcfg->app[i].priority = up;
+
+ /* Get Selector from lower 2 bits, and convert to IEEE */
+ selector = (app->upper_oui_sel & ICE_CEE_APP_SELECTOR_M);
+ switch (selector) {
+ case ICE_CEE_APP_SEL_ETHTYPE:
+ dcbcfg->app[i].selector = ICE_APP_SEL_ETHTYPE;
+ break;
+ case ICE_CEE_APP_SEL_TCPIP:
+ dcbcfg->app[i].selector = ICE_APP_SEL_TCPIP;
+ break;
+ default:
+ /* Keep selector as it is for unknown types */
+ dcbcfg->app[i].selector = selector;
+ }
+
+ dcbcfg->app[i].prot_id = NTOHS(app->protocol);
+ /* Move to next app */
+ offset += sizeof(*app);
+ }
+}
+
+/**
+ * ice_parse_cee_tlv
+ * @tlv: CEE DCBX TLV
+ * @dcbcfg: Local store to update DCBX config data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_cee_feat_tlv *sub_tlv;
+ u8 subtype, feat_tlv_count = 0;
+ u16 len, tlvlen, typelen;
+ u32 ouisubtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ /* Return if not CEE DCBX */
+ if (subtype != ICE_CEE_DCBX_TYPE)
+ return;
+
+ typelen = NTOHS(tlv->typelen);
+ tlvlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ len = sizeof(tlv->typelen) + sizeof(ouisubtype) +
+ sizeof(struct ice_cee_ctrl_tlv);
+ /* Return if no CEE DCBX Feature TLVs */
+ if (tlvlen <= len)
+ return;
+
+ sub_tlv = (struct ice_cee_feat_tlv *)((char *)tlv + len);
+ while (feat_tlv_count < ICE_CEE_MAX_FEAT_TYPE) {
+ u16 sublen;
+
+ typelen = NTOHS(sub_tlv->hdr.typelen);
+ sublen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ subtype = (u8)((typelen & ICE_LLDP_TLV_TYPE_M) >>
+ ICE_LLDP_TLV_TYPE_S);
+ switch (subtype) {
+ case ICE_CEE_SUBTYPE_PG_CFG:
+ ice_parse_cee_pgcfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_PFC_CFG:
+ ice_parse_cee_pfccfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_APP_PRI:
+ ice_parse_cee_app_tlv(sub_tlv, dcbcfg);
+ break;
+ default:
+ return; /* Invalid Sub-type return */
+ }
+ feat_tlv_count++;
+ /* Move to next sub TLV */
+ sub_tlv = (struct ice_cee_feat_tlv *)
+ ((char *)sub_tlv + sizeof(sub_tlv->hdr.typelen) +
+ sublen);
+ }
+}
+
+/**
+ * ice_parse_org_tlv
+ * @tlv: Organization specific TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Currently only IEEE 802.1Qaz TLV is supported, all others
+ * will be returned
+ */
+static void
+ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u32 oui;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ oui = ((ouisubtype & ICE_LLDP_TLV_OUI_M) >> ICE_LLDP_TLV_OUI_S);
+ switch (oui) {
+ case ICE_IEEE_8021QAZ_OUI:
+ ice_parse_ieee_tlv(tlv, dcbcfg);
+ break;
+ case ICE_CEE_DCBX_OUI:
+ ice_parse_cee_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_lldp_to_dcb_cfg
+ * @lldpmib: LLDPDU to be parsed
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Parse DCB configuration from the LLDPDU
+ */
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_lldp_org_tlv *tlv;
+ enum ice_status ret = ICE_SUCCESS;
+ u16 offset = 0;
+ u16 typelen;
+ u16 type;
+ u16 len;
+
+ if (!lldpmib || !dcbcfg)
+ return ICE_ERR_PARAM;
+
+ /* set to the start of LLDPDU */
+ lldpmib += ETH_HEADER_LEN;
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ typelen = NTOHS(tlv->typelen);
+ type = ((typelen & ICE_LLDP_TLV_TYPE_M) >> ICE_LLDP_TLV_TYPE_S);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ offset += sizeof(typelen) + len;
+
+ /* END TLV or beyond LLDPDU size */
+ if (type == ICE_TLV_TYPE_END || offset > ICE_LLDPDU_SIZE)
+ break;
+
+ switch (type) {
+ case ICE_TLV_TYPE_ORG:
+ ice_parse_org_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+
+ /* Move to next TLV */
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_aq_get_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @mib_type: mib type for the query
+ * @bridgetype: bridge type for the query (remote)
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Query DCB configuration from the firmware
+ */
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ enum ice_status ret;
+ u8 *lldpmib;
+
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ ret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,
+ ICE_LLDPDU_SIZE, NULL, NULL, NULL);
+
+ if (ret == ICE_SUCCESS)
+ /* Parse LLDP MIB to get DCB configuration */
+ ret = ice_lldp_to_dcb_cfg(lldpmib, dcbcfg);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_start_stop_dcbx - Start/Stop DCBx service in FW
+ * @hw: pointer to the HW struct
+ * @start_dcbx_agent: True if DCBx Agent needs to be started
+ * False if DCBx Agent needs to be stopped
+ * @dcbx_agent_status: FW indicates back the DCBx agent status
+ * True if DCBx Agent is active
+ * False if DCBx Agent is stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start/Stop the embedded dcbx Agent. In case that this wrapper function
+ * returns ICE_SUCCESS, caller will need to check if FW returns back the same
+ * value as stated in dcbx_agent_status, and react accordingly. (0x0A09)
+ */
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop_start_specific_agent *cmd;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+ u16 opcode;
+
+ cmd = &desc.params.lldp_agent_ctrl;
+
+ opcode = ice_aqc_opc_lldp_stop_start_specific_agent;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, opcode);
+
+ if (start_dcbx_agent)
+ cmd->command = ICE_AQC_START_STOP_AGENT_START_DCBX;
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+
+ *dcbx_agent_status = false;
+
+ if (status == ICE_SUCCESS &&
+ cmd->command == ICE_AQC_START_STOP_AGENT_START_DCBX)
+ *dcbx_agent_status = true;
+
+ return status;
+}
+
+/**
+ * ice_aq_get_cee_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @buff: response buffer that stores CEE operational configuration
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get CEE DCBX mode operational configuration from firmware (0x0A07)
+ */
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cee_dcb_cfg);
+
+ return ice_aq_send_cmd(hw, &desc, (void *)buff, sizeof(*buff), cd);
+}
+
+/**
+ * ice_cee_to_dcb_cfg
+ * @cee_cfg: pointer to CEE configuration struct
+ * @dcbcfg: DCB configuration struct
+ *
+ * Convert CEE configuration from firmware to DCB configuration
+ */
+static void
+ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
+ u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
+ u16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);
+ u8 i, err, sync, oper, app_index, ice_app_sel_type;
+ u16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;
+ u16 ice_app_prot_id_type;
+
+ /* CEE PG data to ETS config */
+ dcbcfg->etscfg.maxtcs = cee_cfg->oper_num_tc;
+
+ /* Note that the FW creates the oper_prio_tc nibbles reversed
+ * from those in the CEE Priority Group sub-TLV.
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ dcbcfg->etscfg.prio_table[i * 2] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ dcbcfg->etscfg.prio_table[i * 2 + 1] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ }
+
+ ice_for_each_traffic_class(i) {
+ dcbcfg->etscfg.tcbwtable[i] = cee_cfg->oper_tc_bw[i];
+
+ if (dcbcfg->etscfg.prio_table[i] == ICE_CEE_PGID_STRICT) {
+ /* Map it to next empty TC */
+ dcbcfg->etscfg.prio_table[i] = cee_cfg->oper_num_tc - 1;
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_STRICT;
+ } else {
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_ETS;
+ }
+ }
+
+ /* CEE PFC data to ETS config */
+ dcbcfg->pfc.pfcena = cee_cfg->oper_pfc_en;
+ dcbcfg->pfc.pfccap = ICE_MAX_TRAFFIC_CLASS;
+
+ app_index = 0;
+ for (i = 0; i < 3; i++) {
+ if (i == 0) {
+ /* FCoE APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FCOE_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FCOE_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FCOE_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FCOE_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FCOE;
+ } else if (i == 1) {
+ /* iSCSI APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_ISCSI_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_ISCSI_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_ISCSI_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_ISCSI_S;
+ ice_app_sel_type = ICE_APP_SEL_TCPIP;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_ISCSI;
+ } else {
+ /* FIP APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FIP_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FIP_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FIP_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FIP_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FIP;
+ }
+
+ status = (tlv_status & ice_aqc_cee_status_mask) >>
+ ice_aqc_cee_status_shift;
+ err = (status & ICE_TLV_STATUS_ERR) ? 1 : 0;
+ sync = (status & ICE_TLV_STATUS_SYNC) ? 1 : 0;
+ oper = (status & ICE_TLV_STATUS_OPER) ? 1 : 0;
+ /* Add FCoE/iSCSI/FIP APP if Error is False and
+ * Oper/Sync is True
+ */
+ if (!err && sync && oper) {
+ dcbcfg->app[app_index].priority =
+ (app_prio & ice_aqc_cee_app_mask) >>
+ ice_aqc_cee_app_shift;
+ dcbcfg->app[app_index].selector = ice_app_sel_type;
+ dcbcfg->app[app_index].prot_id = ice_app_prot_id_type;
+ app_index++;
+ }
+ }
+
+ dcbcfg->numapps = app_index;
+}
+
+/**
+ * ice_get_ieee_dcb_cfg
+ * @pi: port information structure
+ * @dcbx_mode: mode of DCBX (IEEE or CEE)
+ *
+ * Get IEEE or CEE mode DCB configuration from the Firmware
+ */
+STATIC enum ice_status
+ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
+{
+ struct ice_dcbx_cfg *dcbx_cfg = NULL;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ if (dcbx_mode == ICE_DCBX_MODE_IEEE)
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ else if (dcbx_mode == ICE_DCBX_MODE_CEE)
+ dcbx_cfg = &pi->desired_dcbx_cfg;
+
+ /* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE
+ * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE
+ */
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ if (ret)
+ goto out;
+
+ /* Get Remote DCB Config */
+ dcbx_cfg = &pi->remote_dcbx_cfg;
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ /* Don't treat ENOENT as an error for Remote MIBs */
+ if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+ ret = ICE_SUCCESS;
+
+out:
+ return ret;
+}
+
+/**
+ * ice_get_dcb_cfg
+ * @pi: port information structure
+ *
+ * Get DCB configuration from the Firmware
+ */
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
+{
+ struct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;
+ struct ice_dcbx_cfg *dcbx_cfg;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
+ if (ret == ICE_SUCCESS) {
+ /* CEE mode */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
+ dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
+ ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
+ } else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
+ /* CEE mode not enabled try querying IEEE data */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_init_dcb
+ * @hw: pointer to the HW struct
+ *
+ * Update DCB configuration from the Firmware
+ */
+enum ice_status ice_init_dcb(struct ice_hw *hw)
+{
+ struct ice_port_info *pi = hw->port_info;
+ enum ice_status ret = ICE_SUCCESS;
+
+ if (!hw->func_caps.common_cap.dcb)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ pi->is_sw_lldp = true;
+
+ /* Get DCBX status */
+ pi->dcbx_status = ice_get_dcbx_status(hw);
+
+ if (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||
+ pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS) {
+ /* Get current DCBX configuration */
+ ret = ice_get_dcb_cfg(pi);
+ pi->is_sw_lldp = (hw->adminq.sq_last_status == ICE_AQ_RC_EPERM);
+ if (ret)
+ return ret;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {
+ return ICE_ERR_NOT_READY;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_MULTIPLE_PEERS) {
+ }
+
+ /* Configure the LLDP MIB change event */
+ ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);
+ if (!ret)
+ pi->is_sw_lldp = false;
+
+ return ret;
+}
+
+/**
+ * ice_add_ieee_ets_common_tlv
+ * @buf: Data buffer to be populated with ice_dcb_ets_cfg data
+ * @ets_cfg: Container for ice_dcb_ets_cfg data
+ *
+ * Populate the TLV buffer with ice_dcb_ets_cfg data
+ */
+static void
+ice_add_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 priority0, priority1;
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ priority0 = ets_cfg->prio_table[i * 2] & 0xF;
+ priority1 = ets_cfg->prio_table[i * 2 + 1] & 0xF;
+ buf[offset] = (priority0 << ICE_IEEE_ETS_PRIO_1_S) | priority1;
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ buf[offset] = ets_cfg->tcbwtable[i];
+ buf[ICE_MAX_TRAFFIC_CLASS + offset] = ets_cfg->tsatable[i];
+ offset++;
+ }
+}
+
+/**
+ * ice_add_ieee_ets_tlv - Prepare ETS TLV in IEEE format
+ * @tlv: Fill the ETS config data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_add_ieee_ets_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u8 maxtcwilling = 0;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ if (etscfg->willing)
+ maxtcwilling = BIT(ICE_IEEE_ETS_WILLING_S);
+ maxtcwilling |= etscfg->maxtcs & ICE_IEEE_ETS_MAXTC_M;
+ buf[0] = maxtcwilling;
+
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_add_ieee_etsrec_tlv - Prepare ETS Recommended TLV in IEEE format
+ * @tlv: Fill ETS Recommended TLV in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_add_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etsrec;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_REC);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ etsrec = &dcbcfg->etsrec;
+
+ /* First Octet is reserved */
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etsrec);
+}
+
+/**
+ * ice_add_ieee_pfc_tlv - Prepare PFC TLV in IEEE format
+ * @tlv: Fill PFC TLV in IEEE format
+ * @dcbcfg: Local store which holds the PFC CFG data
+ *
+ * Prepare IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_add_ieee_pfc_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_PFC_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_PFC_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ if (dcbcfg->pfc.willing)
+ buf[0] = BIT(ICE_IEEE_PFC_WILLING_S);
+
+ if (dcbcfg->pfc.mbc)
+ buf[0] |= BIT(ICE_IEEE_PFC_MBC_S);
+
+ buf[0] |= dcbcfg->pfc.pfccap & 0xF;
+ buf[1] = dcbcfg->pfc.pfcena;
+}
+
+/**
+ * ice_add_ieee_app_pri_tlv - Prepare APP TLV in IEEE format
+ * @tlv: Fill APP TLV in IEEE format
+ * @dcbcfg: Local store which holds the APP CFG data
+ *
+ * Prepare IEEE 802.1Qaz APP CFG TLV
+ */
+static void
+ice_add_ieee_app_pri_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 typelen, len, offset = 0;
+ u8 priority, selector, i = 0;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+
+ /* No APP TLVs then just return */
+ if (dcbcfg->numapps == 0)
+ return;
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_APP_PRI);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* Move offset to App Priority Table */
+ offset++;
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (i < dcbcfg->numapps) {
+ priority = dcbcfg->app[i].priority & 0x7;
+ selector = dcbcfg->app[i].selector & 0x7;
+ buf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;
+ buf[offset + 1] = (dcbcfg->app[i].prot_id >> 0x8) & 0xFF;
+ buf[offset + 2] = dcbcfg->app[i].prot_id & 0xFF;
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+ /* len includes size of ouisubtype + 1 reserved + 3*numapps */
+ len = sizeof(tlv->ouisubtype) + 1 + (i * 3);
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) | (len & 0x1FF));
+ tlv->typelen = HTONS(typelen);
+}
+
+/**
+ * ice_add_dcb_tlv - Add all IEEE TLVs
+ * @tlv: Fill TLV data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ * @tlvid: Type of IEEE TLV
+ *
+ * Add tlv information
+ */
+static void
+ice_add_dcb_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg,
+ u16 tlvid)
+{
+ switch (tlvid) {
+ case ICE_IEEE_TLV_ID_ETS_CFG:
+ ice_add_ieee_ets_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_ETS_REC:
+ ice_add_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_PFC_CFG:
+ ice_add_ieee_pfc_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_APP_PRI:
+ ice_add_ieee_app_pri_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_dcb_cfg_to_lldp - Convert DCB configuration to MIB format
+ * @lldpmib: pointer to the HW struct
+ * @miblen: length of LLDP mib
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Convert the DCB configuration to MIB format
+ */
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, offset = 0, tlvid = ICE_TLV_ID_START;
+ struct ice_lldp_org_tlv *tlv;
+ u16 typelen;
+
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ ice_add_dcb_tlv(tlv, dcbcfg, tlvid++);
+ typelen = NTOHS(tlv->typelen);
+ len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
+ if (len)
+ offset += len + 2;
+ /* END TLV or beyond LLDPDU size */
+ if (tlvid >= ICE_TLV_ID_END_OF_LLDPPDU ||
+ offset > ICE_LLDPDU_SIZE)
+ break;
+ /* Move to next TLV */
+ if (len)
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+ *miblen = offset;
+}
+
+/**
+ * ice_set_dcb_cfg - Set the local LLDP MIB to FW
+ * @pi: port information structure
+ *
+ * Set DCB configuration to the Firmware
+ */
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
+{
+ u8 mib_type, *lldpmib = NULL;
+ struct ice_dcbx_cfg *dcbcfg;
+ enum ice_status ret;
+ struct ice_hw *hw;
+ u16 miblen;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ hw = pi->hw;
+
+ /* update the HW local config */
+ dcbcfg = &pi->local_dcbx_cfg;
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ mib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;
+ if (dcbcfg->app_mode == ICE_DCBX_APPS_NON_WILLING)
+ mib_type |= SET_LOCAL_MIB_TYPE_CEE_NON_WILLING;
+
+ ice_dcb_cfg_to_lldp(lldpmib, &miblen, dcbcfg);
+ ret = ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen,
+ NULL);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration
+ */
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_query_port_ets *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ cmd = &desc.params.port_ets;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_port_ets);
+ cmd->port_teid = pi->root->info.node_teid;
+
+ status = ice_aq_send_cmd(pi->hw, &desc, buf, buf_size, cd);
+ return status;
+}
+
+/**
+ * ice_update_port_tc_tree_cfg - update TC tree configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ *
+ * update the SW DB with the new TC changes
+ */
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf)
+{
+ struct ice_sched_node *node, *tc_node;
+ struct ice_aqc_get_elem elem;
+ enum ice_status status = ICE_SUCCESS;
+ u32 teid1, teid2;
+ u8 i, j;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ /* suspend the missing TC nodes */
+ for (i = 0; i < pi->root->num_children; i++) {
+ teid1 = LE32_TO_CPU(pi->root->children[i]->info.node_teid);
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid1 == teid2)
+ break;
+ }
+ if (j < ICE_MAX_TRAFFIC_CLASS)
+ continue;
+ /* TC is missing */
+ pi->root->children[i]->in_use = false;
+ }
+ /* add the new TC nodes */
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid2 == ICE_INVAL_TEID)
+ continue;
+ /* Is it already present in the tree ? */
+ for (i = 0; i < pi->root->num_children; i++) {
+ tc_node = pi->root->children[i];
+ if (!tc_node)
+ continue;
+ teid1 = LE32_TO_CPU(tc_node->info.node_teid);
+ if (teid1 == teid2) {
+ tc_node->tc_num = j;
+ tc_node->in_use = true;
+ break;
+ }
+ }
+ if (i < pi->root->num_children)
+ continue;
+ /* new TC */
+ status = ice_sched_query_elem(pi->hw, teid2, &elem);
+ if (!status)
+ status = ice_sched_add_node(pi, 1, &elem.generic[0]);
+ if (status)
+ break;
+ /* update the TC number */
+ node = ice_sched_find_node_by_teid(pi->root, teid2);
+ if (node)
+ node->tc_num = j;
+ }
+ return status;
+}
+
+/**
+ * ice_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration and update the
+ * SW DB with the TC changes
+ */
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ enum ice_status status;
+
+ ice_acquire_lock(&pi->sched_lock);
+ status = ice_aq_query_port_ets(pi, buf, buf_size, cd);
+ if (!status)
+ status = ice_update_port_tc_tree_cfg(pi, buf);
+ ice_release_lock(&pi->sched_lock);
+ return status;
+}
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
new file mode 100644
index 000000000..d922c8a29
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -0,0 +1,223 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_DCB_H_
+#define _ICE_DCB_H_
+
+#include "ice_type.h"
+
+#define ICE_DCBX_OFFLOAD_DIS 0
+#define ICE_DCBX_OFFLOAD_ENABLED 1
+
+#define ICE_DCBX_STATUS_NOT_STARTED 0
+#define ICE_DCBX_STATUS_IN_PROGRESS 1
+#define ICE_DCBX_STATUS_DONE 2
+#define ICE_DCBX_STATUS_MULTIPLE_PEERS 3
+#define ICE_DCBX_STATUS_DIS 7
+
+#define ICE_TLV_TYPE_END 0
+#define ICE_TLV_TYPE_ORG 127
+
+#define ICE_IEEE_8021QAZ_OUI 0x0080C2
+#define ICE_IEEE_SUBTYPE_ETS_CFG 9
+#define ICE_IEEE_SUBTYPE_ETS_REC 10
+#define ICE_IEEE_SUBTYPE_PFC_CFG 11
+#define ICE_IEEE_SUBTYPE_APP_PRI 12
+
+#define ICE_CEE_DCBX_OUI 0x001B21
+#define ICE_CEE_DCBX_TYPE 2
+
+#define ICE_CEE_SUBTYPE_CTRL 1
+#define ICE_CEE_SUBTYPE_PG_CFG 2
+#define ICE_CEE_SUBTYPE_PFC_CFG 3
+#define ICE_CEE_SUBTYPE_APP_PRI 4
+
+#define ICE_CEE_MAX_FEAT_TYPE 3
+#define ICE_LLDP_ADMINSTATUS_DIS 0
+#define ICE_LLDP_ADMINSTATUS_ENA_RX 1
+#define ICE_LLDP_ADMINSTATUS_ENA_TX 2
+#define ICE_LLDP_ADMINSTATUS_ENA_RXTX 3
+
+/* Defines for LLDP TLV header */
+#define ICE_LLDP_TLV_LEN_S 0
+#define ICE_LLDP_TLV_LEN_M (0x01FF << ICE_LLDP_TLV_LEN_S)
+#define ICE_LLDP_TLV_TYPE_S 9
+#define ICE_LLDP_TLV_TYPE_M (0x7F << ICE_LLDP_TLV_TYPE_S)
+#define ICE_LLDP_TLV_SUBTYPE_S 0
+#define ICE_LLDP_TLV_SUBTYPE_M (0xFF << ICE_LLDP_TLV_SUBTYPE_S)
+#define ICE_LLDP_TLV_OUI_S 8
+#define ICE_LLDP_TLV_OUI_M (0xFFFFFFUL << ICE_LLDP_TLV_OUI_S)
+
+/* Defines for IEEE ETS TLV */
+#define ICE_IEEE_ETS_MAXTC_S 0
+#define ICE_IEEE_ETS_MAXTC_M (0x7 << ICE_IEEE_ETS_MAXTC_S)
+#define ICE_IEEE_ETS_CBS_S 6
+#define ICE_IEEE_ETS_CBS_M BIT(ICE_IEEE_ETS_CBS_S)
+#define ICE_IEEE_ETS_WILLING_S 7
+#define ICE_IEEE_ETS_WILLING_M BIT(ICE_IEEE_ETS_WILLING_S)
+#define ICE_IEEE_ETS_PRIO_0_S 0
+#define ICE_IEEE_ETS_PRIO_0_M (0x7 << ICE_IEEE_ETS_PRIO_0_S)
+#define ICE_IEEE_ETS_PRIO_1_S 4
+#define ICE_IEEE_ETS_PRIO_1_M (0x7 << ICE_IEEE_ETS_PRIO_1_S)
+#define ICE_CEE_PGID_PRIO_0_S 0
+#define ICE_CEE_PGID_PRIO_0_M (0xF << ICE_CEE_PGID_PRIO_0_S)
+#define ICE_CEE_PGID_PRIO_1_S 4
+#define ICE_CEE_PGID_PRIO_1_M (0xF << ICE_CEE_PGID_PRIO_1_S)
+#define ICE_CEE_PGID_STRICT 15
+
+/* Defines for IEEE TSA types */
+#define ICE_IEEE_TSA_STRICT 0
+#define ICE_IEEE_TSA_CBS 1
+#define ICE_IEEE_TSA_ETS 2
+#define ICE_IEEE_TSA_VENDOR 255
+
+/* Defines for IEEE PFC TLV */
+#define ICE_IEEE_PFC_CAP_S 0
+#define ICE_IEEE_PFC_CAP_M (0xF << ICE_IEEE_PFC_CAP_S)
+#define ICE_IEEE_PFC_MBC_S 6
+#define ICE_IEEE_PFC_MBC_M BIT(ICE_IEEE_PFC_MBC_S)
+#define ICE_IEEE_PFC_WILLING_S 7
+#define ICE_IEEE_PFC_WILLING_M BIT(ICE_IEEE_PFC_WILLING_S)
+
+/* Defines for IEEE APP TLV */
+#define ICE_IEEE_APP_SEL_S 0
+#define ICE_IEEE_APP_SEL_M (0x7 << ICE_IEEE_APP_SEL_S)
+#define ICE_IEEE_APP_PRIO_S 5
+#define ICE_IEEE_APP_PRIO_M (0x7 << ICE_IEEE_APP_PRIO_S)
+
+/* TLV definitions for preparing MIB */
+#define ICE_TLV_ID_CHASSIS_ID 0
+#define ICE_TLV_ID_PORT_ID 1
+#define ICE_TLV_ID_TIME_TO_LIVE 2
+#define ICE_IEEE_TLV_ID_ETS_CFG 3
+#define ICE_IEEE_TLV_ID_ETS_REC 4
+#define ICE_IEEE_TLV_ID_PFC_CFG 5
+#define ICE_IEEE_TLV_ID_APP_PRI 6
+#define ICE_TLV_ID_END_OF_LLDPPDU 7
+#define ICE_TLV_ID_START ICE_IEEE_TLV_ID_ETS_CFG
+
+#define ICE_IEEE_ETS_TLV_LEN 25
+#define ICE_IEEE_PFC_TLV_LEN 6
+#define ICE_IEEE_APP_TLV_LEN 11
+
+#pragma pack(1)
+/* IEEE 802.1AB LLDP TLV structure */
+struct ice_lldp_generic_tlv {
+ __be16 typelen;
+ u8 tlvinfo[1];
+};
+
+/* IEEE 802.1AB LLDP Organization specific TLV */
+struct ice_lldp_org_tlv {
+ __be16 typelen;
+ __be32 ouisubtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack()
+
+struct ice_cee_tlv_hdr {
+ __be16 typelen;
+ u8 operver;
+ u8 maxver;
+};
+
+struct ice_cee_ctrl_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ __be32 seqno;
+ __be32 ackno;
+};
+
+struct ice_cee_feat_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
+#define ICE_CEE_FEAT_TLV_ENA_M 0x80
+#define ICE_CEE_FEAT_TLV_WILLING_M 0x40
+#define ICE_CEE_FEAT_TLV_ERR_M 0x20
+ u8 subtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack(1)
+struct ice_cee_app_prio {
+ __be16 protocol;
+ u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
+#define ICE_CEE_APP_SELECTOR_M 0x03
+ __be16 lower_oui;
+ u8 prio_map;
+};
+
+#pragma pack()
+
+/* TODO: The below structures related LLDP/DCBX variables
+ * and statistics are defined but need to find how to get
+ * the required information from the Firmware to use them
+ */
+
+/* IEEE 802.1AB LLDP Agent Statistics */
+struct ice_lldp_stats {
+ u64 remtablelastchangetime;
+ u64 remtableinserts;
+ u64 remtabledeletes;
+ u64 remtabledrops;
+ u64 remtableageouts;
+ u64 txframestotal;
+ u64 rxframesdiscarded;
+ u64 rxportframeerrors;
+ u64 rxportframestotal;
+ u64 rxporttlvsdiscardedtotal;
+ u64 rxporttlvsunrecognizedtotal;
+ u64 remtoomanyneighbors;
+};
+
+/* IEEE 802.1Qaz DCBX variables */
+struct ice_dcbx_variables {
+ u32 defmaxtrafficclasses;
+ u32 defprioritytcmapping;
+ u32 deftcbandwidth;
+ u32 deftsaassignment;
+};
+
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd);
+u8 ice_get_dcbx_status(struct ice_hw *hw);
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg);
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_init_dcb(struct ice_hw *hw);
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cmd_details);
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf);
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd);
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd);
+#endif /* _ICE_DCB_H_ */
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index cd561b0a4..ac120fa30 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -13,6 +13,7 @@ enum ice_status {
ICE_ERR_PARAM = -1,
ICE_ERR_NOT_IMPL = -2,
ICE_ERR_NOT_READY = -3,
+ ICE_ERR_NOT_SUPPORTED = -4,
ICE_ERR_BAD_PTR = -5,
ICE_ERR_INVAL_SIZE = -6,
ICE_ERR_DEVICE_NOT_SUPPORTED = -8,
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 90736faa1..6a08b3d28 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -240,6 +240,9 @@ struct ice_hw_common_caps {
u32 os2bmc;
u32 valid_functions;
+ /* DCB capabilities */
+ u32 active_tc_bitmap;
+ u32 maxtc;
/* RSS related capabilities */
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
@@ -276,6 +279,7 @@ struct ice_hw_common_caps {
u8 evb_802_1_qbg; /* Edge Virtual Bridging */
u8 evb_802_1_qbh; /* Bridge Port Extension */
+ u8 dcb;
u8 iscsi;
u8 mgmt_cem;
@@ -527,7 +531,6 @@ struct ice_sched_vsi_info {
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
/* CEE or IEEE 802.1Qaz ETS Configuration data */
struct ice_dcb_ets_cfg {
u8 willing;
@@ -580,7 +583,6 @@ struct ice_dcbx_cfg {
u8 app_mode;
#define ICE_DCBX_APPS_NON_WILLING 0x1
};
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
@@ -601,9 +603,13 @@ struct ice_port_info {
struct ice_lock sched_lock; /* protect access to TXSched tree */
/* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
+ /* DCBX info */
+ struct ice_dcbx_cfg remote_dcbx_cfg; /* Peer Cfg */
+ struct ice_dcbx_cfg desired_dcbx_cfg; /* CEE Desired Cfg */
+ /* LLDP/DCBX Status */
+ u8 dcbx_status;
+ u8 is_sw_lldp;
u8 lport;
#define ICE_LPORT_MASK 0xff
u8 is_vf;
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index d7f8536bc..755d2497b 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -9,6 +9,7 @@ sources = [
'ice_nvm.c',
'ice_flex_pipe.c',
'ice_flow.c',
+ 'ice_dcb.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 32/37] net/ice/base: add FDIR support
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (30 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 31/37] net/ice/base: add DCB support Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 33/37] net/ice/base: change profile priority for RSS reply Qi Zhang
` (4 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add flow director related support base code.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 13 +
drivers/net/ice/base/ice_common.c | 36 ++
drivers/net/ice/base/ice_common.h | 1 +
drivers/net/ice/base/ice_fdir.c | 742 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++++++++
drivers/net/ice/base/ice_flex_pipe.c | 232 +++++++++++
drivers/net/ice/base/ice_type.h | 55 +++
drivers/net/ice/base/meson.build | 1 +
9 files changed, 1283 insertions(+)
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 89d21334e..a3aabccf1 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -52,6 +52,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_fdir.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 4c5cf5419..d2ab9eeff 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -105,6 +105,7 @@ struct ice_aqc_list_caps_elem {
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
#define ICE_AQC_CAPS_MSIX 0x0043
+#define ICE_AQC_CAPS_FD 0x0045
#define ICE_AQC_CAPS_MAX_MTU 0x0047
u8 major_ver;
@@ -1861,6 +1862,16 @@ struct ice_aqc_get_set_rss_lut {
};
+/* Clear FD Table Command (direct, 0x0B06) */
+struct ice_aqc_clear_fd_table {
+ u8 clear_type;
+#define CL_FD_VM_VF_TYPE_VSI_IDX 1
+#define CL_FD_VM_VF_TYPE_PF_IDX 2
+ u8 rsvd;
+ __le16 vsi_index;
+ u8 reserved[12];
+};
+
@@ -2210,6 +2221,7 @@ struct ice_aq_desc {
struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
+ struct ice_aqc_clear_fd_table clear_fd_table;
struct ice_aqc_add_txqs add_txqs;
struct ice_aqc_dis_txqs dis_txqs;
struct ice_aqc_txqs_cleanup txqs_cleanup;
@@ -2415,6 +2427,7 @@ enum ice_adminq_opc {
ice_aqc_opc_set_rss_lut = 0x0B03,
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
+ ice_aqc_opc_clear_fd_table = 0x0B06,
/* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 202592710..425f76e8d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -805,6 +805,9 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
goto err_unroll_cqinit;
+ /* Set bit to enable Flow Director filters */
+ wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
+ INIT_LIST_HEAD(&hw->fdir_list_head);
ice_clear_pxe_mode(hw);
@@ -901,6 +904,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);
+ /* Obtain counter base index which would be used by flow director */
+ status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
+ if (status)
+ goto err_unroll_fltr_mgmt_struct;
return ICE_SUCCESS;
@@ -926,6 +933,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
*/
void ice_deinit_hw(struct ice_hw *hw)
{
+ ice_free_fd_res_cntr(hw, hw->fd_ctr_base);
ice_cleanup_fltr_mgmt_struct(hw);
ice_sched_cleanup_all(hw);
@@ -1980,6 +1988,34 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
"HW caps: MSIX first vector index = %d\n",
caps->msix_vector_first_id);
break;
+ case ICE_AQC_CAPS_FD:
+ {
+ u32 reg_val, val;
+
+ if (dev_p) {
+ dev_p->num_flow_director_fltr = number;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Dev.fd_fltr =%d\n",
+ dev_p->num_flow_director_fltr);
+ }
+ if (func_p) {
+ reg_val = rd32(hw, GLQF_FD_SIZE);
+ val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>
+ GLQF_FD_SIZE_FD_GSIZE_S;
+ func_p->fd_fltr_guar =
+ ice_get_num_per_func(hw, val);
+ val = (reg_val & GLQF_FD_SIZE_FD_BSIZE_M) >>
+ GLQF_FD_SIZE_FD_BSIZE_S;
+ func_p->fd_fltr_best_effort = val;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr guar= %d\n",
+ func_p->fd_fltr_guar);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr best effort=%d\n",
+ func_p->fd_fltr_best_effort);
+ }
+ break;
+ }
case ICE_AQC_CAPS_MAX_MTU:
caps->max_mtu = number;
if (dev_p)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 9665f3204..4dc43dcfe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -9,6 +9,7 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+#include "ice_fdir.h"
enum ice_fw_modes {
ICE_FW_MODE_NORMAL,
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
new file mode 100644
index 000000000..4bc8e6dcb
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -0,0 +1,742 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_fdir.h"
+
+/* These are dummy packet headers used to program flow director filters. */
+static const u8 ice_fdir_tcpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x28, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00,
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static const u8 ice_fdir_udpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x1C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x20, 0x00, 0x00, 0x40, 0x00, 0x40, 0x84,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x10,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00
+};
+
+static const u8 ice_fdir_tcpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x0C, 0x84, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x3B, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* Flow Director dummy packet table */
+static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ sizeof(ice_fdir_tcpv4_pkt),
+ ice_fdir_tcpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ sizeof(ice_fdir_udpv4_pkt),
+ ice_fdir_udpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ sizeof(ice_fdir_sctpv4_pkt),
+ ice_fdir_sctpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ sizeof(ice_fdir_ipv4_pkt),
+ ice_fdir_ipv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ sizeof(ice_fdir_tcpv6_pkt),
+ ice_fdir_tcpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ sizeof(ice_fdir_udpv6_pkt),
+ ice_fdir_udpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ sizeof(ice_fdir_sctpv6_pkt),
+ ice_fdir_sctpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ sizeof(ice_fdir_ipv6_pkt),
+ ice_fdir_ipv6_pkt,
+ },
+};
+
+#define ICE_FDIR_NUM_PKT ARRAY_SIZE(ice_fdir_pkt)
+
+/* Flow Direcotr (FD) filter program descriptor Context */
+static const struct ice_ctx_ele ice_fd_fltr_desc_ctx_info[] = {
+ /* Field Width LSB */
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, qindex, 11, 0),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_q, 1, 11),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_report, 2, 12),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_space, 2, 14),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_index, 13, 16),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_ena, 2, 29),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, evict_ena, 1, 31),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq, 3, 32),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq_prio, 3, 35),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dpu_recipe, 2, 38),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, drop, 1, 40),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_prio, 3, 41),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_mdid, 4, 44),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_val, 16, 48),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dtype, 4, 64),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, pcmd, 1, 68),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof_prio, 3, 69),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof, 6, 72),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_vsi, 10, 78),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, swap, 1, 88),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_prio, 3, 89),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_mdid, 4, 92),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid, 32, 96),
+ { 0 }
+};
+
+/**
+ * ice_set_dflt_val_fd_desc
+ * @fd_fltr_ctx: pointer to fd filter descriptor
+ */
+void
+ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
+{
+ fd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;
+ fd_fltr_ctx->fd_space = ICE_FXD_FLTR_QW0_FD_SPACE_GUAR_BEST;
+ fd_fltr_ctx->cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fd_fltr_ctx->evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_TRUE;
+ fd_fltr_ctx->toq = ICE_FXD_FLTR_QW0_TO_Q_EQUALS_QINDEX;
+ fd_fltr_ctx->toq_prio = ICE_FXD_FLTR_QW0_TO_Q_PRIO1;
+ fd_fltr_ctx->dpu_recipe = ICE_FXD_FLTR_QW0_DPU_RECIPE_DFLT;
+ fd_fltr_ctx->drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fd_fltr_ctx->flex_prio = ICE_FXD_FLTR_QW0_FLEX_PRI_NONE;
+ fd_fltr_ctx->flex_mdid = ICE_FXD_FLTR_QW0_FLEX_MDID0;
+ fd_fltr_ctx->flex_val = ICE_FXD_FLTR_QW0_FLEX_VAL0;
+ fd_fltr_ctx->dtype = ICE_TX_DESC_DTYPE_FLTR_PROG;
+ fd_fltr_ctx->desc_prof_prio = ICE_FXD_FLTR_QW1_PROF_PRIO_ZERO;
+ fd_fltr_ctx->desc_prof = ICE_FXD_FLTR_QW1_PROF_ZERO;
+ fd_fltr_ctx->swap = ICE_FXD_FLTR_QW1_SWAP_SET;
+ fd_fltr_ctx->fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ZERO;
+ fd_fltr_ctx->fdid_mdid = ICE_FXD_FLTR_QW1_FDID_MDID_FD;
+ fd_fltr_ctx->fdid = ICE_FXD_FLTR_QW1_FDID_ZERO;
+}
+
+/**
+ * ice_fdir_get_prgm_desc - set a fdir descriptor from a fdir filter struct
+ * @hw: pointer to the hardware structure
+ * @input: filter
+ * @fdesc: filter descriptor
+ * @add: if add is true, this is an add operation, false implies delete
+ */
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add)
+{
+ struct ice_fd_fltr_desc_ctx fdir_fltr_ctx = { 0 };
+
+ /* set default context info */
+ ice_set_dflt_val_fd_desc(&fdir_fltr_ctx);
+
+ /* change sideband filtering values */
+ fdir_fltr_ctx.fdid = input->fltr_id;
+ if (input->dest_ctl == ICE_FLTR_PRGM_DESC_DEST_DROP_PKT) {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;
+ fdir_fltr_ctx.qindex = 0;
+ } else {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fdir_fltr_ctx.qindex = input->q_index;
+ }
+ fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fdir_fltr_ctx.cnt_index = input->cnt_index;
+ fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi);
+ fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE;
+ fdir_fltr_ctx.toq_prio = 3;
+ fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+ ICE_FXD_FLTR_QW1_PCMD_REMOVE;
+ fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
+ fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fdir_fltr_ctx.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
+ fdir_fltr_ctx.fdid_prio = 3;
+ fdir_fltr_ctx.desc_prof = 1;
+ fdir_fltr_ctx.desc_prof_prio = 3;
+ ice_set_fd_desc_val(&fdir_fltr_ctx, fdesc);
+}
+
+/**
+ * ice_set_fd_desc_val
+ * @fd_fltr_ctx: pointer to fd filter descriptor context
+ * @fdir_desc: populated with fd filter descriptor values
+ */
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc)
+{
+ u64 ctx_buf[2] = { 0 };
+
+ ice_set_ctx((u8 *)fd_fltr_ctx, (u8 *)ctx_buf,
+ ice_fd_fltr_desc_ctx_info);
+ fdir_desc->qidx_compq_space_stat = CPU_TO_LE64(ctx_buf[0]);
+ fdir_desc->dtype_cmd_vsi_fdid = CPU_TO_LE64(ctx_buf[1]);
+}
+
+/**
+ * ice_alloc_fd_res_cntr - obtain counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ */
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_free_fd_res_cntr - Free counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index to be freed
+ */
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_alloc_fd_guar_item - allocate resource for FD guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_guar_item - Free flow director guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_alloc_fd_shrd_item - allocate resource for flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_shrd_item - Free flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_get_fdir_cnt_all - get the number of Flow Director filters
+ * @hw: hardware data structure
+ *
+ * Returns the number of filters available on device
+ */
+int ice_get_fdir_cnt_all(struct ice_hw *hw)
+{
+ return hw->func_caps.fd_fltr_guar +
+ hw->func_caps.fd_fltr_best_effort;
+}
+
+/**
+ * ice_pkt_insert_ipv6_addr - insert a be32 IPv6 address into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @addr: IPv6 address to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr)
+{
+ int idx;
+
+ for (idx = 0; idx < ICE_IPV6_ADDR_LEN_AS_U32; idx++)
+ ice_memcpy(pkt + offset + idx * sizeof(*addr), &addr[idx],
+ sizeof(*addr), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u16 - insert a be16 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 16 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u16(u8 *pkt, int offset, __be16 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u32 - insert a be32 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 32 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_fdir_get_prgm_pkt - generate a dummy packet
+ * @input: flow director filter data structure
+ * @pkt: pointer to return filter packet
+ * @frag: generate a fragment packet
+ */
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag)
+{
+ enum ice_fltr_ptype flow;
+ u16 idx;
+
+ if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ switch (input->ip.v4.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ switch (input->ip.v6.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else {
+ flow = input->flow_type;
+ }
+
+ for (idx = 0; idx < ICE_FDIR_NUM_PKT; idx++)
+ if (ice_fdir_pkt[idx].flow == flow)
+ break;
+ if (idx == ICE_FDIR_NUM_PKT)
+ return ICE_ERR_PARAM;
+ ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+
+ switch (flow) {
+ case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ if (frag)
+ pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF;
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+
+ if (input->flex_fltr)
+ ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_fdir_has_frag - does flow type have 2 ptypes
+ * @flow: flow ptype
+ *
+ * returns true is there is a fragment packet for this ptype
+ */
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow)
+{
+ if (flow == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ return true;
+ else
+ return false;
+}
+
+/**
+ * ice_fdir_find_by_idx - find filter with idx
+ * @hw: pointer to hardware structure
+ * @fltr_idx: index to find.
+ *
+ * Returns pointer to filter if found or null
+ */
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx)
+{
+ struct ice_fdir_fltr *rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found in the list */
+ if (fltr_idx == rule->fltr_id)
+ return rule;
+ if (fltr_idx < rule->fltr_id)
+ break;
+ }
+ return NULL;
+}
+
+/**
+ * ice_fdir_list_add_fltr - add a new node to the flow director filter list
+ * @hw: hardware structure
+ * @fltr: filter node to add to structure
+ */
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *fltr)
+{
+ struct ice_fdir_fltr *rule, *parent = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found or pass its spot in the list */
+ if (rule->fltr_id >= fltr->fltr_id)
+ break;
+ parent = rule;
+ }
+
+ if (parent)
+ LIST_ADD_AFTER(&fltr->fltr_node, &parent->fltr_node);
+ else
+ LIST_ADD(&fltr->fltr_node, &hw->fdir_list_head);
+}
+
+/**
+ * ice_fdir_update_cntrs - increment / decrement filter counter
+ * @hw: pointer to hardware structure
+ * @flow: filter flow type
+ * @add: true implies filters added
+ */
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add)
+{
+ int incr;
+
+ incr = (add) ? 1 : -1;
+ hw->fdir_active_fltr += incr;
+ if (flow == ICE_FLTR_PTYPE_NONF_NONE || flow >= ICE_FLTR_PTYPE_MAX)
+ ice_debug(hw, ICE_DBG_SW, "Unknown filter type %d\n", flow);
+ else
+ hw->fdir_fltr_cnt[flow] += incr;
+}
+
+/**
+ * ice_cmp_ipv6_addr - compare 2 IP v6 addresses
+ * @a: IP v6 address
+ * @b: IP v6 address
+ *
+ * Returns 0 on equal, returns non-0 if different
+ */
+static int ice_cmp_ipv6_addr(__be32 *a, __be32 *b)
+{
+ return memcmp(a, b, 4 * sizeof(__be32));
+}
+
+/**
+ * ice_fdir_comp_ipv6_rules - compare 2 filters
+ * @a: a Flow Director filter data structure
+ * @b: a Flow Director filter data structure
+ * @v6: bool true if v6 filter
+ *
+ * Returns true if the filters match
+ */
+static bool
+ice_fdir_comp_rules(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b, bool v6)
+{
+ enum ice_fltr_ptype flow_type = a->flow_type;
+
+ /* The calling function already checks that the two filters have the
+ * same flow_type.
+ */
+ if (!v6) {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.dst_port == b->ip.v4.dst_port &&
+ a->ip.v4.src_port == b->ip.v4.src_port)
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.l4_header == b->ip.v4.l4_header &&
+ a->ip.v4.proto == b->ip.v4.proto &&
+ a->ip.v4.ip_ver == b->ip.v4.ip_ver &&
+ a->ip.v4.tos == b->ip.v4.tos)
+ return true;
+ }
+ } else {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_SCTP) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port &&
+ !ice_cmp_ipv6_addr(a->ip.v6.dst_ip,
+ b->ip.v6.dst_ip) &&
+ !ice_cmp_ipv6_addr(a->ip.v6.src_ip,
+ b->ip.v6.src_ip))
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port)
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/**
+ * ice_fdir_is_dup_fltr - test if filter is already in list for PF
+ * @hw: hardware data structure
+ * @input: Flow Director filter data structure
+ *
+ * Returns true if the filter is found in the list
+ */
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input)
+{
+ enum ice_fltr_ptype flow_type;
+ struct ice_fdir_fltr *rule;
+ bool ret = false;
+
+ rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ if (rule->flow_type == input->flow_type) {
+ flow_type = input->flow_type;
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ ret = ice_fdir_comp_rules(rule, input, false);
+ else
+ ret = ice_fdir_comp_rules(rule, input, true);
+ if (ret)
+ break;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * ice_clear_vsi_fd_table - admin command to clear FD table for a VSI
+ * @hw: hardware data structure
+ * @vsi_num: vsi_num (HW VSI num)
+ *
+ * Clears FD table entries by issuing admin command (direct, 0x0B06)
+ * Must to pass valid vsi_num as returned by "AddVSI".
+ */
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_VSI_IDX;
+
+ cmd->vsi_index = CPU_TO_LE16(vsi_num);
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_clear_pf_fd_table - admin command to clear FD table for PF
+ * @hw: hardware data structure
+ *
+ * Clears FD table entries for a PF by issuing admin command (direct, 0x0B06)
+ */
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_PF_IDX;
+ /* vsi_index must be 0 to clear FD table for a PF */
+ cmd->vsi_index = CPU_TO_LE16(0);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
new file mode 100644
index 000000000..2ecb147f1
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -0,0 +1,202 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_FDIR_H_
+#define _ICE_FDIR_H_
+
+#include "ice_common.h"
+
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+ u32 fdid;
+ u16 qindex;
+ u16 cnt_index;
+ u16 fd_vsi;
+ u16 flex_val;
+ u8 comp_q;
+ u8 comp_report;
+ u8 fd_space;
+ u8 cnt_ena;
+ u8 evict_ena;
+ u8 toq;
+ u8 toq_prio;
+ u8 dpu_recipe;
+ u8 drop;
+ u8 flex_prio;
+ u8 flex_mdid;
+ u8 dtype;
+ u8 pcmd;
+ u8 desc_prof_prio;
+ u8 desc_prof;
+ u8 swap;
+ u8 fdid_prio;
+ u8 fdid_mdid;
+};
+
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
+
+#define ICE_FDIR_IP_PROTOCOLS
+#define ICE_IP_PROTO_TCP 6
+#define ICE_IP_PROTO_UDP 17
+#define ICE_IP_PROTO_SCTP 132
+#define ICE_IP_PROTO_IP 0
+#define ICE_IP_PROTO_ESP 50
+
+#define ICE_FDIR_MAX_RAW_PKT_SIZE 512
+#define ICE_FDIR_BUF_FULL_MARGIN 10
+#define ICE_FDIR_BUF_HEAD_ROOM 32
+
+/* macros for offsets into packets for flow director programming */
+#define ICE_IPV4_SRC_ADDR_OFFSET 26
+#define ICE_IPV4_DST_ADDR_OFFSET 30
+#define ICE_IPV4_TCP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_TCP_DST_PORT_OFFSET 36
+#define ICE_IPV4_UDP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_UDP_DST_PORT_OFFSET 36
+#define ICE_IPV4_SCTP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_SCTP_DST_PORT_OFFSET 36
+#define ICE_IPV4_PROTO_OFFSET 23
+#define ICE_IPV6_SRC_ADDR_OFFSET 22
+#define ICE_IPV6_DST_ADDR_OFFSET 38
+#define ICE_IPV6_TCP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_TCP_DST_PORT_OFFSET 56
+#define ICE_IPV6_UDP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_UDP_DST_PORT_OFFSET 56
+#define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_SCTP_DST_PORT_OFFSET 56
+
+#define ICE_FDIR_MAX_FLTRS 16384
+
+/* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF
+ * requests that the packet not be fragmented. MF indicates that a packet has
+ * been fragmented.
+ */
+#define ICE_FDIR_IPV4_PKT_FLAG_DF 0x20
+#define ICE_FDIR_IPV4_PKT_FLAG_MF 0x40
+
+enum ice_fltr_prgm_desc_dest {
+ ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER,
+};
+
+enum ice_fltr_prgm_desc_fd_status {
+ ICE_FLTR_PRGM_DESC_FD_STATUS_NONE,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID_4FLEX_BYTES,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
+};
+
+#define ICE_FLTR_PRGM_FLEX_WORD_SIZE sizeof(__be16)
+
+struct ice_rx_flow_userdef {
+ u16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+};
+
+struct ice_fdir_v4 {
+ __be32 dst_ip;
+ __be32 src_ip;
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header;
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tos;
+ u8 ip_ver;
+ u8 proto;
+};
+
+#define ICE_IPV6_ADDR_LEN_AS_U32 4
+
+struct ice_fdir_v6 {
+ __be32 dst_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be32 src_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header; /* next header */
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tc;
+ u8 proto;
+};
+
+struct ice_fdir_extra {
+ u8 dst_mac[ETH_ALEN]; /* dest MAC address */
+ u32 usr_def[2]; /* user data */
+ __be16 vlan_type; /* VLAN ethertype */
+ __be16 vlan_tag; /* VLAN tag info */
+};
+
+struct ice_fdir_fltr {
+ struct LIST_ENTRY_TYPE fltr_node;
+ enum ice_fltr_ptype flow_type;
+
+ union {
+ struct ice_fdir_v4 v4;
+ struct ice_fdir_v6 v6;
+ } ip, mask;
+
+ struct ice_fdir_extra ext_data;
+ struct ice_fdir_extra ext_mask;
+
+ /* flex byte filter data */
+ __be16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+
+ /* filter control */
+ u16 q_index;
+#ifdef ADQ_SUPPORT
+ u16 orig_q_index;
+#endif /* ADQ_SUPPORT */
+ u16 dest_vsi;
+ u8 dest_ctl;
+ u8 fltr_status;
+ u16 cnt_index;
+ u32 fltr_id;
+};
+
+
+/* Dummy packet filter definition structure. */
+struct ice_fdir_base_pkt {
+ enum ice_fltr_ptype flow;
+ u16 pkt_len;
+ const u8 *pkt;
+};
+
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add);
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
+enum ice_status
+ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add);
+int ice_get_fdir_cnt_all(struct ice_hw *hw);
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+enum ice_status
+ice_update_fdir_list_entry(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ u16 sw_idx);
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add);
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+#endif /* _ICE_FDIR_H_ */
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 99108d81c..37bb4cbb5 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1275,6 +1275,25 @@ void ice_free_seg(struct ice_hw *hw)
}
/**
+ * ice_init_fd_mask_regs - initialize Flow Director mask registers
+ * @hw: pointer to the HW struct
+ *
+ * This function sets up the Flow Director mask registers to allow for complete
+ * masking off of any of the 24 Field Vector words. After this call, mask 0 will
+ * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc.
+ */
+static void ice_init_fd_mask_regs(struct ice_hw *hw)
+{
+ u16 i;
+
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ wr32(hw, GLQF_FDMASK(i), i);
+ ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i,
+ GLQF_FDMASK(i), i);
+ }
+}
+
+/**
* ice_init_pkg_regs - initialize additional package registers
* @hw: pointer to the hardware structure
*/
@@ -1287,6 +1306,8 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
/* setup Switch block input mask, which is 48-bits in two parts */
wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);
+ /* setup default flow director masks */
+ ice_init_fd_mask_regs(hw);
}
/**
@@ -3783,6 +3804,205 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
}
/**
+ * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @mask_sel: mask select
+ *
+ * This function enable any of the masks selected by the mask select parameter
+ * for the profile specified.
+ */
+static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
+{
+ wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
+
+ ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
+ GLQF_FDMASK_SEL(prof_id), mask_sel);
+}
+
+#define ICE_SRC_DST_MAX_COUNT 8
+
+struct ice_fd_src_dst_pair {
+ u8 prot_id;
+ u8 count;
+ u16 off;
+};
+
+static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
+ /* These are defined in pairs */
+ { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
+ { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
+
+ { ICE_PROT_IPV4_IL, 2, 12 },
+ { ICE_PROT_IPV4_IL, 2, 16 },
+
+ { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
+ { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
+
+ { ICE_PROT_IPV6_IL, 8, 8 },
+ { ICE_PROT_IPV6_IL, 8, 24 },
+
+ { ICE_PROT_TCP_IL, 1, 0 },
+ { ICE_PROT_TCP_IL, 1, 2 },
+
+ { ICE_PROT_UDP_OF, 1, 0 },
+ { ICE_PROT_UDP_OF, 1, 2 },
+
+ { ICE_PROT_UDP_IL_OR_S, 1, 0 },
+ { ICE_PROT_UDP_IL_OR_S, 1, 2 },
+
+ { ICE_PROT_SCTP_IL, 1, 0 },
+ { ICE_PROT_SCTP_IL, 1, 2 }
+};
+
+#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
+
+/**
+ * ice_update_fd_swap - set register appropriately for a FD FV extraction
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @es: extraction sequence (length of array is determined by the block)
+ */
+static enum ice_status
+ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
+{
+ ice_declare_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
+ u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
+#define ICE_FD_FV_NOT_FOUND (-2)
+ s8 first_free = ICE_FD_FV_NOT_FOUND;
+ u8 used[ICE_MAX_FV_WORDS] = { 0 };
+ s8 orig_free, si;
+ u32 mask_sel = 0;
+ u8 i, j, k;
+
+ ice_memset(pair_list, 0, sizeof(pair_list), ICE_NONDMA_MEM);
+
+ ice_init_fd_mask_regs(hw);
+
+ /* This code assumes that the Flow Director field vectors are assigned
+ * from the end of the FV indexes working towards the zero index, that
+ * only complete fields will be included and will be consecutive, and
+ * that there are no gaps between valid indexes.
+ */
+
+ /* Determine swap fields present */
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ /* Find the first free entry, assuming right to left population.
+ * This is where we can start adding additional pairs if needed.
+ */
+ if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
+ ICE_PROT_INVALID)
+ first_free = i - 1;
+
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
+ es[i].off == ice_fd_pairs[j].off) {
+ ice_set_bit(j, pair_list);
+ pair_start[j] = i;
+ }
+ }
+ }
+
+ orig_free = first_free;
+
+ /* determine missing swap fields that need to be added */
+ for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
+ u8 bit1 = ice_is_bit_set(pair_list, i + 1);
+ u8 bit0 = ice_is_bit_set(pair_list, i);
+
+ if (bit0 ^ bit1) {
+ u8 index;
+
+ /* add the appropriate 'paired' entry */
+ if (!bit0)
+ index = i;
+ else
+ index = i + 1;
+
+ /* check for room */
+ if (first_free + 1 < ice_fd_pairs[index].count)
+ return ICE_ERR_MAX_LIMIT;
+
+ /* place in extraction sequence */
+ for (k = 0; k < ice_fd_pairs[index].count; k++) {
+ es[first_free - k].prot_id =
+ ice_fd_pairs[index].prot_id;
+ es[first_free - k].off =
+ ice_fd_pairs[index].off + (k * 2);
+
+ /* keep track of non-relevant fields */
+ mask_sel |= 1 << (first_free - k);
+ }
+
+ pair_start[index] = first_free;
+ first_free -= ice_fd_pairs[index].count;
+ }
+ }
+
+ /* fill in the swap array */
+ si = hw->blk[ICE_BLK_FD].es.fvw - 1;
+ do {
+ u8 indexes_used = 1;
+
+ /* assume flat at this index */
+#define ICE_SWAP_VALID 0x80
+ used[si] = si | ICE_SWAP_VALID;
+
+ if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
+ si -= indexes_used;
+ continue;
+ }
+
+ /* check for a swap location */
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
+ es[si].off == ice_fd_pairs[j].off) {
+ u8 idx;
+
+ /* determine the appropriate matching field */
+ idx = j + ((j % 2) ? -1 : 1);
+
+ indexes_used = ice_fd_pairs[idx].count;
+ for (k = 0; k < indexes_used; k++) {
+ used[si - k] = (pair_start[idx] - k) |
+ ICE_SWAP_VALID;
+ }
+
+ break;
+ }
+ }
+
+ si -= indexes_used;
+ } while (si >= 0);
+
+ /* for each set of 4 swap indexes, write the appropriate register */
+ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
+ u32 raw_entry = 0;
+
+ for (k = 0; k < 4; k++) {
+ u8 idx;
+
+ idx = (j * 4) + k;
+ if (used[idx])
+ raw_entry |= used[idx] << (k * 8);
+ }
+
+ /* write the appropriate register set, based on HW block */
+ wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry);
+
+ ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n",
+ prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry);
+ }
+
+ /* update the masks for this profile to be sure we ignore fields that
+ * are not relevant to our match criteria
+ */
+ ice_update_fd_mask(hw, prof_id, mask_sel);
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_add_prof - add profile
* @hw: pointer to the HW struct
* @blk: hardware block
@@ -3812,6 +4032,18 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
+ if (blk == ICE_BLK_FD) {
+ /* For Flow Director block, the extraction sequence may
+ * need to be altered in the case where there are paired
+ * fields that have no match. This is necessary because
+ * for Flow Director, src and dest fields need to paired
+ * for filter programming and these values are swapped
+ * during Tx.
+ */
+ status = ice_update_fd_swap(hw, prof_id, es);
+ if (status)
+ goto err_ice_add_prof;
+ }
/* and write new es */
ice_write_es(hw, blk, prof_id, es);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6a08b3d28..ef0b5bb52 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -164,6 +164,7 @@ enum ice_media_type {
/* Software VSI types. */
enum ice_vsi_type {
ICE_VSI_PF = 0,
+ ICE_VSI_CTRL = 3, /* equates to ICE_VSI_PF with 1 queue pair */
#ifdef ADQ_SUPPORT
ICE_VSI_CHNL = 4,
#endif /* ADQ_SUPPORT */
@@ -218,6 +219,32 @@ struct ice_phy_info {
#define ICE_MAX_NUM_MIRROR_RULES 64
+/* protocol enumeration for filters */
+enum ice_fltr_ptype {
+ /* NONE - used for undef/error */
+ ICE_FLTR_PTYPE_NONF_NONE = 0,
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ ICE_FLTR_PTYPE_FRAG_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ ICE_FLTR_PTYPE_MAX,
+};
+
+/* 6 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL + 4 ICE_VSI_CHNL */
+#define ICE_MAX_FDIR_VSI_PER_FILTER 6
+
+struct ice_fd_hw_prof {
+ struct ice_flow_seg_info *fdir_seg;
+ int cnt;
+ u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+ u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+};
+
/* Common HW capabilities for SW use */
struct ice_hw_common_caps {
/* Write CSR protection */
@@ -297,12 +324,15 @@ struct ice_hw_common_caps {
struct ice_hw_func_caps {
struct ice_hw_common_caps common_cap;
u32 guar_num_vsi;
+ u32 fd_fltr_guar; /* Number of filters guaranteed */
+ u32 fd_fltr_best_effort; /* Number of best effort filters */
};
/* Device wide capabilities */
struct ice_hw_dev_caps {
struct ice_hw_common_caps common_cap;
u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */
+ u32 num_flow_director_fltr; /* Number of FD filters available */
};
@@ -651,6 +681,7 @@ struct ice_hw {
u64 debug_mask; /* BITMAP for debug mask */
enum ice_mac_type mac_type;
+ u16 fd_ctr_base; /* FD counter base index */
/* pci info */
u16 device_id;
u16 vendor_id;
@@ -748,6 +779,19 @@ struct ice_hw {
struct ice_blk_info blk[ICE_BLK_COUNT];
struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */
struct LIST_HEAD_TYPE fl_profs[ICE_BLK_COUNT];
+ /* Flow Director filter info */
+ int fdir_active_fltr;
+
+ struct ice_lock fdir_fltr_lock; /* protect Flow Director */
+ struct LIST_HEAD_TYPE fdir_list_head;
+
+ /* Book-keeping of side-band filter count per flow-type.
+ * This is used to detect and handle input set changes for
+ * respective flow-type.
+ */
+ u16 fdir_fltr_cnt[ICE_FLTR_PTYPE_MAX];
+
+ struct ice_fd_hw_prof **fdir_prof;
};
/* Statistics collected by each port, VSI, VEB, and S-channel */
@@ -792,6 +836,11 @@ struct ice_hw_port_stats {
u64 link_xoff_rx; /* lxoffrxc */
u64 link_xon_tx; /* lxontxc */
u64 link_xoff_tx; /* lxofftxc */
+ u64 priority_xon_rx[8]; /* pxonrxc[8] */
+ u64 priority_xoff_rx[8]; /* pxoffrxc[8] */
+ u64 priority_xon_tx[8]; /* pxontxc[8] */
+ u64 priority_xoff_tx[8]; /* pxofftxc[8] */
+ u64 priority_xon_2_xoff[8]; /* pxon2offc[8] */
u64 rx_size_64; /* prc64 */
u64 rx_size_127; /* prc127 */
u64 rx_size_255; /* prc255 */
@@ -811,6 +860,12 @@ struct ice_hw_port_stats {
u64 tx_size_1522; /* ptc1522 */
u64 tx_size_big; /* ptc9522 */
u64 mac_short_pkt_dropped; /* mspdc */
+ /* flow director stats */
+ u32 fd_sb_status;
+ u64 fd_sb_match;
+#ifdef ADQ_SUPPORT
+ u64 ch_atr_match;
+#endif /* ADQ_SUPPORT */
};
enum ice_sw_fwd_act_type {
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 755d2497b..624202567 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -10,6 +10,7 @@ sources = [
'ice_flex_pipe.c',
'ice_flow.c',
'ice_dcb.c',
+ 'ice_fdir.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 33/37] net/ice/base: change profile priority for RSS reply
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (31 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 32/37] net/ice/base: add FDIR support Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 34/37] net/ice/base: fix duplicate resource allocations Qi Zhang
` (3 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
1. Add call to replay RSS configurations
2. Add RSS configurations to end of list and not the head to avoid
inversion on replay.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 5 ++++-
drivers/net/ice/base/ice_flow.c | 3 ++-
drivers/net/ice/base/ice_osdep.h | 16 ++++++++++++++++
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 425f76e8d..74f925c03 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3854,7 +3854,10 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
if (status)
return status;
}
-
+ /* Replay per VSI all RSS configurations */
+ status = ice_replay_rss_cfg(hw, vsi_handle);
+ if (status)
+ return status;
/* Replay per VSI all filters */
status = ice_replay_vsi_all_fltr(hw, vsi_handle);
if (!status)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 03a324d49..428002c28 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1672,7 +1672,8 @@ ice_add_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle,
rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match;
rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs;
- LIST_ADD(&rss_cfg->l_entry, &hw->vsi_ctx[vsi_handle]->rss_list_head);
+ LIST_ADD_TAIL(&rss_cfg->l_entry,
+ &hw->vsi_ctx[vsi_handle]->rss_list_head);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 252c8f4e7..560e36c1b 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -462,6 +462,22 @@ LIST_HEAD(ice_list_head, ice_list_entry);
#define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
#define LIST_ADD_AFTER(entry, list_entry) \
LIST_INSERT_AFTER(list_entry, entry, next)
+
+static inline void list_add_tail(struct ice_list_entry *entry,
+ struct ice_list_head *head)
+{
+ struct ice_list_entry *tail = head->lh_first;
+
+ if (tail == NULL) {
+ LIST_INSERT_HEAD(head, entry, next);
+ return;
+ }
+ while (tail->next.le_next != NULL)
+ tail = tail->next.le_next;
+ LIST_INSERT_AFTER(tail, entry, next);
+}
+
+#define LIST_ADD_TAIL(entry, head) list_add_tail(entry, head)
#define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
for ((pos) = (head)->lh_first ? \
container_of((head)->lh_first, struct type, member) : \
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 34/37] net/ice/base: fix duplicate resource allocations
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (32 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 33/37] net/ice/base: change profile priority for RSS reply Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 35/37] net/ice/base: minor fix Qi Zhang
` (2 subsequent siblings)
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
This patch ensure that TCAM allocations made by a newly added VSIG
that has the same characteristic list of an existing VSIG are removed.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 85 +++++++++++++++++-------------------
1 file changed, 41 insertions(+), 44 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 37bb4cbb5..c9d8730d2 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2302,21 +2302,23 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- /* remove all vsis associated with this VSIG XLT2 entry */
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
-
- vsi_cur->vsig = ICE_DEFAULT_VSIG;
- vsi_cur->changed = 1;
- vsi_cur->next_vsi = NULL;
- vsi_cur = tmp;
- } while (vsi_cur);
-
- /* NULL terminate head of vsi list */
- hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ /* If the VSIG has at least 1 VSI then iterate through the
+ * list and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ /* remove all vsis associated with this VSIG XLT2 entry */
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+
+ vsi_cur->vsig = ICE_DEFAULT_VSIG;
+ vsi_cur->changed = 1;
+ vsi_cur->next_vsi = NULL;
+ vsi_cur = tmp;
+ } while (vsi_cur);
+
+ /* NULL terminate head of VSI list */
+ hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ }
/* free characteristic list */
LIST_FOR_EACH_ENTRY_SAFE(del, dtmp,
@@ -4267,36 +4269,32 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/* Move all VSIS associated with this VSIG to the default VSIG */
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
- struct ice_chs_chg *p;
-
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_vsig;
+ /* If the VSIG has at least 1 VSI then iterate through the list
+ * and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+ struct ice_chs_chg *p;
- p->type = ICE_VSIG_REM;
- p->orig_vsig = vsig;
- p->vsig = ICE_DEFAULT_VSIG;
- p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
+ p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
+ if (!p)
+ return ICE_ERR_NO_MEMORY;
- LIST_ADD(&p->list_entry, chg);
+ p->type = ICE_VSIG_REM;
+ p->orig_vsig = vsig;
+ p->vsig = ICE_DEFAULT_VSIG;
+ p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
- status = ice_vsig_free(hw, blk, vsig);
- if (status)
- return status;
+ LIST_ADD(&p->list_entry, chg);
- vsi_cur = tmp;
- } while (vsi_cur);
+ vsi_cur = tmp;
+ } while (vsi_cur);
+ }
- return ICE_SUCCESS;
+ status = ice_vsig_free(hw, blk, vsig);
-err_ice_rem_vsig:
- /* the caller will free up the change list */
- return ICE_ERR_NO_MEMORY;
+ return status;
}
/**
@@ -4493,7 +4491,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA);
- LIST_ADD(&p->list, lst);
+ LIST_ADD_TAIL(&p->list, lst);
}
return ICE_SUCCESS;
@@ -5000,14 +4998,13 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/* search for an existing VSIG with an exact charc match */
status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
if (!status) {
- /* found an exact match */
- /* move vsi to the VSIG that matches */
+ /* move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
- /* remove original VSIG if we just moved the only VSI
- * from it
+ /* VSI has been moved out of or_vsig. If the or_vsig had
+ * only that VSI it is now empty and can be removed.
*/
if (only_vsi) {
status = ice_rem_vsig(hw, blk, or_vsig, &chg);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 35/37] net/ice/base: minor fix
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (33 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 34/37] net/ice/base: fix duplicate resource allocations Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 36/37] net/ice/base: increase prototol offset size Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 37/37] net/ice/base: revert the workaround for resource allocation Qi Zhang
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. clean flow entry's action structure after remove it.
2. initialized priority when add a new flow entry
3. remove RSS configuration before deleting the flow profile.
Fixes: aa1cd410fa64 ("net/ice/base: add flow module")
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flow.c | 13 ++++++++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c9d8730d2..e4d0b8c0f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2467,7 +2467,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < es->count; i++) {
off = i * es->fvw;
- if (memcmp(&es->t[off], fv, es->fvw * 2))
+ if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
continue;
*prof_id = i;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 428002c28..98727cfeb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -910,8 +910,11 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
if (entry->entry)
ice_free(hw, entry->entry);
- if (entry->acts)
+ if (entry->acts) {
ice_free(hw, entry->acts);
+ entry->acts = NULL;
+ entry->acts_cnt = 0;
+ }
ice_free(hw, entry);
@@ -1306,6 +1309,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
e->id = entry_id;
e->vsi_handle = vsi_handle;
e->prof = prof;
+ e->priority = prio;
switch (blk) {
case ICE_BLK_RSS:
@@ -1852,11 +1856,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
if (status)
goto out;
+ /* Remove RSS configuration from VSI context before deleting
+ * the flow profile.
+ */
+ ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
+
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI))
status = ice_flow_rem_prof_sync(hw, blk, prof);
- ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
-
out:
ice_free(hw, segs);
return status;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 36/37] net/ice/base: increase prototol offset size
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (34 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 35/37] net/ice/base: minor fix Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 37/37] net/ice/base: revert the workaround for resource allocation Qi Zhang
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
OS package's format is changed, field vector's protocol offset size is
changed from 8 bit to 16 bit. So base code also need to align to this, or
PMD will not be able to load OS package correctly.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
---
drivers/net/ice/base/ice_flex_type.h | 8 +++++++-
drivers/net/ice/base/ice_flow.c | 7 +++++--
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 365f33390..f259e1371 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -5,12 +5,18 @@
#ifndef _ICE_FLEX_TYPE_H_
#define _ICE_FLEX_TYPE_H_
+#define ICE_FV_OFFSET_INVAL 0x1FF
+
+#pragma pack(1)
/* Extraction Sequence (Field Vector) Table */
struct ice_fv_word {
u8 prot_id;
- u8 off; /* Offset within the protocol header */
+ u16 off; /* Offset within the protocol header */
+ u8 resvrd;
};
+#pragma pack()
+
#define ICE_MAX_FV_WORDS 48
struct ice_fv {
struct ice_fv_word ew[ICE_MAX_FV_WORDS];
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 98727cfeb..be819e0e9 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -516,7 +516,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
struct ice_flow_fld_info *flds;
u16 cnt, ese_bits, i;
s16 adj = 0;
- u8 off;
+ u16 off;
flds = params->prof->segs[seg].fields;
@@ -956,7 +956,10 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
return ICE_ERR_NO_MEMORY;
/* initialize extraction sequence to all invalid (0xff) */
- ice_memset(params.es, 0xff, sizeof(params.es), ICE_NONDMA_MEM);
+ for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
+ params.es[i].prot_id = ICE_PROT_INVALID;
+ params.es[i].off = ICE_FV_OFFSET_INVAL;
+ }
params.blk = blk;
params.prof->id = prof_id;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index bad925c8c..f0c74a348 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -174,7 +174,7 @@ enum ice_flow_priority {
struct ice_flow_seg_xtrct {
u8 prot_id; /* Protocol ID of extracted header field */
- u8 off; /* Starting offset of the field in header in bytes */
+ u16 off; /* Starting offset of the field in header in bytes */
u8 idx; /* Index of FV entry used */
u8 disp; /* Displacement of field in bits fr. FV entry's start */
};
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 6b3bd6542..e572dd320 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -223,7 +223,7 @@ struct ice_prot_lkup_ext {
u16 prot_type;
u8 n_val_words;
/* create a buffer to hold max words per recipe */
- u8 field_off[ICE_MAX_CHAIN_WORDS];
+ u16 field_off[ICE_MAX_CHAIN_WORDS];
struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v2 37/37] net/ice/base: revert the workaround for resource allocation
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
` (35 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 36/37] net/ice/base: increase prototol offset size Qi Zhang
@ 2019-03-07 12:58 ` Qi Zhang
36 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-07 12:58 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Revert the workaround for allocating TCAM and FV entries to align
with latest firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 11 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_flex_pipe.c | 235 ++---------------------------------
drivers/net/ice/base/ice_flex_type.h | 2 -
4 files changed, 17 insertions(+), 233 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 74f925c03..3d2e5f347 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1786,11 +1786,11 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
* @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
- * @sh: shared if true, dedicated if false
+ * @btm: allocate from bottom
* @res: pointer to array that will receive the resources
*/
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
{
struct ice_aqc_alloc_free_res_elem *buf;
enum ice_status status;
@@ -1804,8 +1804,11 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
/* Prepare buffer to allocate resource. */
buf->num_elems = CPU_TO_LE16(num);
- buf->res_type = CPU_TO_LE16(type | (sh ? ICE_AQC_RES_TYPE_FLAG_SHARED :
- ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+ buf->res_type = CPU_TO_LE16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED |
+ ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX);
+ if (btm)
+ buf->res_type |= CPU_TO_LE16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM);
+
status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
ice_aqc_opc_alloc_res, NULL);
if (status)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 4dc43dcfe..e8f2ce9d8 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -41,7 +41,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout);
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res);
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
enum ice_status
ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index e4d0b8c0f..14e632fab 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2536,199 +2536,6 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_workaround_get_res_blk - determine the block from a resource type
- * @type: type of resource
- * @blk: pointer to a enum that will receive the block type
- * @tcam: pointer to variable that will be set to true for a TCAM resource type
- */
-static enum
-ice_status ice_workaround_get_res_blk(u16 type, enum ice_block *blk, bool *tcam)
-{
- /* just need to support TCAM entries and Profile IDs for now */
- *tcam = false;
-
- switch (type) {
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_SW;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM:
- *blk = ICE_BLK_ACL;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM:
- *blk = ICE_BLK_FD;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_RSS;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_PE;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_SW;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID:
- *blk = ICE_BLK_ACL;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID:
- *blk = ICE_BLK_FD;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_RSS;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_PE;
- break;
- default:
- return ICE_ERR_PARAM;
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_alloc_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource
- * @num: number of resources to allocate
- * @res: pointer to array that will receive the resources
- */
-static enum ice_status
-ice_alloc_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- u16 count = 0;
- bool tcam;
- u16 first;
- u16 last;
- u16 max;
- u16 i;
-
-/* Number of PFs we support with this workaround */
-#define ICE_WA_PF_COUNT 4
-#define ICE_WA_1ST_TCAM 4
-#define ICE_WA_1ST_FV 4
-
- /* Only allow our supported PFs */
- if (hw->pf_id >= ICE_WA_PF_COUNT)
- return ICE_ERR_AQ_ERROR;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* range of entries based on PF */
- max = hw->blk[blk].prof.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* Profile IDs - start at non-zero index for PROF ID TCAM table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_TCAM;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].prof.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].prof.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- } else {
- /* range of entries based on PF */
- max = hw->blk[blk].es.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* FV index - start at non-zero index for Field vector table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_FV;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].es.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].es.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_free_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource to free
- * @num: number of resources
- * @res: array of resource ids to free
- */
-static enum ice_status
-ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- bool tcam = false;
- u16 i;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* TCAM entries */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].prof.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- }
- }
-
- } else {
- /* Profile IDs */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].es.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- }
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
* ice_alloc_tcam_ent - allocate hardware TCAM entry
* @hw: pointer to the HW struct
* @blk: the block to allocate the TCAM for
@@ -2745,7 +2552,7 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_alloc_res_workaround(hw, res_type, 1, tcam_idx);
+ return ice_alloc_hw_res(hw, res_type, 1, true, tcam_idx);
}
/**
@@ -2764,7 +2571,7 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tcam_idx);
+ return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
}
/**
@@ -2786,7 +2593,7 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- status = ice_alloc_res_workaround(hw, res_type, 1, &get_prof);
+ status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
if (!status)
*prof_id = (u8)get_prof;
@@ -2810,15 +2617,7 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tmp_prof_id);
- /* The following code is a WORKAROUND until DCR 076 is available.
- * DCR 076 - Update to Profile ID TCAM Resource Allocation
- *
- * Once the DCR 076 changes are available in FW, this code can be
- * restored. Original code:
- *
- * return ice_free_res(hw, res_type, 1, &tmp_prof_id);
- */
+ return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
}
/**
@@ -3125,8 +2924,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
LIST_FOR_EACH_ENTRY_SAFE(del, tmp, &hw->blk[blk].es.prof_map,
ice_prof_map, list) {
- LIST_DEL(&del->list);
- ice_free(hw, del);
+ ice_rem_prof(hw, blk, del->profile_cookie);
}
}
@@ -3168,9 +2966,6 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].prof_redir.t);
ice_free(hw, hw->blk[i].es.t);
ice_free(hw, hw->blk[i].es.ref_count);
-
- ice_free(hw, hw->blk[i].es.resource_used_hack);
- ice_free(hw, hw->blk[i].prof.resource_used_hack);
ice_free(hw, hw->blk[i].es.written);
}
@@ -3347,18 +3142,6 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
if (!es->ref_count)
goto err;
- es->resource_used_hack = (u8 *)
- ice_calloc(hw, hw->blk[i].es.count, sizeof(u8));
-
- if (!es->resource_used_hack)
- goto err;
-
- prof->resource_used_hack = (u8 *)ice_calloc(hw, prof->count,
- sizeof(u8));
-
- if (!prof->resource_used_hack)
- goto err;
-
INIT_LIST_HEAD(&es->prof_map);
/* Now that tables are allocated, read in package data */
@@ -4390,13 +4173,13 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
if (!pmap)
return ICE_ERR_DOES_NOT_EXIST;
- status = ice_free_prof_id(hw, blk, pmap->prof_id);
-
+ /* remove all flows with this profile */
+ status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
- /* remove all flows with this profile */
- status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
+ /* remove profile */
+ status = ice_free_prof_id(hw, blk, pmap->prof_id);
if (status)
return status;
/* dereference profile, and possibly remove */
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index f259e1371..f2a5f27e7 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -507,7 +507,6 @@ struct ice_es {
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
- u8 *resource_used_hack; /* hack for testing */
};
/* PTYPE Group management */
@@ -660,7 +659,6 @@ struct ice_prof_tcam {
u16 max_prof_id;
u8 cdid_bits; /* # cdid bits to use in key, 0, 2, 4, or 8 */
struct ice_prof_tcam_entry *t;
- u8 *resource_used_hack;
};
struct ice_prof_redir {
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 00/38] ice share code update.
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (37 preceding siblings ...)
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
` (39 more replies)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
39 siblings, 40 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Sync to latest kernel driver, main changes:
1. add DCB/FDIR support.
2. add more APIs in switch module.
3. code clean and bug fix.
v3:
- fix software queue handle parsing in ice_ena_vsi_txq and
ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
fail during device reconfigure.
- Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
cause IPv4 TCP RSS does not work at some situation.
v2:
- Enhanced the commit log
- Add missing fixed line.
Qi Zhang (38):
net/ice/base: add switch resource allocation and free
net/ice/base: improve comments
net/ice/base: add two helper functions
net/ice/base: add helper macros
net/ice/base: allow package copy to be used after resets
net/ice/base: code clean
net/ice/base: declare functions as external
net/ice/base: add more APIs in switch module
net/ice/base: add VSI queue context framework
net/ice/base: add APIs to add remove ethertype filter
net/ice/base: add APIs to get allocated resources
net/ice/base: add APIs to alloc/free resource counter
net/ice/base: add APIs to get VSI promiscuous mode
net/ice/base: add MAC filter with marker and counter
net/ice/base: add two helper functions for flow management
net/ice/base: minor fix
net/ice/base: update macros
net/ice/base: code clean
net/ice/base: enable VSI queue context
net/ice/base: ensure only valid bits are set
net/ice/base: enhance get link status command
net/ice/base: add RSS key related macro and structures
net/ice/base: do not write TCAM entries back
net/ice/base: remove local VSIG allocations
net/ice/base: minor fix
net/ice/base: update copyright time
net/ice/base: fix static analysis reported issues
net/ice/base: return config error without queue to disable
net/ice/base: add function to check FW recovery mode
net/ice/base: change profile id reference counting
net/ice/base: add DCB support
net/ice/base: add FDIR support
net/ice/base: change profile priority for RSS reply
net/ice/base: fix duplicate resource allocations
net/ice/base: minor fix
net/ice/base: increase prototol offset size
net/ice/base: revert the workaround for resource allocation
net/ice/base: fix set UDP PTYPEs
drivers/net/ice/Makefile | 2 +
drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 650 ++++++--
drivers/net/ice/base/ice_common.h | 36 +-
drivers/net/ice/base/ice_controlq.c | 10 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 +++
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_fdir.c | 742 +++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++
drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
drivers/net/ice/base/ice_flex_pipe.h | 4 +-
drivers/net/ice/base/ice_flex_type.h | 19 +-
drivers/net/ice/base/ice_flow.c | 228 +--
drivers/net/ice/base/ice_flow.h | 22 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
drivers/net/ice/base/ice_nvm.c | 17 +-
drivers/net/ice/base/ice_osdep.h | 16 +
drivers/net/ice/base/ice_protocol_type.h | 8 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 34 +-
drivers/net/ice/base/ice_status.h | 3 +-
drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
drivers/net/ice/base/ice_switch.h | 109 +-
drivers/net/ice/base/ice_type.h | 119 +-
drivers/net/ice/base/meson.build | 2 +
drivers/net/ice/ice_rxtx.c | 13 +-
31 files changed, 7114 insertions(+), 2365 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-15 0:46 ` Yang, Qiming
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 02/38] net/ice/base: improve comments Qi Zhang
` (38 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two APIs ice_alloc_sw and ice_free_sw to support
switch related resource allocation and free.
These APIs is required when we enable switch flow.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 150 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 ++
2 files changed, 155 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 0379cd045..a7b712e17 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
}
+/**
+ * ice_alloc_sw - allocate resources specific to switch
+ * @hw: pointer to the HW struct
+ * @ena_stats: true to turn on VEB stats
+ * @shared_res: true for shared resource, false for dedicated resource
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * allocates switch resources (SWID and VEB counter) (0x0208)
+ */
+enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ struct ice_aqc_res_elem *sw_ele;
+ enum ice_status status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer for switch ID.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is allocated, and hence a single sw_id
+ * is requested.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |
+ (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+
+ if (status)
+ goto ice_alloc_sw_exit;
+
+ sw_ele = &sw_buf->elem[0];
+ *sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);
+
+ if (ena_stats) {
+ /* Prepare buffer for VEB Counter */
+ enum ice_adminq_opc opc = ice_aqc_opc_alloc_res;
+ struct ice_aqc_alloc_free_res_elem *counter_buf;
+ struct ice_aqc_res_elem *counter_ele;
+
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ status = ICE_ERR_NO_MEMORY;
+ goto ice_alloc_sw_exit;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since
+ * only a single switch/VEB instance is allocated, and hence a
+ * single VEB counter is requested.
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED);
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ opc, NULL);
+
+ if (status) {
+ ice_free(hw, counter_buf);
+ goto ice_alloc_sw_exit;
+ }
+ counter_ele = &counter_buf->elem[0];
+ *counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);
+ ice_free(hw, counter_buf);
+ }
+
+ice_alloc_sw_exit:
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_free_sw - free resources specific to switch
+ * @hw: pointer to the HW struct
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * free switch resources (SWID and VEB counter) (0x0209)
+ *
+ * NOTE: This function frees multiple resources. It continues
+ * releasing other resources even after it encounters error.
+ * The error code returned is the last error it encountered.
+ */
+enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
+ enum ice_status status, ret_status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer to free for switch ID res.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single sw_id
+ * is released.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);
+ sw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);
+
+ ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+
+ if (ret_status)
+ ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
+
+ /* Prepare buffer to free for VEB Counter resource */
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ ice_free(hw, sw_buf);
+ return ICE_ERR_NO_MEMORY;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single VEB counter
+ * is released
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);
+ counter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status) {
+ ice_debug(hw, ICE_DBG_SW,
+ "VEB counter resource could not be freed\n");
+ ret_status = status;
+ }
+
+ ice_free(hw, counter_buf);
+ ice_free(hw, sw_buf);
+ return ret_status;
+}
/**
* ice_aq_add_vsi
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 66a172fc2..dd21781f7 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id);
+enum ice_status
+ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 02/38] net/ice/base: improve comments
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 03/38] net/ice/base: add two helper functions Qi Zhang
` (37 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Improve comments to follow naming rules.
Also the patch include some minor cleanup.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 27 +-
drivers/net/ice/base/ice_common.c | 148 +++----
drivers/net/ice/base/ice_common.h | 4 +-
drivers/net/ice/base/ice_controlq.c | 8 +-
drivers/net/ice/base/ice_flex_pipe.c | 364 ++++++++--------
drivers/net/ice/base/ice_flex_pipe.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 4 +-
drivers/net/ice/base/ice_flow.c | 65 +--
drivers/net/ice/base/ice_flow.h | 1 -
drivers/net/ice/base/ice_lan_tx_rx.h | 70 +--
drivers/net/ice/base/ice_nvm.c | 8 +-
drivers/net/ice/base/ice_protocol_type.h | 4 +-
drivers/net/ice/base/ice_sched.c | 719 ++++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 8 +-
drivers/net/ice/base/ice_switch.c | 120 +++---
drivers/net/ice/base/ice_switch.h | 20 +-
drivers/net/ice/base/ice_type.h | 34 +-
17 files changed, 804 insertions(+), 802 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a1b9edd14..5a599280e 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -71,7 +71,7 @@ struct ice_aqc_req_res {
#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000
#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000
#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000
- /* For SDP: pin id of the SDP */
+ /* For SDP: pin ID of the SDP */
__le32 res_number;
/* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */
__le16 status;
@@ -854,7 +854,6 @@ struct ice_aqc_delete_elem {
-
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
* Query RL profile (indirect 0x0411)
@@ -1154,8 +1153,8 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
-#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
-#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
+#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
+#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
#define ICE_AQ_PHY_ENA_LINK BIT(3)
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
@@ -1228,7 +1227,7 @@ struct ice_aqc_get_link_status_data {
u8 ext_info;
#define ICE_AQ_LINK_PHY_TEMP_ALARM BIT(0)
#define ICE_AQ_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
- /* Port TX Suspended */
+ /* Port Tx Suspended */
#define ICE_AQ_LINK_TX_S 2
#define ICE_AQ_LINK_TX_M (0x03 << ICE_AQ_LINK_TX_S)
#define ICE_AQ_LINK_TX_ACTIVE 0
@@ -1441,7 +1440,7 @@ struct ice_aqc_get_set_rss_lut {
-/* Add TX LAN Queues (indirect 0x0C30) */
+/* Add Tx LAN Queues (indirect 0x0C30) */
struct ice_aqc_add_txqs {
u8 num_qgrps;
u8 reserved[3];
@@ -1451,7 +1450,7 @@ struct ice_aqc_add_txqs {
};
-/* This is the descriptor of each queue entry for the Add TX LAN Queues
+/* This is the descriptor of each queue entry for the Add Tx LAN Queues
* command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp.
*/
struct ice_aqc_add_txqs_perq {
@@ -1464,7 +1463,7 @@ struct ice_aqc_add_txqs_perq {
};
-/* The format of the command buffer for Add TX LAN Queues (0x0C30)
+/* The format of the command buffer for Add Tx LAN Queues (0x0C30)
* is an array of the following structs. Please note that the length of
* each struct ice_aqc_add_tx_qgrp is variable due
* to the variable number of queues in each group!
@@ -1477,7 +1476,7 @@ struct ice_aqc_add_tx_qgrp {
};
-/* Disable TX LAN Queues (indirect 0x0C31) */
+/* Disable Tx LAN Queues (indirect 0x0C31) */
struct ice_aqc_dis_txqs {
u8 cmd_type;
#define ICE_AQC_Q_DIS_CMD_S 0
@@ -1500,7 +1499,7 @@ struct ice_aqc_dis_txqs {
};
-/* The buffer for Disable TX LAN Queues (indirect 0x0C31)
+/* The buffer for Disable Tx LAN Queues (indirect 0x0C31)
* contains the following structures, arrayed one after the
* other.
* Note: Since the q_id is 16 bits wide, if the
@@ -1528,7 +1527,7 @@ struct ice_aqc_dis_txq {
};
-/* TX LAN Queues Cleanup Event (0x0C31) */
+/* Tx LAN Queues Cleanup Event (0x0C31) */
struct ice_aqc_txqs_cleanup {
__le16 caller_opc;
__le16 cmd_tag;
@@ -1536,7 +1535,7 @@ struct ice_aqc_txqs_cleanup {
};
-/* Move / Reconfigure TX Queues (indirect 0x0C32) */
+/* Move / Reconfigure Tx Queues (indirect 0x0C32) */
struct ice_aqc_move_txqs {
u8 cmd_type;
#define ICE_AQC_Q_CMD_TYPE_S 0
@@ -1557,7 +1556,7 @@ struct ice_aqc_move_txqs {
};
-/* This is the descriptor of each queue entry for the move TX LAN Queues
+/* This is the descriptor of each queue entry for the move Tx LAN Queues
* command (0x0C32).
*/
struct ice_aqc_move_txqs_elem {
@@ -1950,7 +1949,7 @@ enum ice_adminq_opc {
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
- /* TX queue handling commands/events */
+ /* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
ice_aqc_opc_dis_txqs = 0x0C31,
ice_aqc_opc_txqs_cleanup = 0x0C31,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 145f66a90..bcfa3014b 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -36,7 +36,7 @@
* @hw: pointer to the HW structure
*
* This function sets the MAC type of the adapter based on the
- * vendor ID and device ID stored in the hw structure.
+ * vendor ID and device ID stored in the HW structure.
*/
static enum ice_status ice_set_mac_type(struct ice_hw *hw)
{
@@ -79,7 +79,7 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
/**
* ice_aq_manage_mac_read - manage MAC address read command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the manage MAC read response
* @buf_size: Size of the virtual buffer
* @cd: pointer to command details structure or NULL
@@ -338,7 +338,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
/* flag cleared so calling functions don't call AQ again */
pi->phy.get_link_info = false;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -426,7 +426,7 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -446,7 +446,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -503,7 +503,7 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cfg_fw_log - configure FW logging
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @enable: enable certain FW logging events if true, disable all if false
*
* This function enables/disables the FW logging via Rx CQ events and a UART
@@ -652,7 +652,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
/**
* ice_output_fw_log
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: pointer to the AQ message descriptor
* @buf: pointer to the buffer accompanying the AQ message
*
@@ -668,7 +668,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
/**
* ice_get_itr_intrl_gran - determine int/intrl granularity
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
@@ -763,7 +763,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
goto err_unroll_cqinit;
}
- /* set the back pointer to hw */
+ /* set the back pointer to HW */
hw->port_info->hw = hw;
/* Initialize port_info struct with switch configuration data */
@@ -1034,7 +1034,7 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
* @ice_rxq_ctx: pointer to the rxq context
* @rxq_index: the index of the Rx queue
*
- * Copies rxq context from dense structure to hw register space
+ * Copies rxq context from dense structure to HW register space
*/
static enum ice_status
ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
@@ -1047,7 +1047,7 @@ ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
if (rxq_index > QRX_CTRL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, QRX_CONTEXT(i, rxq_index),
*((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
@@ -1091,7 +1091,7 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = {
* @rxq_index: the index of the Rx queue
*
* Converts rxq context from sparse to dense structure and then writes
- * it to hw register space
+ * it to HW register space
*/
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -1109,7 +1109,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
* @hw: pointer to the hardware structure
* @rxq_index: the index of the Rx queue to clear
*
- * Clears rxq context in hw register space
+ * Clears rxq context in HW register space
*/
enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
{
@@ -1166,7 +1166,7 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {
* @ice_tx_cmpltnq_ctx: pointer to the Tx completion queue context
* @tx_cmpltnq_index: the index of the completion queue
*
- * Copies Tx completion q context from dense structure to hw register space
+ * Copies Tx completion queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
@@ -1180,7 +1180,7 @@ ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
if (tx_cmpltnq_index > GLTCLAN_CQ_CNTX0_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index),
*((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
@@ -1215,7 +1215,7 @@ static const struct ice_ctx_ele ice_tx_cmpltnq_ctx_info[] = {
* @tx_cmpltnq_index: the index of the completion queue
*
* Converts completion queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
@@ -1233,7 +1233,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_cmpltnq_index: the index of the completion queue to clear
*
- * Clears Tx completion queue context in hw register space
+ * Clears Tx completion queue context in HW register space
*/
enum ice_status
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
@@ -1256,7 +1256,7 @@ ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
* @ice_tx_drbell_q_ctx: pointer to the doorbell queue context
* @tx_drbell_q_index: the index of the doorbell queue
*
- * Copies doorbell q context from dense structure to hw register space
+ * Copies doorbell queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
@@ -1270,7 +1270,7 @@ ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
if (tx_drbell_q_index > QTX_COMM_DBLQ_DBELL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS; i++) {
wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index),
*((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
@@ -1306,7 +1306,7 @@ static const struct ice_ctx_ele ice_tx_drbell_q_ctx_info[] = {
* @tx_drbell_q_index: the index of the doorbell queue
*
* Converts doorbell queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
@@ -1324,7 +1324,7 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_drbell_q_index: the index of the doorbell queue to clear
*
- * Clears doorbell queue context in hw register space
+ * Clears doorbell queue context in HW register space
*/
enum ice_status
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
@@ -1394,7 +1394,7 @@ ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf, u16 buf_len)
/**
* ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: descriptor describing the command
* @buf: buffer to use for indirect commands (NULL for direct commands)
* @buf_size: size of buffer for indirect commands (0 for direct commands)
@@ -1411,7 +1411,7 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
/**
* ice_aq_get_fw_ver
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cd: pointer to command details structure or NULL
*
* Get the firmware version (0x0001) from the admin queue commands
@@ -1446,7 +1446,7 @@ enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
/**
* ice_aq_q_shutdown
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @unloading: is the driver unloading itself
*
* Tell the Firmware that we're shutting down the AdminQ and whether
@@ -1469,8 +1469,8 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
/**
* ice_aq_req_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @access: access type
* @sdp_number: resource number
* @timeout: the maximum time in ms that the driver may hold the resource
@@ -1557,8 +1557,8 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_aq_release_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @sdp_number: resource number
* @cd: pointer to command details structure or NULL
*
@@ -1586,7 +1586,7 @@ ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
/**
* ice_acquire_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
* @access: access type (read or write)
* @timeout: timeout in milliseconds
*
@@ -1650,7 +1650,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_release_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
*
* This function will release a resource using the proper Admin Command.
*/
@@ -1664,7 +1664,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
status = ice_aq_release_res(hw, res, 0, NULL);
/* there are some rare cases when trying to release the resource
- * results in an admin Q timeout, so handle them correctly
+ * results in an admin queue timeout, so handle them correctly
*/
while ((status == ICE_ERR_AQ_TIMEOUT) &&
(total_delay < hw->adminq.sq_cmd_timeout)) {
@@ -1676,7 +1676,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
/**
* ice_aq_alloc_free_res - command to allocate/free resources
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_entries: number of resource entries in buffer
* @buf: Indirect buffer to hold data parameters and response
* @buf_size: size of buffer for indirect commands
@@ -1714,7 +1714,7 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
/**
* ice_alloc_hw_res - allocate resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
* @sh: shared if true, dedicated if false
@@ -1751,8 +1751,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
}
/**
- * ice_free_hw_res - free allocated hw resource
- * @hw: pointer to the hw struct
+ * ice_free_hw_res - free allocated HW resource
+ * @hw: pointer to the HW struct
* @type: type of resource to free
* @num: number of resources
* @res: pointer to array that contains the resources to free
@@ -1786,7 +1786,7 @@ ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
/**
* ice_get_num_per_func - determine number of resources per PF
- * @hw: pointer to the hw structure
+ * @hw: pointer to the HW structure
* @max: value to be evenly split between each PF
*
* Determine the number of valid functions by going through the bitmap returned
@@ -1809,7 +1809,7 @@ static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)
/**
* ice_parse_caps - parse function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: pointer to a buffer containing function/device capability records
* @cap_count: number of capability records in the list
* @opc: type of capabilities list to parse
@@ -1929,7 +1929,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
/**
* ice_aq_discover_caps - query function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the capabilities
* @buf_size: Size of the virtual buffer
* @cap_count: cap count needed if AQ err==ENOMEM
@@ -2028,7 +2028,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
/**
* ice_aq_manage_mac_write - manage MAC address write command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address
* @flags: flags to control write behavior
* @cd: pointer to command details structure or NULL
@@ -2057,7 +2057,7 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
/**
* ice_aq_clear_pxe_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Tell the firmware that the driver is taking over from PXE (0x0110).
*/
@@ -2073,7 +2073,7 @@ static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw)
/**
* ice_clear_pxe_mode - clear pxe operations mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Make sure all PXE mode settings are cleared, including things
* like descriptor fetch/write-back mode.
@@ -2090,10 +2090,10 @@ void ice_clear_pxe_mode(struct ice_hw *hw)
* @phy_type_low: lower part of phy_type
* @phy_type_high: higher part of phy_type
*
- * This helper function will convert an entry in phy type structure
+ * This helper function will convert an entry in PHY type structure
* [phy_type_low, phy_type_high] to its corresponding link speed.
* Note: In the structure of [phy_type_low, phy_type_high], there should
- * be one bit set, as this function will convert one phy type to its
+ * be one bit set, as this function will convert one PHY type to its
* speed.
* If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
* If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
@@ -2263,7 +2263,7 @@ ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
/**
* ice_aq_set_phy_cfg
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @cfg: structure with PHY configuration data to be set
* @cd: pointer to command details structure or NULL
@@ -2372,7 +2372,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
if (!pcaps)
return ICE_ERR_NO_MEMORY;
- /* Get the current phy config */
+ /* Get the current PHY config */
status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
NULL);
if (status) {
@@ -2561,7 +2561,7 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
/**
* ice_aq_set_event_mask
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @port_num: port number of the physical function
* @mask: event mask to be set
* @cd: pointer to command details structure or NULL
@@ -2587,7 +2587,7 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
/**
* ice_aq_set_mac_loopback
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @ena_lpbk: Enable or Disable loopback
* @cd: pointer to command details structure or NULL
*
@@ -2775,7 +2775,7 @@ ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type,
/**
* __ice_aq_get_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_id: VSI FW index
* @key: pointer to key info struct
* @set: set true to set the key, false to get the key
@@ -2810,7 +2810,7 @@ ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
/**
* ice_aq_get_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @key: pointer to key info struct
*
@@ -2829,7 +2829,7 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
/**
* ice_aq_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @keys: pointer to key info struct
*
@@ -2916,8 +2916,8 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
* @num_qgrps: number of groups in the list
* @qg_list: the list of groups to disable
* @buf_size: the total size of the qg_list buffer in bytes
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* Disable LAN Tx queue (0x0C31)
@@ -2993,7 +2993,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",
vmvf_num, hw->adminq.sq_last_status);
else
- ice_debug(hw, ICE_DBG_SCHED, "disable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",
LE16_TO_CPU(qg_list[0].q_id[0]),
hw->adminq.sq_last_status);
}
@@ -3232,13 +3232,13 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @tc: tc number
+ * @tc: TC number
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
* @cd: pointer to command details structure or NULL
*
- * This function adds one lan q
+ * This function adds one LAN queue
*/
enum ice_status
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
@@ -3282,14 +3282,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* Bit 5-6.
* - Bit 7 is reserved.
* Without setting the generic section as valid in valid_sections, the
- * Admin Q command will fail with error code ICE_AQ_RC_EINVAL.
+ * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
*/
buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
- /* add the lan q */
+ /* add the LAN queue */
status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
if (status != ICE_SUCCESS) {
- ice_debug(hw, ICE_DBG_SCHED, "enable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n",
LE16_TO_CPU(buf->txqs[0].txq_id),
hw->adminq.sq_last_status);
goto ena_txq_exit;
@@ -3298,7 +3298,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
- /* add a leaf node into schduler tree q layer */
+ /* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
ena_txq_exit:
@@ -3312,8 +3312,8 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* @num_queues: number of queues
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* This function removes queues and their corresponding nodes in SW DB
@@ -3363,12 +3363,12 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
}
/**
- * ice_cfg_vsi_qs - configure the new/exisiting VSI queues
+ * ice_cfg_vsi_qs - configure the new/existing VSI queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
* @maxqs: max queues array per TC
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
* This function adds/updates the VSI queues per TC.
*/
@@ -3403,13 +3403,13 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
}
/**
- * ice_cfg_vsi_lan - configure VSI lan queues
+ * ice_cfg_vsi_lan - configure VSI LAN queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
- * @max_lanqs: max lan queues array per TC
+ * @max_lanqs: max LAN queues array per TC
*
- * This function adds/updates the VSI lan queues per TC.
+ * This function adds/updates the VSI LAN queues per TC.
*/
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
@@ -3423,7 +3423,7 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
/**
* ice_replay_pre_init - replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Initializes required config data for VSI, FD, ACL, and RSS before replay.
*/
@@ -3447,9 +3447,9 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
}
/**
- * ice_replay_vsi - replay vsi configuration
- * @hw: pointer to the hw struct
- * @vsi_handle: driver vsi handle
+ * ice_replay_vsi - replay VSI configuration
+ * @hw: pointer to the HW struct
+ * @vsi_handle: driver VSI handle
*
* Restore all VSI configuration after reset. It is required to call this
* function with main VSI first.
@@ -3477,7 +3477,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_post - post replay configuration cleanup
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Post replay cleanup.
*/
@@ -3553,9 +3553,9 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
/**
- * ice_sched_query_elem - query element information from hw
- * @hw: pointer to the hw struct
- * @node_teid: node teid to be queried
+ * ice_sched_query_elem - query element information from HW
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID to be queried
* @buf: buffer to element information
*
* This function queries HW element information
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 5ac991ef2..f2ad86182 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -61,8 +61,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw);
* ... the value of pointer would equal 0x1008, since 0x1008 is the next
* address after 0x1006 which is divisible by 4.
*/
-#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
-
+#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -149,7 +148,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
-
enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index cbc4cb4c2..1c0830cec 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -54,7 +54,7 @@ static void ice_mailbox_init_regs(struct ice_hw *hw)
/**
* ice_check_sq_alive
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if Queue is enabled else false.
@@ -729,7 +729,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_done - check if FW has processed the Admin Send Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if the firmware has processed all descriptors on the
@@ -745,7 +745,7 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_send_cmd - send command to Control Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @desc: prefilled descriptor describing the command (non DMA mem)
* @buf: buffer to use for indirect commands (or NULL for direct commands)
@@ -990,7 +990,7 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
/**
* ice_clean_rq_elem
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @e: event info from the receive descriptor, includes any buffers
* @pending: number of events that could be left to process
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 493bc4e9b..c87424601 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -325,11 +325,11 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
* ice_boost_tcam_handler
* @sect_type: section type
* @section: pointer to section
- * @index: index of the boost tcam entry to be returned
- * @offset: pointer to receive absolute offset, always 0 for boost tcam sections
+ * @index: index of the boost TCAM entry to be returned
+ * @offset: pointer to receive absolute offset, always 0 for boost TCAM sections
*
* This is a callback function that can be passed to ice_pkg_enum_entry.
- * Handles enumeration of individual boost tcam entries.
+ * Handles enumeration of individual boost TCAM entries.
*/
static void *
ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
@@ -501,7 +501,7 @@ void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
label_name = ice_enum_labels(NULL, 0, &state, &val);
}
- /* Cache the appropriate boost tcam entry pointers */
+ /* Cache the appropriate boost TCAM entry pointers */
for (i = 0; i < hw->tnl.count; i++) {
ice_find_boost_entry(ice_seg, hw->tnl.tbl[i].boost_addr,
&hw->tnl.tbl[i].boost_entry);
@@ -1078,7 +1078,7 @@ enum ice_status ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg)
* @hw: pointer to the hardware structure
* @pkg_hdr: pointer to the driver's package hdr
*
- * Saves off the package details into the hw structure.
+ * Saves off the package details into the HW structure.
*/
enum ice_status
ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
@@ -1468,14 +1468,14 @@ ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
/**
* ice_get_sw_fv_list
* @hw: pointer to the HW structure
- * @prot_ids: field vector to search for with a given protocol id
+ * @prot_ids: field vector to search for with a given protocol ID
* @ids_cnt: lookup/protocol count
* @fv_list: Head of a list
*
* Finds all the field vector entries from switch block that contain
- * a given protocol id and returns a list of structures of type
+ * a given protocol ID and returns a list of structures of type
* "ice_sw_fv_list_entry". Every structure in the list has a field vector
- * definition and profile id information
+ * definition and profile ID information
* NOTE: The caller of the function is responsible for freeing the memory
* allocated for every list entry.
*/
@@ -1782,11 +1782,11 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
/* PTG Management */
/**
- * ice_ptg_update_xlt1 - Updates packet type groups in hw via xlt1 table
+ * ice_ptg_update_xlt1 - Updates packet type groups in HW via XLT1 table
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt1 hardware table to reflect the new
+ * This function will update the XLT1 hardware table to reflect the new
* packet type group configuration.
*/
enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
@@ -1817,7 +1817,7 @@ enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to search for
* @ptg: pointer to variable that receives the PTG
*
@@ -1838,7 +1838,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
/**
* ice_ptg_alloc_val - Allocates a new packet type group ID by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg to allocate
*
* This function allocates a given packet type group ID specified by the ptg
@@ -1853,7 +1853,7 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_alloc - Find a free entry and allocates a new packet type group ID
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function allocates and returns a new packet type group ID. Note
* that 0 is the default packet type group, so successfully created PTGs will
@@ -1877,7 +1877,7 @@ u8 ice_ptg_alloc(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_free - Frees a packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg ID to free
*
* This function frees a packet type group, and returns all the current ptypes
@@ -1902,7 +1902,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_remove_ptype - Removes ptype from a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to remove
* @ptg: the ptg to remove the ptype from
*
@@ -1947,7 +1947,7 @@ ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/**
* ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to add or move
* @ptg: the ptg to add or move the ptype to
*
@@ -1998,10 +1998,10 @@ ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/* Block / table size info */
struct ice_blk_size_details {
- u16 xlt1; /* # xlt1 entries */
- u16 xlt2; /* # xlt2 entries */
- u16 prof_tcam; /* # profile id tcam entries */
- u16 prof_id; /* # profile ids */
+ u16 xlt1; /* # XLT1 entries */
+ u16 xlt2; /* # XLT2 entries */
+ u16 prof_tcam; /* # profile ID TCAM entries */
+ u16 prof_id; /* # profile IDs */
u8 prof_cdid_bits; /* # cdid one-hot bits used in key */
u16 prof_redir; /* # profile redirection entries */
u16 es; /* # extraction sequence entries */
@@ -2079,7 +2079,7 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* profile cookies must compare, and in the exact same order to take
* into account priority
*/
- while (--count) {
+ while (count--) {
if (tmp2->profile_cookie != tmp1->profile_cookie)
return false;
@@ -2093,13 +2093,13 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* VSIG Management */
/**
- * ice_vsig_update_xlt2_sect - update one section of xlt2 table
+ * ice_vsig_update_xlt2_sect - update one section of XLT2 table
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: hw vsi number to program
- * @vsig: vsig for the vsi
+ * @blk: HW block
+ * @vsi: HW VSI number to program
+ * @vsig: vsig for the VSI
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration.
*/
static enum ice_status
@@ -2128,11 +2128,11 @@ ice_vsig_update_xlt2_sect(struct ice_hw *hw, enum ice_block blk, u16 vsi,
}
/**
- * ice_vsig_update_xlt2 - update xlt2 table with VSIG configuration
+ * ice_vsig_update_xlt2 - update XLT2 table with VSIG configuration
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration of used vsis.
*/
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
@@ -2158,14 +2158,14 @@ enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_vsig_find_vsi - find a VSIG that contains a specified vsi
+ * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi of interest
- * @vsig: pointer to receive the vsi group
+ * @blk: HW block
+ * @vsi: VSI of interest
+ * @vsig: pointer to receive the VSI group
*
- * This function will lookup the vsi entry in the XLT2 list and return
- * the vsi group its associated with.
+ * This function will lookup the VSI entry in the XLT2 list and return
+ * the VSI group its associated with.
*/
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
@@ -2174,7 +2174,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
return ICE_ERR_PARAM;
/* As long as there's a default or valid VSIG associated with the input
- * vsi, the functions returns a success. Any handling of VSIG will be
+ * VSI, the functions returns a success. Any handling of VSIG will be
* done by the following add, update or remove functions.
*/
*vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
@@ -2185,7 +2185,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
/**
* ice_vsig_alloc_val - allocate a new VSIG by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: the vsig to allocate
*
* This function will allocate a given VSIG specified by the vsig parameter.
@@ -2205,7 +2205,7 @@ static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
/**
* ice_vsig_alloc - Finds a free entry and allocates a new VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function will iterate through the VSIG list and mark the first
* unused entry for the new VSIG entry as used and return that value.
@@ -2222,16 +2222,16 @@ static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_find_dup_props_vsig - find vsi group with a specified set of properties
+ * ice_find_dup_props_vsig - find VSI group with a specified set of properties
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @chs: characteristic list
* @vsig: returns the VSIG with the matching profiles, if found
*
- * Each VSIG is associated with a characteristic set; i.e. all vsis under
+ * Each VSIG is associated with a characteristic set; i.e. all VSIs under
* a group have the same characteristic set. To check if there exists a VSIG
* which has the same characteristics as the input characteristics; this
- * function will iterate through the xlt2 list and return the VSIG that has a
+ * function will iterate through the XLT2 list and return the VSIG that has a
* matching configuration. In order to make sure that priorities are accounted
* for, the list must match exactly, including the order in which the
* characteristics are listed.
@@ -2257,12 +2257,12 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_vsig_free - free vsi group
+ * ice_vsig_free - free VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to remove
*
- * The function will remove all vsis associated with the input VSIG and move
+ * The function will remove all VSIs associated with the input VSIG and move
* them to the DEFAULT_VSIG and mark the VSIG available.
*/
enum ice_status
@@ -2310,14 +2310,14 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_vsig_add_mv_vsi - add or move a vsi to a vsi group
+ * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to move
- * @vsig: destination vsi group
+ * @blk: HW block
+ * @vsi: VSI to move
+ * @vsig: destination VSI group
*
- * This function will move or add the input vsi to the target VSIG.
- * The function will find the original VSIG the vsi belongs to and
+ * This function will move or add the input VSI to the target VSIG.
+ * The function will find the original VSIG the VSI belongs to and
* move the entry to the DEFAULT_VSIG, update the original VSIG and
* then move entry to the new VSIG.
*/
@@ -2358,7 +2358,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
- /* Create vsi entry and add VSIG and prop_mask values */
+ /* Create VSI entry and add VSIG and prop_mask values */
hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
hw->blk[blk].xlt2.vsis[vsi].changed = 1;
@@ -2373,13 +2373,13 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_vsig_remove_vsi - remove vsi from VSIG
+ * ice_vsig_remove_vsi - remove VSI from VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to remove
- * @vsig: vsi group to remove from
+ * @blk: HW block
+ * @vsi: VSI to remove
+ * @vsig: VSI group to remove from
*
- * The function will remove the input vsi from its vsi group and move it
+ * The function will remove the input VSI from its VSI group and move it
* to the DEFAULT_VSIG.
*/
enum ice_status
@@ -2396,7 +2396,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
return ICE_ERR_DOES_NOT_EXIST;
- /* entry already in default VSIG, dont have to remove */
+ /* entry already in default VSIG, don't have to remove */
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
@@ -2407,7 +2407,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
vsi_cur = (*vsi_head);
- /* iterate the vsi list, skip over the entry to be removed */
+ /* iterate the VSI list, skip over the entry to be removed */
while (vsi_cur) {
if (vsi_tgt == vsi_cur) {
(*vsi_head) = vsi_cur->next_vsi;
@@ -2417,7 +2417,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_cur = vsi_cur->next_vsi;
}
- /* verify if vsi was removed from group list */
+ /* verify if VSI was removed from group list */
if (!vsi_cur)
return ICE_ERR_DOES_NOT_EXIST;
@@ -2429,11 +2429,11 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_find_prof_id - find profile id for a given field vector
+ * ice_find_prof_id - find profile ID for a given field vector
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @fv: field vector to search for
- * @prof_id: receives the profile id
+ * @prof_id: receives the profile ID
*/
static enum ice_status
ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
@@ -2456,7 +2456,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_id_rsrc_type - get profile id resource type for a block type
+ * ice_prof_id_rsrc_type - get profile ID resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2485,7 +2485,7 @@ static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_tcam_ent_rsrc_type - get tcam entry resource type for a block type
+ * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2707,10 +2707,10 @@ ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
}
/**
- * ice_alloc_tcam_ent - allocate hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the tcam for
- * @tcam_idx: pointer to variable to receive the tcam entry
+ * ice_alloc_tcam_ent - allocate hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the TCAM for
+ * @tcam_idx: pointer to variable to receive the TCAM entry
*
* This function allocates a new entry in a Profile ID TCAM for a specific
* block.
@@ -2727,10 +2727,10 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
}
/**
- * ice_free_tcam_ent - free hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the tcam entry
- * @tcam_idx: the tcam entry to free
+ * ice_free_tcam_ent - free hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the TCAM entry
+ * @tcam_idx: the TCAM entry to free
*
* This function frees an entry in a Profile ID TCAM for a specific block.
*/
@@ -2746,12 +2746,12 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
}
/**
- * ice_alloc_prof_id - allocate profile id
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the profile id for
- * @prof_id: pointer to variable to receive the profile id
+ * ice_alloc_prof_id - allocate profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the profile ID for
+ * @prof_id: pointer to variable to receive the profile ID
*
- * This function allocates a new profile id, which also corresponds to a Field
+ * This function allocates a new profile ID, which also corresponds to a Field
* Vector (Extraction Sequence) entry.
*/
static enum ice_status
@@ -2772,12 +2772,12 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
}
/**
- * ice_free_prof_id - free profile id
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id to free
+ * ice_free_prof_id - free profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID to free
*
- * This function frees a profile id, which also corresponds to a Field Vector.
+ * This function frees a profile ID, which also corresponds to a Field Vector.
*/
static enum ice_status
ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2801,9 +2801,9 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_inc_ref - increment reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to increment the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to increment the reference count
*/
static enum ice_status
ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2818,9 +2818,9 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_dec_ref - decrement reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to decrement the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to decrement the reference count
*/
static enum ice_status
ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2838,9 +2838,9 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block in which to write the extraction sequence
- * @prof_id: the profile id to write
+ * @prof_id: the profile ID to write
* @fv: pointer to the extraction sequence to write
*/
static void
@@ -2921,7 +2921,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
u8 *src, *dst;
void *sect;
- /* if the hw segment pointer is null then the first iteration of
+ /* if the HW segment pointer is null then the first iteration of
* ice_pkg_enum_section() will fail. In this case the Hw tables will
* not be filled and return success.
*/
@@ -3072,7 +3072,7 @@ static void ice_free_flow_profs(struct ice_hw *hw)
/**
* ice_free_prof_map - frees the profile map
* @hw: pointer to the hardware structure
- * @blk: the hw block which contains the profile map to be freed
+ * @blk: the HW block which contains the profile map to be freed
*/
static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
{
@@ -3091,7 +3091,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
/**
* ice_free_vsig_tbl - free complete VSIG table entries
* @hw: pointer to the hardware structure
- * @blk: the hw block on which to free the VSIG table entries
+ * @blk: the HW block on which to free the VSIG table entries
*/
static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
{
@@ -3151,9 +3151,9 @@ static void ice_init_flow_profs(struct ice_hw *hw)
}
/**
- * ice_init_sw_xlt1_db - init software xlt1 database from hw tables
+ * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
@@ -3172,9 +3172,9 @@ void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_xlt2_db - init software xlt2 database from hw tables
+ * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
@@ -3197,7 +3197,7 @@ void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_db - init software database from hw tables
+ * ice_init_sw_db - init software database from HW tables
* @hw: pointer to the hardware structure
*/
static
@@ -3329,9 +3329,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
}
/**
- * ice_prof_gen_key - generate profile id key
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_prof_gen_key - generate profile ID key
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3339,7 +3339,7 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
* @vl_msk: valid mask
* @dc_msk: don't care mask
* @nm_msk: never match mask
- * @key: output of profile id key
+ * @key: output of profile ID key
*/
static enum ice_status
ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
@@ -3384,11 +3384,11 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
}
/**
- * ice_tcam_write_entry - write tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_tcam_write_entry - write TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @idx: the entry index to write to
- * @prof_id: profile id
+ * @prof_id: profile ID
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3418,9 +3418,9 @@ ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
}
/**
- * ice_vsig_get_ref - returns number of vsis belong to a VSIG
+ * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to query
* @refs: pointer to variable to receive the reference count
*/
@@ -3446,7 +3446,7 @@ ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
/**
* ice_get_ptg - get or allocate a ptg for a ptype
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to retrieve the PTG for
* @ptg: receives the PTG of the ptype
* @add: receive boolean indicating whether PTG was added or not
@@ -3483,7 +3483,7 @@ ice_get_ptg(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg,
/**
* ice_has_prof_vsig - check to see if VSIG has a specific profile
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to check against
* @hdl: profile handle
*/
@@ -3500,14 +3500,14 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
}
ice_debug(hw, ICE_DBG_INIT,
- "Characteristic list for vsi group %d not found.\n",
+ "Characteristic list for VSI group %d not found.\n",
vsig);
return false;
}
/**
- * ice_prof_bld_es - build profile id extraction sequence changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_es - build profile ID extraction sequence changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3546,8 +3546,8 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_tcam - build profile id tcam changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_tcam - build profile ID TCAM changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3586,7 +3586,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_xlt1 - build xlt1 changes
+ * ice_prof_bld_xlt1 - build XLT1 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3619,7 +3619,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
}
/**
- * ice_prof_bld_xlt2 - build xlt2 changes
+ * ice_prof_bld_xlt2 - build XLT2 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3662,7 +3662,7 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
/**
* ice_upd_prof_hw - update hardware using the change list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @chgs: the list of changes to make in hardware
*/
@@ -3763,16 +3763,16 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
/**
* ice_add_prof - add profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @id: profile tracking id
+ * @id: profile tracking ID
* @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
* @es: extraction sequence (length of array is determined by the block)
*
* This function registers a profile, which matches a set of PTYPES with a
* particular extraction sequence. While the hardware profile is allocated
* it will not be written until the first call to ice_add_flow that specifies
- * the id value used here.
+ * the ID value used here.
*/
enum ice_status
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
@@ -3787,7 +3787,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/* search for existing profile */
status = ice_find_prof_id(hw, blk, es, &prof_id);
if (status) {
- /* allocate profile id */
+ /* allocate profile ID */
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
@@ -3851,7 +3851,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/**
* ice_search_prof_id - Search for a profile tracking ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
@@ -3876,7 +3876,7 @@ ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_set_prof_context - Set context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: context
@@ -3895,7 +3895,7 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt)
/**
* ice_get_prof_context - Get context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: pointer to variable to receive the context
@@ -3914,7 +3914,7 @@ ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt)
/**
* ice_vsig_prof_id_count - count profiles in a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
*/
@@ -3933,8 +3933,8 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_rel_tcam_idx - release a tcam index
- * @hw: pointer to the hw struct
+ * ice_rel_tcam_idx - release a TCAM index
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @idx: the index to release
*/
@@ -3947,13 +3947,13 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
enum ice_status status;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
dc_msk, nm_msk);
if (status)
return status;
- /* release the tcam entry */
+ /* release the TCAM entry */
status = ice_free_tcam_ent(hw, blk, idx);
return status;
@@ -3961,7 +3961,7 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
/**
* ice_rem_prof_id - remove one profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
@@ -4007,7 +4007,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_vsig - remove VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to remove
* @chg: the change list
@@ -4069,7 +4069,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_prof_id_vsig - remove a specific profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @hdl: profile handle indicating which profile to remove
@@ -4105,7 +4105,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_rem_flow_all - remove all flows with a particular profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*/
@@ -4143,11 +4143,11 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_rem_prof - remove profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
- * This will remove the profile specified by the id parameter, which was
+ * This will remove the profile specified by the ID parameter, which was
* previously created through ice_add_prof. If any existing entries
* are associated with this profile, they will be removed as well.
*/
@@ -4177,7 +4177,7 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_get_prof_ptgs - get ptgs for profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: profile handle
* @chg: change list
@@ -4190,7 +4190,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4231,7 +4231,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
/**
* ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG from which to copy the list
* @lst: output list
@@ -4272,7 +4272,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_to_lst - add profile entry to a list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @lst: the list to be added to
* @hdl: profile handle of entry to add
@@ -4320,7 +4320,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
/**
* ice_move_vsi - move VSI to another VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the VSI to move
* @vsig: the VSIG to move the VSI to
@@ -4357,15 +4357,15 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
}
/**
- * ice_prof_tcam_ena_dis - add enable or disable tcam change
- * @hw: pointer to the hw struct
+ * ice_prof_tcam_ena_dis - add enable or disable TCAM change
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @enable: true to enable, false to disable
- * @vsig: the vsig of the tcam entry
- * @tcam: pointer the tcam info structure of the tcam to disable
+ * @vsig: the vsig of the TCAM entry
+ * @tcam: pointer the TCAM info structure of the TCAM to disable
* @chg: the change list
*
- * This function appends an enable or disable tcam entry in the change log
+ * This function appends an enable or disable TCAM entry in the change log
*/
static enum ice_status
ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
@@ -4418,7 +4418,7 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
/**
* ice_adj_prof_priorities - adjust profile based on priorities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG for which to adjust profile priorities
* @chg: the change list
@@ -4487,7 +4487,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_id_vsig - add profile to VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to which this profile is to be added
* @hdl: the profile handle indicating the profile to add
@@ -4506,7 +4506,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4524,7 +4524,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
t->prof_id = map->prof_id;
t->tcam_count = map->ptype_count;
- /* create tcam entries */
+ /* create TCAM entries */
for (i = 0; i < map->ptype_count; i++) {
enum ice_status status;
u16 tcam_idx;
@@ -4543,7 +4543,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (!p)
goto err_ice_add_prof_id_vsig;
- /* allocate the tcam entry index */
+ /* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
if (status)
goto err_ice_add_prof_id_vsig;
@@ -4560,7 +4560,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
p->vsig = vsig;
p->tcam_idx = t->tcam[i].tcam_idx;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
t->tcam[i].prof_id,
t->tcam[i].ptg, vsig, 0, 0,
@@ -4568,8 +4568,8 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many tcam entries
- * are using this hw profile id
+ /* this increments the reference count of how many TCAM entries
+ * are using this HW profile ID
*/
status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
@@ -4590,7 +4590,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_create_prof_id_vsig - add a new VSIG with a single profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @hdl: the profile handle of the profile that will be added to the VSIG
@@ -4632,7 +4632,7 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
/**
* ice_create_vsig_from_list - create a new VSIG with a list of profiles
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @lst: the list of profile that will be added to the VSIG
@@ -4666,7 +4666,7 @@ ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
/**
* ice_find_prof_vsig - find a VSIG with a specific profile handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: the profile handle of the profile to search for
* @vsig: returns the VSIG with the matching profile
@@ -4697,13 +4697,13 @@ ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
/**
* ice_add_prof_id_flow - add profile flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi to enable with the profile specified by id
+ * @vsi: the VSI to enable with the profile specified by ID
* @hdl: profile handle
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4725,7 +4725,7 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
return status;
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool only_vsi;
@@ -4805,10 +4805,10 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
}
} else {
/* need to find or add a VSIG */
- /* search for an exising VSIG with an exact charc match */
+ /* search for an existing VSIG with an exact charc match */
if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
@@ -4847,14 +4847,14 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_add_flow - add flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs to enable with the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs to enable with the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4875,7 +4875,7 @@ ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,
/**
* ice_rem_prof_from_list - remove a profile from list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lst: list to remove the profile from
* @hdl: the profile handle indicating the profile to remove
*/
@@ -4897,13 +4897,13 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
/**
* ice_rem_prof_id_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi from which to remove the profile specified by id
+ * @vsi: the VSI from which to remove the profile specified by ID
* @hdl: profile tracking handle
*
* Calling this function will update the hardware tables to remove the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be disabled.
*/
enum ice_status
@@ -4918,7 +4918,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
INIT_LIST_HEAD(©);
INIT_LIST_HEAD(&chg);
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool last_profile;
@@ -4979,7 +4979,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else if (ice_find_dup_props_vsig(hw, blk, ©,
&vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
* list
*/
@@ -4991,7 +4991,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else {
/* since no existing VSIG supports this
* characteristic pattern, we need to create a
- * new VSIG and tcam entries
+ * new VSIG and TCAM entries
*/
status = ice_create_vsig_from_lst(hw, blk, vsi,
©, &chg);
@@ -5029,14 +5029,14 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_rem_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs from which to remove the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs from which to remove the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* The function will remove flows from the specified VSIs that were enabled
- * using ice_add_flow. The id value will indicated which profile will be
+ * using ice_add_flow. The ID value will indicated which profile will be
* removed. Once successfully called, the flow will be disabled.
*/
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 81e89aeeb..23fffed75 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -59,7 +59,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg);
enum ice_status
ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg);
-/* XLT2/Vsi group functions */
+/* XLT2/VSI group functions */
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 9f98f4f2a..aed23a067 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -350,7 +350,7 @@ struct ice_sw_fv_list_entry {
};
#pragma pack(1)
-/* The BOOST tcam stores the match packet header in reverse order, meaning
+/* The BOOST TCAM stores the match packet header in reverse order, meaning
* the fields are reversed; in addition, this means that the normally big endian
* fields of the packet are now little endian.
*/
@@ -602,7 +602,7 @@ struct ice_xlt2 {
};
/* Extraction sequence - list of match fields:
- * protocol id, offset, profile length
+ * protocol ID, offset, profile length
*/
union ice_match_fld {
struct {
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index cc3f69b51..574c927c4 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -292,6 +292,9 @@ struct ice_flow_prof_params {
u16 entry_length; /* # of bytes formatted entry will require */
u8 es_cnt;
+ /* For ACL, the es[0] will have the data of ICE_RX_MDID_PKT_FLAGS_15_0
+ * This will give us the direction flags.
+ */
struct ice_fv_word es[ICE_MAX_FV_WORDS];
ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
@@ -494,7 +497,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
/**
* ice_flow_xtract_fld - Create an extraction sequence entry for the given field
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: packet segment index of the field to be extracted
* @fld: ID of field to be extracted
@@ -656,7 +659,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_xtract_raws - Create extract sequence entries for raw bytes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: index of packet segment whose raw fields are to be be extracted
*/
@@ -728,7 +731,7 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_create_xtrct_seq - Create an extraction sequence for given segments
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*
* This function iterates through all matched fields in the given segments, and
@@ -768,7 +771,7 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
/**
* ice_flow_proc_segs - process all packet segments associated with a profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*/
static enum ice_status
@@ -807,7 +810,7 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
/**
* ice_flow_find_prof_conds - Find a profile matching headers and conditions
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -852,7 +855,7 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_find_prof - Look up a profile matching headers and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -874,7 +877,7 @@ ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_find_prof_id - Look up a profile with given profile ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: unique ID to identify this flow profile
*/
@@ -893,7 +896,7 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
/**
* ice_flow_rem_entry_sync - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry: flow entry to be removed
*/
static enum ice_status
@@ -917,7 +920,7 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
/**
* ice_flow_add_prof_sync - Add a flow profile for packet segments and fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1057,7 +1060,7 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1089,7 +1092,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1115,7 +1118,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_add_prof - Add a flow profile for packet segments and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1160,7 +1163,7 @@ ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_rem_prof - Remove a flow profile and all entries associated with it
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block for which the flow profile is to be removed
* @prof_id: unique ID of the flow profile to be removed
*/
@@ -1188,11 +1191,11 @@ ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
}
/**
- * ice_flow_get_hw_prof - return the hw profile for a specific profile id handle
- * @hw: pointer to the hw struct
+ * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
+ * @hw: pointer to the HW struct
* @blk: classification stage
- * @prof_id: the profile id handle
- * @hw_prof_id: pointer to variable to receive the hw profile id
+ * @prof_id: the profile ID handle
+ * @hw_prof_id: pointer to variable to receive the HW profile ID
*/
enum ice_status
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
@@ -1211,7 +1214,7 @@ ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_find_entry - look for a flow entry using its unique ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @entry_id: unique ID to identify this flow entry
*
@@ -1249,7 +1252,7 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
/**
* ice_flow_add_entry - Add a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: ID of the profile to add a new flow entry to
* @entry_id: unique ID to identify this flow entry
@@ -1335,7 +1338,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_rem_entry - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry_h: handle to the flow entry to be removed
*/
enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h)
@@ -1712,12 +1715,12 @@ void ice_rem_all_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_rem_vsi_rss_cfg - remove RSS configurations associated with vsi
+ * ice_rem_vsi_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*
* This function will iterate through all flow profiles and disassociate
- * the vsi from that profile. If the flow profile has no vsis it will
+ * the VSI from that profile. If the flow profile has no VSIs it will
* be removed.
*/
enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
@@ -1847,7 +1850,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Search for a flow profile that has matching headers, hash fields
- * and has the input vsi associated to it. If found, no further
+ * and has the input VSI associated to it. If found, no further
* operations required and exit.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1858,8 +1861,8 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Check if a flow profile exists with the same protocol headers and
- * associated with the input vsi. If so disasscociate the vsi from
- * this profile. The vsi will be added to a new profile created with
+ * associated with the input VSI. If so disasscociate the VSI from
+ * this profile. The VSI will be added to a new profile created with
* the protocol header and new hash field configuration.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1871,7 +1874,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
else
goto exit;
- /* Remove profile if it has no vsis associated */
+ /* Remove profile if it has no VSIs associated */
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI)) {
status = ice_flow_rem_prof_sync(hw, blk, prof);
if (status)
@@ -1880,7 +1883,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/* Search for a profile that has same match fields only. If this
- * exists then associate the vsi to this profile.
+ * exists then associate the VSI to this profile.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
vsi_handle,
@@ -2003,7 +2006,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
*
* This function will lookup the flow profile based on the input
* hash field bitmap, iterate through the profile entry list of
- * that profile and find entry associated with input vsi to be
+ * that profile and find entry associated with input VSI to be
* removed. Calls are made to underlying flow apis which will in
* turn build or update buffers for RSS XLT1 section.
*/
@@ -2025,7 +2028,7 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/**
- * ice_replay_rss_cfg - remove RSS configurations associated with vsi
+ * ice_replay_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*/
@@ -2057,13 +2060,13 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
* @hdrs: protocol header type
*
* This function will return the match fields of the first instance of flow
- * profile having the given header types and containing input vsi
+ * profile having the given header types and containing input VSI
*/
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
{
struct ice_rss_cfg *r, *rss_cfg = NULL;
- /* verify if the protocol header is non zero and vsi is valid */
+ /* verify if the protocol header is non zero and VSI is valid */
if (hdrs == ICE_FLOW_SEG_HDR_NONE || !ice_is_vsi_valid(hw, vsi_handle))
return ICE_HASH_INVALID;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 51d7c3ac9..265e1ee3e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -227,7 +227,6 @@ struct ice_flow_entry {
u64 id;
u16 vsi_handle;
enum ice_flow_priority priority;
-
struct ice_flow_prof *prof;
/* Flow entry's content */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index d27045f7e..4a1ea0c7d 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -6,7 +6,7 @@
#define _ICE_LAN_TX_RX_H_
#include "ice_osdep.h"
-/* RX Descriptors */
+/* Rx Descriptors */
union ice_16byte_rx_desc {
struct {
__le64 pkt_addr; /* Packet buffer address */
@@ -20,7 +20,7 @@ union ice_16byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -46,7 +46,7 @@ union ice_32byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -181,15 +181,15 @@ enum ice_rx_desc_status_bits {
ICE_RX_DESC_STATUS_L2TAG1P_S = 2,
ICE_RX_DESC_STATUS_L3L4P_S = 3,
ICE_RX_DESC_STATUS_CRCP_S = 4,
- ICE_RX_DESC_STATUS_TSYNINDX_S = 5, /* 2 BITS */
+ ICE_RX_DESC_STATUS_TSYNINDX_S = 5,
ICE_RX_DESC_STATUS_TSYNVALID_S = 7,
ICE_RX_DESC_STATUS_EXT_UDP_0_S = 8,
- ICE_RX_DESC_STATUS_UMBCAST_S = 9, /* 2 BITS */
+ ICE_RX_DESC_STATUS_UMBCAST_S = 9,
ICE_RX_DESC_STATUS_FLM_S = 11,
- ICE_RX_DESC_STATUS_FLTSTAT_S = 12, /* 2 BITS */
+ ICE_RX_DESC_STATUS_FLTSTAT_S = 12,
ICE_RX_DESC_STATUS_LPBK_S = 14,
ICE_RX_DESC_STATUS_IPV6EXADD_S = 15,
- ICE_RX_DESC_STATUS_RESERVED2_S = 16, /* 2 BITS */
+ ICE_RX_DESC_STATUS_RESERVED2_S = 16,
ICE_RX_DESC_STATUS_INT_UDP_0_S = 18,
ICE_RX_DESC_STATUS_LAST /* this entry must be last!!! */
};
@@ -325,8 +325,8 @@ enum ice_rx_desc_ext_status_bits {
/* Note: These are predefined bit offsets */
ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0,
ICE_RX_DESC_EXT_STATUS_L2TAG3P_S = 1,
- ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2, /* 2 BITS */
- ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4, /* 2 BITS */
+ ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2,
+ ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4,
ICE_RX_DESC_EXT_STATUS_FDLONGB_S = 9,
ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11,
};
@@ -373,7 +373,7 @@ enum ice_rx_prog_status_desc_error_bits {
ICE_RX_PROG_STATUS_DESC_NO_FD_ENTRY_S = 1,
};
-/* RX Flex Descriptor
+/* Rx Flex Descriptor
* This descriptor is used instead of the legacy version descriptor when
* ice_rlan_ctx.adv_desc is set
*/
@@ -387,7 +387,7 @@ union ice_32b_rx_flex_desc {
} read;
struct {
/* Qword 0 */
- u8 rxdid; /* descriptor builder profile id */
+ u8 rxdid; /* descriptor builder profile ID */
u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */
__le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */
__le16 pkt_len; /* [15:14] are reserved */
@@ -422,12 +422,12 @@ union ice_32b_rx_flex_desc {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 2
+ * RxDID Profile ID 2
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Flow Id higher 16-bits
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Flow ID higher 16-bits
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic {
/* Qword 0 */
@@ -461,8 +461,8 @@ struct ice_32b_rx_flex_desc_nic {
};
/* Rx Flex Descriptor Switch Profile
- * RxDID Profile Id 3
- * Flex-field 0: Source Vsi
+ * RxDID Profile ID 3
+ * Flex-field 0: Source VSI
*/
struct ice_32b_rx_flex_desc_sw {
/* Qword 0 */
@@ -491,8 +491,8 @@ struct ice_32b_rx_flex_desc_sw {
};
/* Rx Flex Descriptor NIC VEB Profile
- * RxDID Profile Id 4
- * Flex-field 0: Destination Vsi
+ * RxDID Profile ID 4
+ * Flex-field 0: Destination VSI
*/
struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 0 */
@@ -505,8 +505,8 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 1 */
__le16 status_error0;
__le16 l2tag1;
- __le16 dst_vsi; /* [0:12]: destination vsi */
- /* 13: vsi valid bit */
+ __le16 dst_vsi; /* [0:12]: destination VSI */
+ /* 13: VSI valid bit */
/* [14:15] are reserved */
__le16 flex_field_1;
@@ -523,7 +523,7 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
};
/* Rx Flex Descriptor NIC ACL Profile
- * RxDID Profile Id 5
+ * RxDID Profile ID 5
* Flex-field 0: ACL Counter 0
* Flex-field 1: ACL Counter 1
* Flex-field 2: ACL Counter 2
@@ -556,12 +556,12 @@ struct ice_32b_rx_flex_desc_nic_acl_dbg {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 6
+ * RxDID Profile ID 6
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Source Vsi
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Source VSI
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic_2 {
/* Qword 0 */
@@ -818,7 +818,7 @@ enum ice_rlan_ctx_rx_hsplit_1 {
ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS = 2,
};
-/* TX Descriptor */
+/* Tx Descriptor */
struct ice_tx_desc {
__le64 buf_addr; /* Address of descriptor's data buf */
__le64 cmd_type_offset_bsz;
@@ -846,15 +846,15 @@ enum ice_tx_desc_cmd_bits {
ICE_TX_DESC_CMD_RSVD = 0x0004,
ICE_TX_DESC_CMD_IL2TAG1 = 0x0008,
ICE_TX_DESC_CMD_DUMMY = 0x0010,
- ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060, /* 2 BITS */
+ ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000,
+ ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020,
+ ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040,
+ ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060,
ICE_TX_DESC_CMD_RSVD2 = 0x0080,
- ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300, /* 2 BITS */
+ ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000,
+ ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100,
+ ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200,
+ ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300,
ICE_TX_DESC_CMD_RE = 0x0400,
ICE_TX_DESC_CMD_RSVD3 = 0x0800,
};
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 25a2ca4cb..92de2ec3b 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -7,7 +7,7 @@
/**
* ice_aq_read_nvm
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @module_typeid: module pointer location in words from the NVM beginning
* @offset: byte offset from the module beginning
* @length: length of the section to be read (in bytes from the offset)
@@ -248,7 +248,7 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
/**
* ice_init_nvm - initializes NVM setting
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function reads and populates NVM settings such as Shadow RAM size,
* max_timeout, and blank_nvm_mode
@@ -264,7 +264,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
ice_debug(hw, ICE_DBG_TRACE, "ice_init_nvm");
- /* The SR size is stored regardless of the nvm programming mode
+ /* The SR size is stored regardless of the NVM programming mode
* as the blank mode may be used in the factory line.
*/
gens_stat = rd32(hw, GLNVM_GENS);
@@ -357,7 +357,7 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
/**
* ice_nvm_validate_checksum
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Verify NVM PFA checksum validity (0x0706)
*/
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 7b92c7105..f96964d86 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -18,7 +18,7 @@
/* Max recipes that can be chained */
#define ICE_MAX_CHAIN_RECIPE 5
-/* 1 word reserved for switch id from allowed 5 words.
+/* 1 word reserved for switch ID from allowed 5 words.
* So a recipe can have max 4 words. And you can chain 5 such recipes
* together. So maximum words that can be programmed for look up is 5 * 4.
*/
@@ -128,7 +128,7 @@ enum ice_prot_id {
#define ICE_PROTOCOL_MAX_ENTRIES 16
-/* Mapping of software defined protocol id to hardware defined protocol id */
+/* Mapping of software defined protocol ID to hardware defined protocol ID */
struct ice_protocol_entry {
enum ice_protocol_type type;
u8 protocol_id;
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 7acbae62c..2edc305b5 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -45,9 +45,9 @@ ice_sched_add_root_node(struct ice_port_info *pi,
/**
* ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
* @start_node: pointer to the starting ice_sched_node struct in a sub-tree
- * @teid: node teid to search
+ * @teid: node TEID to search
*
- * This function searches for a node matching the teid in the scheduling tree
+ * This function searches for a node matching the TEID in the scheduling tree
* from the SW DB. The search is recursive and is restricted by the number of
* layers it has searched through; stopping at the max supported layer.
*
@@ -68,7 +68,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
return NULL;
- /* Check if teid matches to any of the children nodes */
+ /* Check if TEID matches to any of the children nodes */
for (i = 0; i < start_node->num_children; i++)
if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
return start_node->children[i];
@@ -88,7 +88,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
/**
* ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cmd_opc: cmd opcode
* @elems_req: number of elements to request
* @buf: pointer to buffer
@@ -120,7 +120,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
/**
* ice_aq_query_sched_elems - query scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -201,7 +201,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
/**
* ice_aq_delete_sched_elems - delete scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to delete
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -221,13 +221,13 @@ ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
}
/**
- * ice_sched_remove_elems - remove nodes from hw
- * @hw: pointer to the hw struct
+ * ice_sched_remove_elems - remove nodes from HW
+ * @hw: pointer to the HW struct
* @parent: pointer to the parent node
* @num_nodes: number of nodes
* @node_teids: array of node teids to be deleted
*
- * This function remove nodes from hw
+ * This function remove nodes from HW
*/
static enum ice_status
ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
@@ -260,7 +260,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
/**
* ice_sched_get_first_node - get the first node of the given layer
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @parent: pointer the base node of the subtree
* @layer: layer number
*
@@ -381,7 +381,7 @@ void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
/**
* ice_aq_get_dflt_topo - gets default scheduler topology
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -411,7 +411,7 @@ ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
/**
* ice_aq_add_sched_elems - adds scheduling element
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: the number of groups that are requested to be added
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -432,7 +432,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_cfg_sched_elems - configures scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -453,7 +453,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_move_sched_elems - move scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to move
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -474,7 +474,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_suspend_sched_elems - suspend scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to suspend
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -495,7 +495,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_resume_sched_elems - resume scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to resume
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -516,7 +516,7 @@ ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_query_sched_res - query scheduler resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf_size: buffer size in bytes
* @buf: pointer to buffer
* @cd: pointer to command details structure or NULL
@@ -535,13 +535,13 @@ ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
}
/**
- * ice_sched_suspend_resume_elems - suspend or resume hw nodes
- * @hw: pointer to the hw struct
+ * ice_sched_suspend_resume_elems - suspend or resume HW nodes
+ * @hw: pointer to the HW struct
* @num_nodes: number of nodes
* @node_teids: array of node teids to be suspended or resumed
* @suspend: true means suspend / false means resume
*
- * This function suspends or resumes hw nodes
+ * This function suspends or resumes HW nodes
*/
static enum ice_status
ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
@@ -577,7 +577,7 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
/**
* ice_aq_rl_profile - performs a rate limiting task
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
* @num_profiles: the number of profiles
* @buf: pointer to buffer
@@ -609,14 +609,14 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
/**
* ice_aq_add_rl_profile - adds rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to be add
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_added: total number of profiles added to return
* @cd: pointer to command details structure
*
- * Add rl profile (0x0410)
+ * Add RL profile (0x0410)
*/
static enum ice_status
ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -631,13 +631,13 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
/**
* ice_aq_query_rl_profile - query rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure
*
- * Query rl profile (0x0411)
+ * Query RL profile (0x0411)
*/
enum ice_status
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -649,15 +649,15 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_aq_remove_rl_profile - removes rl profile(s)
- * @hw: pointer to the hw struct
+ * ice_aq_remove_rl_profile - removes RL profile(s)
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to remove
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_removed: total number of profiles removed to return
* @cd: pointer to command details structure or NULL
*
- * Remove rl profile (0x0415)
+ * Remove RL profile (0x0415)
*/
static enum ice_status
ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -671,10 +671,10 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_sched_clear_rl_prof - clears rl prof entries
+ * ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
- * This function removes all rl profile from hw as well as from SW DB.
+ * This function removes all RL profile from HW as well as from SW DB.
*/
static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
{
@@ -704,10 +704,10 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
}
/**
- * ice_sched_clear_agg - clears the agg related information
+ * ice_sched_clear_agg - clears the aggregator related information
* @hw: pointer to the hardware structure
*
- * This function removes agg list and free up agg related memory
+ * This function removes aggregator list and free up aggregator related memory
* previously allocated.
*/
void ice_sched_clear_agg(struct ice_hw *hw)
@@ -742,7 +742,7 @@ static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
{
if (!pi)
return;
- /* remove rl profiles related lists */
+ /* remove RL profiles related lists */
ice_sched_clear_rl_prof(pi);
if (pi->root) {
ice_free_sched_node(pi, pi->root);
@@ -770,7 +770,7 @@ void ice_sched_clear_port(struct ice_port_info *pi)
/**
* ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Cleanup scheduling elements from SW DB for all the ports
*/
@@ -795,7 +795,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
/**
* ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_l2_nodes: the number of L2 nodes whose CGDs to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -821,16 +821,16 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
/**
- * ice_sched_add_elems - add nodes to hw and SW DB
+ * ice_sched_add_elems - add nodes to HW and SW DB
* @pi: port information structure
* @tc_node: pointer to the branch node
* @parent: pointer to the parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes
* @num_nodes_added: pointer to num nodes added
- * @first_node_teid: if new nodes are added then return the teid of first node
+ * @first_node_teid: if new nodes are added then return the TEID of first node
*
- * This function add nodes to hw as well as to SW DB for a given layer
+ * This function add nodes to HW as well as to SW DB for a given layer
*/
static enum ice_status
ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
@@ -924,7 +924,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
* @parent: pointer to parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes to be added
- * @first_node_teid: pointer to the first node teid
+ * @first_node_teid: pointer to the first node TEID
* @num_nodes_added: pointer to number of nodes added
*
* This function add nodes to a given layer.
@@ -976,7 +976,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
*num_nodes_added += num_added;
}
- /* Don't modify the first node teid memory if the first node was
+ /* Don't modify the first node TEID memory if the first node was
* added already in the above call. Instead send some temp
* memory for all other recursive calls.
*/
@@ -1008,7 +1008,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
/**
* ice_sched_get_qgrp_layer - get the current queue group layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current queue group layer number
*/
@@ -1020,7 +1020,7 @@ static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
/**
* ice_sched_get_vsi_layer - get the current VSI layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current VSI layer number
*/
@@ -1031,7 +1031,7 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
* 7 4
* 5 or less sw_entry_point_layer
*/
- /* calculate the vsi layer based on number of layers. */
+ /* calculate the VSI layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
@@ -1043,17 +1043,17 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
/**
* ice_sched_get_agg_layer - get the current aggregator layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current aggregator layer number
*/
static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
{
- /* Num Layers agg layer
+ /* Num Layers aggregator layer
* 9 4
* 7 or less sw_entry_point_layer
*/
- /* calculate the agg layer based on number of layers. */
+ /* calculate the aggregator layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
@@ -1226,11 +1226,11 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)
}
/**
- * ice_sched_get_node - Get the struct ice_sched_node for given teid
+ * ice_sched_get_node - Get the struct ice_sched_node for given TEID
* @pi: port information structure
* @teid: Scheduler node TEID
*
- * This function retrieves the ice_sched_node struct for given teid from
+ * This function retrieves the ice_sched_node struct for given TEID from
* the SW DB and returns it to the caller.
*/
struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
@@ -1313,7 +1313,7 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
/**
* ice_sched_find_node_in_subtree - Find node in part of base node subtree
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @base: pointer to the base node
* @node: pointer to the node to search
*
@@ -1345,13 +1345,13 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
}
/**
- * ice_sched_get_free_qparent - Get a free lan or rdma q group node
+ * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: branch number
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function retrieves a free lan or rdma q group node
+ * This function retrieves a free LAN or RDMA queue group node
*/
struct ice_sched_node *
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -1369,11 +1369,11 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
if (!vsi_ctx)
return NULL;
vsi_node = vsi_ctx->sched.vsi_node[tc];
- /* validate invalid VSI id */
+ /* validate invalid VSI ID */
if (!vsi_node)
goto lan_q_exit;
- /* get the first q group node from VSI sub-tree */
+ /* get the first queue group node from VSI sub-tree */
qgrp_node = ice_sched_get_first_node(pi->hw, vsi_node, qgrp_layer);
while (qgrp_node) {
/* make sure the qgroup node is part of the VSI subtree */
@@ -1389,12 +1389,12 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_get_vsi_node - Get a VSI node based on VSI id
- * @hw: pointer to the hw struct
+ * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
* @vsi_handle: software VSI handle
*
- * This function retrieves a VSI node for a given VSI id from a given
+ * This function retrieves a VSI node for a given VSI ID from a given
* TC branch
*/
struct ice_sched_node *
@@ -1418,13 +1418,13 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
}
/**
- * ice_sched_get_agg_node - Get an aggregator node based on agg id
- * @hw: pointer to the hw struct
+ * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function retrieves an aggregator node for a given agg id from a given
- * TC branch
+ * This function retrieves an aggregator node for a given aggregator ID from
+ * a given TC branch
*/
struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
@@ -1448,7 +1448,7 @@ ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
/**
* ice_sched_check_node - Compare node parameters between SW DB and HW DB
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function queries and compares the HW element with SW DB node parameters
@@ -1475,7 +1475,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
/**
* ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_qs: number of queues
* @num_nodes: num nodes array
*
@@ -1491,7 +1491,7 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
qgl = ice_sched_get_qgrp_layer(hw);
vsil = ice_sched_get_vsi_layer(hw);
- /* calculate num nodes from q group to VSI layer */
+ /* calculate num nodes from queue group to VSI layer */
for (i = qgl; i > vsil; i--) {
/* round to the next integer if there is a remainder */
num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
@@ -1507,10 +1507,10 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
* @vsi_handle: software VSI handle
* @tc_node: pointer to the TC node
* @num_nodes: pointer to the num nodes that needs to be added per layer
- * @owner: node owner (lan or rdma)
+ * @owner: node owner (LAN or RDMA)
*
* This function adds the VSI child nodes to tree. It gets called for
- * lan and rdma separately.
+ * LAN and RDMA separately.
*/
static enum ice_status
ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
@@ -1559,7 +1559,7 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @tc_node: pointer to TC node
* @num_nodes: pointer to num nodes array
*
@@ -1678,7 +1678,7 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
/* calculate number of supported nodes needed for this VSI */
ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes);
- /* add vsi supported nodes to tc subtree */
+ /* add VSI supported nodes to TC subtree */
return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
num_nodes);
}
@@ -1740,7 +1740,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
return status;
vsi_ctx->sched.max_lanq[tc] = new_numqs;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -1749,7 +1749,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
* @vsi_handle: software VSI handle
* @tc: TC number
* @maxqs: max number of queues
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
* @enable: TC enabled or disabled
*
* This function adds/updates VSI nodes based on the number of queues. If TC is
@@ -1774,7 +1774,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
return ICE_ERR_PARAM;
vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
- /* suspend the VSI if tc is not enabled */
+ /* suspend the VSI if TC is not enabled */
if (!enable) {
if (vsi_node && vsi_node->in_use) {
u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
@@ -1825,11 +1825,11 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
}
/**
- * ice_sched_rm_agg_vsi_entry - remove agg related vsi info entry
+ * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function removes single aggregator vsi info entry from
+ * This function removes single aggregator VSI info entry from
* aggregator list.
*/
static void
@@ -1876,9 +1876,9 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
* ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function removes the VSI and its lan or rdma children nodes from the
+ * This function removes the VSI and its LAN or RDMA children nodes from the
* scheduler tree.
*/
static enum ice_status
@@ -1931,7 +1931,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
ice_free_sched_node(pi, vsi_node);
vsi_ctx->sched.vsi_node[i] = NULL;
- /* clean up agg related vsi info if any */
+ /* clean up aggregator related VSI info if any */
ice_sched_rm_agg_vsi_info(pi, vsi_handle);
}
if (owner == ICE_SCHED_NODE_OWNER_LAN)
@@ -1945,11 +1945,11 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
}
/**
- * ice_rm_vsi_lan_cfg - remove VSI and its lan children nodes
+ * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function clears the VSI and its lan children nodes from scheduler tree
+ * This function clears the VSI and its LAN children nodes from scheduler tree
* for all TCs.
*/
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
@@ -1960,7 +1960,7 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
/**
* ice_sched_is_tree_balanced - Check tree nodes are identical or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function compares all the nodes for a given tree against HW DB nodes
@@ -1983,15 +1983,15 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
}
/**
- * ice_aq_query_node_to_root - retrieve the tree topology for a given node teid
- * @hw: pointer to the hw struct
- * @node_teid: node teid
+ * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure or NULL
*
* This function retrieves the tree topology from the firmware for a given
- * node teid to the root node.
+ * node TEID to the root node.
*/
enum ice_status
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
@@ -2008,12 +2008,12 @@ ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
}
/**
- * ice_get_agg_info - get the agg id
+ * ice_get_agg_info - get the aggregator ID
* @hw: pointer to the hardware structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function validates agg id. The function returns info if agg id is
- * prsent in list otherwise it returns null.
+ * This function validates aggregator ID. The function returns info if
+ * aggregator ID is present in list otherwise it returns null.
*/
static struct ice_sched_agg_info*
ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
@@ -2029,14 +2029,14 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
- * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default agg
+ * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
* @tc: traffic class number
* @rm_vsi_info: true or false
*
* This function move all the VSI(s) to the default aggregator and delete
- * agg vsi info based on passed in boolean parameter rm_vsi_info. The
+ * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
* caller holds the scheduler lock.
*/
static enum ice_status
@@ -2052,7 +2052,7 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
ice_sched_agg_vsi_info, list_entry) {
u16 vsi_handle = agg_vsi_info->vsi_handle;
- /* Move VSI to default agg */
+ /* Move VSI to default aggregator */
if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
continue;
@@ -2072,15 +2072,15 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove agg configuration for tc
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
* @pi: port information structure
- * @agg_info: aggregator id
- * @tc: tc number
+ * @agg_info: aggregator ID
+ * @tc: TC number
* @rm_vsi_info: bool value true or false
*
- * This function removes agg reference to vsi of given tc. It removes the agg
- * configuration completely for requested tc. The caller needs to hold the
- * scheduler lock.
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
*/
static enum ice_status
ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
@@ -2107,12 +2107,12 @@ ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
}
/**
- * ice_save_agg_tc_bitmap - save agg TC bitmap
+ * ice_save_agg_tc_bitmap - save aggregator TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc_bitmap: 8 bits TC bitmap
*
- * Save agg TC bitmap. This function needs to be called with scheduler
+ * Save aggregator TC bitmap. This function needs to be called with scheduler
* lock held.
*/
static enum ice_status
@@ -2130,19 +2130,19 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_sched_cfg_agg - configure agg node
+ * ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* It registers a unique aggregator node into scheduler services. It
* allows a user to register with a unique ID to track it's resources.
* The aggregator type determines if this is a queue group, VSI group
- * or aggregator group. It then creates the agg node(s) for requested
- * tc(s) or removes an existing agg node including its configuration
- * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release agg
- * resources and remove agg id.
+ * or aggregator group. It then creates the aggregator node(s) for requested
+ * TC(s) or removes an existing aggregator node including its configuration
+ * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
+ * resources and remove aggregator ID.
* This function needs to be called with scheduler lock held.
*/
static enum ice_status
@@ -2156,7 +2156,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info = ice_get_agg_info(hw, agg_id);
if (!agg_info) {
- /* Creat new entry for new agg id */
+ /* Create new entry for new aggregator ID */
agg_info = (struct ice_sched_agg_info *)
ice_malloc(hw, sizeof(*agg_info));
if (!agg_info) {
@@ -2167,32 +2167,32 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info->agg_type = agg_type;
agg_info->tc_bitmap[0] = 0;
- /* Initialize the aggregator vsi list head */
+ /* Initialize the aggregator VSI list head */
INIT_LIST_HEAD(&agg_info->agg_vsi_list);
- /* Add new entry in agg list */
+ /* Add new entry in aggregator list */
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
- /* Create agg node(s) for requested tc(s) */
+ /* Create aggregator node(s) for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
- /* Delete agg cfg tc if it exists previously */
+ /* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
if (status)
break;
continue;
}
- /* Check if agg node for tc already exists */
+ /* Check if aggregator node for TC already exists */
if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
continue;
- /* Create new agg node for tc */
+ /* Create new aggregator node for TC */
status = ice_sched_add_agg_cfg(pi, agg_id, tc);
if (status)
break;
- /* Save agg node's tc information */
+ /* Save aggregator node's TC information */
ice_set_bit(tc, agg_info->tc_bitmap);
}
exit_reg_agg:
@@ -2200,10 +2200,10 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_agg - config agg node
+ * ice_cfg_agg - config aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* This function configures aggregator node(s).
@@ -2226,12 +2226,12 @@ ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
}
/**
- * ice_get_agg_vsi_info - get the agg id
+ * ice_get_agg_vsi_info - get the aggregator ID
* @agg_info: aggregator info
* @vsi_handle: software VSI handle
*
- * The function returns agg VSI info based on VSI handle. This function needs
- * to be called with scheduler lock held.
+ * The function returns aggregator VSI info based on VSI handle. This function
+ * needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_vsi_info*
ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
@@ -2247,13 +2247,13 @@ ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
}
/**
- * ice_get_vsi_agg_info - get the agg info of VSI
+ * ice_get_vsi_agg_info - get the aggregator info of VSI
* @hw: pointer to the hardware structure
* @vsi_handle: Sw VSI handle
*
- * The function returns agg info of VSI represented via vsi_handle. The VSI has
- * in this case a different aggregator than the default one. This function
- * needs to be called with scheduler lock held.
+ * The function returns aggregator info of VSI represented via vsi_handle. The
+ * VSI has in this case a different aggregator than the default one. This
+ * function needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_info*
ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
@@ -2274,9 +2274,9 @@ ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Save VSI to aggregator TC bitmap. This function needs to call with scheduler
* lock held.
@@ -2301,15 +2301,15 @@ ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_sched_assoc_vsi_to_agg - associate or move VSI to new or default agg
+ * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* This function moves VSI to a new or default aggregator node. If VSI is
- * already associated to the agg node then no operation is performed on the
- * tree. This function needs to be called with scheduler lock held.
+ * already associated to the aggregator node then no operation is performed on
+ * the tree. This function needs to be called with scheduler lock held.
*/
static enum ice_status
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
@@ -2329,22 +2329,22 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
/* check if entry already exist */
agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
if (!agg_vsi_info) {
- /* Create new entry for vsi under agg list */
+ /* Create new entry for VSI under aggregator list */
agg_vsi_info = (struct ice_sched_agg_vsi_info *)
ice_malloc(hw, sizeof(*agg_vsi_info));
if (!agg_vsi_info)
return ICE_ERR_PARAM;
- /* add vsi id into the agg list */
+ /* add VSI ID into the aggregator list */
agg_vsi_info->vsi_handle = vsi_handle;
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
- /* Move vsi node to new agg node for requested tc(s) */
+ /* Move VSI node to new aggregator node for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
- /* Move VSI to new agg */
+ /* Move VSI to new aggregator */
status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
if (status)
break;
@@ -2354,7 +2354,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
else
ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
}
- /* If vsi moved back to default agg then delete entry agg_vsi_info. */
+ /* If VSI moved back to default aggregator, delete agg_vsi_info. */
if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
LIST_DEL(&agg_vsi_info->list_entry);
@@ -2364,11 +2364,11 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_move_vsi_to_agg - moves VSI to new or default agg
+ * ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: tc bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Move or associate VSI to a new or default aggregator node.
*/
@@ -2390,12 +2390,12 @@ ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_rm_agg_cfg - remove agg configuration
+ * ice_rm_agg_cfg - remove aggregator configuration
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes agg reference to vsi and delete agg id info.
- * It removes the agg configuration completely.
+ * This function removes aggregator reference to VSI and delete aggregator ID
+ * info. It removes the aggregator configuration completely.
*/
enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
{
@@ -2425,7 +2425,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
LIST_DEL(&agg_info->list_entry);
ice_free(pi->hw, agg_info);
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
exit_ice_rm_agg_cfg:
@@ -2434,11 +2434,11 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_set_clear_cir_bw_alloc - set or clear CIR bw alloc information
+ * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear CIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear CIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2452,11 +2452,11 @@ ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_set_clear_eir_bw_alloc - set or clear EIR bw alloc information
+ * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear EIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear EIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2470,14 +2470,14 @@ ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_sched_save_vsi_bw_alloc - save VSI node's bw alloc information
+ * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2506,11 +2506,11 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_set_clear_cir_bw - set or clear CIR bw
+ * ice_set_clear_cir_bw - set or clear CIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear CIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2519,18 +2519,18 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = 0;
} else {
- /* Save type of bw information */
+ /* Save type of BW information */
ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = bw;
}
}
/**
- * ice_set_clear_eir_bw - set or clear EIR bw
+ * ice_set_clear_eir_bw - set or clear EIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear EIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2539,24 +2539,24 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved shared bw information.
+ * First clear earlier saved shared BW information.
*/
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
- /* save EIR bw information */
+ /* save EIR BW information */
ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = bw;
}
}
/**
- * ice_set_clear_shared_bw - set or clear shared bw
+ * ice_set_clear_shared_bw - set or clear shared BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear shared bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2565,27 +2565,27 @@ ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved EIR bw information.
+ * First clear earlier saved EIR BW information.
*/
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
- /* save shared bw information */
+ /* save shared BW information */
ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = bw;
}
}
/**
- * ice_sched_save_vsi_bw - save VSI node's bw information
+ * ice_sched_save_vsi_bw - save VSI node's BW information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of VSI type node for post replay use.
+ * Save BW information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2658,14 +2658,14 @@ ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_save_agg_bw_alloc - save agg node's bw alloc information
+ * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: bandwidth alloc information
*
- * Save bw alloc information of AGG type node for post replay use.
+ * Save BW alloc information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2692,14 +2692,14 @@ ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_sched_save_agg_bw - save agg node's bw information
+ * ice_sched_save_agg_bw - save aggregator node's BW information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of AGG type node for post replay use.
+ * Save BW information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2729,14 +2729,14 @@ ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_lmt_per_tc - configure VSI bw limit per tc
+ * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of VSI scheduling node based on tc
+ * This function configures BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2757,13 +2757,13 @@ ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI bw limit per tc
+ * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
*
- * This function configures default bw limit of VSI scheduling node based on tc
+ * This function configures default BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2786,14 +2786,14 @@ ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_agg_bw_lmt_per_tc - configure aggregator bw limit per tc
+ * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function applies bw limit to aggregator scheduling node based on tc
+ * This function applies BW limit to aggregator scheduling node based on TC
* information.
*/
enum ice_status
@@ -2813,14 +2813,14 @@ ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator bw default limit per tc
+ * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
*
- * This function applies default bw limit to aggregator scheduling node based
- * on tc information.
+ * This function applies default BW limit to aggregator scheduling node based
+ * on TC information.
*/
enum ice_status
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2841,10 +2841,10 @@ ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_shared_lmt - configure VSI bw shared limit
+ * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
* across all traffic classes for VSI matching handle.
@@ -2856,7 +2856,7 @@ ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
}
/**
- * ice_cfg_vsi_bw_no_shared_lmt - configure VSI bw for no shared limiter
+ * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
* @pi: port information structure
* @vsi_handle: software VSI handle
*
@@ -2871,13 +2871,13 @@ ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_cfg_agg_bw_shared_lmt - configure aggregator bw shared limit
+ * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function configures the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
@@ -2886,12 +2886,12 @@ ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/**
- * ice_cfg_agg_bw_no_shared_lmt - configure aggregator bw for no shared limiter
+ * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function removes the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
@@ -2903,12 +2903,12 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
* ice_config_vsi_queue_priority - config VSI queue priority of node
* @pi: port information structure
* @num_qs: number of VSI queues
- * @q_ids: queue ids array
- * @q_ids: queue ids array
+ * @q_ids: queue IDs array
+ * @q_ids: queue IDs array
* @q_prio: queue priority array
*
* This function configures the queue node priority (Sibling Priority) of the
- * passed in VSI's queue(s) for a given traffic class (tc).
+ * passed in VSI's queue(s) for a given traffic class (TC).
*/
enum ice_status
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
@@ -2940,16 +2940,16 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
}
/**
- * ice_cfg_agg_vsi_priority_per_tc - config agg's VSI priority per tc
+ * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
* @pi: port information structure
- * @agg_id: Aggregator id
+ * @agg_id: Aggregator ID
* @num_vsis: number of VSI(s)
* @vsi_handle_arr: array of software VSI handles
* @node_prio: pointer to node priority
* @tc: traffic class
*
* This function configures the node priority (Sibling Priority) of the
- * passed in VSI's for a given traffic class (tc) of an Aggregator id.
+ * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
*/
enum ice_status
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
@@ -3027,14 +3027,14 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_vsi_bw_alloc - config VSI bw alloc per tc
+ * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @ena_tcmap: enabled tc map
+ * @ena_tcmap: enabled TC map
* @rl_type: Rate limit type CIR/EIR
- * @bw_alloc: Array of bw alloc
+ * @bw_alloc: Array of BW alloc
*
- * This function configures the bw allocation of the passed in VSI's
+ * This function configures the BW allocation of the passed in VSI's
* node(s) for enabled traffic class.
*/
enum ice_status
@@ -3049,7 +3049,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
@@ -3079,14 +3079,14 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
}
/**
- * ice_cfg_agg_bw_alloc - config agg bw alloc
+ * ice_cfg_agg_bw_alloc - config aggregator BW alloc
* @pi: port information structure
- * @agg_id: aggregator id
- * @ena_tcmap: enabled tc map
+ * @agg_id: aggregator ID
+ * @ena_tcmap: enabled TC map
* @rl_type: rate limit type CIR/EIR
- * @bw_alloc: array of bw alloc
+ * @bw_alloc: array of BW alloc
*
- * This function configures the bw allocation of passed in aggregator for
+ * This function configures the BW allocation of passed in aggregator for
* enabled traffic class(s).
*/
enum ice_status
@@ -3111,7 +3111,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
goto exit_cfg_agg_bw_alloc;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
@@ -3142,10 +3142,10 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/**
- * ice_sched_calc_wakeup - calculate rl profile wakeup parameter
- * @bw: bandwidth in kbps
+ * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
+ * @bw: bandwidth in Kbps
*
- * This function calculates the wakeup parameter of rl profile.
+ * This function calculates the wakeup parameter of RL profile.
*/
static u16 ice_sched_calc_wakeup(s32 bw)
{
@@ -3183,11 +3183,11 @@ static u16 ice_sched_calc_wakeup(s32 bw)
}
/**
- * ice_sched_bw_to_rl_profile - convert bw to profile parameters
- * @bw: bandwidth in kbps
+ * ice_sched_bw_to_rl_profile - convert BW to profile parameters
+ * @bw: bandwidth in Kbps
* @profile: profile parameters to return
*
- * This function converts the bw to profile structure format.
+ * This function converts the BW to profile structure format.
*/
static enum ice_status
ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
@@ -3203,7 +3203,7 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
return status;
- /* Bytes per second from kbps */
+ /* Bytes per second from Kbps */
bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
/* encode is 6 bits but really useful are 5 bits */
@@ -3247,16 +3247,16 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
}
/**
- * ice_sched_add_rl_profile - add rl profile
+ * ice_sched_add_rl_profile - add RL profile
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: specifies in which layer to create profile
*
- * This function first checks the existing list for corresponding bw
+ * This function first checks the existing list for corresponding BW
* parameter. If it exists, it returns the associated profile otherwise
- * it creates a new rate limit profile for requested bw, and adds it to
- * the hw db and local list. It returns the new profile or null on error.
+ * it creates a new rate limit profile for requested BW, and adds it to
+ * the HW DB and local list. It returns the new profile or null on error.
* The caller needs to hold the scheduler lock.
*/
static struct ice_aqc_rl_profile_info *
@@ -3291,10 +3291,10 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
rl_prof_elem->bw == bw)
- /* Return existing profile id info */
+ /* Return existing profile ID info */
return rl_prof_elem;
- /* Create new profile id */
+ /* Create new profile ID */
rl_prof_elem = (struct ice_aqc_rl_profile_info *)
ice_malloc(hw, sizeof(*rl_prof_elem));
@@ -3311,7 +3311,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
rl_prof_elem->profile.flags = profile_type;
rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
- /* Create new entry in hw db */
+ /* Create new entry in HW DB */
buf = (struct ice_aqc_rl_profile_generic_elem *)
&rl_prof_elem->profile;
status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
@@ -3435,12 +3435,12 @@ ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @rl_prof_id: rate limit profile id
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @rl_prof_id: rate limit profile ID
*
- * This function configures node element's bw limit.
+ * This function configures node element's BW limit.
*/
static enum ice_status
ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
@@ -3457,7 +3457,7 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_MAX_BW:
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
@@ -3466,11 +3466,11 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_SHARED_BW:
- /* Check for removing shared bw */
+ /* Check for removing shared BW */
if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
/* remove shared profile */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
- data->srl_id = 0; /* clear srl field */
+ data->srl_id = 0; /* clear SRL field */
/* enable back EIR to default profile */
data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
@@ -3478,16 +3478,16 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
break;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
(LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
ICE_SCHED_DFLT_RL_PROF_ID))
return ICE_ERR_CFG;
- /* EIR bw is set to default, disable it */
+ /* EIR BW is set to default, disable it */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
- /* Okay to enable shared bw now */
+ /* Okay to enable shared BW now */
data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
data->srl_id = CPU_TO_LE16(rl_prof_id);
break;
@@ -3501,12 +3501,12 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_get_node_rl_prof_id - get node's rate limit profile id
+ * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
* @node: sched node
* @rl_type: rate limit type
*
* If existing profile matches, it returns the corresponding rate
- * limit profile id, otherwise it returns an invalid id as error.
+ * limit profile ID, otherwise it returns an invalid ID as error.
*/
static u16
ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
@@ -3539,7 +3539,7 @@ ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
/**
* ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @layer_index: layer index
*
* This function returns requested profile creation layer.
@@ -3603,14 +3603,14 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
}
/**
- * ice_sched_rm_rl_profile - remove rl profile id
+ * ice_sched_rm_rl_profile - remove RL profile ID
* @pi: port information structure
* @layer_num: layer number where profiles are saved
* @profile_type: profile type like EIR, CIR, or SRL
- * @profile_id: profile id to remove
+ * @profile_id: profile ID to remove
*
* This function removes rate limit profile from layer 'layer_num' of type
- * 'profile_type' and profile id as 'profile_id'. The caller needs to hold
+ * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
* scheduler lock.
*/
static enum ice_status
@@ -3620,7 +3620,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
struct ice_aqc_rl_profile_info *rl_prof_elem;
enum ice_status status = ICE_SUCCESS;
- /* Check the existing list for rl profile */
+ /* Check the existing list for RL profile */
LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
@@ -3629,7 +3629,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
if (rl_prof_elem->prof_id_ref)
rl_prof_elem->prof_id_ref--;
- /* Remove old profile id from database */
+ /* Remove old profile ID from database */
status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
if (status && status != ICE_ERR_IN_USE)
ice_debug(pi->hw, ICE_DBG_SCHED,
@@ -3646,10 +3646,10 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
- * @layer_num: layer number where rl profiles are saved
+ * @layer_num: layer number where RL profiles are saved
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3681,17 +3681,18 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
default:
return ICE_ERR_PARAM;
}
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
- /* Remove stale rl profile id */
+ /* Remove stale RL profile ID */
if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
old_id == ICE_SCHED_INVAL_PROF_ID)
- return status;
+ return ICE_SUCCESS;
+
return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
}
@@ -3704,7 +3705,7 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
* @bw: bandwidth value
*
* This function prepares node element's bandwidth to SRL or EIR exclusively.
- * EIR bw and Shared bw profiles are mutually exclusive and hence only one of
+ * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
* them may be set for any given element. This function needs to be called
* with the scheduler lock held.
*/
@@ -3730,7 +3731,7 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
layer_num);
} else if (rl_type == ICE_MAX_BW &&
node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
- /* Remove Shared profile. Set default shared bw call
+ /* Remove Shared profile. Set default shared BW call
* removes shared profile for a node.
*/
return ice_sched_set_node_bw_dflt(pi, node,
@@ -3748,9 +3749,9 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: layer number
*
- * This function adds new profile corresponding to requested bw, configures
- * node's rl profile id of type cir, eir, or srl, and removes old profile
- * id from local database. The caller needs to hold scheduler lock.
+ * This function adds new profile corresponding to requested BW, configures
+ * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
+ * ID from local database. The caller needs to hold scheduler lock.
*/
static enum ice_status
ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3767,21 +3768,21 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
/* New changes has been applied */
- /* Increment the profile id reference count */
+ /* Increment the profile ID reference count */
rl_prof_info->prof_id_ref++;
- /* Check for old id removal */
+ /* Check for old ID removal */
if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
- return status;
+ return ICE_SUCCESS;
return ice_sched_rm_rl_profile(pi, layer_num,
rl_prof_info->profile.flags,
@@ -3789,14 +3790,14 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_lmt - set node's bw limit
+ * ice_sched_set_node_bw_lmt - set node's BW limit
* @pi: port information structure
* @node: tree node
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * It updates node's bw limit parameters like bw rl profile id of type cir,
- * eir, or srl. The caller needs to hold scheduler lock.
+ * It updates node's BW limit parameters like BW RL profile ID of type CIR,
+ * EIR, or SRL. The caller needs to hold scheduler lock.
*/
enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3811,7 +3812,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!pi)
return ICE_ERR_PARAM;
hw = pi->hw;
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
node->tx_sched_layer);
@@ -3824,7 +3825,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!cfg_node)
return ICE_ERR_CFG;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
@@ -3838,13 +3839,13 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_dflt_lmt - set node's bw limit to default
+ * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3884,13 +3885,13 @@ ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
}
/**
- * ice_sched_set_q_bw_lmt - sets queue bw limit
+ * ice_sched_set_q_bw_lmt - sets queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of queue scheduling node.
+ * This function sets BW limit of queue scheduling node.
*/
static enum ice_status
ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3937,13 +3938,13 @@ ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_cfg_q_bw_lmt - configure queue bw limit
+ * ice_cfg_q_bw_lmt - configure queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of queue scheduling node.
+ * This function configures BW limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
@@ -3953,12 +3954,12 @@ ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
}
/**
- * ice_cfg_q_bw_dflt_lmt - configure queue bw default limit
+ * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
*
- * This function configures bw default limit of queue scheduling node.
+ * This function configures BW default limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3968,11 +3969,11 @@ ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_sched_save_tc_node_bw - save tc node bw limit
+ * ice_sched_save_tc_node_bw - save TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function saves the modified values of bandwidth settings for later
* replay purpose (restore) after reset.
@@ -4002,13 +4003,13 @@ ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_lmt - sets tc node bw limit
+ * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bandwidth limit of tc node.
+ * This function configures bandwidth limit of TC node.
*/
static enum ice_status
ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
@@ -4036,13 +4037,13 @@ ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_lmt - configure tc node bw limit
+ * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4053,12 +4054,12 @@ ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_dflt_lmt - configure tc node bw default limit
+ * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
*
- * This function configures bw default limit of tc node.
+ * This function configures BW default limit of TC node.
*/
enum ice_status
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
@@ -4068,13 +4069,13 @@ ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_save_tc_node_bw_alloc - save tc node's bw alloc information
+ * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
* @pi: port information structure
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
@@ -4100,13 +4101,13 @@ ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_alloc - set tc node bw alloc
+ * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bandwidth alloc of tc node, also saves the
+ * This function configures bandwidth alloc of TC node, also saves the
* changed settings for replay purpose, and return success if it succeeds
* in modifying bandwidth alloc setting.
*/
@@ -4135,13 +4136,13 @@ ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_alloc - configure tc node bw alloc
+ * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4152,12 +4153,12 @@ ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_agg_bw_dflt_lmt - set agg node's bw limit to default
+ * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function retrieves the aggregator id based on VSI id and tc,
- * and sets node's bw limit to default. This function needs to be
+ * This function retrieves the aggregator ID based on VSI ID and TC,
+ * and sets node's BW limit to default. This function needs to be
* called with the scheduler lock held.
*/
enum ice_status
@@ -4201,14 +4202,14 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_get_node_by_id_type - get node from id type
+ * ice_sched_get_node_by_id_type - get node from ID type
* @pi: port information structure
* @id: identifier
* @agg_type: type of aggregator
* @tc: traffic class
*
- * This function returns node identified by id of type aggregator, and
- * based on traffic class (tc). This function needs to be called with
+ * This function returns node identified by ID of type aggregator, and
+ * based on traffic class (TC). This function needs to be called with
* the scheduler lock held.
*/
static struct ice_sched_node *
@@ -4263,16 +4264,16 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
}
/**
- * ice_sched_set_node_bw_lmt_per_tc - set node bw limit per tc
+ * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
* @pi: port information structure
- * @id: id (software VSI handle or AGG id)
+ * @id: ID (software VSI handle or AGG ID)
* @agg_type: aggregator type (VSI or AGG type node)
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of VSI or Aggregator scheduling node
- * based on tc information from passed in argument bw.
+ * This function sets BW limit of VSI or Aggregator scheduling node
+ * based on TC information from passed in argument BW.
*/
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -4310,7 +4311,7 @@ ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
* @vsi_handle: software VSI handle
*
* This function validates SRL node of the VSI node if available SRL layer is
- * different than the VSI node layer on all tc(s).This function needs to be
+ * different than the VSI node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4322,7 +4323,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4356,13 +4357,13 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_set_vsi_bw_shared_lmt - set VSI bw shared limit
+ * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
- * across all traffic classes for VSI matching handle. When bw value of
+ * across all traffic classes for VSI matching handle. When BW value of
* ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
*/
enum ice_status
@@ -4382,7 +4383,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
if (status)
goto exit_set_vsi_bw_shared_lmt;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4417,10 +4418,10 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_validate_agg_srl_node - validate AGG SRL node
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
* This function validates SRL node of the AGG node if available SRL layer is
- * different than the AGG node layer on all tc(s).This function needs to be
+ * different than the AGG node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4440,7 +4441,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
if (!agg_id_present)
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4472,14 +4473,14 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_sched_set_agg_bw_shared_lmt - set aggregator bw shared limit
+ * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type
+ * This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id. When
- * bw value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
+ * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
* node(s).
*/
enum ice_status
@@ -4511,7 +4512,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
goto exit_agg_bw_shared_lmt;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -4975,7 +4976,7 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
/**
* ice_cfg_rl_burst_size - Set burst size value
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @bytes: burst size in bytes
*
* This function configures/set the burst size to requested new value. The new
@@ -4995,7 +4996,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_BYTE_GRANULARITY;
/* round number to nearest 256 granularity */
bytes = ice_round_to_num(bytes, 256);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_BYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_BYTE_GRANULARITY;
burst_size_to_prog |= (u16)bytes;
@@ -5005,7 +5006,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_KBYTE_GRANULARITY;
/* round number to nearest 1024 granularity */
bytes = ice_round_to_num(bytes, 1024);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
/* The value is in k bytes */
@@ -5017,7 +5018,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
/*
* ice_sched_replay_node_prio - re-configure node priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: priority value
*
@@ -5043,12 +5044,12 @@ ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_node_bw - replay node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_node_bw - replay node(s) BW
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @bw_t_info: bw type information
+ * @bw_t_info: BW type information
*
- * This function restores node's bw from bw_t_info. The caller needs
+ * This function restores node's BW from bw_t_info. The caller needs
* to hold the scheduler lock.
*/
static enum ice_status
@@ -5102,8 +5103,8 @@ ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_agg_bw - replay aggregator node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_agg_bw - replay aggregator node(s) BW
+ * @hw: pointer to the HW struct
* @agg_info: aggregator data structure
*
* This function re-creates aggregator type nodes. The caller needs to hold
@@ -5157,7 +5158,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
{
u8 tc;
- /* Some tc(s) may be missing after reset, adjust for replay */
+ /* Some TC(s) may be missing after reset, adjust for replay */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
@@ -5166,10 +5167,10 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
/**
* ice_sched_replay_agg - recreate aggregator node(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function recreate aggregator type nodes which are not replayed earlier.
- * It also replay aggregator bw information. These aggregator nodes are not
+ * It also replay aggregator BW information. These aggregator nodes are not
* associated with VSI type node yet.
*/
void ice_sched_replay_agg(struct ice_hw *hw)
@@ -5180,7 +5181,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
ice_acquire_lock(&pi->sched_lock);
LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
list_entry) {
- /* replay agg (re-create aggregator node) */
+ /* replay aggregator (re-create aggregator node) */
if (!ice_cmp_bitmap(agg_info->tc_bitmap,
agg_info->replay_tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
@@ -5203,7 +5204,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/* Move on to next one */
continue;
}
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
ice_info(hw, "Replay agg bw [id=%d] failed\n",
@@ -5215,7 +5216,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/**
* ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function initialize aggregator(s) TC bitmap to zero. A required
* preinit step for replaying aggregators.
@@ -5239,10 +5240,10 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
}
/**
- * ice_sched_replay_tc_node_bw - replay tc node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_tc_node_bw - replay TC node(s) BW
+ * @hw: pointer to the HW struct
*
- * This function replay tc nodes. The caller needs to hold the scheduler lock.
+ * This function replay TC nodes. The caller needs to hold the scheduler lock.
*/
enum ice_status
ice_sched_replay_tc_node_bw(struct ice_hw *hw)
@@ -5257,7 +5258,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
if (!tc_node)
- continue; /* tc not present */
+ continue; /* TC not present */
status = ice_sched_replay_node_bw(hw, tc_node,
&hw->tc_node_bw_t_info[tc]);
if (status)
@@ -5268,8 +5269,8 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
}
/**
- * ice_sched_replay_vsi_bw - replay VSI type node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @tc_bitmap: 8 bits TC bitmap
*
@@ -5308,8 +5309,8 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
}
/**
- * ice_sched_replay_vsi_agg - replay agg & VSI to aggregator node(s)
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays aggregator node, VSI to aggregator type nodes, and
@@ -5336,12 +5337,12 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
return ICE_SUCCESS; /* Not present in list - default Agg case */
ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
replay_bitmap);
- /* Replay agg node associated to vsi_handle */
+ /* Replay aggregator node associated to vsi_handle */
status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
ICE_AGG_TYPE_AGG, replay_bitmap);
if (status)
return status;
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
return status;
@@ -5354,14 +5355,14 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
replay_bitmap);
if (status)
return status;
- /* Replay VSI bw (restore VSI bw) */
+ /* Replay VSI BW (restore VSI BW) */
return ice_sched_replay_vsi_bw(hw, vsi_handle,
agg_vsi_info->tc_bitmap);
}
/**
* ice_replay_vsi_agg - replay VSI to aggregator node
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays association of VSI to aggregator type nodes, and
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index a5565945e..61fa6a85b 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -43,14 +43,14 @@ struct ice_aqc_rl_profile_info {
struct ice_aqc_rl_profile_elem profile;
struct LIST_ENTRY_TYPE list_entry;
u32 bw; /* requested */
- u16 prof_id_ref; /* profile id to node association ref count */
+ u16 prof_id_ref; /* profile ID to node association ref count */
};
struct ice_sched_agg_vsi_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u16 vsi_handle;
- /* save agg vsi TC bitmap */
+ /* save aggregator VSI TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
@@ -60,9 +60,9 @@ struct ice_sched_agg_info {
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u32 agg_id;
enum ice_agg_type agg_type;
- /* bw_t_info saves agg bw information */
+ /* bw_t_info saves aggregator BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
- /* save agg TC bitmap */
+ /* save aggregator TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a7b712e17..512e64b91 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -21,7 +21,7 @@
* byte 6 = 0x2: to identify it as locally administered SA MAC
* byte 12 = 0x81 & byte 13 = 0x00:
* In case of VLAN filter first two bytes defines ether type (0x8100)
- * and remaining two bytes are placeholder for programming a given VLAN id
+ * and remaining two bytes are placeholder for programming a given VLAN ID
* In case of Ether type filter it is treated as header without VLAN tag
* and byte 12 and 13 is used to program a given Ether type instead
*/
@@ -54,7 +54,7 @@ static const u8 dummy_eth_header[DUMMY_ETH_HDR_LEN] = { 0x2, 0, 0, 0, 0, 0,
/**
* ice_init_def_sw_recp - initialize the recipe book keeping tables
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Allocate memory for the entire recipe table and initialize the structures/
* entries corresponding to basic recipes.
@@ -282,7 +282,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
/**
* ice_aq_add_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -324,7 +324,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_free_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
* @cd: pointer to command details structure or NULL
@@ -360,7 +360,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -397,7 +397,7 @@ ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_is_vsi_valid - check whether the VSI is valid or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* check whether the VSI is valid or not
@@ -408,11 +408,11 @@ bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_get_hw_vsi_num - return the hw VSI number
- * @hw: pointer to the hw struct
+ * ice_get_hw_vsi_num - return the HW VSI number
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
- * return the hw VSI number
+ * return the HW VSI number
* Caution: call this function only if VSI is valid (ice_is_vsi_valid)
*/
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
@@ -422,7 +422,7 @@ u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_get_vsi_ctx - return the VSI context entry for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* return the VSI context entry for a given VSI handle
@@ -434,7 +434,7 @@ struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_vsi_ctx - save the VSI context for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
* @vsi: VSI context pointer
*
@@ -448,7 +448,7 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
/**
* ice_clear_vsi_ctx - clear the VSI context entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* clear the VSI context entry
@@ -467,7 +467,7 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_clear_all_vsi_ctx - clear all the VSI context entries
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
void ice_clear_all_vsi_ctx(struct ice_hw *hw)
{
@@ -479,13 +479,13 @@ void ice_clear_all_vsi_ctx(struct ice_hw *hw)
/**
* ice_add_vsi - add VSI context to the hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle provided by drivers
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
* Add a VSI context to the hardware also add it into the VSI handle list.
- * If this function gets called after reset for exisiting VSIs then update
+ * If this function gets called after reset for existing VSIs then update
* with the new HW VSI number in the corresponding VSI handle list entry.
*/
enum ice_status
@@ -502,7 +502,7 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return status;
tmp_vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
if (!tmp_vsi_ctx) {
- /* Create a new vsi context */
+ /* Create a new VSI context */
tmp_vsi_ctx = (struct ice_vsi_ctx *)
ice_malloc(hw, sizeof(*tmp_vsi_ctx));
if (!tmp_vsi_ctx) {
@@ -519,12 +519,12 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
tmp_vsi_ctx->vsi_num = vsi_ctx->vsi_num;
}
- return status;
+ return ICE_SUCCESS;
}
/**
* ice_free_vsi- free VSI context from hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
@@ -549,7 +549,7 @@ ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
@@ -570,8 +570,8 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_alloc_free_vsi_list
- * @hw: pointer to the hw struct
- * @vsi_list_id: VSI list id returned or used for lookup
+ * @hw: pointer to the HW struct
+ * @vsi_list_id: VSI list ID returned or used for lookup
* @lkup_type: switch rule filter lookup type
* @opc: switch rules population command type - pass in the command opcode
*
@@ -629,7 +629,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
/**
* ice_aq_sw_rules - add/update/remove switch rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @rule_list: pointer to switch rule population list
* @rule_list_sz: total size of the rule list in bytes
* @num_rules: number of switch rules in the rule_list
@@ -798,7 +798,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
* 1. The switch is a VEB AND
* 2
* 2.1 The lookup is a directional lookup like ethertype,
- * promiscuous, ethertype-mac, promiscuous-vlan
+ * promiscuous, ethertype-MAC, promiscuous-VLAN
* and default-port OR
* 2.2 The lookup is VLAN, OR
* 2.3 The lookup is MAC with mcast or bcast addr for MAC, OR
@@ -829,7 +829,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
}
/**
- * ice_ilog2 - Caculates integer log base 2 of a number
+ * ice_ilog2 - Calculates integer log base 2 of a number
* @n: number on which to perform operation
*/
static int ice_ilog2(u64 n)
@@ -984,7 +984,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,
* @hw: pointer to the hardware structure
* @m_ent: the management entry for which sw marker needs to be added
* @sw_marker: sw marker to tag the Rx descriptor with
- * @l_id: large action resource id
+ * @l_id: large action resource ID
*
* Create a large action to hold software marker and update the switch rule
* entry pointed by m_ent with newly created large action
@@ -996,8 +996,8 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
struct ice_aqc_sw_rules_elem *lg_act, *rx_tx;
/* For software marker we need 3 large actions
* 1. FWD action: FWD TO VSI or VSI LIST
- * 2. GENERIC VALUE action to hold the profile id
- * 3. GENERIC VALUE action to hold the software marker id
+ * 2. GENERIC VALUE action to hold the profile ID
+ * 3. GENERIC VALUE action to hold the software marker ID
*/
const u16 num_lg_acts = 3;
enum ice_status status;
@@ -1060,13 +1060,13 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
ice_aqc_opc_update_sw_rules);
- /* Update the action to point to the large action id */
+ /* Update the action to point to the large action ID */
rx_tx->pdata.lkup_tx_rx.act =
CPU_TO_LE32(ICE_SINGLE_ACT_PTR |
((l_id << ICE_SINGLE_ACT_PTR_VAL_S) &
ICE_SINGLE_ACT_PTR_VAL_M));
- /* Use the filter rule id of the previously created rule with single
+ /* Use the filter rule ID of the previously created rule with single
* act. Once the update happens, hardware will treat this as large
* action
*/
@@ -1090,10 +1090,10 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to set in the VSI mapping
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
*
- * Helper function to create a new entry of VSI list id to VSI mapping
- * using the given VSI list id
+ * Helper function to create a new entry of VSI list ID to VSI mapping
+ * using the given VSI list ID
*/
static struct ice_vsi_list_map_info *
ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1122,13 +1122,13 @@ ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @remove: Boolean value to indicate if this is a remove action
* @opc: switch rules population command type - pass in the command opcode
* @lkup_type: lookup type of the filter
*
* Call AQ command to add a new switch rule or update existing switch rule
- * using the given VSI list id
+ * using the given VSI list ID
*/
static enum ice_status
ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1185,7 +1185,7 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
/**
* ice_create_vsi_list_rule - Creates and populates a VSI list rule
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
* @vsi_list_id: stores the ID of the VSI list to be created
@@ -1279,7 +1279,7 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw,
* @f_info: filter information for switch rule
*
* Call AQ command to update a previously created switch rule with a
- * VSI list id
+ * VSI list ID
*/
static enum ice_status
ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
@@ -1306,7 +1306,7 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
/**
* ice_update_sw_rule_bridge_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Updates unicast switch filter rules based on VEB/VEPA mode
*/
@@ -1362,7 +1362,7 @@ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
* Allocate a new VSI list and add two VSIs
* to this list using switch rule command
* Update the previously created switch rule with the
- * newly created VSI list id
+ * newly created VSI list ID
* if a VSI list was previously created
* Add the new VSI to the previously created VSI list set
* using the update switch rule command
@@ -1443,7 +1443,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
return ICE_SUCCESS;
/* Update the previously created VSI list set with
- * the new VSI id passed in
+ * the new VSI ID passed in
*/
vsi_list_id = cur_fltr->fwd_id.vsi_list_id;
opcode = ice_aqc_opc_update_sw_rules;
@@ -1451,7 +1451,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
status = ice_update_vsi_list_rule(hw, &vsi_handle, 1,
vsi_list_id, false, opcode,
new_fltr->lkup_type);
- /* update VSI list mapping info with new VSI id */
+ /* update VSI list mapping info with new VSI ID */
if (!status)
ice_set_bit(vsi_handle,
m_entry->vsi_list_info->vsi_map);
@@ -1495,7 +1495,7 @@ ice_find_rule_entry(struct ice_hw *hw, u8 recp_id, struct ice_fltr_info *f_info)
* @hw: pointer to the hardware structure
* @recp_id: lookup type for which VSI lists needs to be searched
* @vsi_handle: VSI handle to be found in VSI list
- * @vsi_list_id: VSI list id found contaning vsi_handle
+ * @vsi_list_id: VSI list ID found containing vsi_handle
*
* Helper function to search a VSI list with single entry containing given VSI
* handle element. This can be extended further to search VSI list with more
@@ -1527,7 +1527,7 @@ ice_find_vsi_list_entry(struct ice_hw *hw, u8 recp_id, u16 vsi_handle,
/**
* ice_add_rule_internal - add rule for a given lookup type
* @hw: pointer to the hardware structure
- * @recp_id: lookup type (recipe id) for which rule has to be added
+ * @recp_id: lookup type (recipe ID) for which rule has to be added
* @f_entry: structure containing MAC forwarding information
*
* Adds or updates the rule lists for a given recipe
@@ -1576,7 +1576,7 @@ ice_add_rule_internal(struct ice_hw *hw, u8 recp_id,
/**
* ice_remove_vsi_list_rule
* @hw: pointer to the hardware structure
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @lkup_type: switch rule filter lookup type
*
* The VSI list should be emptied before this function is called to remove the
@@ -1702,7 +1702,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
* ice_remove_rule_internal - Remove a filter rule of a given type
*
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @f_entry: rule entry containing filter information
*/
static enum ice_status
@@ -1752,7 +1752,7 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
status = ice_rem_update_vsi_list(hw, vsi_handle, list_elem);
if (status)
goto exit;
- /* if vsi count goes to zero after updating the vsi list */
+ /* if VSI count goes to zero after updating the VSI list */
if (list_elem->vsi_count == 0)
remove_rule = true;
}
@@ -1830,7 +1830,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
return ICE_ERR_PARAM;
hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
m_list_itr->fltr_info.fwd_id.hw_vsi_id = hw_vsi_id;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (m_list_itr->fltr_info.src_id != ICE_SRC_ID_VSI)
return ICE_ERR_PARAM;
m_list_itr->fltr_info.src = hw_vsi_id;
@@ -1907,7 +1907,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
((u8 *)r_iter + (elem_sent * s_rule_size));
}
- /* Fill up rule id based on the value returned from FW */
+ /* Fill up rule ID based on the value returned from FW */
r_iter = s_rule;
LIST_FOR_EACH_ENTRY(m_list_itr, m_list, ice_fltr_list_entry,
list_entry) {
@@ -1968,7 +1968,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);
new_fltr = &f_entry->fltr_info;
- /* VLAN id should only be 12 bits */
+ /* VLAN ID should only be 12 bits */
if (new_fltr->l_data.vlan.vlan_id > ICE_MAX_VLAN_ID)
return ICE_ERR_PARAM;
@@ -2026,7 +2026,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
}
}
} else if (v_list_itr->vsi_list_info->ref_cnt == 1) {
- /* Update existing VSI list to add new VSI id only if it used
+ /* Update existing VSI list to add new VSI ID only if it used
* by one VLAN rule.
*/
cur_fltr = &v_list_itr->fltr_info;
@@ -2036,7 +2036,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
/* If VLAN rule exists and VSI list being used by this rule is
* referenced by more than 1 VLAN rule. Then create a new VSI
* list appending previous VSI with new VSI and update existing
- * VLAN rule to point to new VSI list id
+ * VLAN rule to point to new VSI list ID
*/
struct ice_fltr_info tmp_fltr;
u16 vsi_handle_arr[2];
@@ -2130,9 +2130,9 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
* @hw: pointer to the hardware structure
* @mv_list: list of MAC and VLAN filters
*
- * If the VSI on which the mac-vlan pair has to be added has RX and Tx VLAN
+ * If the VSI on which the MAC-VLAN pair has to be added has Rx and Tx VLAN
* pruning bits enabled, then it is the responsibility of the caller to make
- * sure to add a vlan only filter on the same VSI. Packets belonging to that
+ * sure to add a VLAN only filter on the same VSI. Packets belonging to that
* VLAN won't be received on that VSI otherwise.
*/
enum ice_status
@@ -2446,7 +2446,7 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
struct ice_fltr_mgmt_list_entry *fm_entry;
enum ice_status status = ICE_SUCCESS;
- /* check to make sure VSI id is valid and within boundary */
+ /* check to make sure VSI ID is valid and within boundary */
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -2504,7 +2504,7 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
/**
* ice_remove_promisc - Remove promisc based filter rules
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @v_list: list of promisc entries
*/
static enum ice_status
@@ -2851,8 +2851,8 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
- * @recp_id: Recipe id for which rules need to be replayed
+ * @vsi_handle: driver VSI handle
+ * @recp_id: Recipe ID for which rules need to be replayed
* @list_head: list for which filters need to be replayed
*
* Replays the filter of recipe recp_id for a VSI represented via vsi_handle.
@@ -2877,7 +2877,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
f_entry.fltr_info = itr->fltr_info;
if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN &&
itr->fltr_info.vsi_handle == vsi_handle) {
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
status = ice_add_rule_internal(hw, recp_id, &f_entry);
@@ -2892,7 +2892,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
f_entry.fltr_info.vsi_handle = vsi_handle;
f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
if (recp_id == ICE_SW_LKUP_VLAN)
@@ -2910,7 +2910,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
/**
* ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
+ * @vsi_handle: driver VSI handle
*
* Replays filters for requested VSI via vsi_handle.
*/
@@ -2938,7 +2938,7 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_rm_all_sw_replay_rule_info - deletes filter replay rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Deletes the filter replay rules.
*/
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index dd21781f7..90dfdabcb 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -40,10 +40,10 @@ enum ice_sw_lkup_type {
ICE_SW_LKUP_DFLT = 5,
ICE_SW_LKUP_ETHERTYPE_MAC = 8,
ICE_SW_LKUP_PROMISC_VLAN = 9,
- ICE_SW_LKUP_LAST,
+ ICE_SW_LKUP_LAST
};
-/* type of filter src id */
+/* type of filter src ID */
enum ice_src_id {
ICE_SRC_ID_UNKNOWN = 0,
ICE_SRC_ID_VSI,
@@ -94,8 +94,8 @@ struct ice_fltr_info {
/* Depending on filter action */
union {
- /* queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 hw_vsi_id:10;
@@ -134,8 +134,8 @@ struct ice_sw_act_ctrl {
enum ice_sw_fwd_act_type fltr_act;
/* Depending on filter action */
union {
- /* This is a queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* This is a queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 vsi_id:10;
@@ -178,7 +178,7 @@ struct ice_sw_recipe {
u8 chain_idx;
/* if this recipe is a collection of other recipe then count of other
- * recipes and recipe ids of those recipes
+ * recipes and recipe IDs of those recipes
*/
u8 n_grp_count;
@@ -211,9 +211,11 @@ struct ice_sw_recipe {
/* AQ buffer associated with this recipe */
struct ice_aqc_recipe_data_elem *root_buf;
+ /* This struct saves the fv_words for a given lookup */
+ struct ice_prot_lkup_ext lkup_exts;
};
-/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list id */
+/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list ID */
struct ice_vsi_list_map_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(vsi_map, ICE_MAX_VSI);
@@ -235,7 +237,7 @@ struct ice_fltr_list_entry {
* used for VLAN membership.
*/
struct ice_fltr_mgmt_list_entry {
- /* back pointer to VSI list id to VSI list mapping */
+ /* back pointer to VSI list ID to VSI list mapping */
struct ice_vsi_list_map_info *vsi_list_info;
u16 vsi_count;
#define ICE_INVAL_LG_ACT_INDEX 0xffff
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 17d79ba21..08c974004 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -196,7 +196,7 @@ enum ice_q {
};
/* Different reset sources for which a disable queue AQ call has to be made in
- * order to clean the TX scheduler as a part of the reset
+ * order to clean the Tx scheduler as a part of the reset
*/
enum ice_disq_rst_src {
ICE_NO_RESET = 0,
@@ -242,11 +242,11 @@ struct ice_hw_common_caps {
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
u32 rss_table_entry_width; /* RSS Entry width in bits */
- /* TX/RX queues */
- u32 num_rxq; /* Number/Total RX queues */
- u32 rxq_first_id; /* First queue ID for RX queues */
- u32 num_txq; /* Number/Total TX queues */
- u32 txq_first_id; /* First queue ID for TX queues */
+ /* Tx/Rx queues */
+ u32 num_rxq; /* Number/Total Rx queues */
+ u32 rxq_first_id; /* First queue ID for Rx queues */
+ u32 num_txq; /* Number/Total Tx queues */
+ u32 txq_first_id; /* First queue ID for Tx queues */
/* MSI-X vectors */
u32 num_msix_vectors;
@@ -390,7 +390,7 @@ struct ice_sched_node {
struct ice_sched_node *sibling; /* next sibling in the same layer */
struct ice_sched_node **children;
struct ice_aqc_txsched_elem_data info;
- u32 agg_id; /* aggregator group id */
+ u32 agg_id; /* aggregator group ID */
u16 vsi_handle;
u8 in_use; /* suspended or in use */
u8 tx_sched_layer; /* Logical Layer (1-9) */
@@ -435,8 +435,8 @@ enum ice_agg_type {
/* Rate limit types */
enum ice_rl_type {
ICE_UNKNOWN_BW = 0,
- ICE_MIN_BW, /* for cir profile */
- ICE_MAX_BW, /* for eir profile */
+ ICE_MIN_BW, /* for CIR profile */
+ ICE_MAX_BW, /* for EIR profile */
ICE_SHARED_BW /* for shared profile */
};
@@ -475,7 +475,7 @@ enum ice_rl_type {
*
* (a) is the last_node_teid(not of type Leaf). A leaf node is created under
* (a) as child node where queues get added, add Tx/Rx queue admin commands;
- * need teid of (a) to add queues.
+ * need TEID of (a) to add queues.
*
* This tree
* -> has 8 branches (one for each TC)
@@ -487,7 +487,7 @@ enum ice_rl_type {
* Refer to the documentation for more info.
*/
- /* Data structure for saving bw information */
+ /* Data structure for saving BW information */
enum ice_bw_type {
ICE_BW_TYPE_PRIO,
ICE_BW_TYPE_CIR,
@@ -511,12 +511,12 @@ struct ice_bw_type_info {
u32 shared_bw;
};
-/* vsi type list entry to locate corresponding vsi/ag nodes */
+/* VSI type list entry to locate corresponding VSI/aggregator nodes */
struct ice_sched_vsi_info {
struct ice_sched_node *vsi_node[ICE_MAX_TRAFFIC_CLASS];
struct ice_sched_node *ag_node[ICE_MAX_TRAFFIC_CLASS];
u16 max_lanq[ICE_MAX_TRAFFIC_CLASS];
- /* bw_t_info saves VSI bw information */
+ /* bw_t_info saves VSI BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
@@ -577,7 +577,7 @@ struct ice_dcbx_cfg {
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
- struct ice_hw *hw; /* back pointer to hw instance */
+ struct ice_hw *hw; /* back pointer to HW instance */
u32 last_node_teid; /* scheduler last node info */
u16 sw_id; /* Initial switch ID belongs to port */
u16 pf_vf_num;
@@ -592,7 +592,7 @@ struct ice_port_info {
struct ice_mac_info mac;
struct ice_phy_info phy;
struct ice_lock sched_lock; /* protect access to TXSched tree */
- /* List contain profile id(s) and other params per layer */
+ /* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
@@ -648,7 +648,7 @@ struct ice_hw {
u8 pf_id; /* device profile info */
u16 max_burst_size; /* driver sets this value */
- /* TX Scheduler values */
+ /* Tx Scheduler values */
u16 num_tx_sched_layers;
u16 num_tx_sched_phys_layers;
u8 flattened_layers;
@@ -659,7 +659,7 @@ struct ice_hw {
struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
struct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];
u8 evb_veb; /* true for VEB, false for VEPA */
- u8 reset_ongoing; /* true if hw is in reset, false otherwise */
+ u8 reset_ongoing; /* true if HW is in reset, false otherwise */
struct ice_bus_info bus;
struct ice_nvm_info nvm;
struct ice_hw_dev_caps dev_caps; /* device capabilities */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 03/38] net/ice/base: add two helper functions
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 02/38] net/ice/base: improve comments Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 04/38] net/ice/base: add helper macros Qi Zhang
` (36 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two helper functions in common module.
1. ice_aq_set_mac_cfg to help configure maximum frame size with AQ
command
2. ice_get_ctx help to extract context bits from a packet structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 20 +++
drivers/net/ice/base/ice_common.c | 282 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_common.h | 4 +
3 files changed, 306 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 5a599280e..feb980475 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1168,6 +1168,25 @@ struct ice_aqc_set_phy_cfg_data {
};
+/* Set MAC Config command data structure (direct 0x0603) */
+struct ice_aqc_set_mac_cfg {
+ __le16 max_frame_size;
+ u8 params;
+#define ICE_AQ_SET_MAC_PACE_S 3
+#define ICE_AQ_SET_MAC_PACE_M (0xF << ICE_AQ_SET_MAC_PACE_S)
+#define ICE_AQ_SET_MAC_PACE_TYPE_M BIT(7)
+#define ICE_AQ_SET_MAC_PACE_TYPE_RATE 0
+#define ICE_AQ_SET_MAC_PACE_TYPE_FIXED ICE_AQ_SET_MAC_PACE_TYPE_M
+ u8 tx_tmr_priority;
+ __le16 tx_tmr_value;
+ __le16 fc_refresh_threshold;
+ u8 drop_opts;
+#define ICE_AQ_SET_MAC_AUTO_DROP_MASK BIT(0)
+#define ICE_AQ_SET_MAC_AUTO_DROP_NONE 0
+#define ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS BIT(0)
+ u8 reserved[7];
+};
+
/* Restart AN command data structure (direct 0x0605)
* Also used for response, with only the lport_num field present.
@@ -1782,6 +1801,7 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
} params;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index bcfa3014b..392183375 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -423,6 +423,74 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
}
}
+/**
+ * ice_aq_set_mac_cfg
+ * @hw: pointer to the HW struct
+ * @max_frame_size: Maximum Frame Size to be supported
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set MAC configuration (0x0603)
+ */
+enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
+{
+ u16 fc_threshold_val, tx_timer_val;
+ struct ice_aqc_set_mac_cfg *cmd;
+ struct ice_port_info *pi;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ u8 port_num = 0;
+ bool link_up;
+ u32 reg_val;
+
+ cmd = &desc.params.set_mac_cfg;
+
+ if (max_frame_size == 0)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_cfg);
+
+ cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
+
+ /* Retrieve the current data_pacing value in FW*/
+ pi = &hw->port_info[port_num];
+
+ /* We turn on the get_link_info so that ice_update_link_info(...)
+ * can be called.
+ */
+ pi->phy.get_link_info = 1;
+
+ status = ice_get_link_status(pi, &link_up);
+
+ if (status)
+ return status;
+
+ cmd->params = pi->phy.link_info.pacing;
+
+ /* We read back the transmit timer and fc threshold value of
+ * LFC. Thus, we will use index =
+ * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+ *
+ * Also, because we are opearating on transmit timer and fc
+ * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+ */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+ /* Retrieve the transmit timer */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+ tx_timer_val = reg_val &
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+ cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+ /* Retrieve the fc threshold */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+ fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
+ cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
@@ -3227,6 +3295,220 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+/**
+ * ice_read_byte - read context byte into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_byte(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u8 dest_byte, mask;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = (u8)(BIT(ce_info->width) - 1);
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&dest_byte, src, sizeof(dest_byte), ICE_DMA_TO_NONDMA);
+
+ dest_byte &= ~(mask);
+
+ dest_byte >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_byte, sizeof(dest_byte), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_word - read context word into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_word(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u16 dest_word, mask;
+ u8 *src, *target;
+ __le16 src_word;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = BIT(ce_info->width) - 1;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_word, src, sizeof(src_word), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_word &= ~(CPU_TO_LE16(mask));
+
+ /* get the data back into host order before shifting */
+ dest_word = LE16_TO_CPU(src_word);
+
+ dest_word >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_word, sizeof(dest_word), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_dword - read context dword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_dword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u32 dest_dword, mask;
+ __le32 src_dword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 32 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 5 bits so the shift will do nothing
+ */
+ if (ce_info->width < 32)
+ mask = BIT(ce_info->width) - 1;
+ else
+ mask = (u32)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_dword, src, sizeof(src_dword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_dword &= ~(CPU_TO_LE32(mask));
+
+ /* get the data back into host order before shifting */
+ dest_dword = LE32_TO_CPU(src_dword);
+
+ dest_dword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_dword, sizeof(dest_dword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_qword - read context qword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_qword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u64 dest_qword, mask;
+ __le64 src_qword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 64 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 6 bits so the shift will do nothing
+ */
+ if (ce_info->width < 64)
+ mask = BIT_ULL(ce_info->width) - 1;
+ else
+ mask = (u64)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_qword, src, sizeof(src_qword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_qword &= ~(CPU_TO_LE64(mask));
+
+ /* get the data back into host order before shifting */
+ dest_qword = LE64_TO_CPU(src_qword);
+
+ dest_qword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_qword, sizeof(dest_qword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_get_ctx - extract context bits from a packed structure
+ * @src_ctx: pointer to a generic packed context structure
+ * @dest_ctx: pointer to a generic non-packed context structure
+ * @ce_info: a description of the structure to be read from
+ */
+enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ int f;
+
+ for (f = 0; ce_info[f].width; f++) {
+ switch (ce_info[f].size_of) {
+ case 1:
+ ice_read_byte(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 2:
+ ice_read_word(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 4:
+ ice_read_dword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 8:
+ ice_read_qword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ default:
+ /* nothing to do, just keep going */
+ break;
+ }
+ }
+
+ return ICE_SUCCESS;
+}
/**
* ice_ena_vsi_txq
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index f2ad86182..0b387cdbe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -133,6 +133,8 @@ enum ice_status
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd);
enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
+enum ice_status
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd);
enum ice_status
@@ -149,6 +151,8 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
+enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cmd_details);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 04/38] net/ice/base: add helper macros
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (2 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 03/38] net/ice/base: add two helper functions Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 05/38] net/ice/base: allow package copy to be used after resets Qi Zhang
` (35 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Add macro ice_for_each_traffic_class to loop for each
traffic class.
2. Add macro MIN_T to wrap min with type conversion.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_nvm.c | 7 ++++---
drivers/net/ice/base/ice_sched.c | 30 +++++++++++++++---------------
drivers/net/ice/base/ice_type.h | 7 +++++++
4 files changed, 27 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 392183375..86d3be17a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3669,7 +3669,7 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
ice_acquire_lock(&pi->sched_lock);
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
/* configuration is possible only if TC node is present */
if (!ice_sched_get_tc_node(pi, i))
continue;
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 92de2ec3b..8d3d0b0ed 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -163,9 +163,10 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
*/
off_w = offset % ICE_SR_SECTOR_SIZE_IN_WORDS;
read_size = off_w ?
- min(*words,
- (u16)(ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
- min((*words - words_read), ICE_SR_SECTOR_SIZE_IN_WORDS);
+ MIN_T(u16, *words,
+ (ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
+ MIN_T(u16, (*words - words_read),
+ ICE_SR_SECTOR_SIZE_IN_WORDS);
/* Check if this is last command, if so set proper flag */
if ((words_read + read_size) >= *words)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2edc305b5..237bf7350 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1896,7 +1896,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
if (!vsi_ctx)
goto exit_sched_rm_vsi_cfg;
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
struct ice_sched_node *vsi_node, *tc_node;
u8 j = 0;
@@ -2174,7 +2174,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
/* Create aggregator node(s) for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
/* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
@@ -2340,7 +2340,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
/* Move VSI node to new aggregator node for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
@@ -2410,7 +2410,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
goto exit_ice_rm_agg_cfg;
}
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
if (status)
goto exit_ice_rm_agg_cfg;
@@ -3050,7 +3050,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -3112,7 +3112,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -4174,7 +4174,7 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *node;
node = vsi_ctx->sched.ag_node[tc];
@@ -4324,7 +4324,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
enum ice_status status;
@@ -4384,7 +4384,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
if (status)
goto exit_set_vsi_bw_shared_lmt;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4442,7 +4442,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
if (!agg_id_present)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4513,7 +4513,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -5119,7 +5119,7 @@ ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
if (!agg_info)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
ICE_BW_TYPE_CNT))
continue;
@@ -5159,7 +5159,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
u8 tc;
/* Some TC(s) may be missing after reset, adjust for replay */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
+ ice_for_each_traffic_class(tc)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
ice_set_bit(tc, ena_tc_bitmap);
@@ -5253,7 +5253,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
u8 tc;
ice_acquire_lock(&pi->sched_lock);
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node;
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
@@ -5291,7 +5291,7 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
tc_node = ice_sched_get_tc_node(pi, tc);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 08c974004..2e865a78f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -18,6 +18,9 @@
#define ICE_BYTES_PER_DWORD 4
#define ICE_MAX_TRAFFIC_CLASS 8
+#ifndef MIN_T
+#define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b))
+#endif
#include "ice_status.h"
#include "ice_hw_autogen.h"
@@ -379,6 +382,10 @@ struct ice_nvm_info {
/* Max number of port to queue branches w.r.t topology */
#define ICE_TXSCHED_MAX_BRANCHES ICE_MAX_TRAFFIC_CLASS
+
+#define ice_for_each_traffic_class(_i) \
+ for ((_i) = 0; (_i) < ICE_MAX_TRAFFIC_CLASS; (_i)++)
+
/* ICE_DFLT_AGG_ID means that all new VM(s)/VSI node connects
* to driver defined policy for default aggregator
*/
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 05/38] net/ice/base: allow package copy to be used after resets
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (3 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 04/38] net/ice/base: add helper macros Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 06/38] net/ice/base: code clean Qi Zhang
` (34 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
For components that make a copy of an external pipeline package file (i.e.
the Linux and FreeBSD drivers), save the size of the package file along
with the copy so that both can be used when calling ice_init_pkg() after a
CORER/GLOBR reset. Also, do not free the copy of the package file in
ice_init_pkg() since it is needed afterward for subsequent resets.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 9 +++++----
drivers/net/ice/base/ice_type.h | 1 +
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c87424601..66c47abda 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1269,6 +1269,7 @@ void ice_free_seg(struct ice_hw *hw)
if (hw->pkg_copy) {
ice_free(hw, hw->pkg_copy);
hw->pkg_copy = NULL;
+ hw->pkg_size = 0;
}
hw->seg = NULL;
}
@@ -1351,8 +1352,6 @@ static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
status = ICE_SUCCESS;
}
- /* Free a previous segment, if necessary */
- ice_free_seg(hw);
if (!status) {
hw->seg = seg;
/* on successful package download, update other required
@@ -1401,12 +1400,14 @@ enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
buf_copy = (u8 *)ice_memdup(hw, buf, len, ICE_NONDMA_TO_NONDMA);
status = ice_init_pkg(hw, buf_copy, len);
- if (status)
+ if (status) {
/* Free the copy, since we failed to initialize the package */
ice_free(hw, buf_copy);
- else
+ } else {
/* Track the copied pkg so we can free it later */
hw->pkg_copy = buf_copy;
+ hw->pkg_size = len;
+ }
return status;
}
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 2e865a78f..6bd73ed04 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -728,6 +728,7 @@ struct ice_hw {
/* Pointer to allocated copy of pkg memory */
u8 *pkg_copy;
+ u32 pkg_size;
/* tunneling info */
struct ice_tunnel_table tnl;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 06/38] net/ice/base: code clean
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (4 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 05/38] net/ice/base: allow package copy to be used after resets Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 07/38] net/ice/base: declare functions as external Qi Zhang
` (33 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove unnecessary macro and data structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 -
drivers/net/ice/base/ice_flex_pipe.c | 2 -
drivers/net/ice/base/ice_flow.c | 136 ----------------------------------
drivers/net/ice/base/ice_type.h | 6 --
4 files changed, 146 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index feb980475..056a9fbef 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1930,8 +1930,6 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
- ice_aqc_opc_suspend_sched_traffic = 0x040B,
- ice_aqc_opc_resume_sched_traffic = 0x040C,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 66c47abda..2d23c36eb 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2247,8 +2247,6 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < xlt2->count; i++) {
if (xlt2->vsig_tbl[i].in_use &&
ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
- *vsig = (i | ((hw->pf_id << ICE_PF_NUM_S) &
- ICE_PF_NUM_M));
*vsig = ICE_VSIG_VALUE(i, hw->pf_id);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 574c927c4..03a324d49 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1554,142 +1554,6 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
return ICE_SUCCESS;
}
-/* Mapping of AVF hash bit fields to an L3-L4 hash combination.
- * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash,
- * convert its values to their appropriate flow L3, L4 values.
- */
-#define ICE_FLOW_AVF_RSS_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4))
-#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP))
-#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \
- ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP))
-
-#define ICE_FLOW_AVF_RSS_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6))
-#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP))
-#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \
- ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP))
-
-#define ICE_FLOW_MAX_CFG 10
-
-/**
- * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver
- * @hw: pointer to the hardware structure
- * @vsi_handle: software VSI handle
- * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure
- *
- * This function will take the hash bitmap provided by the AVF driver via a
- * message, convert it to ICE-compatible values, and configure RSS flow
- * profiles.
- */
-enum ice_status
-ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
-{
- u64 added_cfg[ICE_FLOW_MAX_CFG], hash_flds;
- enum ice_status status = ICE_SUCCESS;
- u8 i, idx = 0;
-
- if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||
- !ice_is_vsi_valid(hw, vsi_handle))
- return ICE_ERR_PARAM;
-
- /* Make sure no unsupported bits are specified */
- if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS |
- ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS))
- return ICE_ERR_CFG;
-
- hash_flds = avf_hash;
-
- /* Always create an L3 RSS configuration for any L4 RSS configuration */
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS;
-
- /* Create the corresponding RSS configuration for each valid hash bit */
- while (hash_flds) {
- u64 rss_hash = ICE_HASH_INVALID;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS;
- }
- } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS;
- }
- }
-
- if (rss_hash == ICE_HASH_INVALID)
- return ICE_ERR_OUT_OF_RANGE;
-
- status = ice_add_rss_cfg(hw, vsi_handle, rss_hash,
- ICE_FLOW_SEG_HDR_NONE);
- if (status)
- break;
- added_cfg[idx++] = rss_hash;
- }
-
- /* If status is not success, we must remove all hash configurations
- * that were successfully added previously in this call for the vsi
- */
- if (status)
- for (i = 0; i < idx; i++)
- ice_rem_rss_cfg(hw, vsi_handle, added_cfg[i],
- ICE_FLOW_SEG_HDR_NONE);
-
- return status;
-}
-
/**
* ice_rem_all_rss_vsi_ctx - remove all RSS configurations from VSI context
* @hw: pointer to the hardware structure
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6bd73ed04..25d64477f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -733,12 +733,6 @@ struct ice_hw {
/* tunneling info */
struct ice_tunnel_table tnl;
- /* PTYPE group and XLT1 management */
-#define ICE_MAX_PTGS 256
- struct ice_ptg_entry ptg_tbl[ICE_BLK_COUNT][ICE_MAX_PTGS];
-
-#define ICE_XLT1_CNT 1024
- struct ice_ptg_ptype xlt1_tbl[ICE_BLK_COUNT][ICE_XLT1_CNT];
#define ICE_PKG_FILENAME "package_file"
#define ICE_PKG_FILENAME_EXT "pkg"
#define ICE_PKG_FILE_MAJ_VER 1
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 07/38] net/ice/base: declare functions as external
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (5 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 06/38] net/ice/base: code clean Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 08/38] net/ice/base: add more APIs in switch module Qi Zhang
` (32 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove static of below functions and declare them as external
APIs.
ice_aq_add_vsi
ice_aq_free_vsi
ice_aq_update_vsi
ice_aq_add_lan_txq
ice_init_pkg
So far the purpose is just to sync with kernel driver.
They are reserved for future use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 4 ++++
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.h | 2 ++
drivers/net/ice/base/ice_switch.c | 6 +++---
drivers/net/ice/base/ice_switch.h | 9 +++++++++
6 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 86d3be17a..015db11e0 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2935,7 +2935,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
* Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
* flow.
*/
-static enum ice_status
+enum ice_status
ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 0b387cdbe..63f4a5ebe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -94,6 +94,10 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
enum ice_status
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
+enum ice_status
+ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
+ struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
+ struct ice_sq_cd *cd);
bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 2d23c36eb..ff615f94f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1314,7 +1314,7 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
* ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
* case.
*/
-static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
+enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
{
struct ice_pkg_hdr *pkg;
enum ice_status status;
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 23fffed75..00c2b6682 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -88,6 +88,8 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);
struct ice_prof_map *
ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);
enum ice_status
+ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);
+enum ice_status
ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
void ice_free_seg(struct ice_hw *hw);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 512e64b91..e6fc9fcee 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -288,7 +288,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
*
* Add a VSI context to the hardware (0x0210)
*/
-static enum ice_status
+enum ice_status
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
@@ -331,7 +331,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Free VSI context info from hardware (0x0213)
*/
-static enum ice_status
+enum ice_status
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd)
{
@@ -366,7 +366,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Update VSI context in the hardware (0x0211)
*/
-static enum ice_status
+enum ice_status
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 90dfdabcb..b28e55a4f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -271,6 +271,15 @@ enum ice_promisc_flags {
/* VSI related commands */
enum ice_status
+ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ bool keep_vsi_alloc, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 08/38] net/ice/base: add more APIs in switch module
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (6 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 07/38] net/ice/base: declare functions as external Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 09/38] net/ice/base: add VSI queue context framework Qi Zhang
` (31 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add below APIs in switch module
1. ice_aq_get_vsi_params - get VSI context info
2. ice_aq_add_update_mir_rule - add/update mirror rule
3. ice_aq_delete_mir_rule - delete mirror rule
4. ice_aq_set_storm_ctrl - set storm control configuration
5. ice_aq_get_storm_ctrl - get storm control configuration
PMD can use these APIs to enable mirror rule and storm control
related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 136 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.c | 228 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 29 +++++
3 files changed, 393 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 056a9fbef..724657af6 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -177,6 +177,13 @@ struct ice_aqc_clear_pxe {
};
+/* Configure No-Drop Policy Command (direct 0x0112) */
+struct ice_aqc_config_no_drop_policy {
+ u8 opts;
+#define ICE_AQC_FORCE_NO_DROP BIT(0)
+ u8 rsvd[15];
+};
+
/* Get switch configuration (0x0200) */
struct ice_aqc_get_sw_cfg {
/* Reserved for command and copy of request flags for response */
@@ -350,6 +357,19 @@ struct ice_aqc_add_update_free_vsi_resp {
};
+struct ice_aqc_get_vsi_resp {
+ __le16 vsi_num;
+ u8 vf_id;
+ /* The vsi_flags field uses the ICE_AQ_VSI_TYPE_* defines for values.
+ * These are found above in struct ice_aqc_add_get_update_free_vsi.
+ */
+ u8 vsi_flags;
+ __le16 vsi_used;
+ __le16 vsi_free;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
struct ice_aqc_vsi_props {
__le16 valid_sections;
@@ -506,6 +526,110 @@ struct ice_aqc_vsi_props {
};
+/* Add/update mirror rule - direct (0x0260) */
+#define ICE_AQC_RULE_ID_VALID_S 7
+#define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S)
+#define ICE_AQC_RULE_ID_S 0
+#define ICE_AQC_RULE_ID_M (0x3F << ICE_AQC_RULE_ID_S)
+
+/* Following defines to be used while processing caller specified mirror list
+ * of VSI indexes.
+ */
+/* Action: Byte.bit (1.7)
+ * 0 = Remove VSI from mirror rule
+ * 1 = Add VSI to mirror rule
+ */
+#define ICE_AQC_RULE_ACT_S 15
+#define ICE_AQC_RULE_ACT_M (0x1 << ICE_AQC_RULE_ACT_S)
+/* Action: 1.2:0.0 = Mirrored VSI */
+#define ICE_AQC_RULE_MIRRORED_VSI_S 0
+#define ICE_AQC_RULE_MIRRORED_VSI_M (0x7FF << ICE_AQC_RULE_MIRRORED_VSI_S)
+
+/* This is to be used by add/update mirror rule Admin Queue command.
+ * In case of add mirror rule - if rule ID is specified as
+ * INVAL_MIRROR_RULE_ID, new rule ID is allocated from shared pool.
+ * If specified rule_id is valid, then it is used. If specified rule_id
+ * is in use then new mirroring rule is added.
+ */
+#define ICE_INVAL_MIRROR_RULE_ID 0xFFFF
+
+struct ice_aqc_add_update_mir_rule {
+ __le16 rule_id;
+
+ __le16 rule_type;
+#define ICE_AQC_RULE_TYPE_S 0
+#define ICE_AQC_RULE_TYPE_M (0x7 << ICE_AQC_RULE_TYPE_S)
+ /* VPORT ingress/egress */
+#define ICE_AQC_RULE_TYPE_VPORT_INGRESS 0x1
+#define ICE_AQC_RULE_TYPE_VPORT_EGRESS 0x2
+ /* Physical port ingress mirroring.
+ * All traffic received by this port
+ */
+#define ICE_AQC_RULE_TYPE_PPORT_INGRESS 0x6
+ /* Physical port egress mirroring. All traffic sent by this port */
+#define ICE_AQC_RULE_TYPE_PPORT_EGRESS 0x7
+
+ /* Number of mirrored entries.
+ * The values are in the command buffer
+ */
+ __le16 num_entries;
+
+ /* Destination VSI */
+ __le16 dest;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Delete mirror rule - direct(0x0261) */
+struct ice_aqc_delete_mir_rule {
+ __le16 rule_id;
+ __le16 rsvd;
+
+ /* Byte.bit: 20.0 = Keep allocation. If set VSI stays part of
+ * the PF allocated resources, otherwise it is returned to the
+ * shared pool
+ */
+#define ICE_AQC_FLAG_KEEP_ALLOCD_S 0
+#define ICE_AQC_FLAG_KEEP_ALLOCD_M (0x1 << ICE_AQC_FLAG_KEEP_ALLOCD_S)
+ __le16 flags;
+
+ u8 reserved[10];
+};
+
+/* Set/Get storm config - (direct 0x0280, 0x0281) */
+/* This structure holds get storm configuration response and same structure
+ * is used to perform set_storm_cfg
+ */
+struct ice_aqc_storm_cfg {
+ __le32 bcast_thresh_size;
+ __le32 mcast_thresh_size;
+ /* Bit 18:0 - Traffic upper threshold size
+ * Bit 31:19 - Reserved
+ */
+#define ICE_AQ_THRESHOLD_S 0
+#define ICE_AQ_THRESHOLD_M (0x7FFFF << ICE_AQ_THRESHOLD_S)
+
+ __le32 storm_ctrl_ctrl;
+ /* Bit 0: MDIPW - Drop Multicast packets in previous window
+ * Bit 1: MDICW - Drop multicast packets in current window
+ * Bit 2: BDIPW - Drop broadcast packets in previous window
+ * Bit 3: BDICW - Drop broadcast packets in current window
+ */
+#define ICE_AQ_STORM_CTRL_MDIPW_DROP_MULTICAST BIT(0)
+#define ICE_AQ_STORM_CTRL_MDICW_DROP_MULTICAST BIT(1)
+#define ICE_AQ_STORM_CTRL_BDIPW_DROP_MULTICAST BIT(2)
+#define ICE_AQ_STORM_CTRL_BDICW_DROP_MULTICAST BIT(3)
+ /* Bit 7:5 : Reserved */
+ /* Bit 27:8 : Interval - BSC/MSC Time-interval specification: The
+ * interval size for applying ingress broadcast or multicast storm
+ * control.
+ */
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S 8
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_M \
+ (0xFFFFF << ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S)
+ __le32 reserved;
+};
+
#define ICE_MAX_NUM_RECIPES 64
@@ -1771,6 +1895,9 @@ struct ice_aq_desc {
struct ice_aqc_manage_mac_read mac_read;
struct ice_aqc_manage_mac_write mac_write;
struct ice_aqc_clear_pxe clear_pxe;
+ struct ice_aqc_config_no_drop_policy no_drop;
+ struct ice_aqc_add_update_mir_rule add_update_rule;
+ struct ice_aqc_delete_mir_rule del_rule;
struct ice_aqc_list_caps get_cap;
struct ice_aqc_get_phy_caps get_phy;
struct ice_aqc_set_phy_cfg set_phy;
@@ -1778,6 +1905,7 @@ struct ice_aq_desc {
struct ice_aqc_set_port_id_led set_port_id_led;
struct ice_aqc_get_sw_cfg get_sw_conf;
struct ice_aqc_sw_rules sw_rules;
+ struct ice_aqc_storm_cfg storm_conf;
struct ice_aqc_get_topo get_topo;
struct ice_aqc_sched_elem_cmd sched_elem_cmd;
struct ice_aqc_query_txsched_res query_sched_res;
@@ -1795,6 +1923,7 @@ struct ice_aq_desc {
struct ice_aqc_txqs_cleanup txqs_cleanup;
struct ice_aqc_add_get_update_free_vsi vsi_cmd;
struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res;
+ struct ice_aqc_get_vsi_resp get_vsi_resp;
struct ice_aqc_download_pkg download_pkg;
struct ice_aqc_get_pkg_info_list get_pkg_info_list;
struct ice_aqc_fw_logging fw_logging;
@@ -1912,6 +2041,13 @@ enum ice_adminq_opc {
ice_aqc_opc_get_vsi_params = 0x0212,
ice_aqc_opc_free_vsi = 0x0213,
+ /* Mirroring rules - add/update, delete */
+ ice_aqc_opc_add_update_mir_rule = 0x0260,
+ ice_aqc_opc_del_mir_rule = 0x0261,
+
+ /* storm configuration */
+ ice_aqc_opc_set_storm_cfg = 0x0280,
+ ice_aqc_opc_get_storm_cfg = 0x0281,
/* switch rules population commands */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e6fc9fcee..34637c1be 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -566,7 +566,174 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return ice_aq_update_vsi(hw, vsi_ctx, cd);
}
+/**
+ * ice_aq_get_vsi_params
+ * @hw: pointer to the HW struct
+ * @vsi_ctx: pointer to a VSI context struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get VSI context info from hardware (0x0212)
+ */
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_add_get_update_free_vsi *cmd;
+ struct ice_aqc_get_vsi_resp *resp;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.vsi_cmd;
+ resp = &desc.params.get_vsi_resp;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_vsi_params);
+
+ cmd->vsi_num = CPU_TO_LE16(vsi_ctx->vsi_num | ICE_AQ_VSI_IS_VALID);
+
+ status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,
+ sizeof(vsi_ctx->info), cd);
+ if (!status) {
+ vsi_ctx->vsi_num = LE16_TO_CPU(resp->vsi_num) &
+ ICE_AQ_VSI_NUM_M;
+ vsi_ctx->vsis_allocd = LE16_TO_CPU(resp->vsi_used);
+ vsi_ctx->vsis_unallocated = LE16_TO_CPU(resp->vsi_free);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_add_update_mir_rule - add/update a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_type: Rule Type
+ * @dest_vsi: VSI number to which packets will be mirrored
+ * @count: length of the list
+ * @mr_buf: buffer for list of mirrored VSI numbers
+ * @cd: pointer to command details structure or NULL
+ * @rule_id: Rule ID
+ *
+ * Add/Update Mirror Rule (0x260).
+ */
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id)
+{
+ struct ice_aqc_add_update_mir_rule *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ __le16 *mr_list = NULL;
+ u16 buf_size = 0;
+
+ switch (rule_type) {
+ case ICE_AQC_RULE_TYPE_VPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_VPORT_EGRESS:
+ /* Make sure count and mr_buf are set for these rule_types */
+ if (!(count && mr_buf))
+ return ICE_ERR_PARAM;
+
+ buf_size = count * sizeof(__le16);
+ mr_list = (__le16 *)ice_malloc(hw, buf_size);
+ if (!mr_list)
+ return ICE_ERR_NO_MEMORY;
+ break;
+ case ICE_AQC_RULE_TYPE_PPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_PPORT_EGRESS:
+ /* Make sure count and mr_buf are not set for these
+ * rule_types
+ */
+ if (count || mr_buf)
+ return ICE_ERR_PARAM;
+ break;
+ default:
+ ice_debug(hw, ICE_DBG_SW,
+ "Error due to unsupported rule_type %u\n", rule_type);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_update_mir_rule);
+
+ /* Pre-process 'mr_buf' items for add/update of virtual port
+ * ingress/egress mirroring (but not physical port ingress/egress
+ * mirroring)
+ */
+ if (mr_buf) {
+ int i;
+
+ for (i = 0; i < count; i++) {
+ u16 id;
+
+ id = mr_buf[i].vsi_idx & ICE_AQC_RULE_MIRRORED_VSI_M;
+
+ /* Validate specified VSI number, make sure it is less
+ * than ICE_MAX_VSI, if not return with error.
+ */
+ if (id >= ICE_MAX_VSI) {
+ ice_debug(hw, ICE_DBG_SW,
+ "Error VSI index (%u) out-of-range\n",
+ id);
+ ice_free(hw, mr_list);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ /* add VSI to mirror rule */
+ if (mr_buf[i].add)
+ mr_list[i] =
+ CPU_TO_LE16(id | ICE_AQC_RULE_ACT_M);
+ else /* remove VSI from mirror rule */
+ mr_list[i] = CPU_TO_LE16(id);
+ }
+ }
+
+ cmd = &desc.params.add_update_rule;
+ if ((*rule_id) != ICE_INVAL_MIRROR_RULE_ID)
+ cmd->rule_id = CPU_TO_LE16(((*rule_id) & ICE_AQC_RULE_ID_M) |
+ ICE_AQC_RULE_ID_VALID_M);
+ cmd->rule_type = CPU_TO_LE16(rule_type & ICE_AQC_RULE_TYPE_M);
+ cmd->num_entries = CPU_TO_LE16(count);
+ cmd->dest = CPU_TO_LE16(dest_vsi);
+
+ status = ice_aq_send_cmd(hw, &desc, mr_list, buf_size, cd);
+ if (!status)
+ *rule_id = LE16_TO_CPU(cmd->rule_id) & ICE_AQC_RULE_ID_M;
+ ice_free(hw, mr_list);
+
+ return status;
+}
+
+/**
+ * ice_aq_delete_mir_rule - delete a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_id: Mirror rule ID (to be deleted)
+ * @keep_allocd: if set, the VSI stays part of the PF allocated res,
+ * otherwise it is returned to the shared pool
+ * @cd: pointer to command details structure or NULL
+ *
+ * Delete Mirror Rule (0x261).
+ */
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_delete_mir_rule *cmd;
+ struct ice_aq_desc desc;
+
+ /* rule_id should be in the range 0...63 */
+ if (rule_id >= ICE_MAX_NUM_MIRROR_RULES)
+ return ICE_ERR_OUT_OF_RANGE;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_del_mir_rule);
+
+ cmd = &desc.params.del_rule;
+ rule_id |= ICE_AQC_RULE_ID_VALID_M;
+ cmd->rule_id = CPU_TO_LE16(rule_id);
+
+ if (keep_allocd)
+ cmd->flags = CPU_TO_LE16(ICE_AQC_FLAG_KEEP_ALLOCD_M);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_aq_alloc_free_vsi_list
@@ -626,6 +793,67 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
return status;
}
+/**
+ * ice_aq_set_storm_ctrl - Sets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Sets the storm control configuration (0x0280)
+ */
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask)
+{
+ struct ice_aqc_storm_cfg *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.storm_conf;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_storm_cfg);
+
+ cmd->bcast_thresh_size = CPU_TO_LE32(bcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->mcast_thresh_size = CPU_TO_LE32(mcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->storm_ctrl_ctrl = CPU_TO_LE32(ctl_bitmask);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_aq_get_storm_ctrl - gets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Gets the storm control configuration (0x0281)
+ */
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask)
+{
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_storm_cfg);
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+ if (!status) {
+ struct ice_aqc_storm_cfg *resp = &desc.params.storm_conf;
+
+ if (bcast_thresh)
+ *bcast_thresh = LE32_TO_CPU(resp->bcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (mcast_thresh)
+ *mcast_thresh = LE32_TO_CPU(resp->mcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (ctl_bitmask)
+ *ctl_bitmask = LE32_TO_CPU(resp->storm_ctrl_ctrl);
+ }
+
+ return status;
+}
/**
* ice_aq_sw_rules - add/update/remove switch rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b28e55a4f..ebcfaa120 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -29,6 +29,19 @@ struct ice_vsi_ctx {
struct LIST_HEAD_TYPE rss_list_head;
};
+/* This is to be used by add/update mirror rule Admin Queue command */
+struct ice_mir_rule_buf {
+ u16 vsi_idx; /* VSI index */
+
+ /* For each VSI, user can specify whether corresponding VSI
+ * should be added/removed to/from mirror rule
+ *
+ * add mirror rule: this should always be TRUE.
+ * update mirror rule: add(true) or remove(false) VSI to/from
+ * mirror rule
+ */
+ u8 add;
+};
/* Switch recipe ID enum values are specific to hardware */
enum ice_sw_lkup_type {
@@ -290,6 +303,22 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id);
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask);
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask);
/* Switch config */
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 09/38] net/ice/base: add VSI queue context framework
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (7 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 08/38] net/ice/base: add more APIs in switch module Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 10/38] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
` (30 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Added code to allocate VSI queue contexts to save the queue specific
information like bandwidth etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_sched.c | 52 +++++++++++++++++++++++++++++++++++----
drivers/net/ice/base/ice_switch.c | 26 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 8 ++++++
3 files changed, 81 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 237bf7350..ab6097237 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -576,6 +576,48 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
}
/**
+ * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ * @tc: TC number
+ * @new_numqs: number of queues
+ */
+static enum ice_status
+ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
+{
+ struct ice_vsi_ctx *vsi_ctx;
+ struct ice_q_ctx *q_ctx;
+
+ vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi_ctx)
+ return ICE_ERR_PARAM;
+ /* allocate LAN queue contexts */
+ if (!vsi_ctx->lan_q_ctx[tc]) {
+ vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!vsi_ctx->lan_q_ctx[tc])
+ return ICE_ERR_NO_MEMORY;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ return ICE_SUCCESS;
+ }
+ /* num queues are increased, update the queue contexts */
+ if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
+ u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
+
+ q_ctx = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!q_ctx)
+ return ICE_ERR_NO_MEMORY;
+ ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
+ prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
+ ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
+ vsi_ctx->lan_q_ctx[tc] = q_ctx;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
* ice_aq_rl_profile - performs a rate limiting task
* @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
@@ -1717,14 +1759,14 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
if (!vsi_ctx)
return ICE_ERR_PARAM;
- if (owner == ICE_SCHED_NODE_OWNER_LAN)
- prev_numqs = vsi_ctx->sched.max_lanq[tc];
- else
- return ICE_ERR_PARAM;
-
+ prev_numqs = vsi_ctx->sched.max_lanq[tc];
/* num queues are not changed or less than the previous number */
if (new_numqs <= prev_numqs)
return status;
+ status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
+ if (status)
+ return status;
+
if (new_numqs)
ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
/* Keep the max number of queue configuration all the time. Update the
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 34637c1be..4b53636b4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3,6 +3,8 @@
*/
#include "ice_switch.h"
+#include "ice_flex_type.h"
+#include "ice_flow.h"
#define ICE_ETH_DA_OFFSET 0
@@ -447,6 +449,27 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
}
/**
+ * ice_clear_vsi_q_ctx - clear VSI queue contexts for all TCs
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ */
+static void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ u8 i;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return;
+ ice_for_each_traffic_class(i) {
+ if (vsi->lan_q_ctx[i]) {
+ ice_free(hw, vsi->lan_q_ctx[i]);
+ vsi->lan_q_ctx[i] = NULL;
+ }
+ }
+}
+
+/**
* ice_clear_vsi_ctx - clear the VSI context entry
* @hw: pointer to the HW struct
* @vsi_handle: VSI handle
@@ -459,6 +482,9 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
vsi = ice_get_vsi_ctx(hw, vsi_handle);
if (vsi) {
+ if (!LIST_EMPTY(&vsi->rss_list_head))
+ ice_rem_all_rss_vsi_ctx(hw, vsi_handle);
+ ice_clear_vsi_q_ctx(hw, vsi_handle);
ice_destroy_lock(&vsi->rss_locks);
ice_free(hw, vsi);
hw->vsi_ctx[vsi_handle] = NULL;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index ebcfaa120..c6d31475c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -15,6 +15,12 @@
#define ICE_VSI_INVAL_ID 0xFFFF
+#define ICE_INVAL_Q_HANDLE 0xFFFF
+
+/* VSI queue context structure */
+struct ice_q_ctx {
+ u16 q_handle;
+};
/* VSI context structure for add/get/update/free operations */
struct ice_vsi_ctx {
@@ -25,6 +31,8 @@ struct ice_vsi_ctx {
struct ice_aqc_vsi_props info;
struct ice_sched_vsi_info sched;
u8 alloc_from_pool;
+ u16 num_lan_q_entries[ICE_MAX_TRAFFIC_CLASS];
+ struct ice_q_ctx *lan_q_ctx[ICE_MAX_TRAFFIC_CLASS];
struct ice_lock rss_locks; /* protect rss config in VSI ctx */
struct LIST_HEAD_TYPE rss_list_head;
};
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 10/38] net/ice/base: add APIs to add remove ethertype filter
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (8 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 09/38] net/ice/base: add VSI queue context framework Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 11/38] net/ice/base: add APIs to get allocated resources Qi Zhang
` (29 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add API ice_remove_eth_mac and ice_add_eth_mac to support
adding / removing ethertype (or MAC) based filter rules.
PMD driver can use these APIs to enable related rte_flow rule.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 57 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 4 +++
2 files changed, 61 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4b53636b4..4af6a323c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2415,6 +2415,63 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
}
#endif
+/**
+ * ice_add_eth_mac - Add ethertype and MAC based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ether type MAC filter, MAC is optional
+ */
+enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr;
+
+ LIST_FOR_EACH_ENTRY(em_list_itr, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->fltr_info.flag = ICE_FLTR_TX;
+ em_list_itr->status = ice_add_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_remove_eth_mac - Remove an ethertype (or MAC) based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ethertype or ethertype MAC entries
+ */
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr, *tmp;
+
+ if (!em_list || !hw)
+ return ICE_ERR_PARAM;
+
+ LIST_FOR_EACH_ENTRY_SAFE(em_list_itr, tmp, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->status = ice_remove_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
/**
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index c6d31475c..f331621e1 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -347,6 +347,10 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#ifndef NO_MACVLAN_SUPPORT
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 11/38] net/ice/base: add APIs to get allocated resources
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (9 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 10/38] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 12/38] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
` (28 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_aq_get_res_alloc - get allocated resources.
2. ice_aq_get_res_descs - get allocated resource descriptors.
These APIs may help to PMD to enable some debug utilities to
dump the resource allocation status.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 53 +++++++++++++++++++++-
drivers/net/ice/base/ice_switch.c | 83 +++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 12 +++++
3 files changed, 147 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 724657af6..ca3d40c8b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -281,6 +281,34 @@ struct ice_aqc_get_sw_cfg_resp {
#define ICE_AQC_RES_TYPE_FLAG_DEDICATED 0x00
+#define ICE_AQC_RES_TYPE_S 0
+#define ICE_AQC_RES_TYPE_M (0x07F << ICE_AQC_RES_TYPE_S)
+
+/* Get Resource Allocation command (indirect 0x0204) */
+struct ice_aqc_get_res_alloc {
+ __le16 resp_elem_num; /* Used in response, reserved in command */
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Resource Allocation Response Buffer per response */
+struct ice_aqc_get_res_resp_elem {
+ __le16 res_type; /* Types defined above cmd 0x0204 */
+ __le16 total_capacity; /* Resources available to all PF's */
+ __le16 total_function; /* Resources allocated for a PF */
+ __le16 total_shared; /* Resources allocated as shared */
+ __le16 total_free; /* Resources un-allocated/not reserved by any PF */
+};
+
+/* Buffer for Get Resource command */
+struct ice_aqc_get_res_resp {
+ /* Number of resource entries to be calculated using
+ * datalen/sizeof(struct ice_aqc_cmd_resp)).
+ * Value of 'datalen' gets updated as part of response.
+ */
+ struct ice_aqc_get_res_resp_elem elem[1];
+};
/* Allocate Resources command (indirect 0x0208)
@@ -314,6 +342,28 @@ struct ice_aqc_alloc_free_res_elem {
};
+/* Get Allocated Resource Descriptors Command (indirect 0x020A) */
+struct ice_aqc_get_allocd_res_desc {
+ union {
+ struct {
+ __le16 res; /* Types defined above cmd 0x0204 */
+ __le16 first_desc;
+ __le32 reserved;
+ } cmd;
+ struct {
+ __le16 res;
+ __le16 next_desc;
+ __le16 num_desc;
+ __le16 reserved;
+ } resp;
+ } ops;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_get_allocd_res_desc_resp {
+ struct ice_aqc_res_elem elem[1];
+};
/* Add VSI (indirect 0x0210)
@@ -1912,7 +1962,6 @@ struct ice_aq_desc {
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
struct ice_aqc_rl_profile rl_profile;
-
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
@@ -1930,6 +1979,8 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_get_res_alloc get_res;
+ struct ice_aqc_get_allocd_res_desc get_res_desc;
struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4af6a323c..c985c1e31 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2042,6 +2042,89 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
return status;
}
+/**
+ * ice_aq_get_res_alloc - get allocated resources
+ * @hw: pointer to the HW struct
+ * @num_entries: pointer to u16 to store the number of resource entries returned
+ * @buf: pointer to user-supplied buffer
+ * @buf_size: size of buff
+ * @cd: pointer to command details structure or NULL
+ *
+ * The user-supplied buffer must be large enough to store the resource
+ * information for all resource types. Each resource type is an
+ * ice_aqc_get_res_resp_data_elem structure.
+ */
+enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_res_alloc *resp;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ if (!buf)
+ return ICE_ERR_BAD_PTR;
+
+ if (buf_size < ICE_AQ_GET_RES_ALLOC_BUF_LEN)
+ return ICE_ERR_INVAL_SIZE;
+
+ resp = &desc.params.get_res;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_res_alloc);
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+
+ if (!status && num_entries)
+ *num_entries = LE16_TO_CPU(resp->resp_elem_num);
+
+ return status;
+}
+
+/**
+ * ice_aq_get_res_descs - get allocated resource descriptors
+ * @hw: pointer to the hardware structure
+ * @num_entries: number of resource entries in buffer
+ * @buf: Indirect buffer to hold data parameters and response
+ * @buf_size: size of buffer for indirect commands
+ * @res_type: resource type
+ * @res_shared: is resource shared
+ * @desc_id: input - first desc ID to start; output - next desc ID
+ * @cd: pointer to command details structure or NULL
+ */
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_allocd_res_desc *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ ice_debug(hw, ICE_DBG_TRACE, "ice_aq_get_res_descs");
+
+ cmd = &desc.params.get_res_desc;
+
+ if (!buf)
+ return ICE_ERR_PARAM;
+
+ if (buf_size != (num_entries * sizeof(*buf)))
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_allocd_res_desc);
+
+ cmd->ops.cmd.res = CPU_TO_LE16(((res_type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | (res_shared ?
+ ICE_AQC_RES_TYPE_FLAG_SHARED : 0));
+ cmd->ops.cmd.first_desc = CPU_TO_LE16(*desc_id);
+
+ desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status)
+ *desc_id = LE16_TO_CPU(cmd->ops.resp.next_desc);
+
+ return status;
+}
/**
* ice_add_mac - Add a MAC address based filter rule
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index f331621e1..4b77d920f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -13,6 +13,10 @@
#define ICE_DFLT_VSI_INVAL 0xff
+/* Worst case buffer length for ice_aqc_opc_get_res_alloc */
+#define ICE_MAX_RES_TYPES 0x80
+#define ICE_AQ_GET_RES_ALLOC_BUF_LEN \
+ (ICE_MAX_RES_TYPES * sizeof(struct ice_aqc_get_res_resp_elem))
#define ICE_VSI_INVAL_ID 0xFFFF
#define ICE_INVAL_Q_HANDLE 0xFFFF
@@ -343,6 +347,14 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
enum ice_status
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 12/38] net/ice/base: add APIs to alloc/free resource counter
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (10 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 11/38] net/ice/base: add APIs to get allocated resources Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 13/38] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
` (27 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_alloc_res_cntr - allocate resource counter
2. ice_free_res_cntr - free resource counter
3. ice_alloc_vlan_res_counter - allocate vlan resource counter
4. ice_free_vlan_res_counter - free vlan resource counter
These APIs will be used when try to count the number of a flow be
hitted.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 97 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 6 +++
2 files changed, 103 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index c985c1e31..26fc0b46b 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3238,9 +3238,106 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_PROMISC_VLAN);
}
+/**
+ * ice_alloc_res_cntr - allocating resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries requested for FD resource type
+ * @counter_id: counter index returned by AQ call
+ */
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ /* Allocate resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (status)
+ goto exit;
+
+ *counter_id = LE16_TO_CPU(buf->elem[0].e.sw_resp);
+
+exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_free_res_cntr - free resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries to be freed for FD resource type
+ * @counter_id: counter ID resource which needs to be freed
+ */
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+ /* Free resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+ buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status)
+ ice_debug(hw, ICE_DBG_SW,
+ "counter resource could not be freed\n");
+
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_alloc_vlan_res_counter - obtain counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: returns counter index
+ */
+enum ice_status ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
+
+/**
+ * ice_free_vlan_res_counter - Free counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: counter index to be freed
+ */
+enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 4b77d920f..364083eb4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -338,6 +338,12 @@ enum ice_status
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
enum ice_status
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id);
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 13/38] net/ice/base: add APIs to get VSI promiscuous mode
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (11 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 12/38] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 14/38] net/ice/base: add MAC filter with marker and counter Qi Zhang
` (26 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_get_vsi_promisc - get promiscuous mode of give VSI.
2. ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI.
PMD may use these APIs to check the real HW status, but not rely on
a software flag when something abnormal.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 79 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 7 ++++
2 files changed, 86 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 26fc0b46b..e4024a0b0 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2894,6 +2894,85 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
return promisc_mask;
}
+/**
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head,
+ ice_fltr_mgmt_list_entry, list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
/**
* ice_remove_promisc - Remove promisc based filter rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 364083eb4..0d70b38f4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -394,6 +394,13 @@ enum ice_status
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc);
+/* Get VSIs Promisc/defport settings */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 14/38] net/ice/base: add MAC filter with marker and counter
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (12 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 13/38] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 15/38] net/ice/base: add two helper functions for flow management Qi Zhang
` (25 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_add_mac_with_sw_marker - add filter with software marker.
2. ice_add_mac_with_counter - add filter with counter enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 328 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 +
2 files changed, 333 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e4024a0b0..bfcb33ea6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1338,6 +1338,95 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
return status;
}
+/**
+ * ice_add_counter_act - add/update filter rule with counter action
+ * @hw: pointer to the hardware structure
+ * @m_ent: the management entry for which counter needs to be added
+ * @counter_id: VLAN counter ID returned as part of allocate resource
+ * @l_id: large action resource ID
+ */
+static enum ice_status
+ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
+ u16 counter_id, u16 l_id)
+{
+ struct ice_aqc_sw_rules_elem *lg_act;
+ struct ice_aqc_sw_rules_elem *rx_tx;
+ enum ice_status status;
+ /* 2 actions will be added while adding a large action counter */
+ const int num_acts = 2;
+ u16 lg_act_size;
+ u16 rules_size;
+ u16 f_rule_id;
+ u32 act;
+ u16 id;
+
+ if (m_ent->fltr_info.lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ /* Create two back-to-back switch rules and submit them to the HW using
+ * one memory buffer:
+ * 1. Large Action
+ * 2. Look up Tx Rx
+ */
+ lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts);
+ rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE;
+ lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
+ rules_size);
+ if (!lg_act)
+ return ICE_ERR_NO_MEMORY;
+
+ rx_tx = (struct ice_aqc_sw_rules_elem *)
+ ((u8 *)lg_act + lg_act_size);
+
+ /* Fill in the first switch rule i.e. large action */
+ lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT);
+ lg_act->pdata.lg_act.index = CPU_TO_LE16(l_id);
+ lg_act->pdata.lg_act.size = CPU_TO_LE16(num_acts);
+
+ /* First action VSI forwarding or VSI list forwarding depending on how
+ * many VSIs
+ */
+ id = (m_ent->vsi_count > 1) ? m_ent->fltr_info.fwd_id.vsi_list_id :
+ m_ent->fltr_info.fwd_id.hw_vsi_id;
+
+ act = ICE_LG_ACT_VSI_FORWARDING | ICE_LG_ACT_VALID_BIT;
+ act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) &
+ ICE_LG_ACT_VSI_LIST_ID_M;
+ if (m_ent->vsi_count > 1)
+ act |= ICE_LG_ACT_VSI_LIST;
+ lg_act->pdata.lg_act.act[0] = CPU_TO_LE32(act);
+
+ /* Second action counter ID */
+ act = ICE_LG_ACT_STAT_COUNT;
+ act |= (counter_id << ICE_LG_ACT_STAT_COUNT_S) &
+ ICE_LG_ACT_STAT_COUNT_M;
+ lg_act->pdata.lg_act.act[1] = CPU_TO_LE32(act);
+
+ /* call the fill switch rule to fill the lookup Tx Rx structure */
+ ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
+ ice_aqc_opc_update_sw_rules);
+
+ act = ICE_SINGLE_ACT_PTR;
+ act |= (l_id << ICE_SINGLE_ACT_PTR_VAL_S) & ICE_SINGLE_ACT_PTR_VAL_M;
+ rx_tx->pdata.lkup_tx_rx.act = CPU_TO_LE32(act);
+
+ /* Use the filter rule ID of the previously created rule with single
+ * act. Once the update happens, hardware will treat this as large
+ * action
+ */
+ f_rule_id = m_ent->fltr_info.fltr_rule_id;
+ rx_tx->pdata.lkup_tx_rx.index = CPU_TO_LE16(f_rule_id);
+
+ status = ice_aq_sw_rules(hw, lg_act, rules_size, 2,
+ ice_aqc_opc_update_sw_rules, NULL);
+ if (!status) {
+ m_ent->lg_act_idx = l_id;
+ m_ent->counter_index = counter_id;
+ }
+
+ ice_free(hw, lg_act);
+ return status;
+}
/**
* ice_create_vsi_list_map
@@ -3419,6 +3508,245 @@ enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
}
/**
+ * ice_alloc_res_lg_act - add large action resource
+ * @hw: pointer to the hardware structure
+ * @l_id: large action ID to fill it in
+ * @num_acts: number of actions to hold with a large action entry
+ */
+static enum ice_status
+ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ if (num_acts > ICE_MAX_LG_ACT || num_acts == 0)
+ return ICE_ERR_PARAM;
+
+ /* Allocate resource for large action */
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ sw_buf->num_elems = CPU_TO_LE16(1);
+
+ /* If num_acts is 1, use ICE_AQC_RES_TYPE_WIDE_TABLE_1.
+ * If num_acts is 2, use ICE_AQC_RES_TYPE_WIDE_TABLE_3.
+ * If num_acts is greater than 2, then use
+ * ICE_AQC_RES_TYPE_WIDE_TABLE_4.
+ * The num_acts cannot exceed 4. This was ensured at the
+ * beginning of the function.
+ */
+ if (num_acts == 1)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_1);
+ else if (num_acts == 2)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_2);
+ else
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_4);
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (!status)
+ *l_id = LE16_TO_CPU(sw_buf->elem[0].e.sw_resp);
+
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_add_mac_with_sw_marker - add filter with sw marker
+ * @hw: pointer to the hardware structure
+ * @f_info: filter info structure containing the MAC filter information
+ * @sw_marker: sw marker to tag the Rx descriptor with
+ */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exists;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (sw_marker == ICE_INVAL_SW_MARKER_ID)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+
+ INIT_LIST_HEAD(&l_head);
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ entry_exists = false;
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exists = true;
+ else if (ret)
+ return ret;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+ ice_acquire_lock(rule_lock);
+ /* Get the book keeping entry for the filter */
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry)
+ goto exit_error;
+
+ /* If counter action was enabled for this rule then don't enable
+ * sw marker large action
+ */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* if same marker was added before */
+ if (m_entry->sw_marker_id == sw_marker) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to hold large act. Three actions
+ * for marker based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 3);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the marker action */
+ ret = ice_add_marker_act(hw, m_entry, sw_marker, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exists)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
+ * ice_add_mac_with_counter - add filter with counter enabled
+ * @hw: pointer to the hardware structure
+ * @f_info: pointer to filter info structure containing the MAC filter
+ * information
+ */
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exist;
+ u16 counter_id;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ entry_exist = false;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+ INIT_LIST_HEAD(&l_head);
+
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exist = true;
+ else if (ret)
+ return ret;
+
+ ice_acquire_lock(rule_lock);
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry) {
+ ret = ICE_ERR_BAD_PTR;
+ goto exit_error;
+ }
+
+ /* Don't enable counter for a filter for which sw marker was enabled */
+ if (m_entry->sw_marker_id != ICE_INVAL_SW_MARKER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* If a counter was already enabled then don't need to add again */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to VLAN counter */
+ ret = ice_alloc_vlan_res_counter(hw, &counter_id);
+ if (ret)
+ goto exit_error;
+
+ /* Allocate a hardware table entry to hold large act. Two actions for
+ * counter based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 2);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the counter action */
+ ret = ice_add_counter_act(hw, m_entry, counter_id, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exist)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 0d70b38f4..b396a486c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -377,6 +377,11 @@ enum ice_status
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#endif /* !NO_MACVLAN_SUPPORT */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker);
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 15/38] net/ice/base: add two helper functions for flow management
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (13 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 14/38] net/ice/base: add MAC filter with marker and counter Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 16/38] net/ice/base: minor fix Qi Zhang
` (24 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_rem_all_sw_rules_info - remove all switch rules.
2. ice_reply_all_fltr - replay all filters stored in book keeping list.
These APIs will be used when switch rule feature is enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 107 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 2 +
2 files changed, 109 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index bfcb33ea6..a0c39b5d7 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2667,6 +2667,23 @@ ice_rem_sw_rule_info(struct ice_hw *hw, struct LIST_HEAD_TYPE *rule_head)
}
+/**
+ * ice_rem_all_sw_rules_info
+ * @hw: pointer to the hardware structure
+ */
+void ice_rem_all_sw_rules_info(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *rule_head;
+
+ rule_head = &sw->recp_list[i].filt_rules;
+ if (!sw->recp_list[i].adv_rule)
+ ice_rem_sw_rule_info(hw, rule_head);
+ }
+}
/**
* ice_cfg_dflt_vsi - change state of VSI to set/clear default
@@ -3747,6 +3764,96 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
}
/**
+ * ice_replay_fltr - Replay all the filters stored by a specific list head
+ * @hw: pointer to the hardware structure
+ * @list_head: list for which filters needs to be replayed
+ * @recp_id: Recipe ID for which rules need to be replayed
+ */
+static enum ice_status
+ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
+{
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE l_head;
+ enum ice_status status = ICE_SUCCESS;
+
+ if (LIST_EMPTY(list_head))
+ return status;
+
+ /* Move entries from the given list_head to a temporary l_head so that
+ * they can be replayed. Otherwise when trying to re-add the same
+ * filter, the function will return already exists
+ */
+ LIST_REPLACE_INIT(list_head, &l_head);
+
+ /* Mark the given list_head empty by reinitializing it so filters
+ * could be added again by *handler
+ */
+ LIST_FOR_EACH_ENTRY(itr, &l_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ struct ice_fltr_list_entry f_entry;
+
+ f_entry.fltr_info = itr->fltr_info;
+ if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) {
+ status = ice_add_rule_internal(hw, recp_id, &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ continue;
+ }
+
+ /* Add a filter per VSI separately */
+ while (1) {
+ u16 vsi_handle;
+
+ vsi_handle =
+ ice_find_first_bit(itr->vsi_list_info->vsi_map,
+ ICE_MAX_VSI);
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ break;
+
+ ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
+ f_entry.fltr_info.vsi_handle = vsi_handle;
+ f_entry.fltr_info.fwd_id.hw_vsi_id =
+ ice_get_hw_vsi_num(hw, vsi_handle);
+ f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
+ if (recp_id == ICE_SW_LKUP_VLAN)
+ status = ice_add_vlan_internal(hw, &f_entry);
+ else
+ status = ice_add_rule_internal(hw, recp_id,
+ &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ }
+ }
+end:
+ /* Clear the filter management list */
+ ice_rem_sw_rule_info(hw, &l_head);
+ return status;
+}
+
+/**
+ * ice_replay_all_fltr - replay all filters stored in bookkeeping lists
+ * @hw: pointer to the hardware structure
+ *
+ * NOTE: This function does not clean up partially added filters on error.
+ * It is up to caller of the function to issue a reset or fail early.
+ */
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ enum ice_status status = ICE_SUCCESS;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *head = &sw->recp_list[i].filt_rules;
+
+ status = ice_replay_fltr(hw, i, head);
+ if (status != ICE_SUCCESS)
+ return status;
+ }
+ return status;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b396a486c..3cc2c10e8 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -362,6 +362,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
+void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
@@ -409,6 +410,7 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
enum ice_status ice_init_def_sw_recp(struct ice_hw *hw);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 16/38] net/ice/base: minor fix
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (14 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 15/38] net/ice/base: add two helper functions for flow management Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 17/38] net/ice/base: update macros Qi Zhang
` (23 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ICE_SW_LKUP_LAST need to be handled correctly in
ice_aq_alloc_free_vsi_list and ice_update_vsi_list_rule
2. ICE_SW_LKUP_ETHERTYPE_MAC need to be handled correctly in
ice_update_vsi_lkup_fltr
3. free package segment pointer during ice_deinit_hw
Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 1 +
drivers/net/ice/base/ice_switch.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 015db11e0..4085ccc12 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -938,6 +938,7 @@ void ice_deinit_hw(struct ice_hw *hw)
ice_sched_cleanup_all(hw);
ice_sched_clear_agg(hw);
+ ice_free_seg(hw);
if (hw->port_info) {
ice_free(hw, hw->port_info);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a0c39b5d7..e47c1d845 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -792,7 +792,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN) {
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST) {
sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VSI_LIST_REP);
} else if (lkup_type == ICE_SW_LKUP_VLAN) {
sw_buf->res_type =
@@ -1492,7 +1493,8 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN)
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST)
type = remove ? ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR :
ICE_AQC_SW_RULES_T_VSI_LIST_SET;
else if (lkup_type == ICE_SW_LKUP_VLAN)
@@ -3388,6 +3390,8 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
break;
case ICE_SW_LKUP_ETHERTYPE:
case ICE_SW_LKUP_ETHERTYPE_MAC:
+ ice_remove_eth_mac(hw, &remove_list_head);
+ break;
case ICE_SW_LKUP_DFLT:
ice_debug(hw, ICE_DBG_SW,
"Remove filters for this lookup type hasn't been implemented yet\n");
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 17/38] net/ice/base: update macros
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (15 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 16/38] net/ice/base: minor fix Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 18/38] net/ice/base: code clean Qi Zhang
` (22 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update macros for metadata and package flags.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 36 ++++++++---------
drivers/net/ice/base/ice_flow.h | 17 ++++++--
drivers/net/ice/base/ice_lan_tx_rx.h | 77 +++++++++++++++++++++++-------------
3 files changed, 80 insertions(+), 50 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4085ccc12..e0fe06e9c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -365,22 +365,22 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_FIN, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,
+ ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,
+ ICE_FLG_FIN, idx++);
/* flex flag 1 is not used for flexi-flag programming, skipping
* these four FLG64 bits.
*/
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100,
- ICE_RXFLG_EVLAN_x9100, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC,
- ICE_RXFLG_TNL0, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,
+ ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,
+ ICE_FLG_EVLAN_x9100, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,
+ ICE_FLG_TNL0, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);
break;
default:
@@ -399,17 +399,17 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
{
- enum ice_flex_rx_mdid mdid;
+ enum ice_flex_mdid mdid;
switch (prof_id) {
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?
- ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;
+ ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH;
ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 265e1ee3e..3db10cd6f 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -278,14 +278,23 @@ enum ice_flow_action_type {
ICE_FLOW_ACT_NOP,
ICE_FLOW_ACT_ALLOW,
ICE_FLOW_ACT_DROP,
- ICE_FLOW_ACT_COUNT,
+ ICE_FLOW_ACT_CNTR_PKT,
ICE_FLOW_ACT_FWD_VSI,
ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
- ICE_FLOW_ACTION_PUSH,
- ICE_FLOW_ACTION_POP,
- ICE_FLOW_ACTION_MODIFY,
+ ICE_FLOW_ACT_PUSH,
+ ICE_FLOW_ACT_POP,
+ ICE_FLOW_ACT_MODIFY,
+ ICE_FLOW_ACT_CNTR_BYTES,
+ ICE_FLOW_ACT_CNTR_PKT_BYTES,
+ ICE_FLOW_ACT_GENERIC_0,
+ ICE_FLOW_ACT_GENERIC_1,
+ ICE_FLOW_ACT_GENERIC_2,
+ ICE_FLOW_ACT_GENERIC_3,
+ ICE_FLOW_ACT_GENERIC_4,
+ ICE_FLOW_ACT_RPT_FLOW_ID,
+ ICE_FLOW_ACT_BUILD_PROF_IDX,
};
struct ice_flow_action {
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 4a1ea0c7d..b1963b5eb 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -627,39 +627,60 @@ enum ice_flex_opcode {
ICE_RX_OPC_PROTID
};
-/* Receive Descriptor MDID values */
-enum ice_flex_rx_mdid {
- ICE_RX_MDID_FLOW_ID_LOWER = 5,
- ICE_RX_MDID_FLOW_ID_HIGH,
- ICE_RX_MDID_DST_VSI = 13,
- ICE_RX_MDID_SRC_VSI = 19,
- ICE_RX_MDID_HASH_LOW = 56,
- ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR0 = ICE_RX_MDID_HASH_LOW,
- ICE_RX_MDID_ACL_CTR1 = ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR2 = 59
+/* Receive Descriptor MDID values that access packet flags */
+enum ice_flex_mdid_pkt_flags {
+ ICE_RX_MDID_PKT_FLAGS_15_0 = 20,
+ ICE_RX_MDID_PKT_FLAGS_31_16,
+ ICE_RX_MDID_PKT_FLAGS_47_32,
+ ICE_RX_MDID_PKT_FLAGS_63_48,
+};
+
+/* Generic descriptor MDID values */
+enum ice_flex_mdid {
+ ICE_MDID_GENERIC_WORD_0,
+ ICE_MDID_GENERIC_WORD_1,
+ ICE_MDID_GENERIC_WORD_2,
+ ICE_MDID_GENERIC_WORD_3,
+ ICE_MDID_GENERIC_WORD_4,
+ ICE_MDID_FLOW_ID_LOWER,
+ ICE_MDID_FLOW_ID_HIGH,
+ ICE_MDID_RX_DESCR_PROF_IDX,
+ ICE_MDID_RX_PKT_DROP,
+ ICE_MDID_RX_DST_Q = 12,
+ ICE_MDID_RX_DST_VSI,
+ ICE_MDID_SRC_VSI = 19,
+ ICE_MDID_ACL_NOP = 55,
+ /* Entry 56 */
+ ICE_MDID_RX_HASH_LOW,
+ ICE_MDID_ACL_CNTR_PKT = ICE_MDID_RX_HASH_LOW,
+ /* Entry 57 */
+ ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_BYTES = ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_PKT_BYTES
};
/* for ice_32byte_rx_flex_desc.mir_id_umb_cast member */
#define ICE_RX_FLEX_DESC_MIRROR_M (0x3F) /* 6-bits */
-/* Rx Flag64 packet flag bits */
-enum ice_rx_flg64_bits {
- ICE_RXFLG_PKT_DSI = 0,
- ICE_RXFLG_EVLAN_x8100 = 15,
- ICE_RXFLG_EVLAN_x9100,
- ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_MAC = 22,
- ICE_RXFLG_TNL_VLAN,
- ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_FIN = 32,
- ICE_RXFLG_SYN,
- ICE_RXFLG_RST,
- ICE_RXFLG_TNL0 = 38,
- ICE_RXFLG_TNL1,
- ICE_RXFLG_TNL2,
- ICE_RXFLG_UDP_GRE,
- ICE_RXFLG_RSVD = 63
+/* Rx/Tx Flag64 packet flag bits */
+enum ice_flg64_bits {
+ ICE_FLG_PKT_DSI = 0,
+ /* If there is a 1 in this bit position then that means Rx packet */
+ ICE_FLG_PKT_DIR = 4,
+ ICE_FLG_EVLAN_x8100 = 15,
+ ICE_FLG_EVLAN_x9100,
+ ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_MAC = 22,
+ ICE_FLG_TNL_VLAN,
+ ICE_FLG_PKT_FRG,
+ ICE_FLG_FIN = 32,
+ ICE_FLG_SYN,
+ ICE_FLG_RST,
+ ICE_FLG_TNL0 = 38,
+ ICE_FLG_TNL1,
+ ICE_FLG_TNL2,
+ ICE_FLG_UDP_GRE,
+ ICE_FLG_RSVD = 63
};
enum ice_rx_flex_desc_umb_cast_bits { /* field is 2 bits long */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 18/38] net/ice/base: code clean
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (16 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 17/38] net/ice/base: update macros Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 19/38] net/ice/base: enable VSI queue context Qi Zhang
` (21 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Change below function as static and also relocated code line
to align with kernel driver.
ice_aq_move_sched_elems
ice_sched_get_agg_node
ice_sched_set_node_bw_lmt
ice_sched_cfg_node_bw_alloc
ice_sched_add_agg_cfg
ice_sched_rm_agg_cfg
ice_sched_move_vsi_to_agg
ice_sched_del_rl_profile
ice_sched_rm_unused_rl_prof
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_sched.c | 1038 +++++++++++++++++++-------------------
drivers/net/ice/base/ice_sched.h | 24 -
2 files changed, 519 insertions(+), 543 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index ab6097237..2dd9f6f6c 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -462,7 +462,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
*
* Move scheduling elements (0x0408)
*/
-enum ice_status
+static enum ice_status
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd)
@@ -713,6 +713,41 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
+ * ice_sched_del_rl_profile - remove RL profile
+ * @hw: pointer to the HW struct
+ * @rl_info: rate limit profile information
+ *
+ * If the profile ID is not referenced anymore, it removes profile ID with
+ * its associated parameters from HW DB,and locally. The caller needs to
+ * hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_del_rl_profile(struct ice_hw *hw,
+ struct ice_aqc_rl_profile_info *rl_info)
+{
+ struct ice_aqc_rl_profile_generic_elem *buf;
+ u16 num_profiles_removed;
+ enum ice_status status;
+ u16 num_profiles = 1;
+
+ if (rl_info->prof_id_ref != 0)
+ return ICE_ERR_IN_USE;
+
+ /* Safe to remove profile ID */
+ buf = (struct ice_aqc_rl_profile_generic_elem *)
+ &rl_info->profile;
+ status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
+ &num_profiles_removed, NULL);
+ if (status || num_profiles_removed != num_profiles)
+ return ICE_ERR_CFG;
+
+ /* Delete stale entry now */
+ LIST_DEL(&rl_info->list_entry);
+ ice_free(hw, rl_info);
+ return status;
+}
+
+/**
* ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
@@ -1468,7 +1503,7 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
* This function retrieves an aggregator node for a given aggregator ID from
* a given TC branch
*/
-struct ice_sched_node *
+static struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u32 agg_id)
{
@@ -2071,6 +2106,220 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
+ * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
+ * @hw: pointer to the HW struct
+ * @node: pointer to a child node
+ * @num_nodes: num nodes count array
+ *
+ * This function walks through the aggregator subtree to find a free parent
+ * node
+ */
+static struct ice_sched_node *
+ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
+ u16 *num_nodes)
+{
+ u8 l = node->tx_sched_layer;
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(hw);
+
+ /* Is it VSI parent layer ? */
+ if (l == vsil - 1)
+ return (node->num_children < hw->max_children[l]) ? node : NULL;
+
+ /* We have intermediate nodes. Let's walk through the subtree. If the
+ * intermediate node has space to add a new node then clear the count
+ */
+ if (node->num_children < hw->max_children[l])
+ num_nodes[l] = 0;
+ /* The below recursive call is intentional and wouldn't go more than
+ * 2 or 3 iterations.
+ */
+
+ for (i = 0; i < node->num_children; i++) {
+ struct ice_sched_node *parent;
+
+ parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
+ num_nodes);
+ if (parent)
+ return parent;
+ }
+
+ return NULL;
+}
+
+/**
+ * ice_sched_update_parent - update the new parent in SW DB
+ * @new_parent: pointer to a new parent node
+ * @node: pointer to a child node
+ *
+ * This function removes the child from the old parent and adds it to a new
+ * parent
+ */
+static void
+ice_sched_update_parent(struct ice_sched_node *new_parent,
+ struct ice_sched_node *node)
+{
+ struct ice_sched_node *old_parent;
+ u8 i, j;
+
+ old_parent = node->parent;
+
+ /* update the old parent children */
+ for (i = 0; i < old_parent->num_children; i++)
+ if (old_parent->children[i] == node) {
+ for (j = i + 1; j < old_parent->num_children; j++)
+ old_parent->children[j - 1] =
+ old_parent->children[j];
+ old_parent->num_children--;
+ break;
+ }
+
+ /* now move the node to a new parent */
+ new_parent->children[new_parent->num_children++] = node;
+ node->parent = new_parent;
+ node->info.parent_teid = new_parent->info.node_teid;
+}
+
+/**
+ * ice_sched_move_nodes - move child nodes to a given parent
+ * @pi: port information structure
+ * @parent: pointer to parent node
+ * @num_items: number of child nodes to be moved
+ * @list: pointer to child node teids
+ *
+ * This function move the child nodes to a given parent.
+ */
+static enum ice_status
+ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
+ u16 num_items, u32 *list)
+{
+ struct ice_aqc_move_elem *buf;
+ struct ice_sched_node *node;
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw;
+ u16 grps_movd = 0;
+ u8 i;
+
+ hw = pi->hw;
+
+ if (!parent || !num_items)
+ return ICE_ERR_PARAM;
+
+ /* Does parent have enough space */
+ if (parent->num_children + num_items >=
+ hw->max_children[parent->tx_sched_layer])
+ return ICE_ERR_AQ_FULL;
+
+ buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ for (i = 0; i < num_items; i++) {
+ node = ice_sched_find_node_by_teid(pi->root, list[i]);
+ if (!node) {
+ status = ICE_ERR_PARAM;
+ goto move_err_exit;
+ }
+
+ buf->hdr.src_parent_teid = node->info.parent_teid;
+ buf->hdr.dest_parent_teid = parent->info.node_teid;
+ buf->teid[0] = node->info.node_teid;
+ buf->hdr.num_elems = CPU_TO_LE16(1);
+ status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
+ &grps_movd, NULL);
+ if (status && grps_movd != 1) {
+ status = ICE_ERR_CFG;
+ goto move_err_exit;
+ }
+
+ /* update the SW DB */
+ ice_sched_update_parent(parent, node);
+ }
+
+move_err_exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_sched_move_vsi_to_agg - move VSI to aggregator node
+ * @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function moves a VSI to an aggregator node or its subtree.
+ * Intermediate nodes may be created if required.
+ */
+static enum ice_status
+ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
+ u8 tc)
+{
+ struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ u32 first_node_teid, vsi_teid;
+ enum ice_status status;
+ u16 num_nodes_added;
+ u8 aggl, vsil, i;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
+ if (!vsi_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ aggl = ice_sched_get_agg_layer(pi->hw);
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+
+ /* set intermediate node count to 1 between aggregator and VSI layers */
+ for (i = aggl + 1; i < vsil; i++)
+ num_nodes[i] = 1;
+
+ /* Check if the aggregator subtree has any free node to add the VSI */
+ for (i = 0; i < agg_node->num_children; i++) {
+ parent = ice_sched_get_free_vsi_parent(pi->hw,
+ agg_node->children[i],
+ num_nodes);
+ if (parent)
+ goto move_nodes;
+ }
+
+ /* add new nodes */
+ parent = agg_node;
+ for (i = aggl + 1; i < vsil; i++) {
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added)
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ else
+ parent = parent->children[0];
+
+ if (!parent)
+ return ICE_ERR_CFG;
+ }
+
+move_nodes:
+ vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
+ return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
+}
+
+/**
* ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
@@ -2114,20 +2363,89 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
* @pi: port information structure
- * @agg_info: aggregator ID
- * @tc: TC number
- * @rm_vsi_info: bool value true or false
+ * @node: node pointer
*
- * This function removes aggregator reference to VSI of given TC. It removes
- * the aggregator configuration completely for requested TC. The caller needs
- * to hold the scheduler lock.
+ * This function checks whether the aggregator is attached with any VSI or not.
*/
-static enum ice_status
-ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
- u8 tc, bool rm_vsi_info)
-{
+static bool
+ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
+{
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+ if (node->tx_sched_layer < vsil - 1) {
+ for (i = 0; i < node->num_children; i++)
+ if (ice_sched_is_agg_inuse(pi, node->children[i]))
+ return true;
+ return false;
+ } else {
+ return node->num_children ? true : false;
+ }
+}
+
+/**
+ * ice_sched_rm_agg_cfg - remove the aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function removes the aggregator node and intermediate nodes if any
+ * from the given TC
+ */
+static enum ice_status
+ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *tc_node, *agg_node;
+ struct ice_hw *hw = pi->hw;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ /* Can't remove the aggregator node if it has children */
+ if (ice_sched_is_agg_inuse(pi, agg_node))
+ return ICE_ERR_IN_USE;
+
+ /* need to remove the whole subtree if aggregator node is the
+ * only child.
+ */
+ while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
+ struct ice_sched_node *parent = agg_node->parent;
+
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ if (parent->num_children > 1)
+ break;
+
+ agg_node = parent;
+ }
+
+ ice_free_sched_node(pi, agg_node);
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * @pi: port information structure
+ * @agg_info: aggregator ID
+ * @tc: TC number
+ * @rm_vsi_info: bool value true or false
+ *
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
+ */
+static enum ice_status
+ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
+ u8 tc, bool rm_vsi_info)
+{
enum ice_status status = ICE_SUCCESS;
/* If nothing to remove - return success */
@@ -2172,6 +2490,89 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_add_agg_cfg - create an aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function creates an aggregator node and intermediate nodes if required
+ * for the given TC
+ */
+static enum ice_status
+ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *parent, *agg_node, *tc_node;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw = pi->hw;
+ u32 first_node_teid;
+ u16 num_nodes_added;
+ u8 i, aggl;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ /* Does Agg node already exist ? */
+ if (agg_node)
+ return status;
+
+ aggl = ice_sched_get_agg_layer(hw);
+
+ /* need one node in Agg layer */
+ num_nodes[aggl] = 1;
+
+ /* Check whether the intermediate nodes have space to add the
+ * new aggregator. If they are full, then SW needs to allocate a new
+ * intermediate node on those layers
+ */
+ for (i = hw->sw_entry_point_layer; i < aggl; i++) {
+ parent = ice_sched_get_first_node(hw, tc_node, i);
+
+ /* scan all the siblings */
+ while (parent) {
+ if (parent->num_children < hw->max_children[i])
+ break;
+ parent = parent->sibling;
+ }
+
+ /* all the nodes are full, reserve one for this layer */
+ if (!parent)
+ num_nodes[i]++;
+ }
+
+ /* add the aggregator node */
+ parent = tc_node;
+ for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added) {
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ /* register aggregator ID with the aggregator node */
+ if (parent && i == aggl)
+ parent->agg_id = agg_id;
+ } else {
+ parent = parent->children[0];
+ }
+ }
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
* @agg_id: aggregator ID
@@ -2406,6 +2807,109 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_rm_unused_rl_prof - remove unused RL profile
+ * @pi: port information structure
+ *
+ * This function removes unused rate limit profiles from the HW and
+ * SW DB. The caller needs to hold scheduler lock.
+ */
+static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
+{
+ u8 ln;
+
+ for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+ struct ice_aqc_rl_profile_info *rl_prof_elem;
+ struct ice_aqc_rl_profile_info *rl_prof_tmp;
+
+ LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
+ &pi->rl_prof_list[ln],
+ ice_aqc_rl_profile_info, list_entry) {
+ if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
+ ice_debug(pi->hw, ICE_DBG_SCHED,
+ "Removed rl profile\n");
+ }
+ }
+}
+
+/**
+ * ice_sched_update_elem - update element
+ * @hw: pointer to the HW struct
+ * @node: pointer to node
+ * @info: node info to update
+ *
+ * It updates the HW DB, and local SW DB of node. It updates the scheduling
+ * parameters of node from argument info data buffer (Info->data buf) and
+ * returns success or error on config sched element failure. The caller
+ * needs to hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
+ struct ice_aqc_txsched_elem_data *info)
+{
+ struct ice_aqc_conf_elem buf;
+ enum ice_status status;
+ u16 elem_cfgd = 0;
+ u16 num_elems = 1;
+
+ buf.generic[0] = *info;
+ /* Parent TEID is reserved field in this aq call */
+ buf.generic[0].parent_teid = 0;
+ /* Element type is reserved field in this aq call */
+ buf.generic[0].data.elem_type = 0;
+ /* Flags is reserved field in this aq call */
+ buf.generic[0].data.flags = 0;
+
+ /* Update HW DB */
+ /* Configure element node */
+ status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
+ &elem_cfgd, NULL);
+ if (status || elem_cfgd != num_elems) {
+ ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
+ return ICE_ERR_CFG;
+ }
+
+ /* Config success case */
+ /* Now update local SW DB */
+ /* Only copy the data portion of info buffer */
+ node->info.data = info->data;
+ return status;
+}
+
+/**
+ * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
+ * @hw: pointer to the HW struct
+ * @node: sched node to configure
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @bw_alloc: BW weight/allocation
+ *
+ * This function configures node element's BW allocation.
+ */
+static enum ice_status
+ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
+ enum ice_rl_type rl_type, u8 bw_alloc)
+{
+ struct ice_aqc_txsched_elem_data buf;
+ struct ice_aqc_txsched_elem *data;
+ enum ice_status status;
+
+ buf = node->info;
+ data = &buf.data;
+ if (rl_type == ICE_MIN_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
+ data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else if (rl_type == ICE_MAX_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
+ data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else {
+ return ICE_ERR_PARAM;
+ }
+
+ /* Configure element */
+ status = ice_sched_update_elem(hw, node, &buf);
+ return status;
+}
+
+/**
* ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
* @agg_id: aggregator ID
@@ -3372,110 +3876,6 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
}
/**
- * ice_sched_del_rl_profile - remove rl profile
- * @hw: pointer to the hw struct
- * @rl_info: rate limit profile information
- *
- * If the profile id is not referenced anymore, it removes profile id with
- * its associated parameters from hw db,and locally. The caller needs to
- * hold scheduler lock.
- */
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info)
-{
- struct ice_aqc_rl_profile_generic_elem *buf;
- u16 num_profiles_removed;
- enum ice_status status;
- u16 num_profiles = 1;
-
- if (rl_info->prof_id_ref != 0)
- return ICE_ERR_IN_USE;
-
- /* Safe to remove profile id */
- buf = (struct ice_aqc_rl_profile_generic_elem *)
- &rl_info->profile;
- status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
- &num_profiles_removed, NULL);
- if (status || num_profiles_removed != num_profiles)
- return ICE_ERR_CFG;
-
- /* Delete stale entry now */
- LIST_DEL(&rl_info->list_entry);
- ice_free(hw, rl_info);
- return status;
-}
-
-/**
- * ice_sched_rm_unused_rl_prof - remove unused rl profile
- * @pi: port information structure
- *
- * This function removes unused rate limit profiles from the hw and
- * SW DB. The caller needs to hold scheduler lock.
- */
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
-{
- u8 ln;
-
- for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
- struct ice_aqc_rl_profile_info *rl_prof_elem;
- struct ice_aqc_rl_profile_info *rl_prof_tmp;
-
- LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
- &pi->rl_prof_list[ln],
- ice_aqc_rl_profile_info, list_entry) {
- if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
- ice_debug(pi->hw, ICE_DBG_SCHED,
- "Removed rl profile\n");
- }
- }
-}
-
-/**
- * ice_sched_update_elem - update element
- * @hw: pointer to the hw struct
- * @node: pointer to node
- * @info: node info to update
- *
- * It updates the HW DB, and local SW DB of node. It updates the scheduling
- * parameters of node from argument info data buffer (Info->data buf) and
- * returns success or error on config sched element failure. The caller
- * needs to hold scheduler lock.
- */
-static enum ice_status
-ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
- struct ice_aqc_txsched_elem_data *info)
-{
- struct ice_aqc_conf_elem buf;
- enum ice_status status;
- u16 elem_cfgd = 0;
- u16 num_elems = 1;
-
- buf.generic[0] = *info;
- /* Parent teid is reserved field in this aq call */
- buf.generic[0].parent_teid = 0;
- /* Element type is reserved field in this aq call */
- buf.generic[0].data.elem_type = 0;
- /* Flags is reserved field in this aq call */
- buf.generic[0].data.flags = 0;
-
- /* Update HW DB */
- /* Configure element node */
- status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
- &elem_cfgd, NULL);
- if (status || elem_cfgd != num_elems) {
- ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
- return ICE_ERR_CFG;
- }
-
- /* Config success case */
- /* Now update local SW DB */
- /* Only copy the data portion of info buffer */
- node->info.data = info->data;
- return status;
-}
-
-/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
* @hw: pointer to the HW struct
* @node: sched node to configure
@@ -3841,7 +4241,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
* It updates node's BW limit parameters like BW RL profile ID of type CIR,
* EIR, or SRL. The caller needs to hold scheduler lock.
*/
-enum ice_status
+static enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4588,7 +4988,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
/**
* ice_sched_cfg_sibl_node_prio - configure node sibling priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: sibling priority
*
@@ -4617,406 +5017,6 @@ ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_cfg_node_bw_alloc - configure node bw weight/alloc params
- * @hw: pointer to the hw struct
- * @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @bw_alloc: bw weight/allocation
- *
- * This function configures node element's bw allocation.
- */
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc)
-{
- struct ice_aqc_txsched_elem_data buf;
- struct ice_aqc_txsched_elem *data;
- enum ice_status status;
-
- buf = node->info;
- data = &buf.data;
- if (rl_type == ICE_MIN_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
- data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else if (rl_type == ICE_MAX_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
- data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else {
- return ICE_ERR_PARAM;
- }
-
- /* Configure element */
- status = ice_sched_update_elem(hw, node, &buf);
- return status;
-}
-
-/**
- * ice_sched_add_agg_cfg - create an aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function creates an aggregator node and intermediate nodes if required
- * for the given TC
- */
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *parent, *agg_node, *tc_node;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw = pi->hw;
- u32 first_node_teid;
- u16 num_nodes_added;
- u8 i, aggl;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- /* Does Agg node already exist ? */
- if (agg_node)
- return status;
-
- aggl = ice_sched_get_agg_layer(hw);
-
- /* need one node in Agg layer */
- num_nodes[aggl] = 1;
-
- /* Check whether the intermediate nodes have space to add the
- * new agg. If they are full, then SW needs to allocate a new
- * intermediate node on those layers
- */
- for (i = hw->sw_entry_point_layer; i < aggl; i++) {
- parent = ice_sched_get_first_node(hw, tc_node, i);
-
- /* scan all the siblings */
- while (parent) {
- if (parent->num_children < hw->max_children[i])
- break;
- parent = parent->sibling;
- }
-
- /* all the nodes are full, reserve one for this layer */
- if (!parent)
- num_nodes[i]++;
- }
-
- /* add the agg node */
- parent = tc_node;
- for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
- if (!parent)
- return ICE_ERR_CFG;
-
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added) {
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- /* register the aggregator id with the agg node */
- if (parent && i == aggl)
- parent->agg_id = agg_id;
- } else {
- parent = parent->children[0];
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_is_agg_inuse - check whether the agg is in use or not
- * @pi: port information structure
- * @node: node pointer
- *
- * This function checks whether the agg is attached with any vsi or not.
- */
-static bool
-ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
-{
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(pi->hw);
- if (node->tx_sched_layer < vsil - 1) {
- for (i = 0; i < node->num_children; i++)
- if (ice_sched_is_agg_inuse(pi, node->children[i]))
- return true;
- return false;
- } else {
- return node->num_children ? true : false;
- }
-}
-
-/**
- * ice_sched_rm_agg_cfg - remove the aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function removes the aggregator node and intermediate nodes if any
- * from the given TC
- */
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *tc_node, *agg_node;
- struct ice_hw *hw = pi->hw;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- /* Can't remove the agg node if it has children */
- if (ice_sched_is_agg_inuse(pi, agg_node))
- return ICE_ERR_IN_USE;
-
- /* need to remove the whole subtree if agg node is the
- * only child.
- */
- while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
- struct ice_sched_node *parent = agg_node->parent;
-
- if (!parent)
- return ICE_ERR_CFG;
-
- if (parent->num_children > 1)
- break;
-
- agg_node = parent;
- }
-
- ice_free_sched_node(pi, agg_node);
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_get_free_vsi_parent - Find a free parent node in agg subtree
- * @hw: pointer to the hw struct
- * @node: pointer to a child node
- * @num_nodes: num nodes count array
- *
- * This function walks through the aggregator subtree to find a free parent
- * node
- */
-static struct ice_sched_node *
-ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
- u16 *num_nodes)
-{
- u8 l = node->tx_sched_layer;
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(hw);
-
- /* Is it VSI parent layer ? */
- if (l == vsil - 1)
- return (node->num_children < hw->max_children[l]) ? node : NULL;
-
- /* We have intermediate nodes. Let's walk through the subtree. If the
- * intermediate node has space to add a new node then clear the count
- */
- if (node->num_children < hw->max_children[l])
- num_nodes[l] = 0;
- /* The below recursive call is intentional and wouldn't go more than
- * 2 or 3 iterations.
- */
-
- for (i = 0; i < node->num_children; i++) {
- struct ice_sched_node *parent;
-
- parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
- num_nodes);
- if (parent)
- return parent;
- }
-
- return NULL;
-}
-
-/**
- * ice_sched_update_new_parent - update the new parent in SW DB
- * @new_parent: pointer to a new parent node
- * @node: pointer to a child node
- *
- * This function removes the child from the old parent and adds it to a new
- * parent
- */
-static void
-ice_sched_update_parent(struct ice_sched_node *new_parent,
- struct ice_sched_node *node)
-{
- struct ice_sched_node *old_parent;
- u8 i, j;
-
- old_parent = node->parent;
-
- /* update the old parent children */
- for (i = 0; i < old_parent->num_children; i++)
- if (old_parent->children[i] == node) {
- for (j = i + 1; j < old_parent->num_children; j++)
- old_parent->children[j - 1] =
- old_parent->children[j];
- old_parent->num_children--;
- break;
- }
-
- /* now move the node to a new parent */
- new_parent->children[new_parent->num_children++] = node;
- node->parent = new_parent;
- node->info.parent_teid = new_parent->info.node_teid;
-}
-
-/**
- * ice_sched_move_nodes - move child nodes to a given parent
- * @pi: port information structure
- * @parent: pointer to parent node
- * @num_items: number of child nodes to be moved
- * @list: pointer to child node teids
- *
- * This function move the child nodes to a given parent.
- */
-static enum ice_status
-ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
- u16 num_items, u32 *list)
-{
- struct ice_aqc_move_elem *buf;
- struct ice_sched_node *node;
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw;
- u16 grps_movd = 0;
- u8 i;
-
- hw = pi->hw;
-
- if (!parent || !num_items)
- return ICE_ERR_PARAM;
-
- /* Does parent have enough space */
- if (parent->num_children + num_items >=
- hw->max_children[parent->tx_sched_layer])
- return ICE_ERR_AQ_FULL;
-
- buf = (struct ice_aqc_move_elem *) ice_malloc(hw, sizeof(*buf));
- if (!buf)
- return ICE_ERR_NO_MEMORY;
-
- for (i = 0; i < num_items; i++) {
- node = ice_sched_find_node_by_teid(pi->root, list[i]);
- if (!node) {
- status = ICE_ERR_PARAM;
- goto move_err_exit;
- }
-
- buf->hdr.src_parent_teid = node->info.parent_teid;
- buf->hdr.dest_parent_teid = parent->info.node_teid;
- buf->teid[0] = node->info.node_teid;
- buf->hdr.num_elems = CPU_TO_LE16(1);
- status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
- &grps_movd, NULL);
- if (status && grps_movd != 1) {
- status = ICE_ERR_CFG;
- goto move_err_exit;
- }
-
- /* update the SW DB */
- ice_sched_update_parent(parent, node);
- }
-
-move_err_exit:
- ice_free(hw, buf);
- return status;
-}
-
-/**
- * ice_sched_move_vsi_to_agg - move VSI to aggregator node
- * @pi: port information structure
- * @vsi_handle: software VSI handle
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function moves a VSI to an aggregator node or its subtree.
- * Intermediate nodes may be created if required.
- */
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc)
-{
- struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- u32 first_node_teid, vsi_teid;
- enum ice_status status;
- u16 num_nodes_added;
- u8 aggl, vsil, i;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
- if (!vsi_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- aggl = ice_sched_get_agg_layer(pi->hw);
- vsil = ice_sched_get_vsi_layer(pi->hw);
-
- /* initialize intermediate node count to 1 between agg and VSI layers */
- for (i = aggl + 1; i < vsil; i++)
- num_nodes[i] = 1;
-
- /* Check whether the agg subtree has any free node to add the VSI */
- for (i = 0; i < agg_node->num_children; i++) {
- parent = ice_sched_get_free_vsi_parent(pi->hw,
- agg_node->children[i],
- num_nodes);
- if (parent)
- goto move_nodes;
- }
-
- /* add new nodes */
- parent = agg_node;
- for (i = aggl + 1; i < vsil; i++) {
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added)
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- else
- parent = parent->children[0];
-
- if (!parent)
- return ICE_ERR_CFG;
- }
-
-move_nodes:
- vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
- return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
-}
-
-/**
* ice_cfg_rl_burst_size - Set burst size value
* @hw: pointer to the HW struct
* @bytes: burst size in bytes
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 61fa6a85b..09de765ff 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -76,10 +76,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
-ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
- struct ice_aqc_move_elem *buf, u16 buf_size,
- u16 *grps_movd, struct ice_sq_cd *cd);
-enum ice_status
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_get_elem *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd);
@@ -109,9 +105,6 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable);
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
struct ice_sched_node *
-ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
- u32 agg_id);
-struct ice_sched_node *
ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u16 vsi_handle);
bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
@@ -177,9 +170,6 @@ bool
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
struct ice_sched_node *node);
enum ice_status
-ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u32 bw);
-enum ice_status
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -193,18 +183,4 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);
enum ice_status
ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
u8 priority);
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc);
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc);
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info);
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi);
#endif /* _ICE_SCHED_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 19/38] net/ice/base: enable VSI queue context
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (17 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 18/38] net/ice/base: code clean Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 20/38] net/ice/base: ensure only valid bits are set Qi Zhang
` (20 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
The patch added to retrieve the queue context and update the queue
handle for lan queues.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 60 ++++++++++++++++++++++++++++++++++++---
drivers/net/ice/base/ice_common.h | 11 +++----
drivers/net/ice/ice_rxtx.c | 13 ++++++---
3 files changed, 71 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e0fe06e9c..f5cbd47c3 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3512,10 +3512,35 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
}
/**
+ * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
+ * @q_handle: software queue handle
+ */
+static struct ice_q_ctx *
+ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ struct ice_q_ctx *q_ctx;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return NULL;
+ if (q_handle >= vsi->num_lan_q_entries[tc])
+ return NULL;
+ if (!vsi->lan_q_ctx[tc])
+ return NULL;
+ q_ctx = vsi->lan_q_ctx[tc];
+ return &q_ctx[q_handle];
+}
+
+/**
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: TC number
+ * @q_handle: software queue handle
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
@@ -3524,12 +3549,13 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
* This function adds one LAN queue
*/
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_txsched_elem_data node = { 0 };
struct ice_sched_node *parent;
+ struct ice_q_ctx *q_ctx;
enum ice_status status;
struct ice_hw *hw;
@@ -3546,6 +3572,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
ice_acquire_lock(&pi->sched_lock);
+ q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle);
+ if (!q_ctx) {
+ ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n",
+ q_handle);
+ status = ICE_ERR_PARAM;
+ goto ena_txq_exit;
+ }
+
/* find a parent node */
parent = ice_sched_get_free_qparent(pi, vsi_handle, tc,
ICE_SCHED_NODE_OWNER_LAN);
@@ -3580,6 +3614,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
+ q_ctx->q_handle = q_handle;
/* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
@@ -3592,7 +3627,10 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
/**
* ice_dis_vsi_txq
* @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
* @num_queues: number of queues
+ * @q_handles: pointer to software queue handle array
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
* @rst_src: if called due to reset, specifies the reset source
@@ -3602,12 +3640,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* This function removes queues and their corresponding nodes in SW DB
*/
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handles, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd)
{
enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_aqc_dis_txq_item qg_list;
+ struct ice_q_ctx *q_ctx;
u16 i;
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
@@ -3630,6 +3670,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
if (!node)
continue;
+ q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);
+ if (!q_ctx) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
+ q_handles[i]);
+ continue;
+ }
+ if (q_ctx->q_handle != q_handles[i]) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
+ q_ctx->q_handle, q_handles[i]);
+ continue;
+ }
qg_list.parent_teid = node->info.parent_teid;
qg_list.num_qs = 1;
qg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);
@@ -3640,6 +3691,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
if (status != ICE_SUCCESS)
break;
ice_free_sched_node(pi, node);
+ q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
}
ice_release_lock(&pi->sched_lock);
return status;
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 63f4a5ebe..72560fbbf 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -157,15 +157,16 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
- struct ice_sq_cd *cmd_details);
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handle, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ struct ice_sq_cd *cd);
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
u16 *max_lanqs);
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
void ice_replay_post(struct ice_hw *hw);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index c794ee861..0dd4084b1 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -453,8 +453,9 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
/* Init the Tx tail register*/
ICE_PCI_REG_WRITE(txq->qtx_tail, 0);
- err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, 1, &txq_elem,
- sizeof(txq_elem), NULL);
+ /* Fix me, we assume TC always 0 here */
+ err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, tx_queue_id, 1,
+ &txq_elem, sizeof(txq_elem), NULL);
if (err) {
PMD_DRV_LOG(ERR, "Failed to add lan txq");
return -EIO;
@@ -528,9 +529,12 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct ice_tx_queue *txq;
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct ice_vsi *vsi = pf->main_vsi;
enum ice_status status;
uint16_t q_ids[1];
uint32_t q_teids[1];
+ uint16_t q_handle = tx_queue_id;
if (tx_queue_id >= dev->data->nb_tx_queues) {
PMD_DRV_LOG(ERR, "TX queue %u is out of range %u",
@@ -548,8 +552,9 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
q_ids[0] = txq->reg_idx;
q_teids[0] = txq->q_teid;
- status = ice_dis_vsi_txq(hw->port_info, 1, q_ids, q_teids,
- ICE_NO_RESET, 0, NULL);
+ /* Fix me, we assume TC always 0 here */
+ status = ice_dis_vsi_txq(hw->port_info, vsi->idx, 0, 1, &q_handle,
+ q_ids, q_teids, ICE_NO_RESET, 0, NULL);
if (status != ICE_SUCCESS) {
PMD_DRV_LOG(DEBUG, "Failed to disable Lan Tx queue");
return -EINVAL;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 20/38] net/ice/base: ensure only valid bits are set
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (18 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 19/38] net/ice/base: enable VSI queue context Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 21/38] net/ice/base: enhance get link status command Qi Zhang
` (19 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Chinh T Cao
In the ice_aq_set_phy_cfg AQ command, the 16.4 bit is reserved.
This patch will make sure that this bit will never be set to 1.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 1 +
drivers/net/ice/base/ice_common.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ca3d40c8b..70cd0604b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1327,6 +1327,7 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
+#define ICE_AQ_PHY_ENA_VALID_MASK MAKEMASK(0xef, 0)
#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index f5cbd47c3..1c381b5e2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2351,6 +2351,15 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport,
if (!cfg)
return ICE_ERR_PARAM;
+ /* Ensure that only valid bits of cfg->caps can be turned on. */
+ if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
+ ice_debug(hw, ICE_DBG_PHY,
+ "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
+ cfg->caps);
+
+ cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
+ }
+
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg);
desc.params.set_phy.lport_num = lport;
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 21/38] net/ice/base: enhance get link status command
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (19 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 20/38] net/ice/base: ensure only valid bits are set Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 22/38] net/ice/base: add RSS key related macro and structures Qi Zhang
` (18 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Matthew Vick
Extend the functionality of the admin queue command by including
additional status and ID bits to improve link topology configuration.
Signed-off-by: Matthew Vick <matthew.vick@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 70cd0604b..cb1e1ca1a 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1399,7 +1399,12 @@ struct ice_aqc_get_link_status_data {
#define ICE_AQ_LINK_TOPO_CONFLICT BIT(0)
#define ICE_AQ_LINK_MEDIA_CONFLICT BIT(1)
#define ICE_AQ_LINK_TOPO_CORRUPT BIT(2)
- u8 reserved1;
+#define ICE_AQ_LINK_TOPO_UNREACH_PRT BIT(4)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_PRT BIT(5)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA BIT(6)
+#define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA BIT(7)
+ u8 link_cfg_err;
+#define ICE_AQ_LINK_CFG_ERR BIT(0)
u8 link_info;
#define ICE_AQ_LINK_UP BIT(0) /* Link Status */
#define ICE_AQ_LINK_FAULT BIT(1)
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 22/38] net/ice/base: add RSS key related macro and structures
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (20 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 21/38] net/ice/base: enhance get link status command Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 23/38] net/ice/base: do not write TCAM entries back Qi Zhang
` (17 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Paul Greenwalt
Add define for 52 byte RSS hash key size, and add struct
ice_aqc_get_set_rss_keys comments regarding setting 40 bytes and
52 byte hash key.
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index cb1e1ca1a..ed7dfae8c 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1593,7 +1593,20 @@ struct ice_aqc_get_set_rss_key {
#define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28
#define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC
+#define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \
+ (ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE + \
+ ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE)
+/**
+ * struct ice_aqc_get_set_rss_keys - Get/Set RSS hash key command buffer
+ * @standard_rss_key: 40 most significant bytes of hash key
+ * @extended_hash_key: 12 least significant bytes of hash key
+ *
+ * Set/Get 40 byte hash key using standard_rss_key field, and set
+ * extended_hash_key field to zero. Set/Get 52 byte hash key using
+ * standard_rss_key field for 40 most significant bytes and the
+ * extended_hash_key field for the 12 least significant bytes of hash key.
+ */
struct ice_aqc_get_set_rss_keys {
u8 standard_rss_key[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 23/38] net/ice/base: do not write TCAM entries back
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (21 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 22/38] net/ice/base: add RSS key related macro and structures Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 24/38] net/ice/base: remove local VSIG allocations Qi Zhang
` (16 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Profile TCAM entry removal is handled by the firmware when
freeing the resource, so the driver does not need to write these
default entries back with an update Package action.
This patch removes writing of the TCAM entry using Update Package
command when removing it, since the entry has already been freed
by firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 41 +++++++++---------------------------
drivers/net/ice/base/ice_flex_type.h | 2 --
2 files changed, 10 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index ff615f94f..900a19387 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -3558,8 +3558,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
struct ice_chs_chg *tmp;
LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
- if ((tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) ||
- tmp->type == ICE_TCAM_REM) {
+ if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
struct ice_prof_id_section *p;
u32 id;
@@ -3689,7 +3688,6 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
es++;
break;
case ICE_TCAM_ADD:
- case ICE_TCAM_REM:
tcam++;
break;
case ICE_VSIG_ADD:
@@ -3962,46 +3960,27 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
* ice_rem_prof_id - remove one profile from a VSIG
* @hw: pointer to the HW struct
* @blk: hardware block
- * @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
- * @chg: pointer to list to record changes
*/
static enum ice_status
-ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
- struct ice_vsig_prof *prof, struct LIST_HEAD_TYPE *chg)
+ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
+ struct ice_vsig_prof *prof)
{
enum ice_status status;
- struct ice_chs_chg *p;
u16 i;
for (i = 0; i < prof->tcam_count; i++) {
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_prof_id;
-
- p->type = ICE_TCAM_REM;
- p->vsig = vsig;
- p->prof_id = prof->tcam[i].prof_id;
- p->tcam_idx = prof->tcam[i].tcam_idx;
-
- p->ptg = prof->tcam[i].ptg;
prof->tcam[i].in_use = false;
- p->orig_ent = hw->blk[blk].prof.t[p->tcam_idx];
- status = ice_rel_tcam_idx(hw, blk, p->tcam_idx);
+ status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
if (!status)
- status = ice_prof_dec_ref(hw, blk, p->prof_id);
-
- LIST_ADD(&p->list_entry, chg);
+ status = ice_prof_dec_ref(hw, blk,
+ prof->tcam[i].prof_id);
if (status)
- goto err_ice_rem_prof_id;
+ return ICE_ERR_HW_TABLE;
}
return ICE_SUCCESS;
-
-err_ice_rem_prof_id:
- /* caller will clean up the change list */
- return ICE_ERR_NO_MEMORY;
}
/**
@@ -4024,9 +4003,9 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
LIST_FOR_EACH_ENTRY_SAFE(d, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list) {
- status = ice_rem_prof_id(hw, blk, vsig, d, chg);
+ status = ice_rem_prof_id(hw, blk, d);
if (status)
- goto err_ice_rem_vsig;
+ return status;
LIST_DEL(&d->list);
ice_free(hw, d);
@@ -4090,7 +4069,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* this is the last profile, remove the VSIG */
return ice_rem_vsig(hw, blk, vsig, chg);
- status = ice_rem_prof_id(hw, blk, vsig, p, chg);
+ status = ice_rem_prof_id(hw, blk, p);
if (!status) {
LIST_DEL(&p->list);
ice_free(hw, p);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index aed23a067..1bb865896 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -676,7 +676,6 @@ enum ice_chg_type {
ICE_TCAM_NONE = 0,
ICE_PTG_ES_ADD,
ICE_TCAM_ADD,
- ICE_TCAM_REM,
ICE_VSIG_ADD,
ICE_VSIG_REM,
ICE_VSI_MOVE,
@@ -697,7 +696,6 @@ struct ice_chs_chg {
u16 vsig;
u16 orig_vsig;
u16 tcam_idx;
- struct ice_prof_tcam_entry orig_ent;
};
#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 24/38] net/ice/base: remove local VSIG allocations
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (22 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 23/38] net/ice/base: do not write TCAM entries back Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 25/38] net/ice/base: minor fix Qi Zhang
` (15 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
If allocating a VSI to a VSIG fails the local allocations made for VSIG
profiles and change-lists will not be removed. Adding calls to free these
entries on error in VSIG management calls.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 900a19387..887609204 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4523,8 +4523,10 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
- if (status)
+ if (status) {
+ ice_free(hw, p);
goto err_ice_add_prof_id_vsig;
+ }
t->tcam[i].ptg = ptg;
t->tcam[i].prof_id = map->prof_id;
@@ -4563,6 +4565,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
err_ice_add_prof_id_vsig:
/* let caller clean up the change list */
+ ice_free(hw, t);
return ICE_ERR_NO_MEMORY;
}
@@ -4587,16 +4590,18 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
return ICE_ERR_NO_MEMORY;
new_vsig = ice_vsig_alloc(hw, blk);
- if (!new_vsig)
- return ICE_ERR_HW_TABLE;
+ if (!new_vsig) {
+ status = ICE_ERR_HW_TABLE;
+ goto err_ice_create_prof_id_vsig;
+ }
status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
p->type = ICE_VSIG_ADD;
p->vsi = vsi;
@@ -4606,6 +4611,11 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
LIST_ADD(&p->list_entry, chg);
return ICE_SUCCESS;
+
+err_ice_create_prof_id_vsig:
+ /* let caller clean up the change list */
+ ice_free(hw, p);
+ return status;
}
/**
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 25/38] net/ice/base: minor fix
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (23 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 24/38] net/ice/base: remove local VSIG allocations Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 26/38] net/ice/base: update copyright time Qi Zhang
` (14 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Fix some problems with filling the HW tables.
2. Fix a logic error in ice_rem_prof_from_list.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 887609204..1dd121b28 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2935,9 +2935,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
while (sect) {
switch (sid) {
+ case ICE_SID_XLT1_SW:
case ICE_SID_XLT1_FD:
case ICE_SID_XLT1_RSS:
case ICE_SID_XLT1_ACL:
+ case ICE_SID_XLT1_PE:
xlt1 = (struct ice_xlt1_section *)sect;
src = xlt1->value;
sect_len = LE16_TO_CPU(xlt1->count) *
@@ -2946,9 +2948,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt1.count *
sizeof(*hw->blk[block_id].xlt1.t);
break;
+ case ICE_SID_XLT2_SW:
case ICE_SID_XLT2_FD:
case ICE_SID_XLT2_RSS:
case ICE_SID_XLT2_ACL:
+ case ICE_SID_XLT2_PE:
xlt2 = (struct ice_xlt2_section *)sect;
src = (u8 *)xlt2->value;
sect_len = LE16_TO_CPU(xlt2->count) *
@@ -2957,9 +2961,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt2.count *
sizeof(*hw->blk[block_id].xlt2.t);
break;
+ case ICE_SID_PROFID_TCAM_SW:
case ICE_SID_PROFID_TCAM_FD:
case ICE_SID_PROFID_TCAM_RSS:
case ICE_SID_PROFID_TCAM_ACL:
+ case ICE_SID_PROFID_TCAM_PE:
pid = (struct ice_prof_id_section *)sect;
src = (u8 *)pid->entry;
sect_len = LE16_TO_CPU(pid->count) *
@@ -2968,9 +2974,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof.count *
sizeof(*hw->blk[block_id].prof.t);
break;
+ case ICE_SID_PROFID_REDIR_SW:
case ICE_SID_PROFID_REDIR_FD:
case ICE_SID_PROFID_REDIR_RSS:
case ICE_SID_PROFID_REDIR_ACL:
+ case ICE_SID_PROFID_REDIR_PE:
pr = (struct ice_prof_redir_section *)sect;
src = pr->redir_value;
sect_len = LE16_TO_CPU(pr->count) *
@@ -2979,15 +2987,19 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof_redir.count *
sizeof(*hw->blk[block_id].prof_redir.t);
break;
+ case ICE_SID_FLD_VEC_SW:
case ICE_SID_FLD_VEC_FD:
case ICE_SID_FLD_VEC_RSS:
case ICE_SID_FLD_VEC_ACL:
+ case ICE_SID_FLD_VEC_PE:
es = (struct ice_sw_fv_section *)sect;
src = (u8 *)es->fv;
sect_len = LE16_TO_CPU(es->count) *
- sizeof(*hw->blk[block_id].prof_redir.t);
+ hw->blk[block_id].es.fvw *
+ sizeof(*hw->blk[block_id].es.t);
dst = (u8 *)hw->blk[block_id].es.t;
dst_len = hw->blk[block_id].es.count *
+ hw->blk[block_id].es.fvw *
sizeof(*hw->blk[block_id].es.t);
break;
default:
@@ -4964,8 +4976,8 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
goto err_ice_rem_prof_id_flow;
- } else if (ice_find_dup_props_vsig(hw, blk, ©,
- &vsig)) {
+ } else if (!ice_find_dup_props_vsig(hw, blk, ©,
+ &vsig)) {
/* found an exact match */
/* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 26/38] net/ice/base: update copyright time
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (24 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 25/38] net/ice/base: minor fix Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 27/38] net/ice/base: fix static analysis reported issues Qi Zhang
` (13 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update copyright time to 2019.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_controlq.c | 2 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 2 +-
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 2 +-
drivers/net/ice/base/ice_nvm.c | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2 +-
drivers/net/ice/base/ice_sched.h | 2 +-
drivers/net/ice/base/ice_status.h | 2 +-
drivers/net/ice/base/ice_switch.c | 2 +-
drivers/net/ice/base/ice_switch.h | 2 +-
drivers/net/ice/base/ice_type.h | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ed7dfae8c..81a331b41 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ADMINQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_alloc.h b/drivers/net/ice/base/ice_alloc.h
index 78831045b..cf823a2c2 100644
--- a/drivers/net/ice/base/ice_alloc.h
+++ b/drivers/net/ice/base/ice_alloc.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ALLOC_H_
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1c381b5e2..ae0e7fc5f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 72560fbbf..cc7a77747 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_COMMON_H_
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 1c0830cec..f3404023a 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h
index db2db9389..182db6754 100644
--- a/drivers/net/ice/base/ice_controlq.h
+++ b/drivers/net/ice/base/ice_controlq.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_CONTROLQ_H_
diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h
index 87f17ab91..5f1ac0422 100644
--- a/drivers/net/ice/base/ice_devids.h
+++ b/drivers/net/ice/base/ice_devids.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_DEVIDS_H_
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 1bb865896..951c2051f 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLEX_TYPE_H_
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 3db10cd6f..bad925c8c 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLOW_H_
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 8c79891ad..e63e41133 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
/* Machine-generated file; do not edit */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index b1963b5eb..8c9902994 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_LAN_TX_RX_H_
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 8d3d0b0ed..b770abfd0 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index f96964d86..6b3bd6542 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_PROTOCOL_TYPE_H_
diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h
index 6dff37871..70a019292 100644
--- a/drivers/net/ice/base/ice_sbq_cmd.h
+++ b/drivers/net/ice/base/ice_sbq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SBQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2dd9f6f6c..8773e62a9 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_sched.h"
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 09de765ff..92377a82e 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SCHED_H_
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index 898bfa6d8..cd561b0a4 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_STATUS_H_
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e47c1d845..a1c29d606 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_switch.h"
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 3cc2c10e8..13525d8d0 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SWITCH_H_
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 25d64477f..90736faa1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_TYPE_H_
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 27/38] net/ice/base: fix static analysis reported issues
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (25 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 26/38] net/ice/base: update copyright time Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 28/38] net/ice/base: return config error without queue to disable Qi Zhang
` (12 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
Klocwork points out some code is unreachable in
ice_get_itr_intrl_gran and ice_ptg_find_ptype.
The patch removed the unreachable code and resolved the static
analysis reported issues.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 12 ++----------
drivers/net/ice/base/ice_flex_pipe.c | 7 +------
2 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ae0e7fc5f..2362dd774 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -741,7 +741,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
*/
-static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
+static void ice_get_itr_intrl_gran(struct ice_hw *hw)
{
u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &
GL_PWR_MODE_CTL_CAR_MAX_BW_M) >>
@@ -758,13 +758,7 @@ static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
hw->itr_gran = ICE_ITR_GRAN_MAX_25;
hw->intrl_gran = ICE_INTRL_GRAN_MAX_25;
break;
- default:
- ice_debug(hw, ICE_DBG_INIT,
- "Failed to determine itr/intrl granularity\n");
- return ICE_ERR_CFG;
}
-
- return ICE_SUCCESS;
}
/**
@@ -795,9 +789,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
return status;
- status = ice_get_itr_intrl_gran(hw);
- if (status)
- return status;
+ ice_get_itr_intrl_gran(hw);
status = ice_init_all_ctrlq(hw);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 1dd121b28..525378079 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4288,17 +4288,12 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
p->tcam_count = map->ptype_count;
for (i = 0; i < map->ptype_count; i++) {
- enum ice_status status;
u8 ptg;
p->tcam[i].prof_id = map->prof_id;
p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
- status = ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
- if (status) {
- ice_free(hw, p);
- return status;
- }
+ ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
p->tcam[i].ptg = ptg;
}
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 28/38] net/ice/base: return config error without queue to disable
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (26 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 27/38] net/ice/base: fix static analysis reported issues Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 29/38] net/ice/base: add function to check FW recovery mode Qi Zhang
` (11 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Akeem G Abodunrin
If there is no queue to disable, return appropriate configuration error
earlier without acquiring the lock.
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2362dd774..c35a2f91d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3654,14 +3654,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
return ICE_ERR_CFG;
- /* if queue is disabled already yet the disable queue command has to be
- * sent to complete the VF reset, then call ice_aq_dis_lan_txq without
- * any queue information
- */
- if (!num_queues && rst_src)
- return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src, vmvf_num,
- NULL);
+ if (!num_queues) {
+ /* if queue is disabled already yet the disable queue command
+ * has to be sent to complete the VF reset, then call
+ * ice_aq_dis_lan_txq without any queue information
+ */
+ if (rst_src)
+ return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,
+ vmvf_num, NULL);
+ return ICE_ERR_CFG;
+ }
ice_acquire_lock(&pi->sched_lock);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 29/38] net/ice/base: add function to check FW recovery mode
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (27 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 28/38] net/ice/base: return config error without queue to disable Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 30/38] net/ice/base: change profile id reference counting Qi Zhang
` (10 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Code added to check the FW recovery mode. This function will be
used by the drivers during init to check whether the FW is in
recovery mode or not. If FW is in recovery mode then the drivers
need to run in a recovery mode where it can allow only limited
operations. Link should be down, allow only certain AQ commands
etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 15 +++++++++++++++
drivers/net/ice/base/ice_common.h | 8 ++++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index c35a2f91d..2ebf95eed 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3915,3 +3915,18 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
ice_debug(hw, ICE_DBG_SCHED, "query element failed\n");
return status;
}
+
+/**
+ * ice_is_fw_in_rec_mode
+ * @hw: pointer to the HW struct
+ *
+ * This function returns true if fw is in recovery mode
+ */
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw)
+{
+ u32 reg;
+
+ /* check the current FW mode */
+ reg = rd32(hw, GL_MNG_FWSM);
+ return (reg & GL_MNG_FWSM_FW_MODES_M) > ICE_FW_MODE_DBG;
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index cc7a77747..9665f3204 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -10,6 +10,13 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+enum ice_fw_modes {
+ ICE_FW_MODE_NORMAL,
+ ICE_FW_MODE_DBG,
+ ICE_FW_MODE_REC,
+ ICE_FW_MODE_DBG_REC
+};
+
enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
void
@@ -188,4 +195,5 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
enum ice_status
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_get_elem *buf);
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw);
#endif /* _ICE_COMMON_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 30/38] net/ice/base: change profile id reference counting
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (28 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 29/38] net/ice/base: add function to check FW recovery mode Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 31/38] net/ice/base: add DCB support Qi Zhang
` (9 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Improved the profile reference counting, by moving it from being
based on how many TCAM entries using the profile to how many
profile map entries are using the profile.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 70 ++++++++++++++++++++----------------
drivers/net/ice/base/ice_flex_type.h | 1 +
2 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 525378079..99108d81c 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2816,6 +2816,30 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
}
/**
+ * ice_write_es - write an extraction sequence to hardware
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write the extraction sequence
+ * @prof_id: the profile ID to write
+ * @fv: pointer to the extraction sequence to write - NULL to clear extraction
+ */
+static void
+ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
+ struct ice_fv_word *fv)
+{
+ u16 off;
+
+ off = prof_id * hw->blk[blk].es.fvw;
+ if (!fv) {
+ ice_memset(&hw->blk[blk].es.t[off], 0, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_MEM);
+ hw->blk[blk].es.written[prof_id] = false;
+ } else {
+ ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_TO_NONDMA);
+ }
+}
+
+/**
* ice_prof_dec_ref - decrement reference count for profile
* @hw: pointer to the HW struct
* @blk: the block from which to free the profile ID
@@ -2828,31 +2852,15 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
return ICE_ERR_PARAM;
if (hw->blk[blk].es.ref_count[prof_id] > 0) {
- if (!--hw->blk[blk].es.ref_count[prof_id])
+ if (!--hw->blk[blk].es.ref_count[prof_id]) {
+ ice_write_es(hw, blk, prof_id, NULL);
return ice_free_prof_id(hw, blk, prof_id);
+ }
}
return ICE_SUCCESS;
}
-/**
- * ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the HW struct
- * @blk: the block in which to write the extraction sequence
- * @prof_id: the profile ID to write
- * @fv: pointer to the extraction sequence to write
- */
-static void
-ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
- struct ice_fv_word *fv)
-{
- u16 off;
-
- off = prof_id * hw->blk[blk].es.fvw;
- ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw * 2,
- ICE_NONDMA_TO_NONDMA);
-}
-
/* Block / table section IDs */
static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
/* SWITCH */
@@ -3140,6 +3148,7 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].es.resource_used_hack);
ice_free(hw, hw->blk[i].prof.resource_used_hack);
+ ice_free(hw, hw->blk[i].es.written);
}
ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);
@@ -3309,6 +3318,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
es->ref_count = (u16 *)
ice_calloc(hw, es->count, sizeof(*es->ref_count));
+ es->written = (u8 *)
+ ice_calloc(hw, es->count, sizeof(*es->written));
+
if (!es->ref_count)
goto err;
@@ -3805,6 +3817,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
ice_write_es(hw, blk, prof_id, es);
}
+ ice_prof_inc_ref(hw, blk, prof_id);
+
/* add profile info */
prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof));
@@ -3984,10 +3998,6 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < prof->tcam_count; i++) {
prof->tcam[i].in_use = false;
status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
- if (!status)
- status = ice_prof_dec_ref(hw, blk,
- prof->tcam[i].prof_id);
-
if (status)
return ICE_ERR_HW_TABLE;
}
@@ -4159,6 +4169,9 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
+ /* dereference profile, and possibly remove */
+ ice_prof_dec_ref(hw, blk, pmap->prof_id);
+
LIST_DEL(&pmap->list);
ice_free(hw, pmap);
@@ -4194,7 +4207,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
if (status)
goto err_ice_get_prof_ptgs;
- if (add || !hw->blk[blk].es.ref_count[map->prof_id]) {
+ if (add || !hw->blk[blk].es.written[map->prof_id]) {
/* add PTG to change list */
p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
if (!p)
@@ -4205,9 +4218,11 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
p->ptg = ptg;
p->add_ptg = add;
- p->add_prof = !hw->blk[blk].es.ref_count[map->prof_id];
+ p->add_prof = !hw->blk[blk].es.written[map->prof_id];
p->prof_id = map->prof_id;
+ hw->blk[blk].es.written[map->prof_id] = true;
+
LIST_ADD(&p->list_entry, chg);
}
}
@@ -4555,11 +4570,6 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many TCAM entries
- * are using this HW profile ID
- */
- status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
-
/* log change */
LIST_ADD(&p->list_entry, chg);
}
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 951c2051f..365f33390 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -497,6 +497,7 @@ struct ice_es {
u16 count;
u16 fvw;
u16 *ref_count;
+ u8 *written;
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 31/38] net/ice/base: add DCB support
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (29 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 30/38] net/ice/base: change profile id reference counting Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 32/38] net/ice/base: add FDIR support Qi Zhang
` (8 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add module to support DCB related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 243 ++++++
drivers/net/ice/base/ice_common.c | 12 +
drivers/net/ice/base/ice_dcb.c | 1393 +++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 ++++++
drivers/net/ice/base/ice_status.h | 1 +
drivers/net/ice/base/ice_type.h | 14 +-
drivers/net/ice/base/meson.build | 1 +
8 files changed, 1884 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 61846cae2..89d21334e 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -51,6 +51,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_switch.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 81a331b41..4c5cf5419 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -100,6 +100,7 @@ struct ice_aqc_list_caps_elem {
__le16 cap;
#define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005
#define ICE_AQC_CAPS_VSI 0x0017
+#define ICE_AQC_CAPS_DCB 0x0018
#define ICE_AQC_CAPS_RSS 0x0040
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
@@ -894,6 +895,40 @@ struct ice_aqc_sw_rules_elem {
#pragma pack()
+/* PFC Ignore (direct 0x0301)
+ * The command and response use the same descriptor structure
+ */
+struct ice_aqc_pfc_ignore {
+ u8 tc_bitmap;
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_PFC_IGNORE_SET BIT(7)
+#define ICE_AQC_PFC_IGNORE_CLEAR 0
+ u8 reserved[14];
+};
+
+/* Set PFC Mode (direct 0x0303)
+ * Query PFC Mode (direct 0x0302)
+ */
+struct ice_aqc_set_query_pfc_mode {
+ u8 pfc_mode;
+/* For Set Command response, reserved in all other cases */
+#define ICE_AQC_PFC_NOT_CONFIGURED 0
+/* For Query Command response, reserved in all other cases */
+#define ICE_AQC_DCB_DIS 0
+#define ICE_AQC_PFC_VLAN_BASED_PFC 1
+#define ICE_AQC_PFC_DSCP_BASED_PFC 2
+ u8 rsvd[15];
+};
+
+/* Set DCB Parameters (direct 0x0306) */
+struct ice_aqc_set_dcb_params {
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG BIT(0)
+ u8 valid_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG_VALID BIT(0)
+ u8 rsvd[14];
+};
+
/* Get Default Topology (indirect 0x0400) */
struct ice_aqc_get_topo {
@@ -1027,6 +1062,32 @@ struct ice_aqc_delete_elem {
};
+/* Query Port ETS (indirect 0x040E)
+ *
+ * This indirect command is used to query port TC node configuration.
+ */
+struct ice_aqc_query_port_ets {
+ __le32 port_teid;
+ __le32 reserved;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_port_ets_elem {
+ u8 tc_valid_bits;
+ u8 reserved[3];
+ /* 3 bits for UP per TC 0-7, 4th byte reserved */
+ __le32 up2tc;
+ u8 tc_bw_share[8];
+ __le32 port_eir_prof_id;
+ __le32 port_cir_prof_id;
+ /* 3 bits per Node priority to TC 0-7, 4th byte reserved */
+ __le32 tc_node_prio;
+#define ICE_TC_NODE_PRIO_S 0x4
+ u8 reserved1[4];
+ __le32 tc_node_teid[8]; /* Used for response, reserved in command */
+};
+
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
@@ -1578,6 +1639,157 @@ struct ice_aqc_nvm_checksum {
+/* Get LLDP MIB (indirect 0x0A00)
+ * Note: This is also used by the LLDP MIB Change Event (0x0A01)
+ * as the format is the same.
+ */
+struct ice_aqc_lldp_get_mib {
+ u8 type;
+#define ICE_AQ_LLDP_MIB_TYPE_S 0
+#define ICE_AQ_LLDP_MIB_TYPE_M (0x3 << ICE_AQ_LLDP_MIB_TYPE_S)
+#define ICE_AQ_LLDP_MIB_LOCAL 0
+#define ICE_AQ_LLDP_MIB_REMOTE 1
+#define ICE_AQ_LLDP_MIB_LOCAL_AND_REMOTE 2
+#define ICE_AQ_LLDP_BRID_TYPE_S 2
+#define ICE_AQ_LLDP_BRID_TYPE_M (0x3 << ICE_AQ_LLDP_BRID_TYPE_S)
+#define ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID 0
+#define ICE_AQ_LLDP_BRID_TYPE_NON_TPMR 1
+/* Tx pause flags in the 0xA01 event use ICE_AQ_LLDP_TX_* */
+#define ICE_AQ_LLDP_TX_S 0x4
+#define ICE_AQ_LLDP_TX_M (0x03 << ICE_AQ_LLDP_TX_S)
+#define ICE_AQ_LLDP_TX_ACTIVE 0
+#define ICE_AQ_LLDP_TX_SUSPENDED 1
+#define ICE_AQ_LLDP_TX_FLUSHED 3
+/* The following bytes are reserved for the Get LLDP MIB command (0x0A00)
+ * and in the LLDP MIB Change Event (0x0A01). They are valid for the
+ * Get LLDP MIB (0x0A00) response only.
+ */
+ u8 reserved1;
+ __le16 local_len;
+ __le16 remote_len;
+ u8 reserved2[2];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Configure LLDP MIB Change Event (direct 0x0A01) */
+/* For MIB Change Event use ice_aqc_lldp_get_mib structure above */
+struct ice_aqc_lldp_set_mib_change {
+ u8 command;
+#define ICE_AQ_LLDP_MIB_UPDATE_ENABLE 0x0
+#define ICE_AQ_LLDP_MIB_UPDATE_DIS 0x1
+ u8 reserved[15];
+};
+
+/* Add LLDP TLV (indirect 0x0A02)
+ * Delete LLDP TLV (indirect 0x0A04)
+ */
+struct ice_aqc_lldp_add_delete_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved1[1];
+ __le16 len;
+ u8 reserved2[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Update LLDP TLV (indirect 0x0A03) */
+struct ice_aqc_lldp_update_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved;
+ __le16 old_len;
+ __le16 new_offset;
+ __le16 new_len;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Stop LLDP (direct 0x0A05) */
+struct ice_aqc_lldp_stop {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_STATE_MASK BIT(0)
+#define ICE_AQ_LLDP_AGENT_STOP 0x0
+#define ICE_AQ_LLDP_AGENT_SHUTDOWN ICE_AQ_LLDP_AGENT_STATE_MASK
+#define ICE_AQ_LLDP_AGENT_PERSIST_DIS BIT(1)
+ u8 reserved[15];
+};
+
+/* Start LLDP (direct 0x0A06) */
+struct ice_aqc_lldp_start {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_START BIT(0)
+#define ICE_AQ_LLDP_AGENT_PERSIST_ENA BIT(1)
+ u8 reserved[15];
+};
+
+/* Get CEE DCBX Oper Config (0x0A07)
+ * The command uses the generic descriptor struct and
+ * returns the struct below as an indirect response.
+ */
+struct ice_aqc_get_cee_dcb_cfg_resp {
+ u8 oper_num_tc;
+ u8 oper_prio_tc[4];
+ u8 oper_tc_bw[8];
+ u8 oper_pfc_en;
+ __le16 oper_app_prio;
+#define ICE_AQC_CEE_APP_FCOE_S 0
+#define ICE_AQC_CEE_APP_FCOE_M (0x7 << ICE_AQC_CEE_APP_FCOE_S)
+#define ICE_AQC_CEE_APP_ISCSI_S 3
+#define ICE_AQC_CEE_APP_ISCSI_M (0x7 << ICE_AQC_CEE_APP_ISCSI_S)
+#define ICE_AQC_CEE_APP_FIP_S 8
+#define ICE_AQC_CEE_APP_FIP_M (0x7 << ICE_AQC_CEE_APP_FIP_S)
+ __le32 tlv_status;
+#define ICE_AQC_CEE_PG_STATUS_S 0
+#define ICE_AQC_CEE_PG_STATUS_M (0x7 << ICE_AQC_CEE_PG_STATUS_S)
+#define ICE_AQC_CEE_PFC_STATUS_S 3
+#define ICE_AQC_CEE_PFC_STATUS_M (0x7 << ICE_AQC_CEE_PFC_STATUS_S)
+#define ICE_AQC_CEE_FCOE_STATUS_S 8
+#define ICE_AQC_CEE_FCOE_STATUS_M (0x7 << ICE_AQC_CEE_FCOE_STATUS_S)
+#define ICE_AQC_CEE_ISCSI_STATUS_S 11
+#define ICE_AQC_CEE_ISCSI_STATUS_M (0x7 << ICE_AQC_CEE_ISCSI_STATUS_S)
+#define ICE_AQC_CEE_FIP_STATUS_S 16
+#define ICE_AQC_CEE_FIP_STATUS_M (0x7 << ICE_AQC_CEE_FIP_STATUS_S)
+ u8 reserved[12];
+};
+
+/* Set Local LLDP MIB (indirect 0x0A08)
+ * Used to replace the local MIB of a given LLDP agent. e.g. DCBx
+ */
+struct ice_aqc_lldp_set_local_mib {
+ u8 type;
+#define SET_LOCAL_MIB_TYPE_DCBX_M BIT(0)
+#define SET_LOCAL_MIB_TYPE_LOCAL_MIB 0
+#define SET_LOCAL_MIB_TYPE_CEE_M BIT(1)
+#define SET_LOCAL_MIB_TYPE_CEE_WILLING 0
+#define SET_LOCAL_MIB_TYPE_CEE_NON_WILLING SET_LOCAL_MIB_TYPE_CEE_M
+ u8 reserved0;
+ __le16 length;
+ u8 reserved1[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_lldp_set_local_mib_resp {
+ u8 status;
+#define SET_LOCAL_MIB_RESP_EVENT_M BIT(0)
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_SILENT 0
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_EVENT SET_LOCAL_MIB_RESP_EVENT_M
+ u8 reserved[15];
+};
+
+/* Stop/Start LLDP Agent (direct 0x0A09)
+ * Used for stopping/starting specific LLDP agent. e.g. DCBx.
+ * The same structure is used for the response, with the command field
+ * being used as the status field.
+ */
+struct ice_aqc_lldp_stop_start_specific_agent {
+ u8 command;
+#define ICE_AQC_START_STOP_AGENT_M BIT(0)
+#define ICE_AQC_START_STOP_AGENT_STOP_DCBX 0
+#define ICE_AQC_START_STOP_AGENT_START_DCBX ICE_AQC_START_STOP_AGENT_M
+ u8 reserved[15];
+};
+
/* Get/Set RSS key (indirect 0x0B04/0x0B02) */
struct ice_aqc_get_set_rss_key {
@@ -1980,10 +2192,22 @@ struct ice_aq_desc {
struct ice_aqc_query_txsched_res query_sched_res;
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
+ struct ice_aqc_query_port_ets port_ets;
struct ice_aqc_rl_profile rl_profile;
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
+ struct ice_aqc_pfc_ignore pfc_ignore;
+ struct ice_aqc_set_query_pfc_mode set_query_pfc_mode;
+ struct ice_aqc_set_dcb_params set_dcb_params;
+ struct ice_aqc_lldp_get_mib lldp_get_mib;
+ struct ice_aqc_lldp_set_mib_change lldp_set_event;
+ struct ice_aqc_lldp_add_delete_tlv lldp_add_delete_tlv;
+ struct ice_aqc_lldp_update_tlv lldp_update_tlv;
+ struct ice_aqc_lldp_stop lldp_stop;
+ struct ice_aqc_lldp_start lldp_start;
+ struct ice_aqc_lldp_set_local_mib lldp_set_mib;
+ struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
struct ice_aqc_add_txqs add_txqs;
@@ -2096,6 +2320,8 @@ enum ice_adminq_opc {
/* PXE */
ice_aqc_opc_clear_pxe_mode = 0x0110,
+ ice_aqc_opc_config_no_drop_policy = 0x0112,
+
/* internal switch commands */
ice_aqc_opc_get_sw_cfg = 0x0200,
@@ -2127,6 +2353,11 @@ enum ice_adminq_opc {
ice_aqc_opc_get_sw_rules = 0x02A3,
ice_aqc_opc_clear_pf_cfg = 0x02A4,
+ /* DCB commands */
+ ice_aqc_opc_pfc_ignore = 0x0301,
+ ice_aqc_opc_query_pfc_mode = 0x0302,
+ ice_aqc_opc_set_pfc_mode = 0x0303,
+ ice_aqc_opc_set_dcb_params = 0x0306,
/* transmit scheduler commands */
ice_aqc_opc_get_dflt_topo = 0x0400,
@@ -2136,6 +2367,7 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
+ ice_aqc_opc_query_port_ets = 0x040E,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
@@ -2166,6 +2398,17 @@ enum ice_adminq_opc {
ice_aqc_opc_nvm_cfg_write = 0x0705,
ice_aqc_opc_nvm_checksum = 0x0706,
+ /* LLDP commands */
+ ice_aqc_opc_lldp_get_mib = 0x0A00,
+ ice_aqc_opc_lldp_set_mib_change = 0x0A01,
+ ice_aqc_opc_lldp_add_tlv = 0x0A02,
+ ice_aqc_opc_lldp_update_tlv = 0x0A03,
+ ice_aqc_opc_lldp_delete_tlv = 0x0A04,
+ ice_aqc_opc_lldp_stop = 0x0A05,
+ ice_aqc_opc_lldp_start = 0x0A06,
+ ice_aqc_opc_get_cee_dcb_cfg = 0x0A07,
+ ice_aqc_opc_lldp_set_local_mib = 0x0A08,
+ ice_aqc_opc_lldp_stop_start_specific_agent = 0x0A09,
/* RSS commands */
ice_aqc_opc_set_rss_key = 0x0B02,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2ebf95eed..202592710 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1930,6 +1930,18 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
number);
}
break;
+ case ICE_AQC_CAPS_DCB:
+ caps->dcb = (number == 1);
+ caps->active_tc_bitmap = logical_id;
+ caps->maxtc = phys_id;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: DCB = %d\n", caps->dcb);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Active TC bitmap = %d\n",
+ caps->active_tc_bitmap);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: TC Max = %d\n", caps->maxtc);
+ break;
case ICE_AQC_CAPS_RSS:
caps->rss_table_size = number;
caps->rss_table_entry_width = logical_id;
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
new file mode 100644
index 000000000..a7810578d
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -0,0 +1,1393 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_sched.h"
+#include "ice_dcb.h"
+
+/**
+ * ice_aq_get_lldp_mib
+ * @hw: pointer to the HW struct
+ * @bridge_type: type of bridge requested
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @local_len: length of the returned Local LLDP MIB
+ * @remote_len: length of the returned Remote LLDP MIB
+ * @cd: pointer to command details structure or NULL
+ *
+ * Requests the complete LLDP MIB (entire packet). (0x0A00)
+ */
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_get_mib *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.lldp_get_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_get_mib);
+
+ cmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M;
+ cmd->type |= (bridge_type << ICE_AQ_LLDP_BRID_TYPE_S) &
+ ICE_AQ_LLDP_BRID_TYPE_M;
+
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status) {
+ if (local_len)
+ *local_len = LE16_TO_CPU(cmd->local_len);
+ if (remote_len)
+ *remote_len = LE16_TO_CPU(cmd->remote_len);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_cfg_lldp_mib_change
+ * @hw: pointer to the HW struct
+ * @ena_update: Enable or Disable event posting
+ * @cd: pointer to command details structure or NULL
+ *
+ * Enable or Disable posting of an event on ARQ when LLDP MIB
+ * associated with the interface changes (0x0A01)
+ */
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_mib_change *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_event;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_mib_change);
+
+ if (!ena_update)
+ cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_stop_lldp
+ * @hw: pointer to the HW struct
+ * @shutdown_lldp_agent: True if LLDP Agent needs to be Shutdown
+ * False if LLDP Agent needs to be Stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Stop or Shutdown the embedded LLDP Agent (0x0A05)
+ */
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_stop;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_stop);
+
+ if (shutdown_lldp_agent)
+ cmd->command |= ICE_AQ_LLDP_AGENT_SHUTDOWN;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_start_lldp
+ * @hw: pointer to the HW struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start the embedded LLDP Agent on all ports. (0x0A06)
+ */
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_start *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_start;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_start);
+
+ cmd->command = ICE_AQ_LLDP_AGENT_START;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_set_lldp_mib - Set the LLDP MIB
+ * @hw: pointer to the HW struct
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set the LLDP MIB. (0x0A08)
+ */
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_local_mib *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib);
+
+ desc.flags |= CPU_TO_LE16((u16)ICE_AQ_FLAG_RD);
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ cmd->type = mib_type;
+ cmd->length = CPU_TO_LE16(buf_size);
+
+ return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+}
+
+/**
+ * ice_get_dcbx_status
+ * @hw: pointer to the HW struct
+ *
+ * Get the DCBX status from the Firmware
+ */
+u8 ice_get_dcbx_status(struct ice_hw *hw)
+{
+ u32 reg;
+
+ reg = rd32(hw, PRTDCB_GENS);
+ return (u8)((reg & PRTDCB_GENS_DCBX_STATUS_M) >>
+ PRTDCB_GENS_DCBX_STATUS_S);
+}
+
+/**
+ * ice_parse_ieee_ets_common_tlv
+ * @buf: Data buffer to be parsed for ETS CFG/REC data
+ * @ets_cfg: Container to store parsed data
+ *
+ * Parses the common data of IEEE 802.1Qaz ETS CFG/REC TLV
+ */
+static void
+ice_parse_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ ets_cfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>
+ ICE_IEEE_ETS_PRIO_1_S);
+ ets_cfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>
+ ICE_IEEE_ETS_PRIO_0_S);
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 9 | 10| 11| 12| 13| 14| 15| 16|
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ ets_cfg->tcbwtable[i] = buf[offset];
+ ets_cfg->tsatable[i] = buf[ICE_MAX_TRAFFIC_CLASS + offset++];
+ }
+}
+
+/**
+ * ice_parse_ieee_etscfg_tlv
+ * @tlv: IEEE 802.1Qaz ETS CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_parse_ieee_etscfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ etscfg->willing = ((buf[0] & ICE_IEEE_ETS_WILLING_M) >>
+ ICE_IEEE_ETS_WILLING_S);
+ etscfg->cbs = ((buf[0] & ICE_IEEE_ETS_CBS_M) >> ICE_IEEE_ETS_CBS_S);
+ etscfg->maxtcs = ((buf[0] & ICE_IEEE_ETS_MAXTC_M) >>
+ ICE_IEEE_ETS_MAXTC_S);
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_parse_ieee_etsrec_tlv
+ * @tlv: IEEE 802.1Qaz ETS REC TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Parses IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_parse_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], &dcbcfg->etsrec);
+}
+
+/**
+ * ice_parse_ieee_pfccfg_tlv
+ * @tlv: IEEE 802.1Qaz PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_parse_ieee_pfccfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ dcbcfg->pfc.willing = ((buf[0] & ICE_IEEE_PFC_WILLING_M) >>
+ ICE_IEEE_PFC_WILLING_S);
+ dcbcfg->pfc.mbc = ((buf[0] & ICE_IEEE_PFC_MBC_M) >> ICE_IEEE_PFC_MBC_S);
+ dcbcfg->pfc.pfccap = ((buf[0] & ICE_IEEE_PFC_CAP_M) >>
+ ICE_IEEE_PFC_CAP_S);
+ dcbcfg->pfc.pfcena = buf[1];
+}
+
+/**
+ * ice_parse_ieee_app_tlv
+ * @tlv: IEEE 802.1Qaz APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses IEEE 802.1Qaz APP PRIO TLV
+ */
+static void
+ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 offset = 0;
+ u16 typelen;
+ int i = 0;
+ u16 len;
+ u8 *buf;
+
+ typelen = NTOHS(tlv->typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ buf = tlv->tlvinfo;
+
+ /* Removing sizeof(ouisubtype) and reserved byte from len.
+ * Remaining len div 3 is number of APP TLVs.
+ */
+ len -= (sizeof(tlv->ouisubtype) + 1);
+
+ /* Move offset to App Priority Table */
+ offset++;
+
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (offset < len) {
+ dcbcfg->app[i].priority = ((buf[offset] &
+ ICE_IEEE_APP_PRIO_M) >>
+ ICE_IEEE_APP_PRIO_S);
+ dcbcfg->app[i].selector = ((buf[offset] &
+ ICE_IEEE_APP_SEL_M) >>
+ ICE_IEEE_APP_SEL_S);
+ dcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |
+ buf[offset + 2];
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+
+ dcbcfg->numapps = i;
+}
+
+/**
+ * ice_parse_ieee_tlv
+ * @tlv: IEEE 802.1Qaz TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_ieee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u8 subtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ switch (subtype) {
+ case ICE_IEEE_SUBTYPE_ETS_CFG:
+ ice_parse_ieee_etscfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_ETS_REC:
+ ice_parse_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_PFC_CFG:
+ ice_parse_ieee_pfccfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_APP_PRI:
+ ice_parse_ieee_app_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_parse_cee_pgcfg_tlv
+ * @tlv: CEE DCBX PG CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses CEE DCBX PG CFG TLV
+ */
+static void
+ice_parse_cee_pgcfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u16 offset = 0;
+ int i;
+
+ etscfg = &dcbcfg->etscfg;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ etscfg->willing = 1;
+
+ etscfg->cbs = 0;
+ /* Priority Group Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ etscfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ etscfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ offset++;
+ }
+
+ /* PG Percentage Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |pg0|pg1|pg2|pg3|pg4|pg5|pg6|pg7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i)
+ etscfg->tcbwtable[i] = buf[offset++];
+
+ /* Number of TCs supported (1 octet) */
+ etscfg->maxtcs = buf[offset];
+}
+
+/**
+ * ice_parse_cee_pfccfg_tlv
+ * @tlv: CEE DCBX PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses CEE DCBX PFC CFG TLV
+ */
+static void
+ice_parse_cee_pfccfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ dcbcfg->pfc.willing = 1;
+
+ /* ------------------------
+ * | PFC Enable | PFC TCs |
+ * ------------------------
+ * | 1 octet | 1 octet |
+ */
+ dcbcfg->pfc.pfcena = buf[0];
+ dcbcfg->pfc.pfccap = buf[1];
+}
+
+/**
+ * ice_parse_cee_app_tlv
+ * @tlv: CEE DCBX APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses CEE DCBX APP PRIO TLV
+ */
+static void
+ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, typelen, offset = 0;
+ struct ice_cee_app_prio *app;
+ u8 i;
+
+ typelen = NTOHS(tlv->hdr.typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+
+ dcbcfg->numapps = len / sizeof(*app);
+ if (!dcbcfg->numapps)
+ return;
+ if (dcbcfg->numapps > ICE_DCBX_MAX_APPS)
+ dcbcfg->numapps = ICE_DCBX_MAX_APPS;
+
+ for (i = 0; i < dcbcfg->numapps; i++) {
+ u8 up, selector;
+
+ app = (struct ice_cee_app_prio *)(tlv->tlvinfo + offset);
+ for (up = 0; up < ICE_MAX_USER_PRIORITY; up++)
+ if (app->prio_map & BIT(up))
+ break;
+
+ dcbcfg->app[i].priority = up;
+
+ /* Get Selector from lower 2 bits, and convert to IEEE */
+ selector = (app->upper_oui_sel & ICE_CEE_APP_SELECTOR_M);
+ switch (selector) {
+ case ICE_CEE_APP_SEL_ETHTYPE:
+ dcbcfg->app[i].selector = ICE_APP_SEL_ETHTYPE;
+ break;
+ case ICE_CEE_APP_SEL_TCPIP:
+ dcbcfg->app[i].selector = ICE_APP_SEL_TCPIP;
+ break;
+ default:
+ /* Keep selector as it is for unknown types */
+ dcbcfg->app[i].selector = selector;
+ }
+
+ dcbcfg->app[i].prot_id = NTOHS(app->protocol);
+ /* Move to next app */
+ offset += sizeof(*app);
+ }
+}
+
+/**
+ * ice_parse_cee_tlv
+ * @tlv: CEE DCBX TLV
+ * @dcbcfg: Local store to update DCBX config data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_cee_feat_tlv *sub_tlv;
+ u8 subtype, feat_tlv_count = 0;
+ u16 len, tlvlen, typelen;
+ u32 ouisubtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ /* Return if not CEE DCBX */
+ if (subtype != ICE_CEE_DCBX_TYPE)
+ return;
+
+ typelen = NTOHS(tlv->typelen);
+ tlvlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ len = sizeof(tlv->typelen) + sizeof(ouisubtype) +
+ sizeof(struct ice_cee_ctrl_tlv);
+ /* Return if no CEE DCBX Feature TLVs */
+ if (tlvlen <= len)
+ return;
+
+ sub_tlv = (struct ice_cee_feat_tlv *)((char *)tlv + len);
+ while (feat_tlv_count < ICE_CEE_MAX_FEAT_TYPE) {
+ u16 sublen;
+
+ typelen = NTOHS(sub_tlv->hdr.typelen);
+ sublen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ subtype = (u8)((typelen & ICE_LLDP_TLV_TYPE_M) >>
+ ICE_LLDP_TLV_TYPE_S);
+ switch (subtype) {
+ case ICE_CEE_SUBTYPE_PG_CFG:
+ ice_parse_cee_pgcfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_PFC_CFG:
+ ice_parse_cee_pfccfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_APP_PRI:
+ ice_parse_cee_app_tlv(sub_tlv, dcbcfg);
+ break;
+ default:
+ return; /* Invalid Sub-type return */
+ }
+ feat_tlv_count++;
+ /* Move to next sub TLV */
+ sub_tlv = (struct ice_cee_feat_tlv *)
+ ((char *)sub_tlv + sizeof(sub_tlv->hdr.typelen) +
+ sublen);
+ }
+}
+
+/**
+ * ice_parse_org_tlv
+ * @tlv: Organization specific TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Currently only IEEE 802.1Qaz TLV is supported, all others
+ * will be returned
+ */
+static void
+ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u32 oui;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ oui = ((ouisubtype & ICE_LLDP_TLV_OUI_M) >> ICE_LLDP_TLV_OUI_S);
+ switch (oui) {
+ case ICE_IEEE_8021QAZ_OUI:
+ ice_parse_ieee_tlv(tlv, dcbcfg);
+ break;
+ case ICE_CEE_DCBX_OUI:
+ ice_parse_cee_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_lldp_to_dcb_cfg
+ * @lldpmib: LLDPDU to be parsed
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Parse DCB configuration from the LLDPDU
+ */
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_lldp_org_tlv *tlv;
+ enum ice_status ret = ICE_SUCCESS;
+ u16 offset = 0;
+ u16 typelen;
+ u16 type;
+ u16 len;
+
+ if (!lldpmib || !dcbcfg)
+ return ICE_ERR_PARAM;
+
+ /* set to the start of LLDPDU */
+ lldpmib += ETH_HEADER_LEN;
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ typelen = NTOHS(tlv->typelen);
+ type = ((typelen & ICE_LLDP_TLV_TYPE_M) >> ICE_LLDP_TLV_TYPE_S);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ offset += sizeof(typelen) + len;
+
+ /* END TLV or beyond LLDPDU size */
+ if (type == ICE_TLV_TYPE_END || offset > ICE_LLDPDU_SIZE)
+ break;
+
+ switch (type) {
+ case ICE_TLV_TYPE_ORG:
+ ice_parse_org_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+
+ /* Move to next TLV */
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_aq_get_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @mib_type: mib type for the query
+ * @bridgetype: bridge type for the query (remote)
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Query DCB configuration from the firmware
+ */
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ enum ice_status ret;
+ u8 *lldpmib;
+
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ ret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,
+ ICE_LLDPDU_SIZE, NULL, NULL, NULL);
+
+ if (ret == ICE_SUCCESS)
+ /* Parse LLDP MIB to get DCB configuration */
+ ret = ice_lldp_to_dcb_cfg(lldpmib, dcbcfg);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_start_stop_dcbx - Start/Stop DCBx service in FW
+ * @hw: pointer to the HW struct
+ * @start_dcbx_agent: True if DCBx Agent needs to be started
+ * False if DCBx Agent needs to be stopped
+ * @dcbx_agent_status: FW indicates back the DCBx agent status
+ * True if DCBx Agent is active
+ * False if DCBx Agent is stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start/Stop the embedded dcbx Agent. In case that this wrapper function
+ * returns ICE_SUCCESS, caller will need to check if FW returns back the same
+ * value as stated in dcbx_agent_status, and react accordingly. (0x0A09)
+ */
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop_start_specific_agent *cmd;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+ u16 opcode;
+
+ cmd = &desc.params.lldp_agent_ctrl;
+
+ opcode = ice_aqc_opc_lldp_stop_start_specific_agent;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, opcode);
+
+ if (start_dcbx_agent)
+ cmd->command = ICE_AQC_START_STOP_AGENT_START_DCBX;
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+
+ *dcbx_agent_status = false;
+
+ if (status == ICE_SUCCESS &&
+ cmd->command == ICE_AQC_START_STOP_AGENT_START_DCBX)
+ *dcbx_agent_status = true;
+
+ return status;
+}
+
+/**
+ * ice_aq_get_cee_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @buff: response buffer that stores CEE operational configuration
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get CEE DCBX mode operational configuration from firmware (0x0A07)
+ */
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cee_dcb_cfg);
+
+ return ice_aq_send_cmd(hw, &desc, (void *)buff, sizeof(*buff), cd);
+}
+
+/**
+ * ice_cee_to_dcb_cfg
+ * @cee_cfg: pointer to CEE configuration struct
+ * @dcbcfg: DCB configuration struct
+ *
+ * Convert CEE configuration from firmware to DCB configuration
+ */
+static void
+ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
+ u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
+ u16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);
+ u8 i, err, sync, oper, app_index, ice_app_sel_type;
+ u16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;
+ u16 ice_app_prot_id_type;
+
+ /* CEE PG data to ETS config */
+ dcbcfg->etscfg.maxtcs = cee_cfg->oper_num_tc;
+
+ /* Note that the FW creates the oper_prio_tc nibbles reversed
+ * from those in the CEE Priority Group sub-TLV.
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ dcbcfg->etscfg.prio_table[i * 2] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ dcbcfg->etscfg.prio_table[i * 2 + 1] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ }
+
+ ice_for_each_traffic_class(i) {
+ dcbcfg->etscfg.tcbwtable[i] = cee_cfg->oper_tc_bw[i];
+
+ if (dcbcfg->etscfg.prio_table[i] == ICE_CEE_PGID_STRICT) {
+ /* Map it to next empty TC */
+ dcbcfg->etscfg.prio_table[i] = cee_cfg->oper_num_tc - 1;
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_STRICT;
+ } else {
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_ETS;
+ }
+ }
+
+ /* CEE PFC data to ETS config */
+ dcbcfg->pfc.pfcena = cee_cfg->oper_pfc_en;
+ dcbcfg->pfc.pfccap = ICE_MAX_TRAFFIC_CLASS;
+
+ app_index = 0;
+ for (i = 0; i < 3; i++) {
+ if (i == 0) {
+ /* FCoE APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FCOE_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FCOE_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FCOE_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FCOE_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FCOE;
+ } else if (i == 1) {
+ /* iSCSI APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_ISCSI_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_ISCSI_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_ISCSI_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_ISCSI_S;
+ ice_app_sel_type = ICE_APP_SEL_TCPIP;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_ISCSI;
+ } else {
+ /* FIP APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FIP_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FIP_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FIP_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FIP_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FIP;
+ }
+
+ status = (tlv_status & ice_aqc_cee_status_mask) >>
+ ice_aqc_cee_status_shift;
+ err = (status & ICE_TLV_STATUS_ERR) ? 1 : 0;
+ sync = (status & ICE_TLV_STATUS_SYNC) ? 1 : 0;
+ oper = (status & ICE_TLV_STATUS_OPER) ? 1 : 0;
+ /* Add FCoE/iSCSI/FIP APP if Error is False and
+ * Oper/Sync is True
+ */
+ if (!err && sync && oper) {
+ dcbcfg->app[app_index].priority =
+ (app_prio & ice_aqc_cee_app_mask) >>
+ ice_aqc_cee_app_shift;
+ dcbcfg->app[app_index].selector = ice_app_sel_type;
+ dcbcfg->app[app_index].prot_id = ice_app_prot_id_type;
+ app_index++;
+ }
+ }
+
+ dcbcfg->numapps = app_index;
+}
+
+/**
+ * ice_get_ieee_dcb_cfg
+ * @pi: port information structure
+ * @dcbx_mode: mode of DCBX (IEEE or CEE)
+ *
+ * Get IEEE or CEE mode DCB configuration from the Firmware
+ */
+STATIC enum ice_status
+ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
+{
+ struct ice_dcbx_cfg *dcbx_cfg = NULL;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ if (dcbx_mode == ICE_DCBX_MODE_IEEE)
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ else if (dcbx_mode == ICE_DCBX_MODE_CEE)
+ dcbx_cfg = &pi->desired_dcbx_cfg;
+
+ /* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE
+ * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE
+ */
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ if (ret)
+ goto out;
+
+ /* Get Remote DCB Config */
+ dcbx_cfg = &pi->remote_dcbx_cfg;
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ /* Don't treat ENOENT as an error for Remote MIBs */
+ if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+ ret = ICE_SUCCESS;
+
+out:
+ return ret;
+}
+
+/**
+ * ice_get_dcb_cfg
+ * @pi: port information structure
+ *
+ * Get DCB configuration from the Firmware
+ */
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
+{
+ struct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;
+ struct ice_dcbx_cfg *dcbx_cfg;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
+ if (ret == ICE_SUCCESS) {
+ /* CEE mode */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
+ dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
+ ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
+ } else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
+ /* CEE mode not enabled try querying IEEE data */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_init_dcb
+ * @hw: pointer to the HW struct
+ *
+ * Update DCB configuration from the Firmware
+ */
+enum ice_status ice_init_dcb(struct ice_hw *hw)
+{
+ struct ice_port_info *pi = hw->port_info;
+ enum ice_status ret = ICE_SUCCESS;
+
+ if (!hw->func_caps.common_cap.dcb)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ pi->is_sw_lldp = true;
+
+ /* Get DCBX status */
+ pi->dcbx_status = ice_get_dcbx_status(hw);
+
+ if (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||
+ pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS) {
+ /* Get current DCBX configuration */
+ ret = ice_get_dcb_cfg(pi);
+ pi->is_sw_lldp = (hw->adminq.sq_last_status == ICE_AQ_RC_EPERM);
+ if (ret)
+ return ret;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {
+ return ICE_ERR_NOT_READY;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_MULTIPLE_PEERS) {
+ }
+
+ /* Configure the LLDP MIB change event */
+ ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);
+ if (!ret)
+ pi->is_sw_lldp = false;
+
+ return ret;
+}
+
+/**
+ * ice_add_ieee_ets_common_tlv
+ * @buf: Data buffer to be populated with ice_dcb_ets_cfg data
+ * @ets_cfg: Container for ice_dcb_ets_cfg data
+ *
+ * Populate the TLV buffer with ice_dcb_ets_cfg data
+ */
+static void
+ice_add_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 priority0, priority1;
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ priority0 = ets_cfg->prio_table[i * 2] & 0xF;
+ priority1 = ets_cfg->prio_table[i * 2 + 1] & 0xF;
+ buf[offset] = (priority0 << ICE_IEEE_ETS_PRIO_1_S) | priority1;
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ buf[offset] = ets_cfg->tcbwtable[i];
+ buf[ICE_MAX_TRAFFIC_CLASS + offset] = ets_cfg->tsatable[i];
+ offset++;
+ }
+}
+
+/**
+ * ice_add_ieee_ets_tlv - Prepare ETS TLV in IEEE format
+ * @tlv: Fill the ETS config data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_add_ieee_ets_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u8 maxtcwilling = 0;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ if (etscfg->willing)
+ maxtcwilling = BIT(ICE_IEEE_ETS_WILLING_S);
+ maxtcwilling |= etscfg->maxtcs & ICE_IEEE_ETS_MAXTC_M;
+ buf[0] = maxtcwilling;
+
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_add_ieee_etsrec_tlv - Prepare ETS Recommended TLV in IEEE format
+ * @tlv: Fill ETS Recommended TLV in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_add_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etsrec;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_REC);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ etsrec = &dcbcfg->etsrec;
+
+ /* First Octet is reserved */
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etsrec);
+}
+
+/**
+ * ice_add_ieee_pfc_tlv - Prepare PFC TLV in IEEE format
+ * @tlv: Fill PFC TLV in IEEE format
+ * @dcbcfg: Local store which holds the PFC CFG data
+ *
+ * Prepare IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_add_ieee_pfc_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_PFC_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_PFC_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ if (dcbcfg->pfc.willing)
+ buf[0] = BIT(ICE_IEEE_PFC_WILLING_S);
+
+ if (dcbcfg->pfc.mbc)
+ buf[0] |= BIT(ICE_IEEE_PFC_MBC_S);
+
+ buf[0] |= dcbcfg->pfc.pfccap & 0xF;
+ buf[1] = dcbcfg->pfc.pfcena;
+}
+
+/**
+ * ice_add_ieee_app_pri_tlv - Prepare APP TLV in IEEE format
+ * @tlv: Fill APP TLV in IEEE format
+ * @dcbcfg: Local store which holds the APP CFG data
+ *
+ * Prepare IEEE 802.1Qaz APP CFG TLV
+ */
+static void
+ice_add_ieee_app_pri_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 typelen, len, offset = 0;
+ u8 priority, selector, i = 0;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+
+ /* No APP TLVs then just return */
+ if (dcbcfg->numapps == 0)
+ return;
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_APP_PRI);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* Move offset to App Priority Table */
+ offset++;
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (i < dcbcfg->numapps) {
+ priority = dcbcfg->app[i].priority & 0x7;
+ selector = dcbcfg->app[i].selector & 0x7;
+ buf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;
+ buf[offset + 1] = (dcbcfg->app[i].prot_id >> 0x8) & 0xFF;
+ buf[offset + 2] = dcbcfg->app[i].prot_id & 0xFF;
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+ /* len includes size of ouisubtype + 1 reserved + 3*numapps */
+ len = sizeof(tlv->ouisubtype) + 1 + (i * 3);
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) | (len & 0x1FF));
+ tlv->typelen = HTONS(typelen);
+}
+
+/**
+ * ice_add_dcb_tlv - Add all IEEE TLVs
+ * @tlv: Fill TLV data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ * @tlvid: Type of IEEE TLV
+ *
+ * Add tlv information
+ */
+static void
+ice_add_dcb_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg,
+ u16 tlvid)
+{
+ switch (tlvid) {
+ case ICE_IEEE_TLV_ID_ETS_CFG:
+ ice_add_ieee_ets_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_ETS_REC:
+ ice_add_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_PFC_CFG:
+ ice_add_ieee_pfc_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_APP_PRI:
+ ice_add_ieee_app_pri_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_dcb_cfg_to_lldp - Convert DCB configuration to MIB format
+ * @lldpmib: pointer to the HW struct
+ * @miblen: length of LLDP mib
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Convert the DCB configuration to MIB format
+ */
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, offset = 0, tlvid = ICE_TLV_ID_START;
+ struct ice_lldp_org_tlv *tlv;
+ u16 typelen;
+
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ ice_add_dcb_tlv(tlv, dcbcfg, tlvid++);
+ typelen = NTOHS(tlv->typelen);
+ len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
+ if (len)
+ offset += len + 2;
+ /* END TLV or beyond LLDPDU size */
+ if (tlvid >= ICE_TLV_ID_END_OF_LLDPPDU ||
+ offset > ICE_LLDPDU_SIZE)
+ break;
+ /* Move to next TLV */
+ if (len)
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+ *miblen = offset;
+}
+
+/**
+ * ice_set_dcb_cfg - Set the local LLDP MIB to FW
+ * @pi: port information structure
+ *
+ * Set DCB configuration to the Firmware
+ */
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
+{
+ u8 mib_type, *lldpmib = NULL;
+ struct ice_dcbx_cfg *dcbcfg;
+ enum ice_status ret;
+ struct ice_hw *hw;
+ u16 miblen;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ hw = pi->hw;
+
+ /* update the HW local config */
+ dcbcfg = &pi->local_dcbx_cfg;
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ mib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;
+ if (dcbcfg->app_mode == ICE_DCBX_APPS_NON_WILLING)
+ mib_type |= SET_LOCAL_MIB_TYPE_CEE_NON_WILLING;
+
+ ice_dcb_cfg_to_lldp(lldpmib, &miblen, dcbcfg);
+ ret = ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen,
+ NULL);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration
+ */
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_query_port_ets *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ cmd = &desc.params.port_ets;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_port_ets);
+ cmd->port_teid = pi->root->info.node_teid;
+
+ status = ice_aq_send_cmd(pi->hw, &desc, buf, buf_size, cd);
+ return status;
+}
+
+/**
+ * ice_update_port_tc_tree_cfg - update TC tree configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ *
+ * update the SW DB with the new TC changes
+ */
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf)
+{
+ struct ice_sched_node *node, *tc_node;
+ struct ice_aqc_get_elem elem;
+ enum ice_status status = ICE_SUCCESS;
+ u32 teid1, teid2;
+ u8 i, j;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ /* suspend the missing TC nodes */
+ for (i = 0; i < pi->root->num_children; i++) {
+ teid1 = LE32_TO_CPU(pi->root->children[i]->info.node_teid);
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid1 == teid2)
+ break;
+ }
+ if (j < ICE_MAX_TRAFFIC_CLASS)
+ continue;
+ /* TC is missing */
+ pi->root->children[i]->in_use = false;
+ }
+ /* add the new TC nodes */
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid2 == ICE_INVAL_TEID)
+ continue;
+ /* Is it already present in the tree ? */
+ for (i = 0; i < pi->root->num_children; i++) {
+ tc_node = pi->root->children[i];
+ if (!tc_node)
+ continue;
+ teid1 = LE32_TO_CPU(tc_node->info.node_teid);
+ if (teid1 == teid2) {
+ tc_node->tc_num = j;
+ tc_node->in_use = true;
+ break;
+ }
+ }
+ if (i < pi->root->num_children)
+ continue;
+ /* new TC */
+ status = ice_sched_query_elem(pi->hw, teid2, &elem);
+ if (!status)
+ status = ice_sched_add_node(pi, 1, &elem.generic[0]);
+ if (status)
+ break;
+ /* update the TC number */
+ node = ice_sched_find_node_by_teid(pi->root, teid2);
+ if (node)
+ node->tc_num = j;
+ }
+ return status;
+}
+
+/**
+ * ice_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration and update the
+ * SW DB with the TC changes
+ */
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ enum ice_status status;
+
+ ice_acquire_lock(&pi->sched_lock);
+ status = ice_aq_query_port_ets(pi, buf, buf_size, cd);
+ if (!status)
+ status = ice_update_port_tc_tree_cfg(pi, buf);
+ ice_release_lock(&pi->sched_lock);
+ return status;
+}
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
new file mode 100644
index 000000000..d922c8a29
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -0,0 +1,223 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_DCB_H_
+#define _ICE_DCB_H_
+
+#include "ice_type.h"
+
+#define ICE_DCBX_OFFLOAD_DIS 0
+#define ICE_DCBX_OFFLOAD_ENABLED 1
+
+#define ICE_DCBX_STATUS_NOT_STARTED 0
+#define ICE_DCBX_STATUS_IN_PROGRESS 1
+#define ICE_DCBX_STATUS_DONE 2
+#define ICE_DCBX_STATUS_MULTIPLE_PEERS 3
+#define ICE_DCBX_STATUS_DIS 7
+
+#define ICE_TLV_TYPE_END 0
+#define ICE_TLV_TYPE_ORG 127
+
+#define ICE_IEEE_8021QAZ_OUI 0x0080C2
+#define ICE_IEEE_SUBTYPE_ETS_CFG 9
+#define ICE_IEEE_SUBTYPE_ETS_REC 10
+#define ICE_IEEE_SUBTYPE_PFC_CFG 11
+#define ICE_IEEE_SUBTYPE_APP_PRI 12
+
+#define ICE_CEE_DCBX_OUI 0x001B21
+#define ICE_CEE_DCBX_TYPE 2
+
+#define ICE_CEE_SUBTYPE_CTRL 1
+#define ICE_CEE_SUBTYPE_PG_CFG 2
+#define ICE_CEE_SUBTYPE_PFC_CFG 3
+#define ICE_CEE_SUBTYPE_APP_PRI 4
+
+#define ICE_CEE_MAX_FEAT_TYPE 3
+#define ICE_LLDP_ADMINSTATUS_DIS 0
+#define ICE_LLDP_ADMINSTATUS_ENA_RX 1
+#define ICE_LLDP_ADMINSTATUS_ENA_TX 2
+#define ICE_LLDP_ADMINSTATUS_ENA_RXTX 3
+
+/* Defines for LLDP TLV header */
+#define ICE_LLDP_TLV_LEN_S 0
+#define ICE_LLDP_TLV_LEN_M (0x01FF << ICE_LLDP_TLV_LEN_S)
+#define ICE_LLDP_TLV_TYPE_S 9
+#define ICE_LLDP_TLV_TYPE_M (0x7F << ICE_LLDP_TLV_TYPE_S)
+#define ICE_LLDP_TLV_SUBTYPE_S 0
+#define ICE_LLDP_TLV_SUBTYPE_M (0xFF << ICE_LLDP_TLV_SUBTYPE_S)
+#define ICE_LLDP_TLV_OUI_S 8
+#define ICE_LLDP_TLV_OUI_M (0xFFFFFFUL << ICE_LLDP_TLV_OUI_S)
+
+/* Defines for IEEE ETS TLV */
+#define ICE_IEEE_ETS_MAXTC_S 0
+#define ICE_IEEE_ETS_MAXTC_M (0x7 << ICE_IEEE_ETS_MAXTC_S)
+#define ICE_IEEE_ETS_CBS_S 6
+#define ICE_IEEE_ETS_CBS_M BIT(ICE_IEEE_ETS_CBS_S)
+#define ICE_IEEE_ETS_WILLING_S 7
+#define ICE_IEEE_ETS_WILLING_M BIT(ICE_IEEE_ETS_WILLING_S)
+#define ICE_IEEE_ETS_PRIO_0_S 0
+#define ICE_IEEE_ETS_PRIO_0_M (0x7 << ICE_IEEE_ETS_PRIO_0_S)
+#define ICE_IEEE_ETS_PRIO_1_S 4
+#define ICE_IEEE_ETS_PRIO_1_M (0x7 << ICE_IEEE_ETS_PRIO_1_S)
+#define ICE_CEE_PGID_PRIO_0_S 0
+#define ICE_CEE_PGID_PRIO_0_M (0xF << ICE_CEE_PGID_PRIO_0_S)
+#define ICE_CEE_PGID_PRIO_1_S 4
+#define ICE_CEE_PGID_PRIO_1_M (0xF << ICE_CEE_PGID_PRIO_1_S)
+#define ICE_CEE_PGID_STRICT 15
+
+/* Defines for IEEE TSA types */
+#define ICE_IEEE_TSA_STRICT 0
+#define ICE_IEEE_TSA_CBS 1
+#define ICE_IEEE_TSA_ETS 2
+#define ICE_IEEE_TSA_VENDOR 255
+
+/* Defines for IEEE PFC TLV */
+#define ICE_IEEE_PFC_CAP_S 0
+#define ICE_IEEE_PFC_CAP_M (0xF << ICE_IEEE_PFC_CAP_S)
+#define ICE_IEEE_PFC_MBC_S 6
+#define ICE_IEEE_PFC_MBC_M BIT(ICE_IEEE_PFC_MBC_S)
+#define ICE_IEEE_PFC_WILLING_S 7
+#define ICE_IEEE_PFC_WILLING_M BIT(ICE_IEEE_PFC_WILLING_S)
+
+/* Defines for IEEE APP TLV */
+#define ICE_IEEE_APP_SEL_S 0
+#define ICE_IEEE_APP_SEL_M (0x7 << ICE_IEEE_APP_SEL_S)
+#define ICE_IEEE_APP_PRIO_S 5
+#define ICE_IEEE_APP_PRIO_M (0x7 << ICE_IEEE_APP_PRIO_S)
+
+/* TLV definitions for preparing MIB */
+#define ICE_TLV_ID_CHASSIS_ID 0
+#define ICE_TLV_ID_PORT_ID 1
+#define ICE_TLV_ID_TIME_TO_LIVE 2
+#define ICE_IEEE_TLV_ID_ETS_CFG 3
+#define ICE_IEEE_TLV_ID_ETS_REC 4
+#define ICE_IEEE_TLV_ID_PFC_CFG 5
+#define ICE_IEEE_TLV_ID_APP_PRI 6
+#define ICE_TLV_ID_END_OF_LLDPPDU 7
+#define ICE_TLV_ID_START ICE_IEEE_TLV_ID_ETS_CFG
+
+#define ICE_IEEE_ETS_TLV_LEN 25
+#define ICE_IEEE_PFC_TLV_LEN 6
+#define ICE_IEEE_APP_TLV_LEN 11
+
+#pragma pack(1)
+/* IEEE 802.1AB LLDP TLV structure */
+struct ice_lldp_generic_tlv {
+ __be16 typelen;
+ u8 tlvinfo[1];
+};
+
+/* IEEE 802.1AB LLDP Organization specific TLV */
+struct ice_lldp_org_tlv {
+ __be16 typelen;
+ __be32 ouisubtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack()
+
+struct ice_cee_tlv_hdr {
+ __be16 typelen;
+ u8 operver;
+ u8 maxver;
+};
+
+struct ice_cee_ctrl_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ __be32 seqno;
+ __be32 ackno;
+};
+
+struct ice_cee_feat_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
+#define ICE_CEE_FEAT_TLV_ENA_M 0x80
+#define ICE_CEE_FEAT_TLV_WILLING_M 0x40
+#define ICE_CEE_FEAT_TLV_ERR_M 0x20
+ u8 subtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack(1)
+struct ice_cee_app_prio {
+ __be16 protocol;
+ u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
+#define ICE_CEE_APP_SELECTOR_M 0x03
+ __be16 lower_oui;
+ u8 prio_map;
+};
+
+#pragma pack()
+
+/* TODO: The below structures related LLDP/DCBX variables
+ * and statistics are defined but need to find how to get
+ * the required information from the Firmware to use them
+ */
+
+/* IEEE 802.1AB LLDP Agent Statistics */
+struct ice_lldp_stats {
+ u64 remtablelastchangetime;
+ u64 remtableinserts;
+ u64 remtabledeletes;
+ u64 remtabledrops;
+ u64 remtableageouts;
+ u64 txframestotal;
+ u64 rxframesdiscarded;
+ u64 rxportframeerrors;
+ u64 rxportframestotal;
+ u64 rxporttlvsdiscardedtotal;
+ u64 rxporttlvsunrecognizedtotal;
+ u64 remtoomanyneighbors;
+};
+
+/* IEEE 802.1Qaz DCBX variables */
+struct ice_dcbx_variables {
+ u32 defmaxtrafficclasses;
+ u32 defprioritytcmapping;
+ u32 deftcbandwidth;
+ u32 deftsaassignment;
+};
+
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd);
+u8 ice_get_dcbx_status(struct ice_hw *hw);
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg);
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_init_dcb(struct ice_hw *hw);
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cmd_details);
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf);
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd);
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd);
+#endif /* _ICE_DCB_H_ */
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index cd561b0a4..ac120fa30 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -13,6 +13,7 @@ enum ice_status {
ICE_ERR_PARAM = -1,
ICE_ERR_NOT_IMPL = -2,
ICE_ERR_NOT_READY = -3,
+ ICE_ERR_NOT_SUPPORTED = -4,
ICE_ERR_BAD_PTR = -5,
ICE_ERR_INVAL_SIZE = -6,
ICE_ERR_DEVICE_NOT_SUPPORTED = -8,
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 90736faa1..6a08b3d28 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -240,6 +240,9 @@ struct ice_hw_common_caps {
u32 os2bmc;
u32 valid_functions;
+ /* DCB capabilities */
+ u32 active_tc_bitmap;
+ u32 maxtc;
/* RSS related capabilities */
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
@@ -276,6 +279,7 @@ struct ice_hw_common_caps {
u8 evb_802_1_qbg; /* Edge Virtual Bridging */
u8 evb_802_1_qbh; /* Bridge Port Extension */
+ u8 dcb;
u8 iscsi;
u8 mgmt_cem;
@@ -527,7 +531,6 @@ struct ice_sched_vsi_info {
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
/* CEE or IEEE 802.1Qaz ETS Configuration data */
struct ice_dcb_ets_cfg {
u8 willing;
@@ -580,7 +583,6 @@ struct ice_dcbx_cfg {
u8 app_mode;
#define ICE_DCBX_APPS_NON_WILLING 0x1
};
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
@@ -601,9 +603,13 @@ struct ice_port_info {
struct ice_lock sched_lock; /* protect access to TXSched tree */
/* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
+ /* DCBX info */
+ struct ice_dcbx_cfg remote_dcbx_cfg; /* Peer Cfg */
+ struct ice_dcbx_cfg desired_dcbx_cfg; /* CEE Desired Cfg */
+ /* LLDP/DCBX Status */
+ u8 dcbx_status;
+ u8 is_sw_lldp;
u8 lport;
#define ICE_LPORT_MASK 0xff
u8 is_vf;
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index d7f8536bc..755d2497b 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -9,6 +9,7 @@ sources = [
'ice_nvm.c',
'ice_flex_pipe.c',
'ice_flow.c',
+ 'ice_dcb.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 32/38] net/ice/base: add FDIR support
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (30 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 31/38] net/ice/base: add DCB support Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 33/38] net/ice/base: change profile priority for RSS reply Qi Zhang
` (7 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add flow director related support base code.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 13 +
drivers/net/ice/base/ice_common.c | 36 ++
drivers/net/ice/base/ice_common.h | 1 +
drivers/net/ice/base/ice_fdir.c | 742 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++++++++
drivers/net/ice/base/ice_flex_pipe.c | 232 +++++++++++
drivers/net/ice/base/ice_type.h | 55 +++
drivers/net/ice/base/meson.build | 1 +
9 files changed, 1283 insertions(+)
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 89d21334e..a3aabccf1 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -52,6 +52,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_fdir.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 4c5cf5419..d2ab9eeff 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -105,6 +105,7 @@ struct ice_aqc_list_caps_elem {
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
#define ICE_AQC_CAPS_MSIX 0x0043
+#define ICE_AQC_CAPS_FD 0x0045
#define ICE_AQC_CAPS_MAX_MTU 0x0047
u8 major_ver;
@@ -1861,6 +1862,16 @@ struct ice_aqc_get_set_rss_lut {
};
+/* Clear FD Table Command (direct, 0x0B06) */
+struct ice_aqc_clear_fd_table {
+ u8 clear_type;
+#define CL_FD_VM_VF_TYPE_VSI_IDX 1
+#define CL_FD_VM_VF_TYPE_PF_IDX 2
+ u8 rsvd;
+ __le16 vsi_index;
+ u8 reserved[12];
+};
+
@@ -2210,6 +2221,7 @@ struct ice_aq_desc {
struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
+ struct ice_aqc_clear_fd_table clear_fd_table;
struct ice_aqc_add_txqs add_txqs;
struct ice_aqc_dis_txqs dis_txqs;
struct ice_aqc_txqs_cleanup txqs_cleanup;
@@ -2415,6 +2427,7 @@ enum ice_adminq_opc {
ice_aqc_opc_set_rss_lut = 0x0B03,
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
+ ice_aqc_opc_clear_fd_table = 0x0B06,
/* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 202592710..425f76e8d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -805,6 +805,9 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
goto err_unroll_cqinit;
+ /* Set bit to enable Flow Director filters */
+ wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
+ INIT_LIST_HEAD(&hw->fdir_list_head);
ice_clear_pxe_mode(hw);
@@ -901,6 +904,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);
+ /* Obtain counter base index which would be used by flow director */
+ status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
+ if (status)
+ goto err_unroll_fltr_mgmt_struct;
return ICE_SUCCESS;
@@ -926,6 +933,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
*/
void ice_deinit_hw(struct ice_hw *hw)
{
+ ice_free_fd_res_cntr(hw, hw->fd_ctr_base);
ice_cleanup_fltr_mgmt_struct(hw);
ice_sched_cleanup_all(hw);
@@ -1980,6 +1988,34 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
"HW caps: MSIX first vector index = %d\n",
caps->msix_vector_first_id);
break;
+ case ICE_AQC_CAPS_FD:
+ {
+ u32 reg_val, val;
+
+ if (dev_p) {
+ dev_p->num_flow_director_fltr = number;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Dev.fd_fltr =%d\n",
+ dev_p->num_flow_director_fltr);
+ }
+ if (func_p) {
+ reg_val = rd32(hw, GLQF_FD_SIZE);
+ val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>
+ GLQF_FD_SIZE_FD_GSIZE_S;
+ func_p->fd_fltr_guar =
+ ice_get_num_per_func(hw, val);
+ val = (reg_val & GLQF_FD_SIZE_FD_BSIZE_M) >>
+ GLQF_FD_SIZE_FD_BSIZE_S;
+ func_p->fd_fltr_best_effort = val;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr guar= %d\n",
+ func_p->fd_fltr_guar);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr best effort=%d\n",
+ func_p->fd_fltr_best_effort);
+ }
+ break;
+ }
case ICE_AQC_CAPS_MAX_MTU:
caps->max_mtu = number;
if (dev_p)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 9665f3204..4dc43dcfe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -9,6 +9,7 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+#include "ice_fdir.h"
enum ice_fw_modes {
ICE_FW_MODE_NORMAL,
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
new file mode 100644
index 000000000..4bc8e6dcb
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -0,0 +1,742 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_fdir.h"
+
+/* These are dummy packet headers used to program flow director filters. */
+static const u8 ice_fdir_tcpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x28, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00,
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static const u8 ice_fdir_udpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x1C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x20, 0x00, 0x00, 0x40, 0x00, 0x40, 0x84,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x10,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00
+};
+
+static const u8 ice_fdir_tcpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x0C, 0x84, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x3B, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* Flow Director dummy packet table */
+static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ sizeof(ice_fdir_tcpv4_pkt),
+ ice_fdir_tcpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ sizeof(ice_fdir_udpv4_pkt),
+ ice_fdir_udpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ sizeof(ice_fdir_sctpv4_pkt),
+ ice_fdir_sctpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ sizeof(ice_fdir_ipv4_pkt),
+ ice_fdir_ipv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ sizeof(ice_fdir_tcpv6_pkt),
+ ice_fdir_tcpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ sizeof(ice_fdir_udpv6_pkt),
+ ice_fdir_udpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ sizeof(ice_fdir_sctpv6_pkt),
+ ice_fdir_sctpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ sizeof(ice_fdir_ipv6_pkt),
+ ice_fdir_ipv6_pkt,
+ },
+};
+
+#define ICE_FDIR_NUM_PKT ARRAY_SIZE(ice_fdir_pkt)
+
+/* Flow Direcotr (FD) filter program descriptor Context */
+static const struct ice_ctx_ele ice_fd_fltr_desc_ctx_info[] = {
+ /* Field Width LSB */
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, qindex, 11, 0),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_q, 1, 11),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_report, 2, 12),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_space, 2, 14),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_index, 13, 16),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_ena, 2, 29),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, evict_ena, 1, 31),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq, 3, 32),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq_prio, 3, 35),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dpu_recipe, 2, 38),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, drop, 1, 40),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_prio, 3, 41),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_mdid, 4, 44),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_val, 16, 48),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dtype, 4, 64),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, pcmd, 1, 68),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof_prio, 3, 69),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof, 6, 72),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_vsi, 10, 78),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, swap, 1, 88),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_prio, 3, 89),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_mdid, 4, 92),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid, 32, 96),
+ { 0 }
+};
+
+/**
+ * ice_set_dflt_val_fd_desc
+ * @fd_fltr_ctx: pointer to fd filter descriptor
+ */
+void
+ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
+{
+ fd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;
+ fd_fltr_ctx->fd_space = ICE_FXD_FLTR_QW0_FD_SPACE_GUAR_BEST;
+ fd_fltr_ctx->cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fd_fltr_ctx->evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_TRUE;
+ fd_fltr_ctx->toq = ICE_FXD_FLTR_QW0_TO_Q_EQUALS_QINDEX;
+ fd_fltr_ctx->toq_prio = ICE_FXD_FLTR_QW0_TO_Q_PRIO1;
+ fd_fltr_ctx->dpu_recipe = ICE_FXD_FLTR_QW0_DPU_RECIPE_DFLT;
+ fd_fltr_ctx->drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fd_fltr_ctx->flex_prio = ICE_FXD_FLTR_QW0_FLEX_PRI_NONE;
+ fd_fltr_ctx->flex_mdid = ICE_FXD_FLTR_QW0_FLEX_MDID0;
+ fd_fltr_ctx->flex_val = ICE_FXD_FLTR_QW0_FLEX_VAL0;
+ fd_fltr_ctx->dtype = ICE_TX_DESC_DTYPE_FLTR_PROG;
+ fd_fltr_ctx->desc_prof_prio = ICE_FXD_FLTR_QW1_PROF_PRIO_ZERO;
+ fd_fltr_ctx->desc_prof = ICE_FXD_FLTR_QW1_PROF_ZERO;
+ fd_fltr_ctx->swap = ICE_FXD_FLTR_QW1_SWAP_SET;
+ fd_fltr_ctx->fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ZERO;
+ fd_fltr_ctx->fdid_mdid = ICE_FXD_FLTR_QW1_FDID_MDID_FD;
+ fd_fltr_ctx->fdid = ICE_FXD_FLTR_QW1_FDID_ZERO;
+}
+
+/**
+ * ice_fdir_get_prgm_desc - set a fdir descriptor from a fdir filter struct
+ * @hw: pointer to the hardware structure
+ * @input: filter
+ * @fdesc: filter descriptor
+ * @add: if add is true, this is an add operation, false implies delete
+ */
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add)
+{
+ struct ice_fd_fltr_desc_ctx fdir_fltr_ctx = { 0 };
+
+ /* set default context info */
+ ice_set_dflt_val_fd_desc(&fdir_fltr_ctx);
+
+ /* change sideband filtering values */
+ fdir_fltr_ctx.fdid = input->fltr_id;
+ if (input->dest_ctl == ICE_FLTR_PRGM_DESC_DEST_DROP_PKT) {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;
+ fdir_fltr_ctx.qindex = 0;
+ } else {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fdir_fltr_ctx.qindex = input->q_index;
+ }
+ fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fdir_fltr_ctx.cnt_index = input->cnt_index;
+ fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi);
+ fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE;
+ fdir_fltr_ctx.toq_prio = 3;
+ fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+ ICE_FXD_FLTR_QW1_PCMD_REMOVE;
+ fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
+ fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fdir_fltr_ctx.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
+ fdir_fltr_ctx.fdid_prio = 3;
+ fdir_fltr_ctx.desc_prof = 1;
+ fdir_fltr_ctx.desc_prof_prio = 3;
+ ice_set_fd_desc_val(&fdir_fltr_ctx, fdesc);
+}
+
+/**
+ * ice_set_fd_desc_val
+ * @fd_fltr_ctx: pointer to fd filter descriptor context
+ * @fdir_desc: populated with fd filter descriptor values
+ */
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc)
+{
+ u64 ctx_buf[2] = { 0 };
+
+ ice_set_ctx((u8 *)fd_fltr_ctx, (u8 *)ctx_buf,
+ ice_fd_fltr_desc_ctx_info);
+ fdir_desc->qidx_compq_space_stat = CPU_TO_LE64(ctx_buf[0]);
+ fdir_desc->dtype_cmd_vsi_fdid = CPU_TO_LE64(ctx_buf[1]);
+}
+
+/**
+ * ice_alloc_fd_res_cntr - obtain counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ */
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_free_fd_res_cntr - Free counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index to be freed
+ */
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_alloc_fd_guar_item - allocate resource for FD guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_guar_item - Free flow director guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_alloc_fd_shrd_item - allocate resource for flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_shrd_item - Free flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_get_fdir_cnt_all - get the number of Flow Director filters
+ * @hw: hardware data structure
+ *
+ * Returns the number of filters available on device
+ */
+int ice_get_fdir_cnt_all(struct ice_hw *hw)
+{
+ return hw->func_caps.fd_fltr_guar +
+ hw->func_caps.fd_fltr_best_effort;
+}
+
+/**
+ * ice_pkt_insert_ipv6_addr - insert a be32 IPv6 address into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @addr: IPv6 address to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr)
+{
+ int idx;
+
+ for (idx = 0; idx < ICE_IPV6_ADDR_LEN_AS_U32; idx++)
+ ice_memcpy(pkt + offset + idx * sizeof(*addr), &addr[idx],
+ sizeof(*addr), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u16 - insert a be16 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 16 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u16(u8 *pkt, int offset, __be16 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u32 - insert a be32 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 32 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_fdir_get_prgm_pkt - generate a dummy packet
+ * @input: flow director filter data structure
+ * @pkt: pointer to return filter packet
+ * @frag: generate a fragment packet
+ */
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag)
+{
+ enum ice_fltr_ptype flow;
+ u16 idx;
+
+ if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ switch (input->ip.v4.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ switch (input->ip.v6.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else {
+ flow = input->flow_type;
+ }
+
+ for (idx = 0; idx < ICE_FDIR_NUM_PKT; idx++)
+ if (ice_fdir_pkt[idx].flow == flow)
+ break;
+ if (idx == ICE_FDIR_NUM_PKT)
+ return ICE_ERR_PARAM;
+ ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+
+ switch (flow) {
+ case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ if (frag)
+ pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF;
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+
+ if (input->flex_fltr)
+ ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_fdir_has_frag - does flow type have 2 ptypes
+ * @flow: flow ptype
+ *
+ * returns true is there is a fragment packet for this ptype
+ */
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow)
+{
+ if (flow == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ return true;
+ else
+ return false;
+}
+
+/**
+ * ice_fdir_find_by_idx - find filter with idx
+ * @hw: pointer to hardware structure
+ * @fltr_idx: index to find.
+ *
+ * Returns pointer to filter if found or null
+ */
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx)
+{
+ struct ice_fdir_fltr *rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found in the list */
+ if (fltr_idx == rule->fltr_id)
+ return rule;
+ if (fltr_idx < rule->fltr_id)
+ break;
+ }
+ return NULL;
+}
+
+/**
+ * ice_fdir_list_add_fltr - add a new node to the flow director filter list
+ * @hw: hardware structure
+ * @fltr: filter node to add to structure
+ */
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *fltr)
+{
+ struct ice_fdir_fltr *rule, *parent = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found or pass its spot in the list */
+ if (rule->fltr_id >= fltr->fltr_id)
+ break;
+ parent = rule;
+ }
+
+ if (parent)
+ LIST_ADD_AFTER(&fltr->fltr_node, &parent->fltr_node);
+ else
+ LIST_ADD(&fltr->fltr_node, &hw->fdir_list_head);
+}
+
+/**
+ * ice_fdir_update_cntrs - increment / decrement filter counter
+ * @hw: pointer to hardware structure
+ * @flow: filter flow type
+ * @add: true implies filters added
+ */
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add)
+{
+ int incr;
+
+ incr = (add) ? 1 : -1;
+ hw->fdir_active_fltr += incr;
+ if (flow == ICE_FLTR_PTYPE_NONF_NONE || flow >= ICE_FLTR_PTYPE_MAX)
+ ice_debug(hw, ICE_DBG_SW, "Unknown filter type %d\n", flow);
+ else
+ hw->fdir_fltr_cnt[flow] += incr;
+}
+
+/**
+ * ice_cmp_ipv6_addr - compare 2 IP v6 addresses
+ * @a: IP v6 address
+ * @b: IP v6 address
+ *
+ * Returns 0 on equal, returns non-0 if different
+ */
+static int ice_cmp_ipv6_addr(__be32 *a, __be32 *b)
+{
+ return memcmp(a, b, 4 * sizeof(__be32));
+}
+
+/**
+ * ice_fdir_comp_ipv6_rules - compare 2 filters
+ * @a: a Flow Director filter data structure
+ * @b: a Flow Director filter data structure
+ * @v6: bool true if v6 filter
+ *
+ * Returns true if the filters match
+ */
+static bool
+ice_fdir_comp_rules(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b, bool v6)
+{
+ enum ice_fltr_ptype flow_type = a->flow_type;
+
+ /* The calling function already checks that the two filters have the
+ * same flow_type.
+ */
+ if (!v6) {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.dst_port == b->ip.v4.dst_port &&
+ a->ip.v4.src_port == b->ip.v4.src_port)
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.l4_header == b->ip.v4.l4_header &&
+ a->ip.v4.proto == b->ip.v4.proto &&
+ a->ip.v4.ip_ver == b->ip.v4.ip_ver &&
+ a->ip.v4.tos == b->ip.v4.tos)
+ return true;
+ }
+ } else {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_SCTP) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port &&
+ !ice_cmp_ipv6_addr(a->ip.v6.dst_ip,
+ b->ip.v6.dst_ip) &&
+ !ice_cmp_ipv6_addr(a->ip.v6.src_ip,
+ b->ip.v6.src_ip))
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port)
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/**
+ * ice_fdir_is_dup_fltr - test if filter is already in list for PF
+ * @hw: hardware data structure
+ * @input: Flow Director filter data structure
+ *
+ * Returns true if the filter is found in the list
+ */
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input)
+{
+ enum ice_fltr_ptype flow_type;
+ struct ice_fdir_fltr *rule;
+ bool ret = false;
+
+ rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ if (rule->flow_type == input->flow_type) {
+ flow_type = input->flow_type;
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ ret = ice_fdir_comp_rules(rule, input, false);
+ else
+ ret = ice_fdir_comp_rules(rule, input, true);
+ if (ret)
+ break;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * ice_clear_vsi_fd_table - admin command to clear FD table for a VSI
+ * @hw: hardware data structure
+ * @vsi_num: vsi_num (HW VSI num)
+ *
+ * Clears FD table entries by issuing admin command (direct, 0x0B06)
+ * Must to pass valid vsi_num as returned by "AddVSI".
+ */
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_VSI_IDX;
+
+ cmd->vsi_index = CPU_TO_LE16(vsi_num);
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_clear_pf_fd_table - admin command to clear FD table for PF
+ * @hw: hardware data structure
+ *
+ * Clears FD table entries for a PF by issuing admin command (direct, 0x0B06)
+ */
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_PF_IDX;
+ /* vsi_index must be 0 to clear FD table for a PF */
+ cmd->vsi_index = CPU_TO_LE16(0);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
new file mode 100644
index 000000000..2ecb147f1
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -0,0 +1,202 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_FDIR_H_
+#define _ICE_FDIR_H_
+
+#include "ice_common.h"
+
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+ u32 fdid;
+ u16 qindex;
+ u16 cnt_index;
+ u16 fd_vsi;
+ u16 flex_val;
+ u8 comp_q;
+ u8 comp_report;
+ u8 fd_space;
+ u8 cnt_ena;
+ u8 evict_ena;
+ u8 toq;
+ u8 toq_prio;
+ u8 dpu_recipe;
+ u8 drop;
+ u8 flex_prio;
+ u8 flex_mdid;
+ u8 dtype;
+ u8 pcmd;
+ u8 desc_prof_prio;
+ u8 desc_prof;
+ u8 swap;
+ u8 fdid_prio;
+ u8 fdid_mdid;
+};
+
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
+
+#define ICE_FDIR_IP_PROTOCOLS
+#define ICE_IP_PROTO_TCP 6
+#define ICE_IP_PROTO_UDP 17
+#define ICE_IP_PROTO_SCTP 132
+#define ICE_IP_PROTO_IP 0
+#define ICE_IP_PROTO_ESP 50
+
+#define ICE_FDIR_MAX_RAW_PKT_SIZE 512
+#define ICE_FDIR_BUF_FULL_MARGIN 10
+#define ICE_FDIR_BUF_HEAD_ROOM 32
+
+/* macros for offsets into packets for flow director programming */
+#define ICE_IPV4_SRC_ADDR_OFFSET 26
+#define ICE_IPV4_DST_ADDR_OFFSET 30
+#define ICE_IPV4_TCP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_TCP_DST_PORT_OFFSET 36
+#define ICE_IPV4_UDP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_UDP_DST_PORT_OFFSET 36
+#define ICE_IPV4_SCTP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_SCTP_DST_PORT_OFFSET 36
+#define ICE_IPV4_PROTO_OFFSET 23
+#define ICE_IPV6_SRC_ADDR_OFFSET 22
+#define ICE_IPV6_DST_ADDR_OFFSET 38
+#define ICE_IPV6_TCP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_TCP_DST_PORT_OFFSET 56
+#define ICE_IPV6_UDP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_UDP_DST_PORT_OFFSET 56
+#define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_SCTP_DST_PORT_OFFSET 56
+
+#define ICE_FDIR_MAX_FLTRS 16384
+
+/* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF
+ * requests that the packet not be fragmented. MF indicates that a packet has
+ * been fragmented.
+ */
+#define ICE_FDIR_IPV4_PKT_FLAG_DF 0x20
+#define ICE_FDIR_IPV4_PKT_FLAG_MF 0x40
+
+enum ice_fltr_prgm_desc_dest {
+ ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER,
+};
+
+enum ice_fltr_prgm_desc_fd_status {
+ ICE_FLTR_PRGM_DESC_FD_STATUS_NONE,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID_4FLEX_BYTES,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
+};
+
+#define ICE_FLTR_PRGM_FLEX_WORD_SIZE sizeof(__be16)
+
+struct ice_rx_flow_userdef {
+ u16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+};
+
+struct ice_fdir_v4 {
+ __be32 dst_ip;
+ __be32 src_ip;
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header;
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tos;
+ u8 ip_ver;
+ u8 proto;
+};
+
+#define ICE_IPV6_ADDR_LEN_AS_U32 4
+
+struct ice_fdir_v6 {
+ __be32 dst_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be32 src_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header; /* next header */
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tc;
+ u8 proto;
+};
+
+struct ice_fdir_extra {
+ u8 dst_mac[ETH_ALEN]; /* dest MAC address */
+ u32 usr_def[2]; /* user data */
+ __be16 vlan_type; /* VLAN ethertype */
+ __be16 vlan_tag; /* VLAN tag info */
+};
+
+struct ice_fdir_fltr {
+ struct LIST_ENTRY_TYPE fltr_node;
+ enum ice_fltr_ptype flow_type;
+
+ union {
+ struct ice_fdir_v4 v4;
+ struct ice_fdir_v6 v6;
+ } ip, mask;
+
+ struct ice_fdir_extra ext_data;
+ struct ice_fdir_extra ext_mask;
+
+ /* flex byte filter data */
+ __be16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+
+ /* filter control */
+ u16 q_index;
+#ifdef ADQ_SUPPORT
+ u16 orig_q_index;
+#endif /* ADQ_SUPPORT */
+ u16 dest_vsi;
+ u8 dest_ctl;
+ u8 fltr_status;
+ u16 cnt_index;
+ u32 fltr_id;
+};
+
+
+/* Dummy packet filter definition structure. */
+struct ice_fdir_base_pkt {
+ enum ice_fltr_ptype flow;
+ u16 pkt_len;
+ const u8 *pkt;
+};
+
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add);
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
+enum ice_status
+ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add);
+int ice_get_fdir_cnt_all(struct ice_hw *hw);
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+enum ice_status
+ice_update_fdir_list_entry(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ u16 sw_idx);
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add);
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+#endif /* _ICE_FDIR_H_ */
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 99108d81c..37bb4cbb5 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1275,6 +1275,25 @@ void ice_free_seg(struct ice_hw *hw)
}
/**
+ * ice_init_fd_mask_regs - initialize Flow Director mask registers
+ * @hw: pointer to the HW struct
+ *
+ * This function sets up the Flow Director mask registers to allow for complete
+ * masking off of any of the 24 Field Vector words. After this call, mask 0 will
+ * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc.
+ */
+static void ice_init_fd_mask_regs(struct ice_hw *hw)
+{
+ u16 i;
+
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ wr32(hw, GLQF_FDMASK(i), i);
+ ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i,
+ GLQF_FDMASK(i), i);
+ }
+}
+
+/**
* ice_init_pkg_regs - initialize additional package registers
* @hw: pointer to the hardware structure
*/
@@ -1287,6 +1306,8 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
/* setup Switch block input mask, which is 48-bits in two parts */
wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);
+ /* setup default flow director masks */
+ ice_init_fd_mask_regs(hw);
}
/**
@@ -3783,6 +3804,205 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
}
/**
+ * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @mask_sel: mask select
+ *
+ * This function enable any of the masks selected by the mask select parameter
+ * for the profile specified.
+ */
+static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
+{
+ wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
+
+ ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
+ GLQF_FDMASK_SEL(prof_id), mask_sel);
+}
+
+#define ICE_SRC_DST_MAX_COUNT 8
+
+struct ice_fd_src_dst_pair {
+ u8 prot_id;
+ u8 count;
+ u16 off;
+};
+
+static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
+ /* These are defined in pairs */
+ { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
+ { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
+
+ { ICE_PROT_IPV4_IL, 2, 12 },
+ { ICE_PROT_IPV4_IL, 2, 16 },
+
+ { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
+ { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
+
+ { ICE_PROT_IPV6_IL, 8, 8 },
+ { ICE_PROT_IPV6_IL, 8, 24 },
+
+ { ICE_PROT_TCP_IL, 1, 0 },
+ { ICE_PROT_TCP_IL, 1, 2 },
+
+ { ICE_PROT_UDP_OF, 1, 0 },
+ { ICE_PROT_UDP_OF, 1, 2 },
+
+ { ICE_PROT_UDP_IL_OR_S, 1, 0 },
+ { ICE_PROT_UDP_IL_OR_S, 1, 2 },
+
+ { ICE_PROT_SCTP_IL, 1, 0 },
+ { ICE_PROT_SCTP_IL, 1, 2 }
+};
+
+#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
+
+/**
+ * ice_update_fd_swap - set register appropriately for a FD FV extraction
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @es: extraction sequence (length of array is determined by the block)
+ */
+static enum ice_status
+ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
+{
+ ice_declare_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
+ u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
+#define ICE_FD_FV_NOT_FOUND (-2)
+ s8 first_free = ICE_FD_FV_NOT_FOUND;
+ u8 used[ICE_MAX_FV_WORDS] = { 0 };
+ s8 orig_free, si;
+ u32 mask_sel = 0;
+ u8 i, j, k;
+
+ ice_memset(pair_list, 0, sizeof(pair_list), ICE_NONDMA_MEM);
+
+ ice_init_fd_mask_regs(hw);
+
+ /* This code assumes that the Flow Director field vectors are assigned
+ * from the end of the FV indexes working towards the zero index, that
+ * only complete fields will be included and will be consecutive, and
+ * that there are no gaps between valid indexes.
+ */
+
+ /* Determine swap fields present */
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ /* Find the first free entry, assuming right to left population.
+ * This is where we can start adding additional pairs if needed.
+ */
+ if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
+ ICE_PROT_INVALID)
+ first_free = i - 1;
+
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
+ es[i].off == ice_fd_pairs[j].off) {
+ ice_set_bit(j, pair_list);
+ pair_start[j] = i;
+ }
+ }
+ }
+
+ orig_free = first_free;
+
+ /* determine missing swap fields that need to be added */
+ for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
+ u8 bit1 = ice_is_bit_set(pair_list, i + 1);
+ u8 bit0 = ice_is_bit_set(pair_list, i);
+
+ if (bit0 ^ bit1) {
+ u8 index;
+
+ /* add the appropriate 'paired' entry */
+ if (!bit0)
+ index = i;
+ else
+ index = i + 1;
+
+ /* check for room */
+ if (first_free + 1 < ice_fd_pairs[index].count)
+ return ICE_ERR_MAX_LIMIT;
+
+ /* place in extraction sequence */
+ for (k = 0; k < ice_fd_pairs[index].count; k++) {
+ es[first_free - k].prot_id =
+ ice_fd_pairs[index].prot_id;
+ es[first_free - k].off =
+ ice_fd_pairs[index].off + (k * 2);
+
+ /* keep track of non-relevant fields */
+ mask_sel |= 1 << (first_free - k);
+ }
+
+ pair_start[index] = first_free;
+ first_free -= ice_fd_pairs[index].count;
+ }
+ }
+
+ /* fill in the swap array */
+ si = hw->blk[ICE_BLK_FD].es.fvw - 1;
+ do {
+ u8 indexes_used = 1;
+
+ /* assume flat at this index */
+#define ICE_SWAP_VALID 0x80
+ used[si] = si | ICE_SWAP_VALID;
+
+ if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
+ si -= indexes_used;
+ continue;
+ }
+
+ /* check for a swap location */
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
+ es[si].off == ice_fd_pairs[j].off) {
+ u8 idx;
+
+ /* determine the appropriate matching field */
+ idx = j + ((j % 2) ? -1 : 1);
+
+ indexes_used = ice_fd_pairs[idx].count;
+ for (k = 0; k < indexes_used; k++) {
+ used[si - k] = (pair_start[idx] - k) |
+ ICE_SWAP_VALID;
+ }
+
+ break;
+ }
+ }
+
+ si -= indexes_used;
+ } while (si >= 0);
+
+ /* for each set of 4 swap indexes, write the appropriate register */
+ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
+ u32 raw_entry = 0;
+
+ for (k = 0; k < 4; k++) {
+ u8 idx;
+
+ idx = (j * 4) + k;
+ if (used[idx])
+ raw_entry |= used[idx] << (k * 8);
+ }
+
+ /* write the appropriate register set, based on HW block */
+ wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry);
+
+ ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n",
+ prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry);
+ }
+
+ /* update the masks for this profile to be sure we ignore fields that
+ * are not relevant to our match criteria
+ */
+ ice_update_fd_mask(hw, prof_id, mask_sel);
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_add_prof - add profile
* @hw: pointer to the HW struct
* @blk: hardware block
@@ -3812,6 +4032,18 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
+ if (blk == ICE_BLK_FD) {
+ /* For Flow Director block, the extraction sequence may
+ * need to be altered in the case where there are paired
+ * fields that have no match. This is necessary because
+ * for Flow Director, src and dest fields need to paired
+ * for filter programming and these values are swapped
+ * during Tx.
+ */
+ status = ice_update_fd_swap(hw, prof_id, es);
+ if (status)
+ goto err_ice_add_prof;
+ }
/* and write new es */
ice_write_es(hw, blk, prof_id, es);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6a08b3d28..ef0b5bb52 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -164,6 +164,7 @@ enum ice_media_type {
/* Software VSI types. */
enum ice_vsi_type {
ICE_VSI_PF = 0,
+ ICE_VSI_CTRL = 3, /* equates to ICE_VSI_PF with 1 queue pair */
#ifdef ADQ_SUPPORT
ICE_VSI_CHNL = 4,
#endif /* ADQ_SUPPORT */
@@ -218,6 +219,32 @@ struct ice_phy_info {
#define ICE_MAX_NUM_MIRROR_RULES 64
+/* protocol enumeration for filters */
+enum ice_fltr_ptype {
+ /* NONE - used for undef/error */
+ ICE_FLTR_PTYPE_NONF_NONE = 0,
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ ICE_FLTR_PTYPE_FRAG_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ ICE_FLTR_PTYPE_MAX,
+};
+
+/* 6 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL + 4 ICE_VSI_CHNL */
+#define ICE_MAX_FDIR_VSI_PER_FILTER 6
+
+struct ice_fd_hw_prof {
+ struct ice_flow_seg_info *fdir_seg;
+ int cnt;
+ u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+ u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+};
+
/* Common HW capabilities for SW use */
struct ice_hw_common_caps {
/* Write CSR protection */
@@ -297,12 +324,15 @@ struct ice_hw_common_caps {
struct ice_hw_func_caps {
struct ice_hw_common_caps common_cap;
u32 guar_num_vsi;
+ u32 fd_fltr_guar; /* Number of filters guaranteed */
+ u32 fd_fltr_best_effort; /* Number of best effort filters */
};
/* Device wide capabilities */
struct ice_hw_dev_caps {
struct ice_hw_common_caps common_cap;
u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */
+ u32 num_flow_director_fltr; /* Number of FD filters available */
};
@@ -651,6 +681,7 @@ struct ice_hw {
u64 debug_mask; /* BITMAP for debug mask */
enum ice_mac_type mac_type;
+ u16 fd_ctr_base; /* FD counter base index */
/* pci info */
u16 device_id;
u16 vendor_id;
@@ -748,6 +779,19 @@ struct ice_hw {
struct ice_blk_info blk[ICE_BLK_COUNT];
struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */
struct LIST_HEAD_TYPE fl_profs[ICE_BLK_COUNT];
+ /* Flow Director filter info */
+ int fdir_active_fltr;
+
+ struct ice_lock fdir_fltr_lock; /* protect Flow Director */
+ struct LIST_HEAD_TYPE fdir_list_head;
+
+ /* Book-keeping of side-band filter count per flow-type.
+ * This is used to detect and handle input set changes for
+ * respective flow-type.
+ */
+ u16 fdir_fltr_cnt[ICE_FLTR_PTYPE_MAX];
+
+ struct ice_fd_hw_prof **fdir_prof;
};
/* Statistics collected by each port, VSI, VEB, and S-channel */
@@ -792,6 +836,11 @@ struct ice_hw_port_stats {
u64 link_xoff_rx; /* lxoffrxc */
u64 link_xon_tx; /* lxontxc */
u64 link_xoff_tx; /* lxofftxc */
+ u64 priority_xon_rx[8]; /* pxonrxc[8] */
+ u64 priority_xoff_rx[8]; /* pxoffrxc[8] */
+ u64 priority_xon_tx[8]; /* pxontxc[8] */
+ u64 priority_xoff_tx[8]; /* pxofftxc[8] */
+ u64 priority_xon_2_xoff[8]; /* pxon2offc[8] */
u64 rx_size_64; /* prc64 */
u64 rx_size_127; /* prc127 */
u64 rx_size_255; /* prc255 */
@@ -811,6 +860,12 @@ struct ice_hw_port_stats {
u64 tx_size_1522; /* ptc1522 */
u64 tx_size_big; /* ptc9522 */
u64 mac_short_pkt_dropped; /* mspdc */
+ /* flow director stats */
+ u32 fd_sb_status;
+ u64 fd_sb_match;
+#ifdef ADQ_SUPPORT
+ u64 ch_atr_match;
+#endif /* ADQ_SUPPORT */
};
enum ice_sw_fwd_act_type {
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 755d2497b..624202567 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -10,6 +10,7 @@ sources = [
'ice_flex_pipe.c',
'ice_flow.c',
'ice_dcb.c',
+ 'ice_fdir.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 33/38] net/ice/base: change profile priority for RSS reply
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (31 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 32/38] net/ice/base: add FDIR support Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 34/38] net/ice/base: fix duplicate resource allocations Qi Zhang
` (6 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
1. Add call to replay RSS configurations
2. Add RSS configurations to end of list and not the head to avoid
inversion on replay.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 5 ++++-
drivers/net/ice/base/ice_flow.c | 3 ++-
drivers/net/ice/base/ice_osdep.h | 16 ++++++++++++++++
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 425f76e8d..74f925c03 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3854,7 +3854,10 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
if (status)
return status;
}
-
+ /* Replay per VSI all RSS configurations */
+ status = ice_replay_rss_cfg(hw, vsi_handle);
+ if (status)
+ return status;
/* Replay per VSI all filters */
status = ice_replay_vsi_all_fltr(hw, vsi_handle);
if (!status)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 03a324d49..428002c28 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1672,7 +1672,8 @@ ice_add_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle,
rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match;
rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs;
- LIST_ADD(&rss_cfg->l_entry, &hw->vsi_ctx[vsi_handle]->rss_list_head);
+ LIST_ADD_TAIL(&rss_cfg->l_entry,
+ &hw->vsi_ctx[vsi_handle]->rss_list_head);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 252c8f4e7..560e36c1b 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -462,6 +462,22 @@ LIST_HEAD(ice_list_head, ice_list_entry);
#define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
#define LIST_ADD_AFTER(entry, list_entry) \
LIST_INSERT_AFTER(list_entry, entry, next)
+
+static inline void list_add_tail(struct ice_list_entry *entry,
+ struct ice_list_head *head)
+{
+ struct ice_list_entry *tail = head->lh_first;
+
+ if (tail == NULL) {
+ LIST_INSERT_HEAD(head, entry, next);
+ return;
+ }
+ while (tail->next.le_next != NULL)
+ tail = tail->next.le_next;
+ LIST_INSERT_AFTER(tail, entry, next);
+}
+
+#define LIST_ADD_TAIL(entry, head) list_add_tail(entry, head)
#define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
for ((pos) = (head)->lh_first ? \
container_of((head)->lh_first, struct type, member) : \
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 34/38] net/ice/base: fix duplicate resource allocations
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (32 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 33/38] net/ice/base: change profile priority for RSS reply Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 35/38] net/ice/base: minor fix Qi Zhang
` (5 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
This patch ensure that TCAM allocations made by a newly added VSIG
that has the same characteristic list of an existing VSIG are removed.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 85 +++++++++++++++++-------------------
1 file changed, 41 insertions(+), 44 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 37bb4cbb5..c9d8730d2 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2302,21 +2302,23 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- /* remove all vsis associated with this VSIG XLT2 entry */
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
-
- vsi_cur->vsig = ICE_DEFAULT_VSIG;
- vsi_cur->changed = 1;
- vsi_cur->next_vsi = NULL;
- vsi_cur = tmp;
- } while (vsi_cur);
-
- /* NULL terminate head of vsi list */
- hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ /* If the VSIG has at least 1 VSI then iterate through the
+ * list and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ /* remove all vsis associated with this VSIG XLT2 entry */
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+
+ vsi_cur->vsig = ICE_DEFAULT_VSIG;
+ vsi_cur->changed = 1;
+ vsi_cur->next_vsi = NULL;
+ vsi_cur = tmp;
+ } while (vsi_cur);
+
+ /* NULL terminate head of VSI list */
+ hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ }
/* free characteristic list */
LIST_FOR_EACH_ENTRY_SAFE(del, dtmp,
@@ -4267,36 +4269,32 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/* Move all VSIS associated with this VSIG to the default VSIG */
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
- struct ice_chs_chg *p;
-
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_vsig;
+ /* If the VSIG has at least 1 VSI then iterate through the list
+ * and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+ struct ice_chs_chg *p;
- p->type = ICE_VSIG_REM;
- p->orig_vsig = vsig;
- p->vsig = ICE_DEFAULT_VSIG;
- p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
+ p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
+ if (!p)
+ return ICE_ERR_NO_MEMORY;
- LIST_ADD(&p->list_entry, chg);
+ p->type = ICE_VSIG_REM;
+ p->orig_vsig = vsig;
+ p->vsig = ICE_DEFAULT_VSIG;
+ p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
- status = ice_vsig_free(hw, blk, vsig);
- if (status)
- return status;
+ LIST_ADD(&p->list_entry, chg);
- vsi_cur = tmp;
- } while (vsi_cur);
+ vsi_cur = tmp;
+ } while (vsi_cur);
+ }
- return ICE_SUCCESS;
+ status = ice_vsig_free(hw, blk, vsig);
-err_ice_rem_vsig:
- /* the caller will free up the change list */
- return ICE_ERR_NO_MEMORY;
+ return status;
}
/**
@@ -4493,7 +4491,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA);
- LIST_ADD(&p->list, lst);
+ LIST_ADD_TAIL(&p->list, lst);
}
return ICE_SUCCESS;
@@ -5000,14 +4998,13 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/* search for an existing VSIG with an exact charc match */
status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
if (!status) {
- /* found an exact match */
- /* move vsi to the VSIG that matches */
+ /* move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
- /* remove original VSIG if we just moved the only VSI
- * from it
+ /* VSI has been moved out of or_vsig. If the or_vsig had
+ * only that VSI it is now empty and can be removed.
*/
if (only_vsi) {
status = ice_rem_vsig(hw, blk, or_vsig, &chg);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 35/38] net/ice/base: minor fix
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (33 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 34/38] net/ice/base: fix duplicate resource allocations Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 36/38] net/ice/base: increase prototol offset size Qi Zhang
` (4 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. clean flow entry's action structure after remove it.
2. initialized priority when add a new flow entry
3. remove RSS configuration before deleting the flow profile.
Fixes: aa1cd410fa64 ("net/ice/base: add flow module")
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flow.c | 13 ++++++++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c9d8730d2..e4d0b8c0f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2467,7 +2467,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < es->count; i++) {
off = i * es->fvw;
- if (memcmp(&es->t[off], fv, es->fvw * 2))
+ if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
continue;
*prof_id = i;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 428002c28..98727cfeb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -910,8 +910,11 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
if (entry->entry)
ice_free(hw, entry->entry);
- if (entry->acts)
+ if (entry->acts) {
ice_free(hw, entry->acts);
+ entry->acts = NULL;
+ entry->acts_cnt = 0;
+ }
ice_free(hw, entry);
@@ -1306,6 +1309,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
e->id = entry_id;
e->vsi_handle = vsi_handle;
e->prof = prof;
+ e->priority = prio;
switch (blk) {
case ICE_BLK_RSS:
@@ -1852,11 +1856,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
if (status)
goto out;
+ /* Remove RSS configuration from VSI context before deleting
+ * the flow profile.
+ */
+ ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
+
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI))
status = ice_flow_rem_prof_sync(hw, blk, prof);
- ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
-
out:
ice_free(hw, segs);
return status;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 36/38] net/ice/base: increase prototol offset size
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (34 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 35/38] net/ice/base: minor fix Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 37/38] net/ice/base: revert the workaround for resource allocation Qi Zhang
` (3 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
OS package's format is changed, field vector's protocol offset size is
changed from 8 bit to 16 bit. So base code also need to align to this, or
PMD will not be able to load OS package correctly.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
---
drivers/net/ice/base/ice_flex_type.h | 8 +++++++-
drivers/net/ice/base/ice_flow.c | 7 +++++--
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 365f33390..f259e1371 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -5,12 +5,18 @@
#ifndef _ICE_FLEX_TYPE_H_
#define _ICE_FLEX_TYPE_H_
+#define ICE_FV_OFFSET_INVAL 0x1FF
+
+#pragma pack(1)
/* Extraction Sequence (Field Vector) Table */
struct ice_fv_word {
u8 prot_id;
- u8 off; /* Offset within the protocol header */
+ u16 off; /* Offset within the protocol header */
+ u8 resvrd;
};
+#pragma pack()
+
#define ICE_MAX_FV_WORDS 48
struct ice_fv {
struct ice_fv_word ew[ICE_MAX_FV_WORDS];
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 98727cfeb..be819e0e9 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -516,7 +516,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
struct ice_flow_fld_info *flds;
u16 cnt, ese_bits, i;
s16 adj = 0;
- u8 off;
+ u16 off;
flds = params->prof->segs[seg].fields;
@@ -956,7 +956,10 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
return ICE_ERR_NO_MEMORY;
/* initialize extraction sequence to all invalid (0xff) */
- ice_memset(params.es, 0xff, sizeof(params.es), ICE_NONDMA_MEM);
+ for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
+ params.es[i].prot_id = ICE_PROT_INVALID;
+ params.es[i].off = ICE_FV_OFFSET_INVAL;
+ }
params.blk = blk;
params.prof->id = prof_id;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index bad925c8c..f0c74a348 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -174,7 +174,7 @@ enum ice_flow_priority {
struct ice_flow_seg_xtrct {
u8 prot_id; /* Protocol ID of extracted header field */
- u8 off; /* Starting offset of the field in header in bytes */
+ u16 off; /* Starting offset of the field in header in bytes */
u8 idx; /* Index of FV entry used */
u8 disp; /* Displacement of field in bits fr. FV entry's start */
};
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 6b3bd6542..e572dd320 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -223,7 +223,7 @@ struct ice_prot_lkup_ext {
u16 prot_type;
u8 n_val_words;
/* create a buffer to hold max words per recipe */
- u8 field_off[ICE_MAX_CHAIN_WORDS];
+ u16 field_off[ICE_MAX_CHAIN_WORDS];
struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 37/38] net/ice/base: revert the workaround for resource allocation
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (35 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 36/38] net/ice/base: increase prototol offset size Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 38/38] net/ice/base: fix set UDP PTYPEs Qi Zhang
` (2 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Revert the workaround for allocating TCAM and FV entries to align
with latest firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 11 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_flex_pipe.c | 235 ++---------------------------------
drivers/net/ice/base/ice_flex_type.h | 2 -
4 files changed, 17 insertions(+), 233 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 74f925c03..3d2e5f347 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1786,11 +1786,11 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
* @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
- * @sh: shared if true, dedicated if false
+ * @btm: allocate from bottom
* @res: pointer to array that will receive the resources
*/
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
{
struct ice_aqc_alloc_free_res_elem *buf;
enum ice_status status;
@@ -1804,8 +1804,11 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
/* Prepare buffer to allocate resource. */
buf->num_elems = CPU_TO_LE16(num);
- buf->res_type = CPU_TO_LE16(type | (sh ? ICE_AQC_RES_TYPE_FLAG_SHARED :
- ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+ buf->res_type = CPU_TO_LE16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED |
+ ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX);
+ if (btm)
+ buf->res_type |= CPU_TO_LE16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM);
+
status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
ice_aqc_opc_alloc_res, NULL);
if (status)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 4dc43dcfe..e8f2ce9d8 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -41,7 +41,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout);
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res);
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
enum ice_status
ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index e4d0b8c0f..14e632fab 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2536,199 +2536,6 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_workaround_get_res_blk - determine the block from a resource type
- * @type: type of resource
- * @blk: pointer to a enum that will receive the block type
- * @tcam: pointer to variable that will be set to true for a TCAM resource type
- */
-static enum
-ice_status ice_workaround_get_res_blk(u16 type, enum ice_block *blk, bool *tcam)
-{
- /* just need to support TCAM entries and Profile IDs for now */
- *tcam = false;
-
- switch (type) {
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_SW;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM:
- *blk = ICE_BLK_ACL;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM:
- *blk = ICE_BLK_FD;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_RSS;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_PE;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_SW;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID:
- *blk = ICE_BLK_ACL;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID:
- *blk = ICE_BLK_FD;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_RSS;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_PE;
- break;
- default:
- return ICE_ERR_PARAM;
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_alloc_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource
- * @num: number of resources to allocate
- * @res: pointer to array that will receive the resources
- */
-static enum ice_status
-ice_alloc_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- u16 count = 0;
- bool tcam;
- u16 first;
- u16 last;
- u16 max;
- u16 i;
-
-/* Number of PFs we support with this workaround */
-#define ICE_WA_PF_COUNT 4
-#define ICE_WA_1ST_TCAM 4
-#define ICE_WA_1ST_FV 4
-
- /* Only allow our supported PFs */
- if (hw->pf_id >= ICE_WA_PF_COUNT)
- return ICE_ERR_AQ_ERROR;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* range of entries based on PF */
- max = hw->blk[blk].prof.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* Profile IDs - start at non-zero index for PROF ID TCAM table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_TCAM;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].prof.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].prof.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- } else {
- /* range of entries based on PF */
- max = hw->blk[blk].es.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* FV index - start at non-zero index for Field vector table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_FV;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].es.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].es.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_free_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource to free
- * @num: number of resources
- * @res: array of resource ids to free
- */
-static enum ice_status
-ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- bool tcam = false;
- u16 i;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* TCAM entries */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].prof.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- }
- }
-
- } else {
- /* Profile IDs */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].es.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- }
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
* ice_alloc_tcam_ent - allocate hardware TCAM entry
* @hw: pointer to the HW struct
* @blk: the block to allocate the TCAM for
@@ -2745,7 +2552,7 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_alloc_res_workaround(hw, res_type, 1, tcam_idx);
+ return ice_alloc_hw_res(hw, res_type, 1, true, tcam_idx);
}
/**
@@ -2764,7 +2571,7 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tcam_idx);
+ return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
}
/**
@@ -2786,7 +2593,7 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- status = ice_alloc_res_workaround(hw, res_type, 1, &get_prof);
+ status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
if (!status)
*prof_id = (u8)get_prof;
@@ -2810,15 +2617,7 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tmp_prof_id);
- /* The following code is a WORKAROUND until DCR 076 is available.
- * DCR 076 - Update to Profile ID TCAM Resource Allocation
- *
- * Once the DCR 076 changes are available in FW, this code can be
- * restored. Original code:
- *
- * return ice_free_res(hw, res_type, 1, &tmp_prof_id);
- */
+ return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
}
/**
@@ -3125,8 +2924,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
LIST_FOR_EACH_ENTRY_SAFE(del, tmp, &hw->blk[blk].es.prof_map,
ice_prof_map, list) {
- LIST_DEL(&del->list);
- ice_free(hw, del);
+ ice_rem_prof(hw, blk, del->profile_cookie);
}
}
@@ -3168,9 +2966,6 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].prof_redir.t);
ice_free(hw, hw->blk[i].es.t);
ice_free(hw, hw->blk[i].es.ref_count);
-
- ice_free(hw, hw->blk[i].es.resource_used_hack);
- ice_free(hw, hw->blk[i].prof.resource_used_hack);
ice_free(hw, hw->blk[i].es.written);
}
@@ -3347,18 +3142,6 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
if (!es->ref_count)
goto err;
- es->resource_used_hack = (u8 *)
- ice_calloc(hw, hw->blk[i].es.count, sizeof(u8));
-
- if (!es->resource_used_hack)
- goto err;
-
- prof->resource_used_hack = (u8 *)ice_calloc(hw, prof->count,
- sizeof(u8));
-
- if (!prof->resource_used_hack)
- goto err;
-
INIT_LIST_HEAD(&es->prof_map);
/* Now that tables are allocated, read in package data */
@@ -4390,13 +4173,13 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
if (!pmap)
return ICE_ERR_DOES_NOT_EXIST;
- status = ice_free_prof_id(hw, blk, pmap->prof_id);
-
+ /* remove all flows with this profile */
+ status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
- /* remove all flows with this profile */
- status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
+ /* remove profile */
+ status = ice_free_prof_id(hw, blk, pmap->prof_id);
if (status)
return status;
/* dereference profile, and possibly remove */
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index f259e1371..f2a5f27e7 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -507,7 +507,6 @@ struct ice_es {
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
- u8 *resource_used_hack; /* hack for testing */
};
/* PTYPE Group management */
@@ -660,7 +659,6 @@ struct ice_prof_tcam {
u16 max_prof_id;
u8 cdid_bits; /* # cdid bits to use in key, 0, 2, 4, or 8 */
struct ice_prof_tcam_entry *t;
- u8 *resource_used_hack;
};
struct ice_prof_redir {
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v3 38/38] net/ice/base: fix set UDP PTYPEs
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (36 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 37/38] net/ice/base: revert the workaround for resource allocation Qi Zhang
@ 2019-03-11 7:04 ` Qi Zhang
2019-03-11 7:27 ` Zhang, Qi Z
2019-03-18 8:37 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Yang, Qiming
2019-03-19 3:28 ` Lu, Wenzhuo
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-11 7:04 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Set the UDP PTYPEs to inner-last for non-tunneled packats according
to data sheet.
This also fix the issue that IPv4 TCP RSS does not work if
RSS for IPv6 UDP is also configured.
Fixes: aa1cd410fa64 ("net/ice/base: add flow module")
Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flow.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index be819e0e9..e3c34ba89 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -467,8 +467,8 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
ICE_FLOW_PTYPE_MAX);
hdrs &= ~ICE_FLOW_SEG_HDR_ICMP;
} else if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
- src = !i ? (const ice_bitmap_t *)ice_ptypes_udp_of :
- (const ice_bitmap_t *)ice_ptypes_udp_il;
+ src = !i ? (const ice_bitmap_t *)ice_ptypes_udp_il :
+ (const ice_bitmap_t *)ice_ptypes_udp_of;
ice_and_bitmap(params->ptypes, params->ptypes, src,
ICE_FLOW_PTYPE_MAX);
hdrs &= ~ICE_FLOW_SEG_HDR_UDP;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v3 38/38] net/ice/base: fix set UDP PTYPEs
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 38/38] net/ice/base: fix set UDP PTYPEs Qi Zhang
@ 2019-03-11 7:27 ` Zhang, Qi Z
0 siblings, 0 replies; 213+ messages in thread
From: Zhang, Qi Z @ 2019-03-11 7:27 UTC (permalink / raw)
To: Lu, Wenzhuo, Yang, Qiming; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Monday, March 11, 2019 3:05 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH v3 38/38] net/ice/base: fix set UDP PTYPEs
>
> Set the UDP PTYPEs to inner-last for non-tunneled packats according to data
> sheet.
>
> This also fix the issue that IPv4 TCP RSS does not work if RSS for IPv6 UDP is also
> configured.
>
> Fixes: aa1cd410fa64 ("net/ice/base: add flow module")
>
> Vignesh Sridhar <vignesh.sridhar@intel.com>
Missing "Signed-off-by", will add when applied the patch.
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
> drivers/net/ice/base/ice_flow.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
> index be819e0e9..e3c34ba89 100644
> --- a/drivers/net/ice/base/ice_flow.c
> +++ b/drivers/net/ice/base/ice_flow.c
> @@ -467,8 +467,8 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params
> *params)
> ICE_FLOW_PTYPE_MAX);
> hdrs &= ~ICE_FLOW_SEG_HDR_ICMP;
> } else if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
> - src = !i ? (const ice_bitmap_t *)ice_ptypes_udp_of :
> - (const ice_bitmap_t *)ice_ptypes_udp_il;
> + src = !i ? (const ice_bitmap_t *)ice_ptypes_udp_il :
> + (const ice_bitmap_t *)ice_ptypes_udp_of;
> ice_and_bitmap(params->ptypes, params->ptypes, src,
> ICE_FLOW_PTYPE_MAX);
> hdrs &= ~ICE_FLOW_SEG_HDR_UDP;
> --
> 2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
@ 2019-03-15 0:46 ` Yang, Qiming
2019-03-15 0:46 ` Yang, Qiming
0 siblings, 1 reply; 213+ messages in thread
From: Yang, Qiming @ 2019-03-15 0:46 UTC (permalink / raw)
To: Zhang, Qi Z, Lu, Wenzhuo; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Monday, March 11, 2019 3:04 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH v3 01/38] net/ice/base: add switch resource allocation and
> free
>
> Add two APIs ice_alloc_sw and ice_free_sw to support switch related
> resource allocation and free.
>
> These APIs is required when we enable switch flow.
>
Is or are?
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
> drivers/net/ice/base/ice_switch.c | 150
> ++++++++++++++++++++++++++++++++++++++
> drivers/net/ice/base/ice_switch.h | 5 ++
> 2 files changed, 155 insertions(+)
>
> diff --git a/drivers/net/ice/base/ice_switch.c
> b/drivers/net/ice/base/ice_switch.c
> index 0379cd045..a7b712e17 100644
> --- a/drivers/net/ice/base/ice_switch.c
> +++ b/drivers/net/ice/base/ice_switch.c
> @@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct
> ice_aqc_get_sw_cfg_resp *buf, }
>
>
> +/**
> + * ice_alloc_sw - allocate resources specific to switch
> + * @hw: pointer to the HW struct
> + * @ena_stats: true to turn on VEB stats
> + * @shared_res: true for shared resource, false for dedicated resource
> + * @sw_id: switch ID returned
> + * @counter_id: VEB counter ID returned
> + *
> + * allocates switch resources (SWID and VEB counter) (0x0208) */ enum
> +ice_status ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool
> +shared_res, u16 *sw_id,
> + u16 *counter_id)
> +{
> + struct ice_aqc_alloc_free_res_elem *sw_buf;
> + struct ice_aqc_res_elem *sw_ele;
> + enum ice_status status;
> + u16 buf_len;
> +
> + buf_len = sizeof(*sw_buf);
> + sw_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!sw_buf)
> + return ICE_ERR_NO_MEMORY;
> +
> + /* Prepare buffer for switch ID.
> + * The number of resource entries in buffer is passed as 1 since only
> a
> + * single switch/VEB instance is allocated, and hence a single sw_id
> + * is requested.
> + */
> + sw_buf->num_elems = CPU_TO_LE16(1);
> + sw_buf->res_type =
> + CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |
> + (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :
> + ICE_AQC_RES_TYPE_FLAG_DEDICATED));
> +
> + status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
> + ice_aqc_opc_alloc_res, NULL);
> +
> + if (status)
> + goto ice_alloc_sw_exit;
> +
> + sw_ele = &sw_buf->elem[0];
> + *sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);
> +
> + if (ena_stats) {
> + /* Prepare buffer for VEB Counter */
> + enum ice_adminq_opc opc = ice_aqc_opc_alloc_res;
> + struct ice_aqc_alloc_free_res_elem *counter_buf;
> + struct ice_aqc_res_elem *counter_ele;
> +
> + counter_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!counter_buf) {
> + status = ICE_ERR_NO_MEMORY;
> + goto ice_alloc_sw_exit;
> + }
> +
> + /* The number of resource entries in buffer is passed as 1
> since
> + * only a single switch/VEB instance is allocated, and hence a
> + * single VEB counter is requested.
> + */
> + counter_buf->num_elems = CPU_TO_LE16(1);
> + counter_buf->res_type =
> + CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |
> + ICE_AQC_RES_TYPE_FLAG_DEDICATED);
> + status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
> + opc, NULL);
> +
> + if (status) {
> + ice_free(hw, counter_buf);
> + goto ice_alloc_sw_exit;
> + }
> + counter_ele = &counter_buf->elem[0];
> + *counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);
> + ice_free(hw, counter_buf);
> + }
> +
> +ice_alloc_sw_exit:
> + ice_free(hw, sw_buf);
> + return status;
> +}
> +
> +/**
> + * ice_free_sw - free resources specific to switch
> + * @hw: pointer to the HW struct
> + * @sw_id: switch ID returned
> + * @counter_id: VEB counter ID returned
> + *
> + * free switch resources (SWID and VEB counter) (0x0209)
> + *
> + * NOTE: This function frees multiple resources. It continues
> + * releasing other resources even after it encounters error.
> + * The error code returned is the last error it encountered.
> + */
> +enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16
> +counter_id) {
> + struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
> + enum ice_status status, ret_status;
> + u16 buf_len;
> +
> + buf_len = sizeof(*sw_buf);
> + sw_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!sw_buf)
> + return ICE_ERR_NO_MEMORY;
> +
> + /* Prepare buffer to free for switch ID res.
> + * The number of resource entries in buffer is passed as 1 since only
> a
> + * single switch/VEB instance is freed, and hence a single sw_id
> + * is released.
> + */
> + sw_buf->num_elems = CPU_TO_LE16(1);
> + sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);
> + sw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);
> +
> + ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
> + ice_aqc_opc_free_res, NULL);
> +
> + if (ret_status)
> + ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
> +
> + /* Prepare buffer to free for VEB Counter resource */
> + counter_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!counter_buf) {
> + ice_free(hw, sw_buf);
> + return ICE_ERR_NO_MEMORY;
> + }
> +
> + /* The number of resource entries in buffer is passed as 1 since only
> a
> + * single switch/VEB instance is freed, and hence a single VEB counter
> + * is released
> + */
> + counter_buf->num_elems = CPU_TO_LE16(1);
> + counter_buf->res_type =
> CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);
> + counter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
> +
> + status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
> + ice_aqc_opc_free_res, NULL);
> + if (status) {
> + ice_debug(hw, ICE_DBG_SW,
> + "VEB counter resource could not be freed\n");
> + ret_status = status;
> + }
> +
> + ice_free(hw, counter_buf);
> + ice_free(hw, sw_buf);
> + return ret_status;
> +}
>
> /**
> * ice_aq_add_vsi
> diff --git a/drivers/net/ice/base/ice_switch.h
> b/drivers/net/ice/base/ice_switch.h
> index 66a172fc2..dd21781f7 100644
> --- a/drivers/net/ice/base/ice_switch.h
> +++ b/drivers/net/ice/base/ice_switch.h
> @@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16
> counter_id);
> /* Switch/bridge related commands */
> enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
> enum ice_status
> +ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16
> *sw_id,
> + u16 *counter_id);
> +enum ice_status
> +ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id); enum
> +ice_status
> ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list); enum
> ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
> enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE
> *m_lst);
> --
> 2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free
2019-03-15 0:46 ` Yang, Qiming
@ 2019-03-15 0:46 ` Yang, Qiming
0 siblings, 0 replies; 213+ messages in thread
From: Yang, Qiming @ 2019-03-15 0:46 UTC (permalink / raw)
To: Zhang, Qi Z, Lu, Wenzhuo; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Monday, March 11, 2019 3:04 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH v3 01/38] net/ice/base: add switch resource allocation and
> free
>
> Add two APIs ice_alloc_sw and ice_free_sw to support switch related
> resource allocation and free.
>
> These APIs is required when we enable switch flow.
>
Is or are?
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
> drivers/net/ice/base/ice_switch.c | 150
> ++++++++++++++++++++++++++++++++++++++
> drivers/net/ice/base/ice_switch.h | 5 ++
> 2 files changed, 155 insertions(+)
>
> diff --git a/drivers/net/ice/base/ice_switch.c
> b/drivers/net/ice/base/ice_switch.c
> index 0379cd045..a7b712e17 100644
> --- a/drivers/net/ice/base/ice_switch.c
> +++ b/drivers/net/ice/base/ice_switch.c
> @@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct
> ice_aqc_get_sw_cfg_resp *buf, }
>
>
> +/**
> + * ice_alloc_sw - allocate resources specific to switch
> + * @hw: pointer to the HW struct
> + * @ena_stats: true to turn on VEB stats
> + * @shared_res: true for shared resource, false for dedicated resource
> + * @sw_id: switch ID returned
> + * @counter_id: VEB counter ID returned
> + *
> + * allocates switch resources (SWID and VEB counter) (0x0208) */ enum
> +ice_status ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool
> +shared_res, u16 *sw_id,
> + u16 *counter_id)
> +{
> + struct ice_aqc_alloc_free_res_elem *sw_buf;
> + struct ice_aqc_res_elem *sw_ele;
> + enum ice_status status;
> + u16 buf_len;
> +
> + buf_len = sizeof(*sw_buf);
> + sw_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!sw_buf)
> + return ICE_ERR_NO_MEMORY;
> +
> + /* Prepare buffer for switch ID.
> + * The number of resource entries in buffer is passed as 1 since only
> a
> + * single switch/VEB instance is allocated, and hence a single sw_id
> + * is requested.
> + */
> + sw_buf->num_elems = CPU_TO_LE16(1);
> + sw_buf->res_type =
> + CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |
> + (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :
> + ICE_AQC_RES_TYPE_FLAG_DEDICATED));
> +
> + status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
> + ice_aqc_opc_alloc_res, NULL);
> +
> + if (status)
> + goto ice_alloc_sw_exit;
> +
> + sw_ele = &sw_buf->elem[0];
> + *sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);
> +
> + if (ena_stats) {
> + /* Prepare buffer for VEB Counter */
> + enum ice_adminq_opc opc = ice_aqc_opc_alloc_res;
> + struct ice_aqc_alloc_free_res_elem *counter_buf;
> + struct ice_aqc_res_elem *counter_ele;
> +
> + counter_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!counter_buf) {
> + status = ICE_ERR_NO_MEMORY;
> + goto ice_alloc_sw_exit;
> + }
> +
> + /* The number of resource entries in buffer is passed as 1
> since
> + * only a single switch/VEB instance is allocated, and hence a
> + * single VEB counter is requested.
> + */
> + counter_buf->num_elems = CPU_TO_LE16(1);
> + counter_buf->res_type =
> + CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |
> + ICE_AQC_RES_TYPE_FLAG_DEDICATED);
> + status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
> + opc, NULL);
> +
> + if (status) {
> + ice_free(hw, counter_buf);
> + goto ice_alloc_sw_exit;
> + }
> + counter_ele = &counter_buf->elem[0];
> + *counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);
> + ice_free(hw, counter_buf);
> + }
> +
> +ice_alloc_sw_exit:
> + ice_free(hw, sw_buf);
> + return status;
> +}
> +
> +/**
> + * ice_free_sw - free resources specific to switch
> + * @hw: pointer to the HW struct
> + * @sw_id: switch ID returned
> + * @counter_id: VEB counter ID returned
> + *
> + * free switch resources (SWID and VEB counter) (0x0209)
> + *
> + * NOTE: This function frees multiple resources. It continues
> + * releasing other resources even after it encounters error.
> + * The error code returned is the last error it encountered.
> + */
> +enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16
> +counter_id) {
> + struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
> + enum ice_status status, ret_status;
> + u16 buf_len;
> +
> + buf_len = sizeof(*sw_buf);
> + sw_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!sw_buf)
> + return ICE_ERR_NO_MEMORY;
> +
> + /* Prepare buffer to free for switch ID res.
> + * The number of resource entries in buffer is passed as 1 since only
> a
> + * single switch/VEB instance is freed, and hence a single sw_id
> + * is released.
> + */
> + sw_buf->num_elems = CPU_TO_LE16(1);
> + sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);
> + sw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);
> +
> + ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
> + ice_aqc_opc_free_res, NULL);
> +
> + if (ret_status)
> + ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
> +
> + /* Prepare buffer to free for VEB Counter resource */
> + counter_buf = (struct ice_aqc_alloc_free_res_elem *)
> + ice_malloc(hw, buf_len);
> + if (!counter_buf) {
> + ice_free(hw, sw_buf);
> + return ICE_ERR_NO_MEMORY;
> + }
> +
> + /* The number of resource entries in buffer is passed as 1 since only
> a
> + * single switch/VEB instance is freed, and hence a single VEB counter
> + * is released
> + */
> + counter_buf->num_elems = CPU_TO_LE16(1);
> + counter_buf->res_type =
> CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);
> + counter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
> +
> + status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
> + ice_aqc_opc_free_res, NULL);
> + if (status) {
> + ice_debug(hw, ICE_DBG_SW,
> + "VEB counter resource could not be freed\n");
> + ret_status = status;
> + }
> +
> + ice_free(hw, counter_buf);
> + ice_free(hw, sw_buf);
> + return ret_status;
> +}
>
> /**
> * ice_aq_add_vsi
> diff --git a/drivers/net/ice/base/ice_switch.h
> b/drivers/net/ice/base/ice_switch.h
> index 66a172fc2..dd21781f7 100644
> --- a/drivers/net/ice/base/ice_switch.h
> +++ b/drivers/net/ice/base/ice_switch.h
> @@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16
> counter_id);
> /* Switch/bridge related commands */
> enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
> enum ice_status
> +ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16
> *sw_id,
> + u16 *counter_id);
> +enum ice_status
> +ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id); enum
> +ice_status
> ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list); enum
> ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
> enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE
> *m_lst);
> --
> 2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v3 00/38] ice share code update.
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (37 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 38/38] net/ice/base: fix set UDP PTYPEs Qi Zhang
@ 2019-03-18 8:37 ` Yang, Qiming
2019-03-18 8:37 ` Yang, Qiming
2019-03-19 3:28 ` Lu, Wenzhuo
39 siblings, 1 reply; 213+ messages in thread
From: Yang, Qiming @ 2019-03-18 8:37 UTC (permalink / raw)
To: Zhang, Qi Z, Lu, Wenzhuo; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
-----Original Message-----
From: Zhang, Qi Z
Sent: Monday, March 11, 2019 3:04 PM
To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming <qiming.yang@intel.com>
Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit, Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
Subject: [PATCH v3 00/38] ice share code update.
Sync to latest kernel driver, main changes:
1. add DCB/FDIR support.
2. add more APIs in switch module.
3. code clean and bug fix.
v3:
- fix software queue handle parsing in ice_ena_vsi_txq and
ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
fail during device reconfigure.
- Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
cause IPv4 TCP RSS does not work at some situation.
v2:
- Enhanced the commit log
- Add missing fixed line.
Qi Zhang (38):
net/ice/base: add switch resource allocation and free
net/ice/base: improve comments
net/ice/base: add two helper functions
net/ice/base: add helper macros
net/ice/base: allow package copy to be used after resets
net/ice/base: code clean
net/ice/base: declare functions as external
net/ice/base: add more APIs in switch module
net/ice/base: add VSI queue context framework
net/ice/base: add APIs to add remove ethertype filter
net/ice/base: add APIs to get allocated resources
net/ice/base: add APIs to alloc/free resource counter
net/ice/base: add APIs to get VSI promiscuous mode
net/ice/base: add MAC filter with marker and counter
net/ice/base: add two helper functions for flow management
net/ice/base: minor fix
net/ice/base: update macros
net/ice/base: code clean
net/ice/base: enable VSI queue context
net/ice/base: ensure only valid bits are set
net/ice/base: enhance get link status command
net/ice/base: add RSS key related macro and structures
net/ice/base: do not write TCAM entries back
net/ice/base: remove local VSIG allocations
net/ice/base: minor fix
net/ice/base: update copyright time
net/ice/base: fix static analysis reported issues
net/ice/base: return config error without queue to disable
net/ice/base: add function to check FW recovery mode
net/ice/base: change profile id reference counting
net/ice/base: add DCB support
net/ice/base: add FDIR support
net/ice/base: change profile priority for RSS reply
net/ice/base: fix duplicate resource allocations
net/ice/base: minor fix
net/ice/base: increase prototol offset size
net/ice/base: revert the workaround for resource allocation
net/ice/base: fix set UDP PTYPEs
drivers/net/ice/Makefile | 2 +
drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 650 ++++++--
drivers/net/ice/base/ice_common.h | 36 +-
drivers/net/ice/base/ice_controlq.c | 10 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 +++
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_fdir.c | 742 +++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++
drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
drivers/net/ice/base/ice_flex_pipe.h | 4 +-
drivers/net/ice/base/ice_flex_type.h | 19 +-
drivers/net/ice/base/ice_flow.c | 228 +--
drivers/net/ice/base/ice_flow.h | 22 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
drivers/net/ice/base/ice_nvm.c | 17 +-
drivers/net/ice/base/ice_osdep.h | 16 +
drivers/net/ice/base/ice_protocol_type.h | 8 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 34 +-
drivers/net/ice/base/ice_status.h | 3 +-
drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
drivers/net/ice/base/ice_switch.h | 109 +-
drivers/net/ice/base/ice_type.h | 119 +-
drivers/net/ice/base/meson.build | 2 +
drivers/net/ice/ice_rxtx.c | 13 +-
31 files changed, 7114 insertions(+), 2365 deletions(-) create mode 100644 drivers/net/ice/base/ice_dcb.c create mode 100644 drivers/net/ice/base/ice_dcb.h create mode 100644 drivers/net/ice/base/ice_fdir.c create mode 100644 drivers/net/ice/base/ice_fdir.h
--
2.13.6
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Only have some typos in commit log.
Qiming
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v3 00/38] ice share code update.
2019-03-18 8:37 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Yang, Qiming
@ 2019-03-18 8:37 ` Yang, Qiming
0 siblings, 0 replies; 213+ messages in thread
From: Yang, Qiming @ 2019-03-18 8:37 UTC (permalink / raw)
To: Zhang, Qi Z, Lu, Wenzhuo; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
-----Original Message-----
From: Zhang, Qi Z
Sent: Monday, March 11, 2019 3:04 PM
To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming <qiming.yang@intel.com>
Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit, Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
Subject: [PATCH v3 00/38] ice share code update.
Sync to latest kernel driver, main changes:
1. add DCB/FDIR support.
2. add more APIs in switch module.
3. code clean and bug fix.
v3:
- fix software queue handle parsing in ice_ena_vsi_txq and
ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
fail during device reconfigure.
- Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
cause IPv4 TCP RSS does not work at some situation.
v2:
- Enhanced the commit log
- Add missing fixed line.
Qi Zhang (38):
net/ice/base: add switch resource allocation and free
net/ice/base: improve comments
net/ice/base: add two helper functions
net/ice/base: add helper macros
net/ice/base: allow package copy to be used after resets
net/ice/base: code clean
net/ice/base: declare functions as external
net/ice/base: add more APIs in switch module
net/ice/base: add VSI queue context framework
net/ice/base: add APIs to add remove ethertype filter
net/ice/base: add APIs to get allocated resources
net/ice/base: add APIs to alloc/free resource counter
net/ice/base: add APIs to get VSI promiscuous mode
net/ice/base: add MAC filter with marker and counter
net/ice/base: add two helper functions for flow management
net/ice/base: minor fix
net/ice/base: update macros
net/ice/base: code clean
net/ice/base: enable VSI queue context
net/ice/base: ensure only valid bits are set
net/ice/base: enhance get link status command
net/ice/base: add RSS key related macro and structures
net/ice/base: do not write TCAM entries back
net/ice/base: remove local VSIG allocations
net/ice/base: minor fix
net/ice/base: update copyright time
net/ice/base: fix static analysis reported issues
net/ice/base: return config error without queue to disable
net/ice/base: add function to check FW recovery mode
net/ice/base: change profile id reference counting
net/ice/base: add DCB support
net/ice/base: add FDIR support
net/ice/base: change profile priority for RSS reply
net/ice/base: fix duplicate resource allocations
net/ice/base: minor fix
net/ice/base: increase prototol offset size
net/ice/base: revert the workaround for resource allocation
net/ice/base: fix set UDP PTYPEs
drivers/net/ice/Makefile | 2 +
drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 650 ++++++--
drivers/net/ice/base/ice_common.h | 36 +-
drivers/net/ice/base/ice_controlq.c | 10 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 +++
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_fdir.c | 742 +++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++
drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
drivers/net/ice/base/ice_flex_pipe.h | 4 +-
drivers/net/ice/base/ice_flex_type.h | 19 +-
drivers/net/ice/base/ice_flow.c | 228 +--
drivers/net/ice/base/ice_flow.h | 22 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
drivers/net/ice/base/ice_nvm.c | 17 +-
drivers/net/ice/base/ice_osdep.h | 16 +
drivers/net/ice/base/ice_protocol_type.h | 8 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 34 +-
drivers/net/ice/base/ice_status.h | 3 +-
drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
drivers/net/ice/base/ice_switch.h | 109 +-
drivers/net/ice/base/ice_type.h | 119 +-
drivers/net/ice/base/meson.build | 2 +
drivers/net/ice/ice_rxtx.c | 13 +-
31 files changed, 7114 insertions(+), 2365 deletions(-) create mode 100644 drivers/net/ice/base/ice_dcb.c create mode 100644 drivers/net/ice/base/ice_dcb.h create mode 100644 drivers/net/ice/base/ice_fdir.c create mode 100644 drivers/net/ice/base/ice_fdir.h
--
2.13.6
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Only have some typos in commit log.
Qiming
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v3 00/38] ice share code update.
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
` (38 preceding siblings ...)
2019-03-18 8:37 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Yang, Qiming
@ 2019-03-19 3:28 ` Lu, Wenzhuo
2019-03-19 3:28 ` Lu, Wenzhuo
39 siblings, 1 reply; 213+ messages in thread
From: Lu, Wenzhuo @ 2019-03-19 3:28 UTC (permalink / raw)
To: Zhang, Qi Z, Yang, Qiming; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
Hi,
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Monday, March 11, 2019 3:04 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH v3 00/38] ice share code update.
>
> Sync to latest kernel driver, main changes:
> 1. add DCB/FDIR support.
> 2. add more APIs in switch module.
> 3. code clean and bug fix.
>
> v3:
> - fix software queue handle parsing in ice_ena_vsi_txq and
> ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
> fail during device reconfigure.
> - Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
> cause IPv4 TCP RSS does not work at some situation.
>
> v2:
> - Enhanced the commit log
> - Add missing fixed line.
>
> Qi Zhang (38):
> net/ice/base: add switch resource allocation and free
> net/ice/base: improve comments
> net/ice/base: add two helper functions
> net/ice/base: add helper macros
> net/ice/base: allow package copy to be used after resets
> net/ice/base: code clean
> net/ice/base: declare functions as external
> net/ice/base: add more APIs in switch module
> net/ice/base: add VSI queue context framework
> net/ice/base: add APIs to add remove ethertype filter
> net/ice/base: add APIs to get allocated resources
> net/ice/base: add APIs to alloc/free resource counter
> net/ice/base: add APIs to get VSI promiscuous mode
> net/ice/base: add MAC filter with marker and counter
> net/ice/base: add two helper functions for flow management
> net/ice/base: minor fix
> net/ice/base: update macros
> net/ice/base: code clean
> net/ice/base: enable VSI queue context
> net/ice/base: ensure only valid bits are set
> net/ice/base: enhance get link status command
> net/ice/base: add RSS key related macro and structures
> net/ice/base: do not write TCAM entries back
> net/ice/base: remove local VSIG allocations
> net/ice/base: minor fix
> net/ice/base: update copyright time
> net/ice/base: fix static analysis reported issues
> net/ice/base: return config error without queue to disable
> net/ice/base: add function to check FW recovery mode
> net/ice/base: change profile id reference counting
> net/ice/base: add DCB support
> net/ice/base: add FDIR support
> net/ice/base: change profile priority for RSS reply
> net/ice/base: fix duplicate resource allocations
> net/ice/base: minor fix
> net/ice/base: increase prototol offset size
> net/ice/base: revert the workaround for resource allocation
> net/ice/base: fix set UDP PTYPEs
>
> drivers/net/ice/Makefile | 2 +
> drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
> drivers/net/ice/base/ice_alloc.h | 2 +-
> drivers/net/ice/base/ice_common.c | 650 ++++++--
> drivers/net/ice/base/ice_common.h | 36 +-
> drivers/net/ice/base/ice_controlq.c | 10 +-
> drivers/net/ice/base/ice_controlq.h | 2 +-
> drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
> drivers/net/ice/base/ice_dcb.h | 223 +++
> drivers/net/ice/base/ice_devids.h | 2 +-
> drivers/net/ice/base/ice_fdir.c | 742 +++++++++
> drivers/net/ice/base/ice_fdir.h | 202 +++
> drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
> drivers/net/ice/base/ice_flex_pipe.h | 4 +-
> drivers/net/ice/base/ice_flex_type.h | 19 +-
> drivers/net/ice/base/ice_flow.c | 228 +--
> drivers/net/ice/base/ice_flow.h | 22 +-
> drivers/net/ice/base/ice_hw_autogen.h | 2 +-
> drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
> drivers/net/ice/base/ice_nvm.c | 17 +-
> drivers/net/ice/base/ice_osdep.h | 16 +
> drivers/net/ice/base/ice_protocol_type.h | 8 +-
> drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
> drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
> drivers/net/ice/base/ice_sched.h | 34 +-
> drivers/net/ice/base/ice_status.h | 3 +-
> drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
> drivers/net/ice/base/ice_switch.h | 109 +-
> drivers/net/ice/base/ice_type.h | 119 +-
> drivers/net/ice/base/meson.build | 2 +
> drivers/net/ice/ice_rxtx.c | 13 +-
> 31 files changed, 7114 insertions(+), 2365 deletions(-) create mode 100644
> drivers/net/ice/base/ice_dcb.c create mode 100644
> drivers/net/ice/base/ice_dcb.h create mode 100644
> drivers/net/ice/base/ice_fdir.c create mode 100644
> drivers/net/ice/base/ice_fdir.h
>
> --
> 2.13.6
Series-Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v3 00/38] ice share code update.
2019-03-19 3:28 ` Lu, Wenzhuo
@ 2019-03-19 3:28 ` Lu, Wenzhuo
0 siblings, 0 replies; 213+ messages in thread
From: Lu, Wenzhuo @ 2019-03-19 3:28 UTC (permalink / raw)
To: Zhang, Qi Z, Yang, Qiming; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
Hi,
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Monday, March 11, 2019 3:04 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH v3 00/38] ice share code update.
>
> Sync to latest kernel driver, main changes:
> 1. add DCB/FDIR support.
> 2. add more APIs in switch module.
> 3. code clean and bug fix.
>
> v3:
> - fix software queue handle parsing in ice_ena_vsi_txq and
> ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
> fail during device reconfigure.
> - Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
> cause IPv4 TCP RSS does not work at some situation.
>
> v2:
> - Enhanced the commit log
> - Add missing fixed line.
>
> Qi Zhang (38):
> net/ice/base: add switch resource allocation and free
> net/ice/base: improve comments
> net/ice/base: add two helper functions
> net/ice/base: add helper macros
> net/ice/base: allow package copy to be used after resets
> net/ice/base: code clean
> net/ice/base: declare functions as external
> net/ice/base: add more APIs in switch module
> net/ice/base: add VSI queue context framework
> net/ice/base: add APIs to add remove ethertype filter
> net/ice/base: add APIs to get allocated resources
> net/ice/base: add APIs to alloc/free resource counter
> net/ice/base: add APIs to get VSI promiscuous mode
> net/ice/base: add MAC filter with marker and counter
> net/ice/base: add two helper functions for flow management
> net/ice/base: minor fix
> net/ice/base: update macros
> net/ice/base: code clean
> net/ice/base: enable VSI queue context
> net/ice/base: ensure only valid bits are set
> net/ice/base: enhance get link status command
> net/ice/base: add RSS key related macro and structures
> net/ice/base: do not write TCAM entries back
> net/ice/base: remove local VSIG allocations
> net/ice/base: minor fix
> net/ice/base: update copyright time
> net/ice/base: fix static analysis reported issues
> net/ice/base: return config error without queue to disable
> net/ice/base: add function to check FW recovery mode
> net/ice/base: change profile id reference counting
> net/ice/base: add DCB support
> net/ice/base: add FDIR support
> net/ice/base: change profile priority for RSS reply
> net/ice/base: fix duplicate resource allocations
> net/ice/base: minor fix
> net/ice/base: increase prototol offset size
> net/ice/base: revert the workaround for resource allocation
> net/ice/base: fix set UDP PTYPEs
>
> drivers/net/ice/Makefile | 2 +
> drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
> drivers/net/ice/base/ice_alloc.h | 2 +-
> drivers/net/ice/base/ice_common.c | 650 ++++++--
> drivers/net/ice/base/ice_common.h | 36 +-
> drivers/net/ice/base/ice_controlq.c | 10 +-
> drivers/net/ice/base/ice_controlq.h | 2 +-
> drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
> drivers/net/ice/base/ice_dcb.h | 223 +++
> drivers/net/ice/base/ice_devids.h | 2 +-
> drivers/net/ice/base/ice_fdir.c | 742 +++++++++
> drivers/net/ice/base/ice_fdir.h | 202 +++
> drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
> drivers/net/ice/base/ice_flex_pipe.h | 4 +-
> drivers/net/ice/base/ice_flex_type.h | 19 +-
> drivers/net/ice/base/ice_flow.c | 228 +--
> drivers/net/ice/base/ice_flow.h | 22 +-
> drivers/net/ice/base/ice_hw_autogen.h | 2 +-
> drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
> drivers/net/ice/base/ice_nvm.c | 17 +-
> drivers/net/ice/base/ice_osdep.h | 16 +
> drivers/net/ice/base/ice_protocol_type.h | 8 +-
> drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
> drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
> drivers/net/ice/base/ice_sched.h | 34 +-
> drivers/net/ice/base/ice_status.h | 3 +-
> drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
> drivers/net/ice/base/ice_switch.h | 109 +-
> drivers/net/ice/base/ice_type.h | 119 +-
> drivers/net/ice/base/meson.build | 2 +
> drivers/net/ice/ice_rxtx.c | 13 +-
> 31 files changed, 7114 insertions(+), 2365 deletions(-) create mode 100644
> drivers/net/ice/base/ice_dcb.c create mode 100644
> drivers/net/ice/base/ice_dcb.h create mode 100644
> drivers/net/ice/base/ice_fdir.c create mode 100644
> drivers/net/ice/base/ice_fdir.h
>
> --
> 2.13.6
Series-Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
` (38 preceding siblings ...)
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
` (39 more replies)
39 siblings, 40 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Sync to latest kernel driver, main changes:
1. add DCB/FDIR support.
2. add more APIs in switch module.
3. code clean and bug fix.
v4:
- revert the fix for UDP PTYPE setup (PATCH 38/38 on v3) since its invalid.
- move bit ops to dedicate file and remove the 64 bit limitation of bitmap.
- improved commit log.
v3:
- fix software queue handle parsing in ice_ena_vsi_txq and
ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
fail during device reconfigure.
- Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
cause IPv4 TCP RSS does not work at some situation.
v2:
- Enhanced the commit log
- Add missing fixed line.
Qi Zhang (38):
net/ice/base: add switch resource allocation and free
net/ice/base: improve comments
net/ice/base: add two helper functions
net/ice/base: add helper macros
net/ice/base: allow package copy to be used after resets
net/ice/base: clean code
net/ice/base: declare functions as external
net/ice/base: add more APIs in switch module
net/ice/base: add VSI queue context framework
net/ice/base: add APIs to add remove ethertype filter
net/ice/base: add APIs to get allocated resources
net/ice/base: add APIs to alloc/free resource counter
net/ice/base: add APIs to get VSI promiscuous mode
net/ice/base: add MAC filter with marker and counter
net/ice/base: add two helper functions for flow management
net/ice/base: fix minor issues
net/ice/base: update macros
net/ice/base: clean code
net/ice/base: enable VSI queue context
net/ice/base: ensure only valid bits are set
net/ice/base: enhance get link status command
net/ice/base: add RSS key related macro and structures
net/ice/base: do not write TCAM entries back
net/ice/base: remove local VSIG allocations
net/ice/base: fix minor issues
net/ice/base: update copyright time
net/ice/base: fix Klockwork analysis reported issues
net/ice/base: return config error without queue to disable
net/ice/base: add function to check FW recovery mode
net/ice/base: change profile id reference counting
net/ice/base: add DCB support
net/ice/base: add FDIR support
net/ice/base: change profile priority for RSS reply
net/ice/base: fix duplicate resource allocations
net/ice/base: fix minor issues
net/ice/base: increase prototol offset size
net/ice/base: revert the workaround for resource allocation
net/ice/base: rework on bit ops
drivers/net/ice/Makefile | 2 +
drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_bitops.h | 361 +++++
drivers/net/ice/base/ice_common.c | 650 ++++++--
drivers/net/ice/base/ice_common.h | 36 +-
drivers/net/ice/base/ice_controlq.c | 10 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 +++
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_fdir.c | 742 +++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++
drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
drivers/net/ice/base/ice_flex_pipe.h | 4 +-
drivers/net/ice/base/ice_flex_type.h | 19 +-
drivers/net/ice/base/ice_flow.c | 224 +--
drivers/net/ice/base/ice_flow.h | 22 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
drivers/net/ice/base/ice_nvm.c | 17 +-
drivers/net/ice/base/ice_osdep.h | 184 +--
drivers/net/ice/base/ice_protocol_type.h | 8 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 34 +-
drivers/net/ice/base/ice_status.h | 3 +-
drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
drivers/net/ice/base/ice_switch.h | 109 +-
drivers/net/ice/base/ice_type.h | 120 +-
drivers/net/ice/base/meson.build | 2 +
drivers/net/ice/ice_rxtx.c | 13 +-
32 files changed, 7474 insertions(+), 2531 deletions(-)
create mode 100644 drivers/net/ice/base/ice_bitops.h
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
` (38 subsequent siblings)
39 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Sync to latest kernel driver, main changes:
1. add DCB/FDIR support.
2. add more APIs in switch module.
3. code clean and bug fix.
v4:
- revert the fix for UDP PTYPE setup (PATCH 38/38 on v3) since its invalid.
- move bit ops to dedicate file and remove the 64 bit limitation of bitmap.
- improved commit log.
v3:
- fix software queue handle parsing in ice_ena_vsi_txq and
ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
fail during device reconfigure.
- Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
cause IPv4 TCP RSS does not work at some situation.
v2:
- Enhanced the commit log
- Add missing fixed line.
Qi Zhang (38):
net/ice/base: add switch resource allocation and free
net/ice/base: improve comments
net/ice/base: add two helper functions
net/ice/base: add helper macros
net/ice/base: allow package copy to be used after resets
net/ice/base: clean code
net/ice/base: declare functions as external
net/ice/base: add more APIs in switch module
net/ice/base: add VSI queue context framework
net/ice/base: add APIs to add remove ethertype filter
net/ice/base: add APIs to get allocated resources
net/ice/base: add APIs to alloc/free resource counter
net/ice/base: add APIs to get VSI promiscuous mode
net/ice/base: add MAC filter with marker and counter
net/ice/base: add two helper functions for flow management
net/ice/base: fix minor issues
net/ice/base: update macros
net/ice/base: clean code
net/ice/base: enable VSI queue context
net/ice/base: ensure only valid bits are set
net/ice/base: enhance get link status command
net/ice/base: add RSS key related macro and structures
net/ice/base: do not write TCAM entries back
net/ice/base: remove local VSIG allocations
net/ice/base: fix minor issues
net/ice/base: update copyright time
net/ice/base: fix Klockwork analysis reported issues
net/ice/base: return config error without queue to disable
net/ice/base: add function to check FW recovery mode
net/ice/base: change profile id reference counting
net/ice/base: add DCB support
net/ice/base: add FDIR support
net/ice/base: change profile priority for RSS reply
net/ice/base: fix duplicate resource allocations
net/ice/base: fix minor issues
net/ice/base: increase prototol offset size
net/ice/base: revert the workaround for resource allocation
net/ice/base: rework on bit ops
drivers/net/ice/Makefile | 2 +
drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_bitops.h | 361 +++++
drivers/net/ice/base/ice_common.c | 650 ++++++--
drivers/net/ice/base/ice_common.h | 36 +-
drivers/net/ice/base/ice_controlq.c | 10 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 +++
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_fdir.c | 742 +++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++
drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
drivers/net/ice/base/ice_flex_pipe.h | 4 +-
drivers/net/ice/base/ice_flex_type.h | 19 +-
drivers/net/ice/base/ice_flow.c | 224 +--
drivers/net/ice/base/ice_flow.h | 22 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
drivers/net/ice/base/ice_nvm.c | 17 +-
drivers/net/ice/base/ice_osdep.h | 184 +--
drivers/net/ice/base/ice_protocol_type.h | 8 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2563 +++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 34 +-
drivers/net/ice/base/ice_status.h | 3 +-
drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
drivers/net/ice/base/ice_switch.h | 109 +-
drivers/net/ice/base/ice_type.h | 120 +-
drivers/net/ice/base/meson.build | 2 +
drivers/net/ice/ice_rxtx.c | 13 +-
32 files changed, 7474 insertions(+), 2531 deletions(-)
create mode 100644 drivers/net/ice/base/ice_bitops.h
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 01/38] net/ice/base: add switch resource allocation and free
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
2019-03-25 5:44 ` Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 02/38] net/ice/base: improve comments Qi Zhang
` (37 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two APIs ice_alloc_sw and ice_free_sw to support
switch related resource allocation and free.
These APIs are required when we enable switch flow.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 150 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 ++
2 files changed, 155 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 0379cd045..a7b712e17 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
}
+/**
+ * ice_alloc_sw - allocate resources specific to switch
+ * @hw: pointer to the HW struct
+ * @ena_stats: true to turn on VEB stats
+ * @shared_res: true for shared resource, false for dedicated resource
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * allocates switch resources (SWID and VEB counter) (0x0208)
+ */
+enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ struct ice_aqc_res_elem *sw_ele;
+ enum ice_status status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer for switch ID.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is allocated, and hence a single sw_id
+ * is requested.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |
+ (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+
+ if (status)
+ goto ice_alloc_sw_exit;
+
+ sw_ele = &sw_buf->elem[0];
+ *sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);
+
+ if (ena_stats) {
+ /* Prepare buffer for VEB Counter */
+ enum ice_adminq_opc opc = ice_aqc_opc_alloc_res;
+ struct ice_aqc_alloc_free_res_elem *counter_buf;
+ struct ice_aqc_res_elem *counter_ele;
+
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ status = ICE_ERR_NO_MEMORY;
+ goto ice_alloc_sw_exit;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since
+ * only a single switch/VEB instance is allocated, and hence a
+ * single VEB counter is requested.
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED);
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ opc, NULL);
+
+ if (status) {
+ ice_free(hw, counter_buf);
+ goto ice_alloc_sw_exit;
+ }
+ counter_ele = &counter_buf->elem[0];
+ *counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);
+ ice_free(hw, counter_buf);
+ }
+
+ice_alloc_sw_exit:
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_free_sw - free resources specific to switch
+ * @hw: pointer to the HW struct
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * free switch resources (SWID and VEB counter) (0x0209)
+ *
+ * NOTE: This function frees multiple resources. It continues
+ * releasing other resources even after it encounters error.
+ * The error code returned is the last error it encountered.
+ */
+enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
+ enum ice_status status, ret_status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer to free for switch ID res.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single sw_id
+ * is released.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);
+ sw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);
+
+ ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+
+ if (ret_status)
+ ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
+
+ /* Prepare buffer to free for VEB Counter resource */
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ ice_free(hw, sw_buf);
+ return ICE_ERR_NO_MEMORY;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single VEB counter
+ * is released
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);
+ counter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status) {
+ ice_debug(hw, ICE_DBG_SW,
+ "VEB counter resource could not be freed\n");
+ ret_status = status;
+ }
+
+ ice_free(hw, counter_buf);
+ ice_free(hw, sw_buf);
+ return ret_status;
+}
/**
* ice_aq_add_vsi
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 66a172fc2..dd21781f7 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id);
+enum ice_status
+ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 01/38] net/ice/base: add switch resource allocation and free
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two APIs ice_alloc_sw and ice_free_sw to support
switch related resource allocation and free.
These APIs are required when we enable switch flow.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 150 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 ++
2 files changed, 155 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 0379cd045..a7b712e17 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
}
+/**
+ * ice_alloc_sw - allocate resources specific to switch
+ * @hw: pointer to the HW struct
+ * @ena_stats: true to turn on VEB stats
+ * @shared_res: true for shared resource, false for dedicated resource
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * allocates switch resources (SWID and VEB counter) (0x0208)
+ */
+enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ struct ice_aqc_res_elem *sw_ele;
+ enum ice_status status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer for switch ID.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is allocated, and hence a single sw_id
+ * is requested.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |
+ (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+
+ if (status)
+ goto ice_alloc_sw_exit;
+
+ sw_ele = &sw_buf->elem[0];
+ *sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);
+
+ if (ena_stats) {
+ /* Prepare buffer for VEB Counter */
+ enum ice_adminq_opc opc = ice_aqc_opc_alloc_res;
+ struct ice_aqc_alloc_free_res_elem *counter_buf;
+ struct ice_aqc_res_elem *counter_ele;
+
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ status = ICE_ERR_NO_MEMORY;
+ goto ice_alloc_sw_exit;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since
+ * only a single switch/VEB instance is allocated, and hence a
+ * single VEB counter is requested.
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type =
+ CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED);
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ opc, NULL);
+
+ if (status) {
+ ice_free(hw, counter_buf);
+ goto ice_alloc_sw_exit;
+ }
+ counter_ele = &counter_buf->elem[0];
+ *counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);
+ ice_free(hw, counter_buf);
+ }
+
+ice_alloc_sw_exit:
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_free_sw - free resources specific to switch
+ * @hw: pointer to the HW struct
+ * @sw_id: switch ID returned
+ * @counter_id: VEB counter ID returned
+ *
+ * free switch resources (SWID and VEB counter) (0x0209)
+ *
+ * NOTE: This function frees multiple resources. It continues
+ * releasing other resources even after it encounters error.
+ * The error code returned is the last error it encountered.
+ */
+enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
+ enum ice_status status, ret_status;
+ u16 buf_len;
+
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ /* Prepare buffer to free for switch ID res.
+ * The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single sw_id
+ * is released.
+ */
+ sw_buf->num_elems = CPU_TO_LE16(1);
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);
+ sw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);
+
+ ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+
+ if (ret_status)
+ ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
+
+ /* Prepare buffer to free for VEB Counter resource */
+ counter_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!counter_buf) {
+ ice_free(hw, sw_buf);
+ return ICE_ERR_NO_MEMORY;
+ }
+
+ /* The number of resource entries in buffer is passed as 1 since only a
+ * single switch/VEB instance is freed, and hence a single VEB counter
+ * is released
+ */
+ counter_buf->num_elems = CPU_TO_LE16(1);
+ counter_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);
+ counter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+
+ status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status) {
+ ice_debug(hw, ICE_DBG_SW,
+ "VEB counter resource could not be freed\n");
+ ret_status = status;
+ }
+
+ ice_free(hw, counter_buf);
+ ice_free(hw, sw_buf);
+ return ret_status;
+}
/**
* ice_aq_add_vsi
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 66a172fc2..dd21781f7 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
enum ice_status
+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
+ u16 *counter_id);
+enum ice_status
+ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 02/38] net/ice/base: improve comments
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 03/38] net/ice/base: add two helper functions Qi Zhang
` (36 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Improve comments to follow naming rules.
Also the patch include some minor cleanup.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 27 +-
drivers/net/ice/base/ice_common.c | 148 +++----
drivers/net/ice/base/ice_common.h | 4 +-
drivers/net/ice/base/ice_controlq.c | 8 +-
drivers/net/ice/base/ice_flex_pipe.c | 364 ++++++++--------
drivers/net/ice/base/ice_flex_pipe.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 4 +-
drivers/net/ice/base/ice_flow.c | 65 +--
drivers/net/ice/base/ice_flow.h | 1 -
drivers/net/ice/base/ice_lan_tx_rx.h | 70 +--
drivers/net/ice/base/ice_nvm.c | 8 +-
drivers/net/ice/base/ice_protocol_type.h | 4 +-
drivers/net/ice/base/ice_sched.c | 719 ++++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 8 +-
drivers/net/ice/base/ice_switch.c | 120 +++---
drivers/net/ice/base/ice_switch.h | 20 +-
drivers/net/ice/base/ice_type.h | 34 +-
17 files changed, 804 insertions(+), 802 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a1b9edd14..5a599280e 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -71,7 +71,7 @@ struct ice_aqc_req_res {
#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000
#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000
#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000
- /* For SDP: pin id of the SDP */
+ /* For SDP: pin ID of the SDP */
__le32 res_number;
/* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */
__le16 status;
@@ -854,7 +854,6 @@ struct ice_aqc_delete_elem {
-
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
* Query RL profile (indirect 0x0411)
@@ -1154,8 +1153,8 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
-#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
-#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
+#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
+#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
#define ICE_AQ_PHY_ENA_LINK BIT(3)
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
@@ -1228,7 +1227,7 @@ struct ice_aqc_get_link_status_data {
u8 ext_info;
#define ICE_AQ_LINK_PHY_TEMP_ALARM BIT(0)
#define ICE_AQ_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
- /* Port TX Suspended */
+ /* Port Tx Suspended */
#define ICE_AQ_LINK_TX_S 2
#define ICE_AQ_LINK_TX_M (0x03 << ICE_AQ_LINK_TX_S)
#define ICE_AQ_LINK_TX_ACTIVE 0
@@ -1441,7 +1440,7 @@ struct ice_aqc_get_set_rss_lut {
-/* Add TX LAN Queues (indirect 0x0C30) */
+/* Add Tx LAN Queues (indirect 0x0C30) */
struct ice_aqc_add_txqs {
u8 num_qgrps;
u8 reserved[3];
@@ -1451,7 +1450,7 @@ struct ice_aqc_add_txqs {
};
-/* This is the descriptor of each queue entry for the Add TX LAN Queues
+/* This is the descriptor of each queue entry for the Add Tx LAN Queues
* command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp.
*/
struct ice_aqc_add_txqs_perq {
@@ -1464,7 +1463,7 @@ struct ice_aqc_add_txqs_perq {
};
-/* The format of the command buffer for Add TX LAN Queues (0x0C30)
+/* The format of the command buffer for Add Tx LAN Queues (0x0C30)
* is an array of the following structs. Please note that the length of
* each struct ice_aqc_add_tx_qgrp is variable due
* to the variable number of queues in each group!
@@ -1477,7 +1476,7 @@ struct ice_aqc_add_tx_qgrp {
};
-/* Disable TX LAN Queues (indirect 0x0C31) */
+/* Disable Tx LAN Queues (indirect 0x0C31) */
struct ice_aqc_dis_txqs {
u8 cmd_type;
#define ICE_AQC_Q_DIS_CMD_S 0
@@ -1500,7 +1499,7 @@ struct ice_aqc_dis_txqs {
};
-/* The buffer for Disable TX LAN Queues (indirect 0x0C31)
+/* The buffer for Disable Tx LAN Queues (indirect 0x0C31)
* contains the following structures, arrayed one after the
* other.
* Note: Since the q_id is 16 bits wide, if the
@@ -1528,7 +1527,7 @@ struct ice_aqc_dis_txq {
};
-/* TX LAN Queues Cleanup Event (0x0C31) */
+/* Tx LAN Queues Cleanup Event (0x0C31) */
struct ice_aqc_txqs_cleanup {
__le16 caller_opc;
__le16 cmd_tag;
@@ -1536,7 +1535,7 @@ struct ice_aqc_txqs_cleanup {
};
-/* Move / Reconfigure TX Queues (indirect 0x0C32) */
+/* Move / Reconfigure Tx Queues (indirect 0x0C32) */
struct ice_aqc_move_txqs {
u8 cmd_type;
#define ICE_AQC_Q_CMD_TYPE_S 0
@@ -1557,7 +1556,7 @@ struct ice_aqc_move_txqs {
};
-/* This is the descriptor of each queue entry for the move TX LAN Queues
+/* This is the descriptor of each queue entry for the move Tx LAN Queues
* command (0x0C32).
*/
struct ice_aqc_move_txqs_elem {
@@ -1950,7 +1949,7 @@ enum ice_adminq_opc {
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
- /* TX queue handling commands/events */
+ /* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
ice_aqc_opc_dis_txqs = 0x0C31,
ice_aqc_opc_txqs_cleanup = 0x0C31,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 145f66a90..bcfa3014b 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -36,7 +36,7 @@
* @hw: pointer to the HW structure
*
* This function sets the MAC type of the adapter based on the
- * vendor ID and device ID stored in the hw structure.
+ * vendor ID and device ID stored in the HW structure.
*/
static enum ice_status ice_set_mac_type(struct ice_hw *hw)
{
@@ -79,7 +79,7 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
/**
* ice_aq_manage_mac_read - manage MAC address read command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the manage MAC read response
* @buf_size: Size of the virtual buffer
* @cd: pointer to command details structure or NULL
@@ -338,7 +338,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
/* flag cleared so calling functions don't call AQ again */
pi->phy.get_link_info = false;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -426,7 +426,7 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -446,7 +446,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -503,7 +503,7 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cfg_fw_log - configure FW logging
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @enable: enable certain FW logging events if true, disable all if false
*
* This function enables/disables the FW logging via Rx CQ events and a UART
@@ -652,7 +652,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
/**
* ice_output_fw_log
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: pointer to the AQ message descriptor
* @buf: pointer to the buffer accompanying the AQ message
*
@@ -668,7 +668,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
/**
* ice_get_itr_intrl_gran - determine int/intrl granularity
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
@@ -763,7 +763,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
goto err_unroll_cqinit;
}
- /* set the back pointer to hw */
+ /* set the back pointer to HW */
hw->port_info->hw = hw;
/* Initialize port_info struct with switch configuration data */
@@ -1034,7 +1034,7 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
* @ice_rxq_ctx: pointer to the rxq context
* @rxq_index: the index of the Rx queue
*
- * Copies rxq context from dense structure to hw register space
+ * Copies rxq context from dense structure to HW register space
*/
static enum ice_status
ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
@@ -1047,7 +1047,7 @@ ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
if (rxq_index > QRX_CTRL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, QRX_CONTEXT(i, rxq_index),
*((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
@@ -1091,7 +1091,7 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = {
* @rxq_index: the index of the Rx queue
*
* Converts rxq context from sparse to dense structure and then writes
- * it to hw register space
+ * it to HW register space
*/
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -1109,7 +1109,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
* @hw: pointer to the hardware structure
* @rxq_index: the index of the Rx queue to clear
*
- * Clears rxq context in hw register space
+ * Clears rxq context in HW register space
*/
enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
{
@@ -1166,7 +1166,7 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {
* @ice_tx_cmpltnq_ctx: pointer to the Tx completion queue context
* @tx_cmpltnq_index: the index of the completion queue
*
- * Copies Tx completion q context from dense structure to hw register space
+ * Copies Tx completion queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
@@ -1180,7 +1180,7 @@ ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
if (tx_cmpltnq_index > GLTCLAN_CQ_CNTX0_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index),
*((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
@@ -1215,7 +1215,7 @@ static const struct ice_ctx_ele ice_tx_cmpltnq_ctx_info[] = {
* @tx_cmpltnq_index: the index of the completion queue
*
* Converts completion queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
@@ -1233,7 +1233,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_cmpltnq_index: the index of the completion queue to clear
*
- * Clears Tx completion queue context in hw register space
+ * Clears Tx completion queue context in HW register space
*/
enum ice_status
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
@@ -1256,7 +1256,7 @@ ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
* @ice_tx_drbell_q_ctx: pointer to the doorbell queue context
* @tx_drbell_q_index: the index of the doorbell queue
*
- * Copies doorbell q context from dense structure to hw register space
+ * Copies doorbell queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
@@ -1270,7 +1270,7 @@ ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
if (tx_drbell_q_index > QTX_COMM_DBLQ_DBELL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS; i++) {
wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index),
*((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
@@ -1306,7 +1306,7 @@ static const struct ice_ctx_ele ice_tx_drbell_q_ctx_info[] = {
* @tx_drbell_q_index: the index of the doorbell queue
*
* Converts doorbell queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
@@ -1324,7 +1324,7 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_drbell_q_index: the index of the doorbell queue to clear
*
- * Clears doorbell queue context in hw register space
+ * Clears doorbell queue context in HW register space
*/
enum ice_status
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
@@ -1394,7 +1394,7 @@ ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf, u16 buf_len)
/**
* ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: descriptor describing the command
* @buf: buffer to use for indirect commands (NULL for direct commands)
* @buf_size: size of buffer for indirect commands (0 for direct commands)
@@ -1411,7 +1411,7 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
/**
* ice_aq_get_fw_ver
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cd: pointer to command details structure or NULL
*
* Get the firmware version (0x0001) from the admin queue commands
@@ -1446,7 +1446,7 @@ enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
/**
* ice_aq_q_shutdown
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @unloading: is the driver unloading itself
*
* Tell the Firmware that we're shutting down the AdminQ and whether
@@ -1469,8 +1469,8 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
/**
* ice_aq_req_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @access: access type
* @sdp_number: resource number
* @timeout: the maximum time in ms that the driver may hold the resource
@@ -1557,8 +1557,8 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_aq_release_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @sdp_number: resource number
* @cd: pointer to command details structure or NULL
*
@@ -1586,7 +1586,7 @@ ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
/**
* ice_acquire_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
* @access: access type (read or write)
* @timeout: timeout in milliseconds
*
@@ -1650,7 +1650,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_release_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
*
* This function will release a resource using the proper Admin Command.
*/
@@ -1664,7 +1664,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
status = ice_aq_release_res(hw, res, 0, NULL);
/* there are some rare cases when trying to release the resource
- * results in an admin Q timeout, so handle them correctly
+ * results in an admin queue timeout, so handle them correctly
*/
while ((status == ICE_ERR_AQ_TIMEOUT) &&
(total_delay < hw->adminq.sq_cmd_timeout)) {
@@ -1676,7 +1676,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
/**
* ice_aq_alloc_free_res - command to allocate/free resources
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_entries: number of resource entries in buffer
* @buf: Indirect buffer to hold data parameters and response
* @buf_size: size of buffer for indirect commands
@@ -1714,7 +1714,7 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
/**
* ice_alloc_hw_res - allocate resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
* @sh: shared if true, dedicated if false
@@ -1751,8 +1751,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
}
/**
- * ice_free_hw_res - free allocated hw resource
- * @hw: pointer to the hw struct
+ * ice_free_hw_res - free allocated HW resource
+ * @hw: pointer to the HW struct
* @type: type of resource to free
* @num: number of resources
* @res: pointer to array that contains the resources to free
@@ -1786,7 +1786,7 @@ ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
/**
* ice_get_num_per_func - determine number of resources per PF
- * @hw: pointer to the hw structure
+ * @hw: pointer to the HW structure
* @max: value to be evenly split between each PF
*
* Determine the number of valid functions by going through the bitmap returned
@@ -1809,7 +1809,7 @@ static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)
/**
* ice_parse_caps - parse function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: pointer to a buffer containing function/device capability records
* @cap_count: number of capability records in the list
* @opc: type of capabilities list to parse
@@ -1929,7 +1929,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
/**
* ice_aq_discover_caps - query function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the capabilities
* @buf_size: Size of the virtual buffer
* @cap_count: cap count needed if AQ err==ENOMEM
@@ -2028,7 +2028,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
/**
* ice_aq_manage_mac_write - manage MAC address write command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address
* @flags: flags to control write behavior
* @cd: pointer to command details structure or NULL
@@ -2057,7 +2057,7 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
/**
* ice_aq_clear_pxe_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Tell the firmware that the driver is taking over from PXE (0x0110).
*/
@@ -2073,7 +2073,7 @@ static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw)
/**
* ice_clear_pxe_mode - clear pxe operations mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Make sure all PXE mode settings are cleared, including things
* like descriptor fetch/write-back mode.
@@ -2090,10 +2090,10 @@ void ice_clear_pxe_mode(struct ice_hw *hw)
* @phy_type_low: lower part of phy_type
* @phy_type_high: higher part of phy_type
*
- * This helper function will convert an entry in phy type structure
+ * This helper function will convert an entry in PHY type structure
* [phy_type_low, phy_type_high] to its corresponding link speed.
* Note: In the structure of [phy_type_low, phy_type_high], there should
- * be one bit set, as this function will convert one phy type to its
+ * be one bit set, as this function will convert one PHY type to its
* speed.
* If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
* If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
@@ -2263,7 +2263,7 @@ ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
/**
* ice_aq_set_phy_cfg
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @cfg: structure with PHY configuration data to be set
* @cd: pointer to command details structure or NULL
@@ -2372,7 +2372,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
if (!pcaps)
return ICE_ERR_NO_MEMORY;
- /* Get the current phy config */
+ /* Get the current PHY config */
status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
NULL);
if (status) {
@@ -2561,7 +2561,7 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
/**
* ice_aq_set_event_mask
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @port_num: port number of the physical function
* @mask: event mask to be set
* @cd: pointer to command details structure or NULL
@@ -2587,7 +2587,7 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
/**
* ice_aq_set_mac_loopback
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @ena_lpbk: Enable or Disable loopback
* @cd: pointer to command details structure or NULL
*
@@ -2775,7 +2775,7 @@ ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type,
/**
* __ice_aq_get_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_id: VSI FW index
* @key: pointer to key info struct
* @set: set true to set the key, false to get the key
@@ -2810,7 +2810,7 @@ ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
/**
* ice_aq_get_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @key: pointer to key info struct
*
@@ -2829,7 +2829,7 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
/**
* ice_aq_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @keys: pointer to key info struct
*
@@ -2916,8 +2916,8 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
* @num_qgrps: number of groups in the list
* @qg_list: the list of groups to disable
* @buf_size: the total size of the qg_list buffer in bytes
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* Disable LAN Tx queue (0x0C31)
@@ -2993,7 +2993,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",
vmvf_num, hw->adminq.sq_last_status);
else
- ice_debug(hw, ICE_DBG_SCHED, "disable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",
LE16_TO_CPU(qg_list[0].q_id[0]),
hw->adminq.sq_last_status);
}
@@ -3232,13 +3232,13 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @tc: tc number
+ * @tc: TC number
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
* @cd: pointer to command details structure or NULL
*
- * This function adds one lan q
+ * This function adds one LAN queue
*/
enum ice_status
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
@@ -3282,14 +3282,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* Bit 5-6.
* - Bit 7 is reserved.
* Without setting the generic section as valid in valid_sections, the
- * Admin Q command will fail with error code ICE_AQ_RC_EINVAL.
+ * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
*/
buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
- /* add the lan q */
+ /* add the LAN queue */
status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
if (status != ICE_SUCCESS) {
- ice_debug(hw, ICE_DBG_SCHED, "enable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n",
LE16_TO_CPU(buf->txqs[0].txq_id),
hw->adminq.sq_last_status);
goto ena_txq_exit;
@@ -3298,7 +3298,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
- /* add a leaf node into schduler tree q layer */
+ /* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
ena_txq_exit:
@@ -3312,8 +3312,8 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* @num_queues: number of queues
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* This function removes queues and their corresponding nodes in SW DB
@@ -3363,12 +3363,12 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
}
/**
- * ice_cfg_vsi_qs - configure the new/exisiting VSI queues
+ * ice_cfg_vsi_qs - configure the new/existing VSI queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
* @maxqs: max queues array per TC
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
* This function adds/updates the VSI queues per TC.
*/
@@ -3403,13 +3403,13 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
}
/**
- * ice_cfg_vsi_lan - configure VSI lan queues
+ * ice_cfg_vsi_lan - configure VSI LAN queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
- * @max_lanqs: max lan queues array per TC
+ * @max_lanqs: max LAN queues array per TC
*
- * This function adds/updates the VSI lan queues per TC.
+ * This function adds/updates the VSI LAN queues per TC.
*/
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
@@ -3423,7 +3423,7 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
/**
* ice_replay_pre_init - replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Initializes required config data for VSI, FD, ACL, and RSS before replay.
*/
@@ -3447,9 +3447,9 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
}
/**
- * ice_replay_vsi - replay vsi configuration
- * @hw: pointer to the hw struct
- * @vsi_handle: driver vsi handle
+ * ice_replay_vsi - replay VSI configuration
+ * @hw: pointer to the HW struct
+ * @vsi_handle: driver VSI handle
*
* Restore all VSI configuration after reset. It is required to call this
* function with main VSI first.
@@ -3477,7 +3477,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_post - post replay configuration cleanup
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Post replay cleanup.
*/
@@ -3553,9 +3553,9 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
/**
- * ice_sched_query_elem - query element information from hw
- * @hw: pointer to the hw struct
- * @node_teid: node teid to be queried
+ * ice_sched_query_elem - query element information from HW
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID to be queried
* @buf: buffer to element information
*
* This function queries HW element information
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 5ac991ef2..f2ad86182 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -61,8 +61,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw);
* ... the value of pointer would equal 0x1008, since 0x1008 is the next
* address after 0x1006 which is divisible by 4.
*/
-#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
-
+#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -149,7 +148,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
-
enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index cbc4cb4c2..1c0830cec 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -54,7 +54,7 @@ static void ice_mailbox_init_regs(struct ice_hw *hw)
/**
* ice_check_sq_alive
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if Queue is enabled else false.
@@ -729,7 +729,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_done - check if FW has processed the Admin Send Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if the firmware has processed all descriptors on the
@@ -745,7 +745,7 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_send_cmd - send command to Control Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @desc: prefilled descriptor describing the command (non DMA mem)
* @buf: buffer to use for indirect commands (or NULL for direct commands)
@@ -990,7 +990,7 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
/**
* ice_clean_rq_elem
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @e: event info from the receive descriptor, includes any buffers
* @pending: number of events that could be left to process
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 493bc4e9b..c87424601 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -325,11 +325,11 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
* ice_boost_tcam_handler
* @sect_type: section type
* @section: pointer to section
- * @index: index of the boost tcam entry to be returned
- * @offset: pointer to receive absolute offset, always 0 for boost tcam sections
+ * @index: index of the boost TCAM entry to be returned
+ * @offset: pointer to receive absolute offset, always 0 for boost TCAM sections
*
* This is a callback function that can be passed to ice_pkg_enum_entry.
- * Handles enumeration of individual boost tcam entries.
+ * Handles enumeration of individual boost TCAM entries.
*/
static void *
ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
@@ -501,7 +501,7 @@ void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
label_name = ice_enum_labels(NULL, 0, &state, &val);
}
- /* Cache the appropriate boost tcam entry pointers */
+ /* Cache the appropriate boost TCAM entry pointers */
for (i = 0; i < hw->tnl.count; i++) {
ice_find_boost_entry(ice_seg, hw->tnl.tbl[i].boost_addr,
&hw->tnl.tbl[i].boost_entry);
@@ -1078,7 +1078,7 @@ enum ice_status ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg)
* @hw: pointer to the hardware structure
* @pkg_hdr: pointer to the driver's package hdr
*
- * Saves off the package details into the hw structure.
+ * Saves off the package details into the HW structure.
*/
enum ice_status
ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
@@ -1468,14 +1468,14 @@ ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
/**
* ice_get_sw_fv_list
* @hw: pointer to the HW structure
- * @prot_ids: field vector to search for with a given protocol id
+ * @prot_ids: field vector to search for with a given protocol ID
* @ids_cnt: lookup/protocol count
* @fv_list: Head of a list
*
* Finds all the field vector entries from switch block that contain
- * a given protocol id and returns a list of structures of type
+ * a given protocol ID and returns a list of structures of type
* "ice_sw_fv_list_entry". Every structure in the list has a field vector
- * definition and profile id information
+ * definition and profile ID information
* NOTE: The caller of the function is responsible for freeing the memory
* allocated for every list entry.
*/
@@ -1782,11 +1782,11 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
/* PTG Management */
/**
- * ice_ptg_update_xlt1 - Updates packet type groups in hw via xlt1 table
+ * ice_ptg_update_xlt1 - Updates packet type groups in HW via XLT1 table
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt1 hardware table to reflect the new
+ * This function will update the XLT1 hardware table to reflect the new
* packet type group configuration.
*/
enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
@@ -1817,7 +1817,7 @@ enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to search for
* @ptg: pointer to variable that receives the PTG
*
@@ -1838,7 +1838,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
/**
* ice_ptg_alloc_val - Allocates a new packet type group ID by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg to allocate
*
* This function allocates a given packet type group ID specified by the ptg
@@ -1853,7 +1853,7 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_alloc - Find a free entry and allocates a new packet type group ID
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function allocates and returns a new packet type group ID. Note
* that 0 is the default packet type group, so successfully created PTGs will
@@ -1877,7 +1877,7 @@ u8 ice_ptg_alloc(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_free - Frees a packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg ID to free
*
* This function frees a packet type group, and returns all the current ptypes
@@ -1902,7 +1902,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_remove_ptype - Removes ptype from a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to remove
* @ptg: the ptg to remove the ptype from
*
@@ -1947,7 +1947,7 @@ ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/**
* ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to add or move
* @ptg: the ptg to add or move the ptype to
*
@@ -1998,10 +1998,10 @@ ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/* Block / table size info */
struct ice_blk_size_details {
- u16 xlt1; /* # xlt1 entries */
- u16 xlt2; /* # xlt2 entries */
- u16 prof_tcam; /* # profile id tcam entries */
- u16 prof_id; /* # profile ids */
+ u16 xlt1; /* # XLT1 entries */
+ u16 xlt2; /* # XLT2 entries */
+ u16 prof_tcam; /* # profile ID TCAM entries */
+ u16 prof_id; /* # profile IDs */
u8 prof_cdid_bits; /* # cdid one-hot bits used in key */
u16 prof_redir; /* # profile redirection entries */
u16 es; /* # extraction sequence entries */
@@ -2079,7 +2079,7 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* profile cookies must compare, and in the exact same order to take
* into account priority
*/
- while (--count) {
+ while (count--) {
if (tmp2->profile_cookie != tmp1->profile_cookie)
return false;
@@ -2093,13 +2093,13 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* VSIG Management */
/**
- * ice_vsig_update_xlt2_sect - update one section of xlt2 table
+ * ice_vsig_update_xlt2_sect - update one section of XLT2 table
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: hw vsi number to program
- * @vsig: vsig for the vsi
+ * @blk: HW block
+ * @vsi: HW VSI number to program
+ * @vsig: vsig for the VSI
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration.
*/
static enum ice_status
@@ -2128,11 +2128,11 @@ ice_vsig_update_xlt2_sect(struct ice_hw *hw, enum ice_block blk, u16 vsi,
}
/**
- * ice_vsig_update_xlt2 - update xlt2 table with VSIG configuration
+ * ice_vsig_update_xlt2 - update XLT2 table with VSIG configuration
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration of used vsis.
*/
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
@@ -2158,14 +2158,14 @@ enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_vsig_find_vsi - find a VSIG that contains a specified vsi
+ * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi of interest
- * @vsig: pointer to receive the vsi group
+ * @blk: HW block
+ * @vsi: VSI of interest
+ * @vsig: pointer to receive the VSI group
*
- * This function will lookup the vsi entry in the XLT2 list and return
- * the vsi group its associated with.
+ * This function will lookup the VSI entry in the XLT2 list and return
+ * the VSI group its associated with.
*/
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
@@ -2174,7 +2174,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
return ICE_ERR_PARAM;
/* As long as there's a default or valid VSIG associated with the input
- * vsi, the functions returns a success. Any handling of VSIG will be
+ * VSI, the functions returns a success. Any handling of VSIG will be
* done by the following add, update or remove functions.
*/
*vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
@@ -2185,7 +2185,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
/**
* ice_vsig_alloc_val - allocate a new VSIG by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: the vsig to allocate
*
* This function will allocate a given VSIG specified by the vsig parameter.
@@ -2205,7 +2205,7 @@ static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
/**
* ice_vsig_alloc - Finds a free entry and allocates a new VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function will iterate through the VSIG list and mark the first
* unused entry for the new VSIG entry as used and return that value.
@@ -2222,16 +2222,16 @@ static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_find_dup_props_vsig - find vsi group with a specified set of properties
+ * ice_find_dup_props_vsig - find VSI group with a specified set of properties
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @chs: characteristic list
* @vsig: returns the VSIG with the matching profiles, if found
*
- * Each VSIG is associated with a characteristic set; i.e. all vsis under
+ * Each VSIG is associated with a characteristic set; i.e. all VSIs under
* a group have the same characteristic set. To check if there exists a VSIG
* which has the same characteristics as the input characteristics; this
- * function will iterate through the xlt2 list and return the VSIG that has a
+ * function will iterate through the XLT2 list and return the VSIG that has a
* matching configuration. In order to make sure that priorities are accounted
* for, the list must match exactly, including the order in which the
* characteristics are listed.
@@ -2257,12 +2257,12 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_vsig_free - free vsi group
+ * ice_vsig_free - free VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to remove
*
- * The function will remove all vsis associated with the input VSIG and move
+ * The function will remove all VSIs associated with the input VSIG and move
* them to the DEFAULT_VSIG and mark the VSIG available.
*/
enum ice_status
@@ -2310,14 +2310,14 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_vsig_add_mv_vsi - add or move a vsi to a vsi group
+ * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to move
- * @vsig: destination vsi group
+ * @blk: HW block
+ * @vsi: VSI to move
+ * @vsig: destination VSI group
*
- * This function will move or add the input vsi to the target VSIG.
- * The function will find the original VSIG the vsi belongs to and
+ * This function will move or add the input VSI to the target VSIG.
+ * The function will find the original VSIG the VSI belongs to and
* move the entry to the DEFAULT_VSIG, update the original VSIG and
* then move entry to the new VSIG.
*/
@@ -2358,7 +2358,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
- /* Create vsi entry and add VSIG and prop_mask values */
+ /* Create VSI entry and add VSIG and prop_mask values */
hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
hw->blk[blk].xlt2.vsis[vsi].changed = 1;
@@ -2373,13 +2373,13 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_vsig_remove_vsi - remove vsi from VSIG
+ * ice_vsig_remove_vsi - remove VSI from VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to remove
- * @vsig: vsi group to remove from
+ * @blk: HW block
+ * @vsi: VSI to remove
+ * @vsig: VSI group to remove from
*
- * The function will remove the input vsi from its vsi group and move it
+ * The function will remove the input VSI from its VSI group and move it
* to the DEFAULT_VSIG.
*/
enum ice_status
@@ -2396,7 +2396,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
return ICE_ERR_DOES_NOT_EXIST;
- /* entry already in default VSIG, dont have to remove */
+ /* entry already in default VSIG, don't have to remove */
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
@@ -2407,7 +2407,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
vsi_cur = (*vsi_head);
- /* iterate the vsi list, skip over the entry to be removed */
+ /* iterate the VSI list, skip over the entry to be removed */
while (vsi_cur) {
if (vsi_tgt == vsi_cur) {
(*vsi_head) = vsi_cur->next_vsi;
@@ -2417,7 +2417,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_cur = vsi_cur->next_vsi;
}
- /* verify if vsi was removed from group list */
+ /* verify if VSI was removed from group list */
if (!vsi_cur)
return ICE_ERR_DOES_NOT_EXIST;
@@ -2429,11 +2429,11 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_find_prof_id - find profile id for a given field vector
+ * ice_find_prof_id - find profile ID for a given field vector
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @fv: field vector to search for
- * @prof_id: receives the profile id
+ * @prof_id: receives the profile ID
*/
static enum ice_status
ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
@@ -2456,7 +2456,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_id_rsrc_type - get profile id resource type for a block type
+ * ice_prof_id_rsrc_type - get profile ID resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2485,7 +2485,7 @@ static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_tcam_ent_rsrc_type - get tcam entry resource type for a block type
+ * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2707,10 +2707,10 @@ ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
}
/**
- * ice_alloc_tcam_ent - allocate hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the tcam for
- * @tcam_idx: pointer to variable to receive the tcam entry
+ * ice_alloc_tcam_ent - allocate hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the TCAM for
+ * @tcam_idx: pointer to variable to receive the TCAM entry
*
* This function allocates a new entry in a Profile ID TCAM for a specific
* block.
@@ -2727,10 +2727,10 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
}
/**
- * ice_free_tcam_ent - free hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the tcam entry
- * @tcam_idx: the tcam entry to free
+ * ice_free_tcam_ent - free hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the TCAM entry
+ * @tcam_idx: the TCAM entry to free
*
* This function frees an entry in a Profile ID TCAM for a specific block.
*/
@@ -2746,12 +2746,12 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
}
/**
- * ice_alloc_prof_id - allocate profile id
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the profile id for
- * @prof_id: pointer to variable to receive the profile id
+ * ice_alloc_prof_id - allocate profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the profile ID for
+ * @prof_id: pointer to variable to receive the profile ID
*
- * This function allocates a new profile id, which also corresponds to a Field
+ * This function allocates a new profile ID, which also corresponds to a Field
* Vector (Extraction Sequence) entry.
*/
static enum ice_status
@@ -2772,12 +2772,12 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
}
/**
- * ice_free_prof_id - free profile id
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id to free
+ * ice_free_prof_id - free profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID to free
*
- * This function frees a profile id, which also corresponds to a Field Vector.
+ * This function frees a profile ID, which also corresponds to a Field Vector.
*/
static enum ice_status
ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2801,9 +2801,9 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_inc_ref - increment reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to increment the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to increment the reference count
*/
static enum ice_status
ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2818,9 +2818,9 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_dec_ref - decrement reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to decrement the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to decrement the reference count
*/
static enum ice_status
ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2838,9 +2838,9 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block in which to write the extraction sequence
- * @prof_id: the profile id to write
+ * @prof_id: the profile ID to write
* @fv: pointer to the extraction sequence to write
*/
static void
@@ -2921,7 +2921,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
u8 *src, *dst;
void *sect;
- /* if the hw segment pointer is null then the first iteration of
+ /* if the HW segment pointer is null then the first iteration of
* ice_pkg_enum_section() will fail. In this case the Hw tables will
* not be filled and return success.
*/
@@ -3072,7 +3072,7 @@ static void ice_free_flow_profs(struct ice_hw *hw)
/**
* ice_free_prof_map - frees the profile map
* @hw: pointer to the hardware structure
- * @blk: the hw block which contains the profile map to be freed
+ * @blk: the HW block which contains the profile map to be freed
*/
static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
{
@@ -3091,7 +3091,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
/**
* ice_free_vsig_tbl - free complete VSIG table entries
* @hw: pointer to the hardware structure
- * @blk: the hw block on which to free the VSIG table entries
+ * @blk: the HW block on which to free the VSIG table entries
*/
static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
{
@@ -3151,9 +3151,9 @@ static void ice_init_flow_profs(struct ice_hw *hw)
}
/**
- * ice_init_sw_xlt1_db - init software xlt1 database from hw tables
+ * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
@@ -3172,9 +3172,9 @@ void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_xlt2_db - init software xlt2 database from hw tables
+ * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
@@ -3197,7 +3197,7 @@ void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_db - init software database from hw tables
+ * ice_init_sw_db - init software database from HW tables
* @hw: pointer to the hardware structure
*/
static
@@ -3329,9 +3329,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
}
/**
- * ice_prof_gen_key - generate profile id key
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_prof_gen_key - generate profile ID key
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3339,7 +3339,7 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
* @vl_msk: valid mask
* @dc_msk: don't care mask
* @nm_msk: never match mask
- * @key: output of profile id key
+ * @key: output of profile ID key
*/
static enum ice_status
ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
@@ -3384,11 +3384,11 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
}
/**
- * ice_tcam_write_entry - write tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_tcam_write_entry - write TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @idx: the entry index to write to
- * @prof_id: profile id
+ * @prof_id: profile ID
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3418,9 +3418,9 @@ ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
}
/**
- * ice_vsig_get_ref - returns number of vsis belong to a VSIG
+ * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to query
* @refs: pointer to variable to receive the reference count
*/
@@ -3446,7 +3446,7 @@ ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
/**
* ice_get_ptg - get or allocate a ptg for a ptype
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to retrieve the PTG for
* @ptg: receives the PTG of the ptype
* @add: receive boolean indicating whether PTG was added or not
@@ -3483,7 +3483,7 @@ ice_get_ptg(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg,
/**
* ice_has_prof_vsig - check to see if VSIG has a specific profile
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to check against
* @hdl: profile handle
*/
@@ -3500,14 +3500,14 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
}
ice_debug(hw, ICE_DBG_INIT,
- "Characteristic list for vsi group %d not found.\n",
+ "Characteristic list for VSI group %d not found.\n",
vsig);
return false;
}
/**
- * ice_prof_bld_es - build profile id extraction sequence changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_es - build profile ID extraction sequence changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3546,8 +3546,8 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_tcam - build profile id tcam changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_tcam - build profile ID TCAM changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3586,7 +3586,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_xlt1 - build xlt1 changes
+ * ice_prof_bld_xlt1 - build XLT1 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3619,7 +3619,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
}
/**
- * ice_prof_bld_xlt2 - build xlt2 changes
+ * ice_prof_bld_xlt2 - build XLT2 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3662,7 +3662,7 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
/**
* ice_upd_prof_hw - update hardware using the change list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @chgs: the list of changes to make in hardware
*/
@@ -3763,16 +3763,16 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
/**
* ice_add_prof - add profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @id: profile tracking id
+ * @id: profile tracking ID
* @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
* @es: extraction sequence (length of array is determined by the block)
*
* This function registers a profile, which matches a set of PTYPES with a
* particular extraction sequence. While the hardware profile is allocated
* it will not be written until the first call to ice_add_flow that specifies
- * the id value used here.
+ * the ID value used here.
*/
enum ice_status
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
@@ -3787,7 +3787,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/* search for existing profile */
status = ice_find_prof_id(hw, blk, es, &prof_id);
if (status) {
- /* allocate profile id */
+ /* allocate profile ID */
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
@@ -3851,7 +3851,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/**
* ice_search_prof_id - Search for a profile tracking ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
@@ -3876,7 +3876,7 @@ ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_set_prof_context - Set context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: context
@@ -3895,7 +3895,7 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt)
/**
* ice_get_prof_context - Get context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: pointer to variable to receive the context
@@ -3914,7 +3914,7 @@ ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt)
/**
* ice_vsig_prof_id_count - count profiles in a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
*/
@@ -3933,8 +3933,8 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_rel_tcam_idx - release a tcam index
- * @hw: pointer to the hw struct
+ * ice_rel_tcam_idx - release a TCAM index
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @idx: the index to release
*/
@@ -3947,13 +3947,13 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
enum ice_status status;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
dc_msk, nm_msk);
if (status)
return status;
- /* release the tcam entry */
+ /* release the TCAM entry */
status = ice_free_tcam_ent(hw, blk, idx);
return status;
@@ -3961,7 +3961,7 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
/**
* ice_rem_prof_id - remove one profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
@@ -4007,7 +4007,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_vsig - remove VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to remove
* @chg: the change list
@@ -4069,7 +4069,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_prof_id_vsig - remove a specific profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @hdl: profile handle indicating which profile to remove
@@ -4105,7 +4105,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_rem_flow_all - remove all flows with a particular profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*/
@@ -4143,11 +4143,11 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_rem_prof - remove profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
- * This will remove the profile specified by the id parameter, which was
+ * This will remove the profile specified by the ID parameter, which was
* previously created through ice_add_prof. If any existing entries
* are associated with this profile, they will be removed as well.
*/
@@ -4177,7 +4177,7 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_get_prof_ptgs - get ptgs for profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: profile handle
* @chg: change list
@@ -4190,7 +4190,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4231,7 +4231,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
/**
* ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG from which to copy the list
* @lst: output list
@@ -4272,7 +4272,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_to_lst - add profile entry to a list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @lst: the list to be added to
* @hdl: profile handle of entry to add
@@ -4320,7 +4320,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
/**
* ice_move_vsi - move VSI to another VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the VSI to move
* @vsig: the VSIG to move the VSI to
@@ -4357,15 +4357,15 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
}
/**
- * ice_prof_tcam_ena_dis - add enable or disable tcam change
- * @hw: pointer to the hw struct
+ * ice_prof_tcam_ena_dis - add enable or disable TCAM change
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @enable: true to enable, false to disable
- * @vsig: the vsig of the tcam entry
- * @tcam: pointer the tcam info structure of the tcam to disable
+ * @vsig: the vsig of the TCAM entry
+ * @tcam: pointer the TCAM info structure of the TCAM to disable
* @chg: the change list
*
- * This function appends an enable or disable tcam entry in the change log
+ * This function appends an enable or disable TCAM entry in the change log
*/
static enum ice_status
ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
@@ -4418,7 +4418,7 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
/**
* ice_adj_prof_priorities - adjust profile based on priorities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG for which to adjust profile priorities
* @chg: the change list
@@ -4487,7 +4487,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_id_vsig - add profile to VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to which this profile is to be added
* @hdl: the profile handle indicating the profile to add
@@ -4506,7 +4506,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4524,7 +4524,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
t->prof_id = map->prof_id;
t->tcam_count = map->ptype_count;
- /* create tcam entries */
+ /* create TCAM entries */
for (i = 0; i < map->ptype_count; i++) {
enum ice_status status;
u16 tcam_idx;
@@ -4543,7 +4543,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (!p)
goto err_ice_add_prof_id_vsig;
- /* allocate the tcam entry index */
+ /* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
if (status)
goto err_ice_add_prof_id_vsig;
@@ -4560,7 +4560,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
p->vsig = vsig;
p->tcam_idx = t->tcam[i].tcam_idx;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
t->tcam[i].prof_id,
t->tcam[i].ptg, vsig, 0, 0,
@@ -4568,8 +4568,8 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many tcam entries
- * are using this hw profile id
+ /* this increments the reference count of how many TCAM entries
+ * are using this HW profile ID
*/
status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
@@ -4590,7 +4590,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_create_prof_id_vsig - add a new VSIG with a single profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @hdl: the profile handle of the profile that will be added to the VSIG
@@ -4632,7 +4632,7 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
/**
* ice_create_vsig_from_list - create a new VSIG with a list of profiles
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @lst: the list of profile that will be added to the VSIG
@@ -4666,7 +4666,7 @@ ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
/**
* ice_find_prof_vsig - find a VSIG with a specific profile handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: the profile handle of the profile to search for
* @vsig: returns the VSIG with the matching profile
@@ -4697,13 +4697,13 @@ ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
/**
* ice_add_prof_id_flow - add profile flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi to enable with the profile specified by id
+ * @vsi: the VSI to enable with the profile specified by ID
* @hdl: profile handle
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4725,7 +4725,7 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
return status;
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool only_vsi;
@@ -4805,10 +4805,10 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
}
} else {
/* need to find or add a VSIG */
- /* search for an exising VSIG with an exact charc match */
+ /* search for an existing VSIG with an exact charc match */
if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
@@ -4847,14 +4847,14 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_add_flow - add flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs to enable with the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs to enable with the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4875,7 +4875,7 @@ ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,
/**
* ice_rem_prof_from_list - remove a profile from list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lst: list to remove the profile from
* @hdl: the profile handle indicating the profile to remove
*/
@@ -4897,13 +4897,13 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
/**
* ice_rem_prof_id_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi from which to remove the profile specified by id
+ * @vsi: the VSI from which to remove the profile specified by ID
* @hdl: profile tracking handle
*
* Calling this function will update the hardware tables to remove the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be disabled.
*/
enum ice_status
@@ -4918,7 +4918,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
INIT_LIST_HEAD(©);
INIT_LIST_HEAD(&chg);
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool last_profile;
@@ -4979,7 +4979,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else if (ice_find_dup_props_vsig(hw, blk, ©,
&vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
* list
*/
@@ -4991,7 +4991,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else {
/* since no existing VSIG supports this
* characteristic pattern, we need to create a
- * new VSIG and tcam entries
+ * new VSIG and TCAM entries
*/
status = ice_create_vsig_from_lst(hw, blk, vsi,
©, &chg);
@@ -5029,14 +5029,14 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_rem_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs from which to remove the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs from which to remove the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* The function will remove flows from the specified VSIs that were enabled
- * using ice_add_flow. The id value will indicated which profile will be
+ * using ice_add_flow. The ID value will indicated which profile will be
* removed. Once successfully called, the flow will be disabled.
*/
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 81e89aeeb..23fffed75 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -59,7 +59,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg);
enum ice_status
ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg);
-/* XLT2/Vsi group functions */
+/* XLT2/VSI group functions */
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 9f98f4f2a..aed23a067 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -350,7 +350,7 @@ struct ice_sw_fv_list_entry {
};
#pragma pack(1)
-/* The BOOST tcam stores the match packet header in reverse order, meaning
+/* The BOOST TCAM stores the match packet header in reverse order, meaning
* the fields are reversed; in addition, this means that the normally big endian
* fields of the packet are now little endian.
*/
@@ -602,7 +602,7 @@ struct ice_xlt2 {
};
/* Extraction sequence - list of match fields:
- * protocol id, offset, profile length
+ * protocol ID, offset, profile length
*/
union ice_match_fld {
struct {
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index cc3f69b51..574c927c4 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -292,6 +292,9 @@ struct ice_flow_prof_params {
u16 entry_length; /* # of bytes formatted entry will require */
u8 es_cnt;
+ /* For ACL, the es[0] will have the data of ICE_RX_MDID_PKT_FLAGS_15_0
+ * This will give us the direction flags.
+ */
struct ice_fv_word es[ICE_MAX_FV_WORDS];
ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
@@ -494,7 +497,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
/**
* ice_flow_xtract_fld - Create an extraction sequence entry for the given field
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: packet segment index of the field to be extracted
* @fld: ID of field to be extracted
@@ -656,7 +659,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_xtract_raws - Create extract sequence entries for raw bytes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: index of packet segment whose raw fields are to be be extracted
*/
@@ -728,7 +731,7 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_create_xtrct_seq - Create an extraction sequence for given segments
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*
* This function iterates through all matched fields in the given segments, and
@@ -768,7 +771,7 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
/**
* ice_flow_proc_segs - process all packet segments associated with a profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*/
static enum ice_status
@@ -807,7 +810,7 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
/**
* ice_flow_find_prof_conds - Find a profile matching headers and conditions
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -852,7 +855,7 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_find_prof - Look up a profile matching headers and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -874,7 +877,7 @@ ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_find_prof_id - Look up a profile with given profile ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: unique ID to identify this flow profile
*/
@@ -893,7 +896,7 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
/**
* ice_flow_rem_entry_sync - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry: flow entry to be removed
*/
static enum ice_status
@@ -917,7 +920,7 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
/**
* ice_flow_add_prof_sync - Add a flow profile for packet segments and fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1057,7 +1060,7 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1089,7 +1092,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1115,7 +1118,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_add_prof - Add a flow profile for packet segments and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1160,7 +1163,7 @@ ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_rem_prof - Remove a flow profile and all entries associated with it
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block for which the flow profile is to be removed
* @prof_id: unique ID of the flow profile to be removed
*/
@@ -1188,11 +1191,11 @@ ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
}
/**
- * ice_flow_get_hw_prof - return the hw profile for a specific profile id handle
- * @hw: pointer to the hw struct
+ * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
+ * @hw: pointer to the HW struct
* @blk: classification stage
- * @prof_id: the profile id handle
- * @hw_prof_id: pointer to variable to receive the hw profile id
+ * @prof_id: the profile ID handle
+ * @hw_prof_id: pointer to variable to receive the HW profile ID
*/
enum ice_status
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
@@ -1211,7 +1214,7 @@ ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_find_entry - look for a flow entry using its unique ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @entry_id: unique ID to identify this flow entry
*
@@ -1249,7 +1252,7 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
/**
* ice_flow_add_entry - Add a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: ID of the profile to add a new flow entry to
* @entry_id: unique ID to identify this flow entry
@@ -1335,7 +1338,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_rem_entry - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry_h: handle to the flow entry to be removed
*/
enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h)
@@ -1712,12 +1715,12 @@ void ice_rem_all_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_rem_vsi_rss_cfg - remove RSS configurations associated with vsi
+ * ice_rem_vsi_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*
* This function will iterate through all flow profiles and disassociate
- * the vsi from that profile. If the flow profile has no vsis it will
+ * the VSI from that profile. If the flow profile has no VSIs it will
* be removed.
*/
enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
@@ -1847,7 +1850,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Search for a flow profile that has matching headers, hash fields
- * and has the input vsi associated to it. If found, no further
+ * and has the input VSI associated to it. If found, no further
* operations required and exit.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1858,8 +1861,8 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Check if a flow profile exists with the same protocol headers and
- * associated with the input vsi. If so disasscociate the vsi from
- * this profile. The vsi will be added to a new profile created with
+ * associated with the input VSI. If so disasscociate the VSI from
+ * this profile. The VSI will be added to a new profile created with
* the protocol header and new hash field configuration.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1871,7 +1874,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
else
goto exit;
- /* Remove profile if it has no vsis associated */
+ /* Remove profile if it has no VSIs associated */
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI)) {
status = ice_flow_rem_prof_sync(hw, blk, prof);
if (status)
@@ -1880,7 +1883,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/* Search for a profile that has same match fields only. If this
- * exists then associate the vsi to this profile.
+ * exists then associate the VSI to this profile.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
vsi_handle,
@@ -2003,7 +2006,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
*
* This function will lookup the flow profile based on the input
* hash field bitmap, iterate through the profile entry list of
- * that profile and find entry associated with input vsi to be
+ * that profile and find entry associated with input VSI to be
* removed. Calls are made to underlying flow apis which will in
* turn build or update buffers for RSS XLT1 section.
*/
@@ -2025,7 +2028,7 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/**
- * ice_replay_rss_cfg - remove RSS configurations associated with vsi
+ * ice_replay_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*/
@@ -2057,13 +2060,13 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
* @hdrs: protocol header type
*
* This function will return the match fields of the first instance of flow
- * profile having the given header types and containing input vsi
+ * profile having the given header types and containing input VSI
*/
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
{
struct ice_rss_cfg *r, *rss_cfg = NULL;
- /* verify if the protocol header is non zero and vsi is valid */
+ /* verify if the protocol header is non zero and VSI is valid */
if (hdrs == ICE_FLOW_SEG_HDR_NONE || !ice_is_vsi_valid(hw, vsi_handle))
return ICE_HASH_INVALID;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 51d7c3ac9..265e1ee3e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -227,7 +227,6 @@ struct ice_flow_entry {
u64 id;
u16 vsi_handle;
enum ice_flow_priority priority;
-
struct ice_flow_prof *prof;
/* Flow entry's content */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index d27045f7e..4a1ea0c7d 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -6,7 +6,7 @@
#define _ICE_LAN_TX_RX_H_
#include "ice_osdep.h"
-/* RX Descriptors */
+/* Rx Descriptors */
union ice_16byte_rx_desc {
struct {
__le64 pkt_addr; /* Packet buffer address */
@@ -20,7 +20,7 @@ union ice_16byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -46,7 +46,7 @@ union ice_32byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -181,15 +181,15 @@ enum ice_rx_desc_status_bits {
ICE_RX_DESC_STATUS_L2TAG1P_S = 2,
ICE_RX_DESC_STATUS_L3L4P_S = 3,
ICE_RX_DESC_STATUS_CRCP_S = 4,
- ICE_RX_DESC_STATUS_TSYNINDX_S = 5, /* 2 BITS */
+ ICE_RX_DESC_STATUS_TSYNINDX_S = 5,
ICE_RX_DESC_STATUS_TSYNVALID_S = 7,
ICE_RX_DESC_STATUS_EXT_UDP_0_S = 8,
- ICE_RX_DESC_STATUS_UMBCAST_S = 9, /* 2 BITS */
+ ICE_RX_DESC_STATUS_UMBCAST_S = 9,
ICE_RX_DESC_STATUS_FLM_S = 11,
- ICE_RX_DESC_STATUS_FLTSTAT_S = 12, /* 2 BITS */
+ ICE_RX_DESC_STATUS_FLTSTAT_S = 12,
ICE_RX_DESC_STATUS_LPBK_S = 14,
ICE_RX_DESC_STATUS_IPV6EXADD_S = 15,
- ICE_RX_DESC_STATUS_RESERVED2_S = 16, /* 2 BITS */
+ ICE_RX_DESC_STATUS_RESERVED2_S = 16,
ICE_RX_DESC_STATUS_INT_UDP_0_S = 18,
ICE_RX_DESC_STATUS_LAST /* this entry must be last!!! */
};
@@ -325,8 +325,8 @@ enum ice_rx_desc_ext_status_bits {
/* Note: These are predefined bit offsets */
ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0,
ICE_RX_DESC_EXT_STATUS_L2TAG3P_S = 1,
- ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2, /* 2 BITS */
- ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4, /* 2 BITS */
+ ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2,
+ ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4,
ICE_RX_DESC_EXT_STATUS_FDLONGB_S = 9,
ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11,
};
@@ -373,7 +373,7 @@ enum ice_rx_prog_status_desc_error_bits {
ICE_RX_PROG_STATUS_DESC_NO_FD_ENTRY_S = 1,
};
-/* RX Flex Descriptor
+/* Rx Flex Descriptor
* This descriptor is used instead of the legacy version descriptor when
* ice_rlan_ctx.adv_desc is set
*/
@@ -387,7 +387,7 @@ union ice_32b_rx_flex_desc {
} read;
struct {
/* Qword 0 */
- u8 rxdid; /* descriptor builder profile id */
+ u8 rxdid; /* descriptor builder profile ID */
u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */
__le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */
__le16 pkt_len; /* [15:14] are reserved */
@@ -422,12 +422,12 @@ union ice_32b_rx_flex_desc {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 2
+ * RxDID Profile ID 2
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Flow Id higher 16-bits
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Flow ID higher 16-bits
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic {
/* Qword 0 */
@@ -461,8 +461,8 @@ struct ice_32b_rx_flex_desc_nic {
};
/* Rx Flex Descriptor Switch Profile
- * RxDID Profile Id 3
- * Flex-field 0: Source Vsi
+ * RxDID Profile ID 3
+ * Flex-field 0: Source VSI
*/
struct ice_32b_rx_flex_desc_sw {
/* Qword 0 */
@@ -491,8 +491,8 @@ struct ice_32b_rx_flex_desc_sw {
};
/* Rx Flex Descriptor NIC VEB Profile
- * RxDID Profile Id 4
- * Flex-field 0: Destination Vsi
+ * RxDID Profile ID 4
+ * Flex-field 0: Destination VSI
*/
struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 0 */
@@ -505,8 +505,8 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 1 */
__le16 status_error0;
__le16 l2tag1;
- __le16 dst_vsi; /* [0:12]: destination vsi */
- /* 13: vsi valid bit */
+ __le16 dst_vsi; /* [0:12]: destination VSI */
+ /* 13: VSI valid bit */
/* [14:15] are reserved */
__le16 flex_field_1;
@@ -523,7 +523,7 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
};
/* Rx Flex Descriptor NIC ACL Profile
- * RxDID Profile Id 5
+ * RxDID Profile ID 5
* Flex-field 0: ACL Counter 0
* Flex-field 1: ACL Counter 1
* Flex-field 2: ACL Counter 2
@@ -556,12 +556,12 @@ struct ice_32b_rx_flex_desc_nic_acl_dbg {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 6
+ * RxDID Profile ID 6
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Source Vsi
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Source VSI
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic_2 {
/* Qword 0 */
@@ -818,7 +818,7 @@ enum ice_rlan_ctx_rx_hsplit_1 {
ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS = 2,
};
-/* TX Descriptor */
+/* Tx Descriptor */
struct ice_tx_desc {
__le64 buf_addr; /* Address of descriptor's data buf */
__le64 cmd_type_offset_bsz;
@@ -846,15 +846,15 @@ enum ice_tx_desc_cmd_bits {
ICE_TX_DESC_CMD_RSVD = 0x0004,
ICE_TX_DESC_CMD_IL2TAG1 = 0x0008,
ICE_TX_DESC_CMD_DUMMY = 0x0010,
- ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060, /* 2 BITS */
+ ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000,
+ ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020,
+ ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040,
+ ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060,
ICE_TX_DESC_CMD_RSVD2 = 0x0080,
- ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300, /* 2 BITS */
+ ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000,
+ ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100,
+ ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200,
+ ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300,
ICE_TX_DESC_CMD_RE = 0x0400,
ICE_TX_DESC_CMD_RSVD3 = 0x0800,
};
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 25a2ca4cb..92de2ec3b 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -7,7 +7,7 @@
/**
* ice_aq_read_nvm
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @module_typeid: module pointer location in words from the NVM beginning
* @offset: byte offset from the module beginning
* @length: length of the section to be read (in bytes from the offset)
@@ -248,7 +248,7 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
/**
* ice_init_nvm - initializes NVM setting
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function reads and populates NVM settings such as Shadow RAM size,
* max_timeout, and blank_nvm_mode
@@ -264,7 +264,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
ice_debug(hw, ICE_DBG_TRACE, "ice_init_nvm");
- /* The SR size is stored regardless of the nvm programming mode
+ /* The SR size is stored regardless of the NVM programming mode
* as the blank mode may be used in the factory line.
*/
gens_stat = rd32(hw, GLNVM_GENS);
@@ -357,7 +357,7 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
/**
* ice_nvm_validate_checksum
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Verify NVM PFA checksum validity (0x0706)
*/
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 7b92c7105..f96964d86 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -18,7 +18,7 @@
/* Max recipes that can be chained */
#define ICE_MAX_CHAIN_RECIPE 5
-/* 1 word reserved for switch id from allowed 5 words.
+/* 1 word reserved for switch ID from allowed 5 words.
* So a recipe can have max 4 words. And you can chain 5 such recipes
* together. So maximum words that can be programmed for look up is 5 * 4.
*/
@@ -128,7 +128,7 @@ enum ice_prot_id {
#define ICE_PROTOCOL_MAX_ENTRIES 16
-/* Mapping of software defined protocol id to hardware defined protocol id */
+/* Mapping of software defined protocol ID to hardware defined protocol ID */
struct ice_protocol_entry {
enum ice_protocol_type type;
u8 protocol_id;
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 7acbae62c..2edc305b5 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -45,9 +45,9 @@ ice_sched_add_root_node(struct ice_port_info *pi,
/**
* ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
* @start_node: pointer to the starting ice_sched_node struct in a sub-tree
- * @teid: node teid to search
+ * @teid: node TEID to search
*
- * This function searches for a node matching the teid in the scheduling tree
+ * This function searches for a node matching the TEID in the scheduling tree
* from the SW DB. The search is recursive and is restricted by the number of
* layers it has searched through; stopping at the max supported layer.
*
@@ -68,7 +68,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
return NULL;
- /* Check if teid matches to any of the children nodes */
+ /* Check if TEID matches to any of the children nodes */
for (i = 0; i < start_node->num_children; i++)
if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
return start_node->children[i];
@@ -88,7 +88,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
/**
* ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cmd_opc: cmd opcode
* @elems_req: number of elements to request
* @buf: pointer to buffer
@@ -120,7 +120,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
/**
* ice_aq_query_sched_elems - query scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -201,7 +201,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
/**
* ice_aq_delete_sched_elems - delete scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to delete
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -221,13 +221,13 @@ ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
}
/**
- * ice_sched_remove_elems - remove nodes from hw
- * @hw: pointer to the hw struct
+ * ice_sched_remove_elems - remove nodes from HW
+ * @hw: pointer to the HW struct
* @parent: pointer to the parent node
* @num_nodes: number of nodes
* @node_teids: array of node teids to be deleted
*
- * This function remove nodes from hw
+ * This function remove nodes from HW
*/
static enum ice_status
ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
@@ -260,7 +260,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
/**
* ice_sched_get_first_node - get the first node of the given layer
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @parent: pointer the base node of the subtree
* @layer: layer number
*
@@ -381,7 +381,7 @@ void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
/**
* ice_aq_get_dflt_topo - gets default scheduler topology
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -411,7 +411,7 @@ ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
/**
* ice_aq_add_sched_elems - adds scheduling element
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: the number of groups that are requested to be added
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -432,7 +432,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_cfg_sched_elems - configures scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -453,7 +453,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_move_sched_elems - move scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to move
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -474,7 +474,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_suspend_sched_elems - suspend scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to suspend
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -495,7 +495,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_resume_sched_elems - resume scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to resume
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -516,7 +516,7 @@ ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_query_sched_res - query scheduler resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf_size: buffer size in bytes
* @buf: pointer to buffer
* @cd: pointer to command details structure or NULL
@@ -535,13 +535,13 @@ ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
}
/**
- * ice_sched_suspend_resume_elems - suspend or resume hw nodes
- * @hw: pointer to the hw struct
+ * ice_sched_suspend_resume_elems - suspend or resume HW nodes
+ * @hw: pointer to the HW struct
* @num_nodes: number of nodes
* @node_teids: array of node teids to be suspended or resumed
* @suspend: true means suspend / false means resume
*
- * This function suspends or resumes hw nodes
+ * This function suspends or resumes HW nodes
*/
static enum ice_status
ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
@@ -577,7 +577,7 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
/**
* ice_aq_rl_profile - performs a rate limiting task
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
* @num_profiles: the number of profiles
* @buf: pointer to buffer
@@ -609,14 +609,14 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
/**
* ice_aq_add_rl_profile - adds rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to be add
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_added: total number of profiles added to return
* @cd: pointer to command details structure
*
- * Add rl profile (0x0410)
+ * Add RL profile (0x0410)
*/
static enum ice_status
ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -631,13 +631,13 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
/**
* ice_aq_query_rl_profile - query rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure
*
- * Query rl profile (0x0411)
+ * Query RL profile (0x0411)
*/
enum ice_status
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -649,15 +649,15 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_aq_remove_rl_profile - removes rl profile(s)
- * @hw: pointer to the hw struct
+ * ice_aq_remove_rl_profile - removes RL profile(s)
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to remove
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_removed: total number of profiles removed to return
* @cd: pointer to command details structure or NULL
*
- * Remove rl profile (0x0415)
+ * Remove RL profile (0x0415)
*/
static enum ice_status
ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -671,10 +671,10 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_sched_clear_rl_prof - clears rl prof entries
+ * ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
- * This function removes all rl profile from hw as well as from SW DB.
+ * This function removes all RL profile from HW as well as from SW DB.
*/
static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
{
@@ -704,10 +704,10 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
}
/**
- * ice_sched_clear_agg - clears the agg related information
+ * ice_sched_clear_agg - clears the aggregator related information
* @hw: pointer to the hardware structure
*
- * This function removes agg list and free up agg related memory
+ * This function removes aggregator list and free up aggregator related memory
* previously allocated.
*/
void ice_sched_clear_agg(struct ice_hw *hw)
@@ -742,7 +742,7 @@ static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
{
if (!pi)
return;
- /* remove rl profiles related lists */
+ /* remove RL profiles related lists */
ice_sched_clear_rl_prof(pi);
if (pi->root) {
ice_free_sched_node(pi, pi->root);
@@ -770,7 +770,7 @@ void ice_sched_clear_port(struct ice_port_info *pi)
/**
* ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Cleanup scheduling elements from SW DB for all the ports
*/
@@ -795,7 +795,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
/**
* ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_l2_nodes: the number of L2 nodes whose CGDs to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -821,16 +821,16 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
/**
- * ice_sched_add_elems - add nodes to hw and SW DB
+ * ice_sched_add_elems - add nodes to HW and SW DB
* @pi: port information structure
* @tc_node: pointer to the branch node
* @parent: pointer to the parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes
* @num_nodes_added: pointer to num nodes added
- * @first_node_teid: if new nodes are added then return the teid of first node
+ * @first_node_teid: if new nodes are added then return the TEID of first node
*
- * This function add nodes to hw as well as to SW DB for a given layer
+ * This function add nodes to HW as well as to SW DB for a given layer
*/
static enum ice_status
ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
@@ -924,7 +924,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
* @parent: pointer to parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes to be added
- * @first_node_teid: pointer to the first node teid
+ * @first_node_teid: pointer to the first node TEID
* @num_nodes_added: pointer to number of nodes added
*
* This function add nodes to a given layer.
@@ -976,7 +976,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
*num_nodes_added += num_added;
}
- /* Don't modify the first node teid memory if the first node was
+ /* Don't modify the first node TEID memory if the first node was
* added already in the above call. Instead send some temp
* memory for all other recursive calls.
*/
@@ -1008,7 +1008,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
/**
* ice_sched_get_qgrp_layer - get the current queue group layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current queue group layer number
*/
@@ -1020,7 +1020,7 @@ static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
/**
* ice_sched_get_vsi_layer - get the current VSI layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current VSI layer number
*/
@@ -1031,7 +1031,7 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
* 7 4
* 5 or less sw_entry_point_layer
*/
- /* calculate the vsi layer based on number of layers. */
+ /* calculate the VSI layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
@@ -1043,17 +1043,17 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
/**
* ice_sched_get_agg_layer - get the current aggregator layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current aggregator layer number
*/
static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
{
- /* Num Layers agg layer
+ /* Num Layers aggregator layer
* 9 4
* 7 or less sw_entry_point_layer
*/
- /* calculate the agg layer based on number of layers. */
+ /* calculate the aggregator layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
@@ -1226,11 +1226,11 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)
}
/**
- * ice_sched_get_node - Get the struct ice_sched_node for given teid
+ * ice_sched_get_node - Get the struct ice_sched_node for given TEID
* @pi: port information structure
* @teid: Scheduler node TEID
*
- * This function retrieves the ice_sched_node struct for given teid from
+ * This function retrieves the ice_sched_node struct for given TEID from
* the SW DB and returns it to the caller.
*/
struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
@@ -1313,7 +1313,7 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
/**
* ice_sched_find_node_in_subtree - Find node in part of base node subtree
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @base: pointer to the base node
* @node: pointer to the node to search
*
@@ -1345,13 +1345,13 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
}
/**
- * ice_sched_get_free_qparent - Get a free lan or rdma q group node
+ * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: branch number
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function retrieves a free lan or rdma q group node
+ * This function retrieves a free LAN or RDMA queue group node
*/
struct ice_sched_node *
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -1369,11 +1369,11 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
if (!vsi_ctx)
return NULL;
vsi_node = vsi_ctx->sched.vsi_node[tc];
- /* validate invalid VSI id */
+ /* validate invalid VSI ID */
if (!vsi_node)
goto lan_q_exit;
- /* get the first q group node from VSI sub-tree */
+ /* get the first queue group node from VSI sub-tree */
qgrp_node = ice_sched_get_first_node(pi->hw, vsi_node, qgrp_layer);
while (qgrp_node) {
/* make sure the qgroup node is part of the VSI subtree */
@@ -1389,12 +1389,12 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_get_vsi_node - Get a VSI node based on VSI id
- * @hw: pointer to the hw struct
+ * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
* @vsi_handle: software VSI handle
*
- * This function retrieves a VSI node for a given VSI id from a given
+ * This function retrieves a VSI node for a given VSI ID from a given
* TC branch
*/
struct ice_sched_node *
@@ -1418,13 +1418,13 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
}
/**
- * ice_sched_get_agg_node - Get an aggregator node based on agg id
- * @hw: pointer to the hw struct
+ * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function retrieves an aggregator node for a given agg id from a given
- * TC branch
+ * This function retrieves an aggregator node for a given aggregator ID from
+ * a given TC branch
*/
struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
@@ -1448,7 +1448,7 @@ ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
/**
* ice_sched_check_node - Compare node parameters between SW DB and HW DB
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function queries and compares the HW element with SW DB node parameters
@@ -1475,7 +1475,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
/**
* ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_qs: number of queues
* @num_nodes: num nodes array
*
@@ -1491,7 +1491,7 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
qgl = ice_sched_get_qgrp_layer(hw);
vsil = ice_sched_get_vsi_layer(hw);
- /* calculate num nodes from q group to VSI layer */
+ /* calculate num nodes from queue group to VSI layer */
for (i = qgl; i > vsil; i--) {
/* round to the next integer if there is a remainder */
num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
@@ -1507,10 +1507,10 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
* @vsi_handle: software VSI handle
* @tc_node: pointer to the TC node
* @num_nodes: pointer to the num nodes that needs to be added per layer
- * @owner: node owner (lan or rdma)
+ * @owner: node owner (LAN or RDMA)
*
* This function adds the VSI child nodes to tree. It gets called for
- * lan and rdma separately.
+ * LAN and RDMA separately.
*/
static enum ice_status
ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
@@ -1559,7 +1559,7 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @tc_node: pointer to TC node
* @num_nodes: pointer to num nodes array
*
@@ -1678,7 +1678,7 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
/* calculate number of supported nodes needed for this VSI */
ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes);
- /* add vsi supported nodes to tc subtree */
+ /* add VSI supported nodes to TC subtree */
return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
num_nodes);
}
@@ -1740,7 +1740,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
return status;
vsi_ctx->sched.max_lanq[tc] = new_numqs;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -1749,7 +1749,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
* @vsi_handle: software VSI handle
* @tc: TC number
* @maxqs: max number of queues
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
* @enable: TC enabled or disabled
*
* This function adds/updates VSI nodes based on the number of queues. If TC is
@@ -1774,7 +1774,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
return ICE_ERR_PARAM;
vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
- /* suspend the VSI if tc is not enabled */
+ /* suspend the VSI if TC is not enabled */
if (!enable) {
if (vsi_node && vsi_node->in_use) {
u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
@@ -1825,11 +1825,11 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
}
/**
- * ice_sched_rm_agg_vsi_entry - remove agg related vsi info entry
+ * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function removes single aggregator vsi info entry from
+ * This function removes single aggregator VSI info entry from
* aggregator list.
*/
static void
@@ -1876,9 +1876,9 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
* ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function removes the VSI and its lan or rdma children nodes from the
+ * This function removes the VSI and its LAN or RDMA children nodes from the
* scheduler tree.
*/
static enum ice_status
@@ -1931,7 +1931,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
ice_free_sched_node(pi, vsi_node);
vsi_ctx->sched.vsi_node[i] = NULL;
- /* clean up agg related vsi info if any */
+ /* clean up aggregator related VSI info if any */
ice_sched_rm_agg_vsi_info(pi, vsi_handle);
}
if (owner == ICE_SCHED_NODE_OWNER_LAN)
@@ -1945,11 +1945,11 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
}
/**
- * ice_rm_vsi_lan_cfg - remove VSI and its lan children nodes
+ * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function clears the VSI and its lan children nodes from scheduler tree
+ * This function clears the VSI and its LAN children nodes from scheduler tree
* for all TCs.
*/
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
@@ -1960,7 +1960,7 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
/**
* ice_sched_is_tree_balanced - Check tree nodes are identical or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function compares all the nodes for a given tree against HW DB nodes
@@ -1983,15 +1983,15 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
}
/**
- * ice_aq_query_node_to_root - retrieve the tree topology for a given node teid
- * @hw: pointer to the hw struct
- * @node_teid: node teid
+ * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure or NULL
*
* This function retrieves the tree topology from the firmware for a given
- * node teid to the root node.
+ * node TEID to the root node.
*/
enum ice_status
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
@@ -2008,12 +2008,12 @@ ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
}
/**
- * ice_get_agg_info - get the agg id
+ * ice_get_agg_info - get the aggregator ID
* @hw: pointer to the hardware structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function validates agg id. The function returns info if agg id is
- * prsent in list otherwise it returns null.
+ * This function validates aggregator ID. The function returns info if
+ * aggregator ID is present in list otherwise it returns null.
*/
static struct ice_sched_agg_info*
ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
@@ -2029,14 +2029,14 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
- * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default agg
+ * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
* @tc: traffic class number
* @rm_vsi_info: true or false
*
* This function move all the VSI(s) to the default aggregator and delete
- * agg vsi info based on passed in boolean parameter rm_vsi_info. The
+ * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
* caller holds the scheduler lock.
*/
static enum ice_status
@@ -2052,7 +2052,7 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
ice_sched_agg_vsi_info, list_entry) {
u16 vsi_handle = agg_vsi_info->vsi_handle;
- /* Move VSI to default agg */
+ /* Move VSI to default aggregator */
if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
continue;
@@ -2072,15 +2072,15 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove agg configuration for tc
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
* @pi: port information structure
- * @agg_info: aggregator id
- * @tc: tc number
+ * @agg_info: aggregator ID
+ * @tc: TC number
* @rm_vsi_info: bool value true or false
*
- * This function removes agg reference to vsi of given tc. It removes the agg
- * configuration completely for requested tc. The caller needs to hold the
- * scheduler lock.
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
*/
static enum ice_status
ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
@@ -2107,12 +2107,12 @@ ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
}
/**
- * ice_save_agg_tc_bitmap - save agg TC bitmap
+ * ice_save_agg_tc_bitmap - save aggregator TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc_bitmap: 8 bits TC bitmap
*
- * Save agg TC bitmap. This function needs to be called with scheduler
+ * Save aggregator TC bitmap. This function needs to be called with scheduler
* lock held.
*/
static enum ice_status
@@ -2130,19 +2130,19 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_sched_cfg_agg - configure agg node
+ * ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* It registers a unique aggregator node into scheduler services. It
* allows a user to register with a unique ID to track it's resources.
* The aggregator type determines if this is a queue group, VSI group
- * or aggregator group. It then creates the agg node(s) for requested
- * tc(s) or removes an existing agg node including its configuration
- * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release agg
- * resources and remove agg id.
+ * or aggregator group. It then creates the aggregator node(s) for requested
+ * TC(s) or removes an existing aggregator node including its configuration
+ * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
+ * resources and remove aggregator ID.
* This function needs to be called with scheduler lock held.
*/
static enum ice_status
@@ -2156,7 +2156,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info = ice_get_agg_info(hw, agg_id);
if (!agg_info) {
- /* Creat new entry for new agg id */
+ /* Create new entry for new aggregator ID */
agg_info = (struct ice_sched_agg_info *)
ice_malloc(hw, sizeof(*agg_info));
if (!agg_info) {
@@ -2167,32 +2167,32 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info->agg_type = agg_type;
agg_info->tc_bitmap[0] = 0;
- /* Initialize the aggregator vsi list head */
+ /* Initialize the aggregator VSI list head */
INIT_LIST_HEAD(&agg_info->agg_vsi_list);
- /* Add new entry in agg list */
+ /* Add new entry in aggregator list */
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
- /* Create agg node(s) for requested tc(s) */
+ /* Create aggregator node(s) for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
- /* Delete agg cfg tc if it exists previously */
+ /* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
if (status)
break;
continue;
}
- /* Check if agg node for tc already exists */
+ /* Check if aggregator node for TC already exists */
if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
continue;
- /* Create new agg node for tc */
+ /* Create new aggregator node for TC */
status = ice_sched_add_agg_cfg(pi, agg_id, tc);
if (status)
break;
- /* Save agg node's tc information */
+ /* Save aggregator node's TC information */
ice_set_bit(tc, agg_info->tc_bitmap);
}
exit_reg_agg:
@@ -2200,10 +2200,10 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_agg - config agg node
+ * ice_cfg_agg - config aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* This function configures aggregator node(s).
@@ -2226,12 +2226,12 @@ ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
}
/**
- * ice_get_agg_vsi_info - get the agg id
+ * ice_get_agg_vsi_info - get the aggregator ID
* @agg_info: aggregator info
* @vsi_handle: software VSI handle
*
- * The function returns agg VSI info based on VSI handle. This function needs
- * to be called with scheduler lock held.
+ * The function returns aggregator VSI info based on VSI handle. This function
+ * needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_vsi_info*
ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
@@ -2247,13 +2247,13 @@ ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
}
/**
- * ice_get_vsi_agg_info - get the agg info of VSI
+ * ice_get_vsi_agg_info - get the aggregator info of VSI
* @hw: pointer to the hardware structure
* @vsi_handle: Sw VSI handle
*
- * The function returns agg info of VSI represented via vsi_handle. The VSI has
- * in this case a different aggregator than the default one. This function
- * needs to be called with scheduler lock held.
+ * The function returns aggregator info of VSI represented via vsi_handle. The
+ * VSI has in this case a different aggregator than the default one. This
+ * function needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_info*
ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
@@ -2274,9 +2274,9 @@ ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Save VSI to aggregator TC bitmap. This function needs to call with scheduler
* lock held.
@@ -2301,15 +2301,15 @@ ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_sched_assoc_vsi_to_agg - associate or move VSI to new or default agg
+ * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* This function moves VSI to a new or default aggregator node. If VSI is
- * already associated to the agg node then no operation is performed on the
- * tree. This function needs to be called with scheduler lock held.
+ * already associated to the aggregator node then no operation is performed on
+ * the tree. This function needs to be called with scheduler lock held.
*/
static enum ice_status
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
@@ -2329,22 +2329,22 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
/* check if entry already exist */
agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
if (!agg_vsi_info) {
- /* Create new entry for vsi under agg list */
+ /* Create new entry for VSI under aggregator list */
agg_vsi_info = (struct ice_sched_agg_vsi_info *)
ice_malloc(hw, sizeof(*agg_vsi_info));
if (!agg_vsi_info)
return ICE_ERR_PARAM;
- /* add vsi id into the agg list */
+ /* add VSI ID into the aggregator list */
agg_vsi_info->vsi_handle = vsi_handle;
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
- /* Move vsi node to new agg node for requested tc(s) */
+ /* Move VSI node to new aggregator node for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
- /* Move VSI to new agg */
+ /* Move VSI to new aggregator */
status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
if (status)
break;
@@ -2354,7 +2354,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
else
ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
}
- /* If vsi moved back to default agg then delete entry agg_vsi_info. */
+ /* If VSI moved back to default aggregator, delete agg_vsi_info. */
if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
LIST_DEL(&agg_vsi_info->list_entry);
@@ -2364,11 +2364,11 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_move_vsi_to_agg - moves VSI to new or default agg
+ * ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: tc bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Move or associate VSI to a new or default aggregator node.
*/
@@ -2390,12 +2390,12 @@ ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_rm_agg_cfg - remove agg configuration
+ * ice_rm_agg_cfg - remove aggregator configuration
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes agg reference to vsi and delete agg id info.
- * It removes the agg configuration completely.
+ * This function removes aggregator reference to VSI and delete aggregator ID
+ * info. It removes the aggregator configuration completely.
*/
enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
{
@@ -2425,7 +2425,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
LIST_DEL(&agg_info->list_entry);
ice_free(pi->hw, agg_info);
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
exit_ice_rm_agg_cfg:
@@ -2434,11 +2434,11 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_set_clear_cir_bw_alloc - set or clear CIR bw alloc information
+ * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear CIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear CIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2452,11 +2452,11 @@ ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_set_clear_eir_bw_alloc - set or clear EIR bw alloc information
+ * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear EIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear EIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2470,14 +2470,14 @@ ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_sched_save_vsi_bw_alloc - save VSI node's bw alloc information
+ * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2506,11 +2506,11 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_set_clear_cir_bw - set or clear CIR bw
+ * ice_set_clear_cir_bw - set or clear CIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear CIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2519,18 +2519,18 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = 0;
} else {
- /* Save type of bw information */
+ /* Save type of BW information */
ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = bw;
}
}
/**
- * ice_set_clear_eir_bw - set or clear EIR bw
+ * ice_set_clear_eir_bw - set or clear EIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear EIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2539,24 +2539,24 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved shared bw information.
+ * First clear earlier saved shared BW information.
*/
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
- /* save EIR bw information */
+ /* save EIR BW information */
ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = bw;
}
}
/**
- * ice_set_clear_shared_bw - set or clear shared bw
+ * ice_set_clear_shared_bw - set or clear shared BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear shared bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2565,27 +2565,27 @@ ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved EIR bw information.
+ * First clear earlier saved EIR BW information.
*/
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
- /* save shared bw information */
+ /* save shared BW information */
ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = bw;
}
}
/**
- * ice_sched_save_vsi_bw - save VSI node's bw information
+ * ice_sched_save_vsi_bw - save VSI node's BW information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of VSI type node for post replay use.
+ * Save BW information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2658,14 +2658,14 @@ ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_save_agg_bw_alloc - save agg node's bw alloc information
+ * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: bandwidth alloc information
*
- * Save bw alloc information of AGG type node for post replay use.
+ * Save BW alloc information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2692,14 +2692,14 @@ ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_sched_save_agg_bw - save agg node's bw information
+ * ice_sched_save_agg_bw - save aggregator node's BW information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of AGG type node for post replay use.
+ * Save BW information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2729,14 +2729,14 @@ ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_lmt_per_tc - configure VSI bw limit per tc
+ * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of VSI scheduling node based on tc
+ * This function configures BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2757,13 +2757,13 @@ ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI bw limit per tc
+ * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
*
- * This function configures default bw limit of VSI scheduling node based on tc
+ * This function configures default BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2786,14 +2786,14 @@ ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_agg_bw_lmt_per_tc - configure aggregator bw limit per tc
+ * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function applies bw limit to aggregator scheduling node based on tc
+ * This function applies BW limit to aggregator scheduling node based on TC
* information.
*/
enum ice_status
@@ -2813,14 +2813,14 @@ ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator bw default limit per tc
+ * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
*
- * This function applies default bw limit to aggregator scheduling node based
- * on tc information.
+ * This function applies default BW limit to aggregator scheduling node based
+ * on TC information.
*/
enum ice_status
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2841,10 +2841,10 @@ ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_shared_lmt - configure VSI bw shared limit
+ * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
* across all traffic classes for VSI matching handle.
@@ -2856,7 +2856,7 @@ ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
}
/**
- * ice_cfg_vsi_bw_no_shared_lmt - configure VSI bw for no shared limiter
+ * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
* @pi: port information structure
* @vsi_handle: software VSI handle
*
@@ -2871,13 +2871,13 @@ ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_cfg_agg_bw_shared_lmt - configure aggregator bw shared limit
+ * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function configures the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
@@ -2886,12 +2886,12 @@ ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/**
- * ice_cfg_agg_bw_no_shared_lmt - configure aggregator bw for no shared limiter
+ * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function removes the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
@@ -2903,12 +2903,12 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
* ice_config_vsi_queue_priority - config VSI queue priority of node
* @pi: port information structure
* @num_qs: number of VSI queues
- * @q_ids: queue ids array
- * @q_ids: queue ids array
+ * @q_ids: queue IDs array
+ * @q_ids: queue IDs array
* @q_prio: queue priority array
*
* This function configures the queue node priority (Sibling Priority) of the
- * passed in VSI's queue(s) for a given traffic class (tc).
+ * passed in VSI's queue(s) for a given traffic class (TC).
*/
enum ice_status
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
@@ -2940,16 +2940,16 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
}
/**
- * ice_cfg_agg_vsi_priority_per_tc - config agg's VSI priority per tc
+ * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
* @pi: port information structure
- * @agg_id: Aggregator id
+ * @agg_id: Aggregator ID
* @num_vsis: number of VSI(s)
* @vsi_handle_arr: array of software VSI handles
* @node_prio: pointer to node priority
* @tc: traffic class
*
* This function configures the node priority (Sibling Priority) of the
- * passed in VSI's for a given traffic class (tc) of an Aggregator id.
+ * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
*/
enum ice_status
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
@@ -3027,14 +3027,14 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_vsi_bw_alloc - config VSI bw alloc per tc
+ * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @ena_tcmap: enabled tc map
+ * @ena_tcmap: enabled TC map
* @rl_type: Rate limit type CIR/EIR
- * @bw_alloc: Array of bw alloc
+ * @bw_alloc: Array of BW alloc
*
- * This function configures the bw allocation of the passed in VSI's
+ * This function configures the BW allocation of the passed in VSI's
* node(s) for enabled traffic class.
*/
enum ice_status
@@ -3049,7 +3049,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
@@ -3079,14 +3079,14 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
}
/**
- * ice_cfg_agg_bw_alloc - config agg bw alloc
+ * ice_cfg_agg_bw_alloc - config aggregator BW alloc
* @pi: port information structure
- * @agg_id: aggregator id
- * @ena_tcmap: enabled tc map
+ * @agg_id: aggregator ID
+ * @ena_tcmap: enabled TC map
* @rl_type: rate limit type CIR/EIR
- * @bw_alloc: array of bw alloc
+ * @bw_alloc: array of BW alloc
*
- * This function configures the bw allocation of passed in aggregator for
+ * This function configures the BW allocation of passed in aggregator for
* enabled traffic class(s).
*/
enum ice_status
@@ -3111,7 +3111,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
goto exit_cfg_agg_bw_alloc;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
@@ -3142,10 +3142,10 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/**
- * ice_sched_calc_wakeup - calculate rl profile wakeup parameter
- * @bw: bandwidth in kbps
+ * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
+ * @bw: bandwidth in Kbps
*
- * This function calculates the wakeup parameter of rl profile.
+ * This function calculates the wakeup parameter of RL profile.
*/
static u16 ice_sched_calc_wakeup(s32 bw)
{
@@ -3183,11 +3183,11 @@ static u16 ice_sched_calc_wakeup(s32 bw)
}
/**
- * ice_sched_bw_to_rl_profile - convert bw to profile parameters
- * @bw: bandwidth in kbps
+ * ice_sched_bw_to_rl_profile - convert BW to profile parameters
+ * @bw: bandwidth in Kbps
* @profile: profile parameters to return
*
- * This function converts the bw to profile structure format.
+ * This function converts the BW to profile structure format.
*/
static enum ice_status
ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
@@ -3203,7 +3203,7 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
return status;
- /* Bytes per second from kbps */
+ /* Bytes per second from Kbps */
bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
/* encode is 6 bits but really useful are 5 bits */
@@ -3247,16 +3247,16 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
}
/**
- * ice_sched_add_rl_profile - add rl profile
+ * ice_sched_add_rl_profile - add RL profile
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: specifies in which layer to create profile
*
- * This function first checks the existing list for corresponding bw
+ * This function first checks the existing list for corresponding BW
* parameter. If it exists, it returns the associated profile otherwise
- * it creates a new rate limit profile for requested bw, and adds it to
- * the hw db and local list. It returns the new profile or null on error.
+ * it creates a new rate limit profile for requested BW, and adds it to
+ * the HW DB and local list. It returns the new profile or null on error.
* The caller needs to hold the scheduler lock.
*/
static struct ice_aqc_rl_profile_info *
@@ -3291,10 +3291,10 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
rl_prof_elem->bw == bw)
- /* Return existing profile id info */
+ /* Return existing profile ID info */
return rl_prof_elem;
- /* Create new profile id */
+ /* Create new profile ID */
rl_prof_elem = (struct ice_aqc_rl_profile_info *)
ice_malloc(hw, sizeof(*rl_prof_elem));
@@ -3311,7 +3311,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
rl_prof_elem->profile.flags = profile_type;
rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
- /* Create new entry in hw db */
+ /* Create new entry in HW DB */
buf = (struct ice_aqc_rl_profile_generic_elem *)
&rl_prof_elem->profile;
status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
@@ -3435,12 +3435,12 @@ ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @rl_prof_id: rate limit profile id
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @rl_prof_id: rate limit profile ID
*
- * This function configures node element's bw limit.
+ * This function configures node element's BW limit.
*/
static enum ice_status
ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
@@ -3457,7 +3457,7 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_MAX_BW:
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
@@ -3466,11 +3466,11 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_SHARED_BW:
- /* Check for removing shared bw */
+ /* Check for removing shared BW */
if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
/* remove shared profile */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
- data->srl_id = 0; /* clear srl field */
+ data->srl_id = 0; /* clear SRL field */
/* enable back EIR to default profile */
data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
@@ -3478,16 +3478,16 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
break;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
(LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
ICE_SCHED_DFLT_RL_PROF_ID))
return ICE_ERR_CFG;
- /* EIR bw is set to default, disable it */
+ /* EIR BW is set to default, disable it */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
- /* Okay to enable shared bw now */
+ /* Okay to enable shared BW now */
data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
data->srl_id = CPU_TO_LE16(rl_prof_id);
break;
@@ -3501,12 +3501,12 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_get_node_rl_prof_id - get node's rate limit profile id
+ * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
* @node: sched node
* @rl_type: rate limit type
*
* If existing profile matches, it returns the corresponding rate
- * limit profile id, otherwise it returns an invalid id as error.
+ * limit profile ID, otherwise it returns an invalid ID as error.
*/
static u16
ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
@@ -3539,7 +3539,7 @@ ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
/**
* ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @layer_index: layer index
*
* This function returns requested profile creation layer.
@@ -3603,14 +3603,14 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
}
/**
- * ice_sched_rm_rl_profile - remove rl profile id
+ * ice_sched_rm_rl_profile - remove RL profile ID
* @pi: port information structure
* @layer_num: layer number where profiles are saved
* @profile_type: profile type like EIR, CIR, or SRL
- * @profile_id: profile id to remove
+ * @profile_id: profile ID to remove
*
* This function removes rate limit profile from layer 'layer_num' of type
- * 'profile_type' and profile id as 'profile_id'. The caller needs to hold
+ * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
* scheduler lock.
*/
static enum ice_status
@@ -3620,7 +3620,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
struct ice_aqc_rl_profile_info *rl_prof_elem;
enum ice_status status = ICE_SUCCESS;
- /* Check the existing list for rl profile */
+ /* Check the existing list for RL profile */
LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
@@ -3629,7 +3629,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
if (rl_prof_elem->prof_id_ref)
rl_prof_elem->prof_id_ref--;
- /* Remove old profile id from database */
+ /* Remove old profile ID from database */
status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
if (status && status != ICE_ERR_IN_USE)
ice_debug(pi->hw, ICE_DBG_SCHED,
@@ -3646,10 +3646,10 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
- * @layer_num: layer number where rl profiles are saved
+ * @layer_num: layer number where RL profiles are saved
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3681,17 +3681,18 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
default:
return ICE_ERR_PARAM;
}
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
- /* Remove stale rl profile id */
+ /* Remove stale RL profile ID */
if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
old_id == ICE_SCHED_INVAL_PROF_ID)
- return status;
+ return ICE_SUCCESS;
+
return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
}
@@ -3704,7 +3705,7 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
* @bw: bandwidth value
*
* This function prepares node element's bandwidth to SRL or EIR exclusively.
- * EIR bw and Shared bw profiles are mutually exclusive and hence only one of
+ * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
* them may be set for any given element. This function needs to be called
* with the scheduler lock held.
*/
@@ -3730,7 +3731,7 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
layer_num);
} else if (rl_type == ICE_MAX_BW &&
node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
- /* Remove Shared profile. Set default shared bw call
+ /* Remove Shared profile. Set default shared BW call
* removes shared profile for a node.
*/
return ice_sched_set_node_bw_dflt(pi, node,
@@ -3748,9 +3749,9 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: layer number
*
- * This function adds new profile corresponding to requested bw, configures
- * node's rl profile id of type cir, eir, or srl, and removes old profile
- * id from local database. The caller needs to hold scheduler lock.
+ * This function adds new profile corresponding to requested BW, configures
+ * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
+ * ID from local database. The caller needs to hold scheduler lock.
*/
static enum ice_status
ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3767,21 +3768,21 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
/* New changes has been applied */
- /* Increment the profile id reference count */
+ /* Increment the profile ID reference count */
rl_prof_info->prof_id_ref++;
- /* Check for old id removal */
+ /* Check for old ID removal */
if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
- return status;
+ return ICE_SUCCESS;
return ice_sched_rm_rl_profile(pi, layer_num,
rl_prof_info->profile.flags,
@@ -3789,14 +3790,14 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_lmt - set node's bw limit
+ * ice_sched_set_node_bw_lmt - set node's BW limit
* @pi: port information structure
* @node: tree node
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * It updates node's bw limit parameters like bw rl profile id of type cir,
- * eir, or srl. The caller needs to hold scheduler lock.
+ * It updates node's BW limit parameters like BW RL profile ID of type CIR,
+ * EIR, or SRL. The caller needs to hold scheduler lock.
*/
enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3811,7 +3812,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!pi)
return ICE_ERR_PARAM;
hw = pi->hw;
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
node->tx_sched_layer);
@@ -3824,7 +3825,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!cfg_node)
return ICE_ERR_CFG;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
@@ -3838,13 +3839,13 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_dflt_lmt - set node's bw limit to default
+ * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3884,13 +3885,13 @@ ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
}
/**
- * ice_sched_set_q_bw_lmt - sets queue bw limit
+ * ice_sched_set_q_bw_lmt - sets queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of queue scheduling node.
+ * This function sets BW limit of queue scheduling node.
*/
static enum ice_status
ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3937,13 +3938,13 @@ ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_cfg_q_bw_lmt - configure queue bw limit
+ * ice_cfg_q_bw_lmt - configure queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of queue scheduling node.
+ * This function configures BW limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
@@ -3953,12 +3954,12 @@ ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
}
/**
- * ice_cfg_q_bw_dflt_lmt - configure queue bw default limit
+ * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
*
- * This function configures bw default limit of queue scheduling node.
+ * This function configures BW default limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3968,11 +3969,11 @@ ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_sched_save_tc_node_bw - save tc node bw limit
+ * ice_sched_save_tc_node_bw - save TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function saves the modified values of bandwidth settings for later
* replay purpose (restore) after reset.
@@ -4002,13 +4003,13 @@ ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_lmt - sets tc node bw limit
+ * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bandwidth limit of tc node.
+ * This function configures bandwidth limit of TC node.
*/
static enum ice_status
ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
@@ -4036,13 +4037,13 @@ ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_lmt - configure tc node bw limit
+ * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4053,12 +4054,12 @@ ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_dflt_lmt - configure tc node bw default limit
+ * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
*
- * This function configures bw default limit of tc node.
+ * This function configures BW default limit of TC node.
*/
enum ice_status
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
@@ -4068,13 +4069,13 @@ ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_save_tc_node_bw_alloc - save tc node's bw alloc information
+ * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
* @pi: port information structure
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
@@ -4100,13 +4101,13 @@ ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_alloc - set tc node bw alloc
+ * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bandwidth alloc of tc node, also saves the
+ * This function configures bandwidth alloc of TC node, also saves the
* changed settings for replay purpose, and return success if it succeeds
* in modifying bandwidth alloc setting.
*/
@@ -4135,13 +4136,13 @@ ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_alloc - configure tc node bw alloc
+ * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4152,12 +4153,12 @@ ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_agg_bw_dflt_lmt - set agg node's bw limit to default
+ * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function retrieves the aggregator id based on VSI id and tc,
- * and sets node's bw limit to default. This function needs to be
+ * This function retrieves the aggregator ID based on VSI ID and TC,
+ * and sets node's BW limit to default. This function needs to be
* called with the scheduler lock held.
*/
enum ice_status
@@ -4201,14 +4202,14 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_get_node_by_id_type - get node from id type
+ * ice_sched_get_node_by_id_type - get node from ID type
* @pi: port information structure
* @id: identifier
* @agg_type: type of aggregator
* @tc: traffic class
*
- * This function returns node identified by id of type aggregator, and
- * based on traffic class (tc). This function needs to be called with
+ * This function returns node identified by ID of type aggregator, and
+ * based on traffic class (TC). This function needs to be called with
* the scheduler lock held.
*/
static struct ice_sched_node *
@@ -4263,16 +4264,16 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
}
/**
- * ice_sched_set_node_bw_lmt_per_tc - set node bw limit per tc
+ * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
* @pi: port information structure
- * @id: id (software VSI handle or AGG id)
+ * @id: ID (software VSI handle or AGG ID)
* @agg_type: aggregator type (VSI or AGG type node)
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of VSI or Aggregator scheduling node
- * based on tc information from passed in argument bw.
+ * This function sets BW limit of VSI or Aggregator scheduling node
+ * based on TC information from passed in argument BW.
*/
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -4310,7 +4311,7 @@ ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
* @vsi_handle: software VSI handle
*
* This function validates SRL node of the VSI node if available SRL layer is
- * different than the VSI node layer on all tc(s).This function needs to be
+ * different than the VSI node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4322,7 +4323,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4356,13 +4357,13 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_set_vsi_bw_shared_lmt - set VSI bw shared limit
+ * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
- * across all traffic classes for VSI matching handle. When bw value of
+ * across all traffic classes for VSI matching handle. When BW value of
* ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
*/
enum ice_status
@@ -4382,7 +4383,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
if (status)
goto exit_set_vsi_bw_shared_lmt;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4417,10 +4418,10 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_validate_agg_srl_node - validate AGG SRL node
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
* This function validates SRL node of the AGG node if available SRL layer is
- * different than the AGG node layer on all tc(s).This function needs to be
+ * different than the AGG node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4440,7 +4441,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
if (!agg_id_present)
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4472,14 +4473,14 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_sched_set_agg_bw_shared_lmt - set aggregator bw shared limit
+ * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type
+ * This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id. When
- * bw value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
+ * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
* node(s).
*/
enum ice_status
@@ -4511,7 +4512,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
goto exit_agg_bw_shared_lmt;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -4975,7 +4976,7 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
/**
* ice_cfg_rl_burst_size - Set burst size value
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @bytes: burst size in bytes
*
* This function configures/set the burst size to requested new value. The new
@@ -4995,7 +4996,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_BYTE_GRANULARITY;
/* round number to nearest 256 granularity */
bytes = ice_round_to_num(bytes, 256);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_BYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_BYTE_GRANULARITY;
burst_size_to_prog |= (u16)bytes;
@@ -5005,7 +5006,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_KBYTE_GRANULARITY;
/* round number to nearest 1024 granularity */
bytes = ice_round_to_num(bytes, 1024);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
/* The value is in k bytes */
@@ -5017,7 +5018,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
/*
* ice_sched_replay_node_prio - re-configure node priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: priority value
*
@@ -5043,12 +5044,12 @@ ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_node_bw - replay node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_node_bw - replay node(s) BW
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @bw_t_info: bw type information
+ * @bw_t_info: BW type information
*
- * This function restores node's bw from bw_t_info. The caller needs
+ * This function restores node's BW from bw_t_info. The caller needs
* to hold the scheduler lock.
*/
static enum ice_status
@@ -5102,8 +5103,8 @@ ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_agg_bw - replay aggregator node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_agg_bw - replay aggregator node(s) BW
+ * @hw: pointer to the HW struct
* @agg_info: aggregator data structure
*
* This function re-creates aggregator type nodes. The caller needs to hold
@@ -5157,7 +5158,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
{
u8 tc;
- /* Some tc(s) may be missing after reset, adjust for replay */
+ /* Some TC(s) may be missing after reset, adjust for replay */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
@@ -5166,10 +5167,10 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
/**
* ice_sched_replay_agg - recreate aggregator node(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function recreate aggregator type nodes which are not replayed earlier.
- * It also replay aggregator bw information. These aggregator nodes are not
+ * It also replay aggregator BW information. These aggregator nodes are not
* associated with VSI type node yet.
*/
void ice_sched_replay_agg(struct ice_hw *hw)
@@ -5180,7 +5181,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
ice_acquire_lock(&pi->sched_lock);
LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
list_entry) {
- /* replay agg (re-create aggregator node) */
+ /* replay aggregator (re-create aggregator node) */
if (!ice_cmp_bitmap(agg_info->tc_bitmap,
agg_info->replay_tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
@@ -5203,7 +5204,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/* Move on to next one */
continue;
}
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
ice_info(hw, "Replay agg bw [id=%d] failed\n",
@@ -5215,7 +5216,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/**
* ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function initialize aggregator(s) TC bitmap to zero. A required
* preinit step for replaying aggregators.
@@ -5239,10 +5240,10 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
}
/**
- * ice_sched_replay_tc_node_bw - replay tc node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_tc_node_bw - replay TC node(s) BW
+ * @hw: pointer to the HW struct
*
- * This function replay tc nodes. The caller needs to hold the scheduler lock.
+ * This function replay TC nodes. The caller needs to hold the scheduler lock.
*/
enum ice_status
ice_sched_replay_tc_node_bw(struct ice_hw *hw)
@@ -5257,7 +5258,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
if (!tc_node)
- continue; /* tc not present */
+ continue; /* TC not present */
status = ice_sched_replay_node_bw(hw, tc_node,
&hw->tc_node_bw_t_info[tc]);
if (status)
@@ -5268,8 +5269,8 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
}
/**
- * ice_sched_replay_vsi_bw - replay VSI type node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @tc_bitmap: 8 bits TC bitmap
*
@@ -5308,8 +5309,8 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
}
/**
- * ice_sched_replay_vsi_agg - replay agg & VSI to aggregator node(s)
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays aggregator node, VSI to aggregator type nodes, and
@@ -5336,12 +5337,12 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
return ICE_SUCCESS; /* Not present in list - default Agg case */
ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
replay_bitmap);
- /* Replay agg node associated to vsi_handle */
+ /* Replay aggregator node associated to vsi_handle */
status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
ICE_AGG_TYPE_AGG, replay_bitmap);
if (status)
return status;
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
return status;
@@ -5354,14 +5355,14 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
replay_bitmap);
if (status)
return status;
- /* Replay VSI bw (restore VSI bw) */
+ /* Replay VSI BW (restore VSI BW) */
return ice_sched_replay_vsi_bw(hw, vsi_handle,
agg_vsi_info->tc_bitmap);
}
/**
* ice_replay_vsi_agg - replay VSI to aggregator node
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays association of VSI to aggregator type nodes, and
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index a5565945e..61fa6a85b 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -43,14 +43,14 @@ struct ice_aqc_rl_profile_info {
struct ice_aqc_rl_profile_elem profile;
struct LIST_ENTRY_TYPE list_entry;
u32 bw; /* requested */
- u16 prof_id_ref; /* profile id to node association ref count */
+ u16 prof_id_ref; /* profile ID to node association ref count */
};
struct ice_sched_agg_vsi_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u16 vsi_handle;
- /* save agg vsi TC bitmap */
+ /* save aggregator VSI TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
@@ -60,9 +60,9 @@ struct ice_sched_agg_info {
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u32 agg_id;
enum ice_agg_type agg_type;
- /* bw_t_info saves agg bw information */
+ /* bw_t_info saves aggregator BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
- /* save agg TC bitmap */
+ /* save aggregator TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a7b712e17..512e64b91 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -21,7 +21,7 @@
* byte 6 = 0x2: to identify it as locally administered SA MAC
* byte 12 = 0x81 & byte 13 = 0x00:
* In case of VLAN filter first two bytes defines ether type (0x8100)
- * and remaining two bytes are placeholder for programming a given VLAN id
+ * and remaining two bytes are placeholder for programming a given VLAN ID
* In case of Ether type filter it is treated as header without VLAN tag
* and byte 12 and 13 is used to program a given Ether type instead
*/
@@ -54,7 +54,7 @@ static const u8 dummy_eth_header[DUMMY_ETH_HDR_LEN] = { 0x2, 0, 0, 0, 0, 0,
/**
* ice_init_def_sw_recp - initialize the recipe book keeping tables
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Allocate memory for the entire recipe table and initialize the structures/
* entries corresponding to basic recipes.
@@ -282,7 +282,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
/**
* ice_aq_add_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -324,7 +324,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_free_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
* @cd: pointer to command details structure or NULL
@@ -360,7 +360,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -397,7 +397,7 @@ ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_is_vsi_valid - check whether the VSI is valid or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* check whether the VSI is valid or not
@@ -408,11 +408,11 @@ bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_get_hw_vsi_num - return the hw VSI number
- * @hw: pointer to the hw struct
+ * ice_get_hw_vsi_num - return the HW VSI number
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
- * return the hw VSI number
+ * return the HW VSI number
* Caution: call this function only if VSI is valid (ice_is_vsi_valid)
*/
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
@@ -422,7 +422,7 @@ u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_get_vsi_ctx - return the VSI context entry for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* return the VSI context entry for a given VSI handle
@@ -434,7 +434,7 @@ struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_vsi_ctx - save the VSI context for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
* @vsi: VSI context pointer
*
@@ -448,7 +448,7 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
/**
* ice_clear_vsi_ctx - clear the VSI context entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* clear the VSI context entry
@@ -467,7 +467,7 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_clear_all_vsi_ctx - clear all the VSI context entries
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
void ice_clear_all_vsi_ctx(struct ice_hw *hw)
{
@@ -479,13 +479,13 @@ void ice_clear_all_vsi_ctx(struct ice_hw *hw)
/**
* ice_add_vsi - add VSI context to the hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle provided by drivers
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
* Add a VSI context to the hardware also add it into the VSI handle list.
- * If this function gets called after reset for exisiting VSIs then update
+ * If this function gets called after reset for existing VSIs then update
* with the new HW VSI number in the corresponding VSI handle list entry.
*/
enum ice_status
@@ -502,7 +502,7 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return status;
tmp_vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
if (!tmp_vsi_ctx) {
- /* Create a new vsi context */
+ /* Create a new VSI context */
tmp_vsi_ctx = (struct ice_vsi_ctx *)
ice_malloc(hw, sizeof(*tmp_vsi_ctx));
if (!tmp_vsi_ctx) {
@@ -519,12 +519,12 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
tmp_vsi_ctx->vsi_num = vsi_ctx->vsi_num;
}
- return status;
+ return ICE_SUCCESS;
}
/**
* ice_free_vsi- free VSI context from hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
@@ -549,7 +549,7 @@ ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
@@ -570,8 +570,8 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_alloc_free_vsi_list
- * @hw: pointer to the hw struct
- * @vsi_list_id: VSI list id returned or used for lookup
+ * @hw: pointer to the HW struct
+ * @vsi_list_id: VSI list ID returned or used for lookup
* @lkup_type: switch rule filter lookup type
* @opc: switch rules population command type - pass in the command opcode
*
@@ -629,7 +629,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
/**
* ice_aq_sw_rules - add/update/remove switch rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @rule_list: pointer to switch rule population list
* @rule_list_sz: total size of the rule list in bytes
* @num_rules: number of switch rules in the rule_list
@@ -798,7 +798,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
* 1. The switch is a VEB AND
* 2
* 2.1 The lookup is a directional lookup like ethertype,
- * promiscuous, ethertype-mac, promiscuous-vlan
+ * promiscuous, ethertype-MAC, promiscuous-VLAN
* and default-port OR
* 2.2 The lookup is VLAN, OR
* 2.3 The lookup is MAC with mcast or bcast addr for MAC, OR
@@ -829,7 +829,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
}
/**
- * ice_ilog2 - Caculates integer log base 2 of a number
+ * ice_ilog2 - Calculates integer log base 2 of a number
* @n: number on which to perform operation
*/
static int ice_ilog2(u64 n)
@@ -984,7 +984,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,
* @hw: pointer to the hardware structure
* @m_ent: the management entry for which sw marker needs to be added
* @sw_marker: sw marker to tag the Rx descriptor with
- * @l_id: large action resource id
+ * @l_id: large action resource ID
*
* Create a large action to hold software marker and update the switch rule
* entry pointed by m_ent with newly created large action
@@ -996,8 +996,8 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
struct ice_aqc_sw_rules_elem *lg_act, *rx_tx;
/* For software marker we need 3 large actions
* 1. FWD action: FWD TO VSI or VSI LIST
- * 2. GENERIC VALUE action to hold the profile id
- * 3. GENERIC VALUE action to hold the software marker id
+ * 2. GENERIC VALUE action to hold the profile ID
+ * 3. GENERIC VALUE action to hold the software marker ID
*/
const u16 num_lg_acts = 3;
enum ice_status status;
@@ -1060,13 +1060,13 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
ice_aqc_opc_update_sw_rules);
- /* Update the action to point to the large action id */
+ /* Update the action to point to the large action ID */
rx_tx->pdata.lkup_tx_rx.act =
CPU_TO_LE32(ICE_SINGLE_ACT_PTR |
((l_id << ICE_SINGLE_ACT_PTR_VAL_S) &
ICE_SINGLE_ACT_PTR_VAL_M));
- /* Use the filter rule id of the previously created rule with single
+ /* Use the filter rule ID of the previously created rule with single
* act. Once the update happens, hardware will treat this as large
* action
*/
@@ -1090,10 +1090,10 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to set in the VSI mapping
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
*
- * Helper function to create a new entry of VSI list id to VSI mapping
- * using the given VSI list id
+ * Helper function to create a new entry of VSI list ID to VSI mapping
+ * using the given VSI list ID
*/
static struct ice_vsi_list_map_info *
ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1122,13 +1122,13 @@ ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @remove: Boolean value to indicate if this is a remove action
* @opc: switch rules population command type - pass in the command opcode
* @lkup_type: lookup type of the filter
*
* Call AQ command to add a new switch rule or update existing switch rule
- * using the given VSI list id
+ * using the given VSI list ID
*/
static enum ice_status
ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1185,7 +1185,7 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
/**
* ice_create_vsi_list_rule - Creates and populates a VSI list rule
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
* @vsi_list_id: stores the ID of the VSI list to be created
@@ -1279,7 +1279,7 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw,
* @f_info: filter information for switch rule
*
* Call AQ command to update a previously created switch rule with a
- * VSI list id
+ * VSI list ID
*/
static enum ice_status
ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
@@ -1306,7 +1306,7 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
/**
* ice_update_sw_rule_bridge_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Updates unicast switch filter rules based on VEB/VEPA mode
*/
@@ -1362,7 +1362,7 @@ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
* Allocate a new VSI list and add two VSIs
* to this list using switch rule command
* Update the previously created switch rule with the
- * newly created VSI list id
+ * newly created VSI list ID
* if a VSI list was previously created
* Add the new VSI to the previously created VSI list set
* using the update switch rule command
@@ -1443,7 +1443,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
return ICE_SUCCESS;
/* Update the previously created VSI list set with
- * the new VSI id passed in
+ * the new VSI ID passed in
*/
vsi_list_id = cur_fltr->fwd_id.vsi_list_id;
opcode = ice_aqc_opc_update_sw_rules;
@@ -1451,7 +1451,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
status = ice_update_vsi_list_rule(hw, &vsi_handle, 1,
vsi_list_id, false, opcode,
new_fltr->lkup_type);
- /* update VSI list mapping info with new VSI id */
+ /* update VSI list mapping info with new VSI ID */
if (!status)
ice_set_bit(vsi_handle,
m_entry->vsi_list_info->vsi_map);
@@ -1495,7 +1495,7 @@ ice_find_rule_entry(struct ice_hw *hw, u8 recp_id, struct ice_fltr_info *f_info)
* @hw: pointer to the hardware structure
* @recp_id: lookup type for which VSI lists needs to be searched
* @vsi_handle: VSI handle to be found in VSI list
- * @vsi_list_id: VSI list id found contaning vsi_handle
+ * @vsi_list_id: VSI list ID found containing vsi_handle
*
* Helper function to search a VSI list with single entry containing given VSI
* handle element. This can be extended further to search VSI list with more
@@ -1527,7 +1527,7 @@ ice_find_vsi_list_entry(struct ice_hw *hw, u8 recp_id, u16 vsi_handle,
/**
* ice_add_rule_internal - add rule for a given lookup type
* @hw: pointer to the hardware structure
- * @recp_id: lookup type (recipe id) for which rule has to be added
+ * @recp_id: lookup type (recipe ID) for which rule has to be added
* @f_entry: structure containing MAC forwarding information
*
* Adds or updates the rule lists for a given recipe
@@ -1576,7 +1576,7 @@ ice_add_rule_internal(struct ice_hw *hw, u8 recp_id,
/**
* ice_remove_vsi_list_rule
* @hw: pointer to the hardware structure
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @lkup_type: switch rule filter lookup type
*
* The VSI list should be emptied before this function is called to remove the
@@ -1702,7 +1702,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
* ice_remove_rule_internal - Remove a filter rule of a given type
*
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @f_entry: rule entry containing filter information
*/
static enum ice_status
@@ -1752,7 +1752,7 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
status = ice_rem_update_vsi_list(hw, vsi_handle, list_elem);
if (status)
goto exit;
- /* if vsi count goes to zero after updating the vsi list */
+ /* if VSI count goes to zero after updating the VSI list */
if (list_elem->vsi_count == 0)
remove_rule = true;
}
@@ -1830,7 +1830,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
return ICE_ERR_PARAM;
hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
m_list_itr->fltr_info.fwd_id.hw_vsi_id = hw_vsi_id;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (m_list_itr->fltr_info.src_id != ICE_SRC_ID_VSI)
return ICE_ERR_PARAM;
m_list_itr->fltr_info.src = hw_vsi_id;
@@ -1907,7 +1907,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
((u8 *)r_iter + (elem_sent * s_rule_size));
}
- /* Fill up rule id based on the value returned from FW */
+ /* Fill up rule ID based on the value returned from FW */
r_iter = s_rule;
LIST_FOR_EACH_ENTRY(m_list_itr, m_list, ice_fltr_list_entry,
list_entry) {
@@ -1968,7 +1968,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);
new_fltr = &f_entry->fltr_info;
- /* VLAN id should only be 12 bits */
+ /* VLAN ID should only be 12 bits */
if (new_fltr->l_data.vlan.vlan_id > ICE_MAX_VLAN_ID)
return ICE_ERR_PARAM;
@@ -2026,7 +2026,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
}
}
} else if (v_list_itr->vsi_list_info->ref_cnt == 1) {
- /* Update existing VSI list to add new VSI id only if it used
+ /* Update existing VSI list to add new VSI ID only if it used
* by one VLAN rule.
*/
cur_fltr = &v_list_itr->fltr_info;
@@ -2036,7 +2036,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
/* If VLAN rule exists and VSI list being used by this rule is
* referenced by more than 1 VLAN rule. Then create a new VSI
* list appending previous VSI with new VSI and update existing
- * VLAN rule to point to new VSI list id
+ * VLAN rule to point to new VSI list ID
*/
struct ice_fltr_info tmp_fltr;
u16 vsi_handle_arr[2];
@@ -2130,9 +2130,9 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
* @hw: pointer to the hardware structure
* @mv_list: list of MAC and VLAN filters
*
- * If the VSI on which the mac-vlan pair has to be added has RX and Tx VLAN
+ * If the VSI on which the MAC-VLAN pair has to be added has Rx and Tx VLAN
* pruning bits enabled, then it is the responsibility of the caller to make
- * sure to add a vlan only filter on the same VSI. Packets belonging to that
+ * sure to add a VLAN only filter on the same VSI. Packets belonging to that
* VLAN won't be received on that VSI otherwise.
*/
enum ice_status
@@ -2446,7 +2446,7 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
struct ice_fltr_mgmt_list_entry *fm_entry;
enum ice_status status = ICE_SUCCESS;
- /* check to make sure VSI id is valid and within boundary */
+ /* check to make sure VSI ID is valid and within boundary */
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -2504,7 +2504,7 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
/**
* ice_remove_promisc - Remove promisc based filter rules
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @v_list: list of promisc entries
*/
static enum ice_status
@@ -2851,8 +2851,8 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
- * @recp_id: Recipe id for which rules need to be replayed
+ * @vsi_handle: driver VSI handle
+ * @recp_id: Recipe ID for which rules need to be replayed
* @list_head: list for which filters need to be replayed
*
* Replays the filter of recipe recp_id for a VSI represented via vsi_handle.
@@ -2877,7 +2877,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
f_entry.fltr_info = itr->fltr_info;
if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN &&
itr->fltr_info.vsi_handle == vsi_handle) {
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
status = ice_add_rule_internal(hw, recp_id, &f_entry);
@@ -2892,7 +2892,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
f_entry.fltr_info.vsi_handle = vsi_handle;
f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
if (recp_id == ICE_SW_LKUP_VLAN)
@@ -2910,7 +2910,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
/**
* ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
+ * @vsi_handle: driver VSI handle
*
* Replays filters for requested VSI via vsi_handle.
*/
@@ -2938,7 +2938,7 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_rm_all_sw_replay_rule_info - deletes filter replay rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Deletes the filter replay rules.
*/
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index dd21781f7..90dfdabcb 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -40,10 +40,10 @@ enum ice_sw_lkup_type {
ICE_SW_LKUP_DFLT = 5,
ICE_SW_LKUP_ETHERTYPE_MAC = 8,
ICE_SW_LKUP_PROMISC_VLAN = 9,
- ICE_SW_LKUP_LAST,
+ ICE_SW_LKUP_LAST
};
-/* type of filter src id */
+/* type of filter src ID */
enum ice_src_id {
ICE_SRC_ID_UNKNOWN = 0,
ICE_SRC_ID_VSI,
@@ -94,8 +94,8 @@ struct ice_fltr_info {
/* Depending on filter action */
union {
- /* queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 hw_vsi_id:10;
@@ -134,8 +134,8 @@ struct ice_sw_act_ctrl {
enum ice_sw_fwd_act_type fltr_act;
/* Depending on filter action */
union {
- /* This is a queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* This is a queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 vsi_id:10;
@@ -178,7 +178,7 @@ struct ice_sw_recipe {
u8 chain_idx;
/* if this recipe is a collection of other recipe then count of other
- * recipes and recipe ids of those recipes
+ * recipes and recipe IDs of those recipes
*/
u8 n_grp_count;
@@ -211,9 +211,11 @@ struct ice_sw_recipe {
/* AQ buffer associated with this recipe */
struct ice_aqc_recipe_data_elem *root_buf;
+ /* This struct saves the fv_words for a given lookup */
+ struct ice_prot_lkup_ext lkup_exts;
};
-/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list id */
+/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list ID */
struct ice_vsi_list_map_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(vsi_map, ICE_MAX_VSI);
@@ -235,7 +237,7 @@ struct ice_fltr_list_entry {
* used for VLAN membership.
*/
struct ice_fltr_mgmt_list_entry {
- /* back pointer to VSI list id to VSI list mapping */
+ /* back pointer to VSI list ID to VSI list mapping */
struct ice_vsi_list_map_info *vsi_list_info;
u16 vsi_count;
#define ICE_INVAL_LG_ACT_INDEX 0xffff
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 17d79ba21..08c974004 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -196,7 +196,7 @@ enum ice_q {
};
/* Different reset sources for which a disable queue AQ call has to be made in
- * order to clean the TX scheduler as a part of the reset
+ * order to clean the Tx scheduler as a part of the reset
*/
enum ice_disq_rst_src {
ICE_NO_RESET = 0,
@@ -242,11 +242,11 @@ struct ice_hw_common_caps {
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
u32 rss_table_entry_width; /* RSS Entry width in bits */
- /* TX/RX queues */
- u32 num_rxq; /* Number/Total RX queues */
- u32 rxq_first_id; /* First queue ID for RX queues */
- u32 num_txq; /* Number/Total TX queues */
- u32 txq_first_id; /* First queue ID for TX queues */
+ /* Tx/Rx queues */
+ u32 num_rxq; /* Number/Total Rx queues */
+ u32 rxq_first_id; /* First queue ID for Rx queues */
+ u32 num_txq; /* Number/Total Tx queues */
+ u32 txq_first_id; /* First queue ID for Tx queues */
/* MSI-X vectors */
u32 num_msix_vectors;
@@ -390,7 +390,7 @@ struct ice_sched_node {
struct ice_sched_node *sibling; /* next sibling in the same layer */
struct ice_sched_node **children;
struct ice_aqc_txsched_elem_data info;
- u32 agg_id; /* aggregator group id */
+ u32 agg_id; /* aggregator group ID */
u16 vsi_handle;
u8 in_use; /* suspended or in use */
u8 tx_sched_layer; /* Logical Layer (1-9) */
@@ -435,8 +435,8 @@ enum ice_agg_type {
/* Rate limit types */
enum ice_rl_type {
ICE_UNKNOWN_BW = 0,
- ICE_MIN_BW, /* for cir profile */
- ICE_MAX_BW, /* for eir profile */
+ ICE_MIN_BW, /* for CIR profile */
+ ICE_MAX_BW, /* for EIR profile */
ICE_SHARED_BW /* for shared profile */
};
@@ -475,7 +475,7 @@ enum ice_rl_type {
*
* (a) is the last_node_teid(not of type Leaf). A leaf node is created under
* (a) as child node where queues get added, add Tx/Rx queue admin commands;
- * need teid of (a) to add queues.
+ * need TEID of (a) to add queues.
*
* This tree
* -> has 8 branches (one for each TC)
@@ -487,7 +487,7 @@ enum ice_rl_type {
* Refer to the documentation for more info.
*/
- /* Data structure for saving bw information */
+ /* Data structure for saving BW information */
enum ice_bw_type {
ICE_BW_TYPE_PRIO,
ICE_BW_TYPE_CIR,
@@ -511,12 +511,12 @@ struct ice_bw_type_info {
u32 shared_bw;
};
-/* vsi type list entry to locate corresponding vsi/ag nodes */
+/* VSI type list entry to locate corresponding VSI/aggregator nodes */
struct ice_sched_vsi_info {
struct ice_sched_node *vsi_node[ICE_MAX_TRAFFIC_CLASS];
struct ice_sched_node *ag_node[ICE_MAX_TRAFFIC_CLASS];
u16 max_lanq[ICE_MAX_TRAFFIC_CLASS];
- /* bw_t_info saves VSI bw information */
+ /* bw_t_info saves VSI BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
@@ -577,7 +577,7 @@ struct ice_dcbx_cfg {
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
- struct ice_hw *hw; /* back pointer to hw instance */
+ struct ice_hw *hw; /* back pointer to HW instance */
u32 last_node_teid; /* scheduler last node info */
u16 sw_id; /* Initial switch ID belongs to port */
u16 pf_vf_num;
@@ -592,7 +592,7 @@ struct ice_port_info {
struct ice_mac_info mac;
struct ice_phy_info phy;
struct ice_lock sched_lock; /* protect access to TXSched tree */
- /* List contain profile id(s) and other params per layer */
+ /* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
@@ -648,7 +648,7 @@ struct ice_hw {
u8 pf_id; /* device profile info */
u16 max_burst_size; /* driver sets this value */
- /* TX Scheduler values */
+ /* Tx Scheduler values */
u16 num_tx_sched_layers;
u16 num_tx_sched_phys_layers;
u8 flattened_layers;
@@ -659,7 +659,7 @@ struct ice_hw {
struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
struct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];
u8 evb_veb; /* true for VEB, false for VEPA */
- u8 reset_ongoing; /* true if hw is in reset, false otherwise */
+ u8 reset_ongoing; /* true if HW is in reset, false otherwise */
struct ice_bus_info bus;
struct ice_nvm_info nvm;
struct ice_hw_dev_caps dev_caps; /* device capabilities */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 02/38] net/ice/base: improve comments
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 02/38] net/ice/base: improve comments Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Improve comments to follow naming rules.
Also the patch include some minor cleanup.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 27 +-
drivers/net/ice/base/ice_common.c | 148 +++----
drivers/net/ice/base/ice_common.h | 4 +-
drivers/net/ice/base/ice_controlq.c | 8 +-
drivers/net/ice/base/ice_flex_pipe.c | 364 ++++++++--------
drivers/net/ice/base/ice_flex_pipe.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 4 +-
drivers/net/ice/base/ice_flow.c | 65 +--
drivers/net/ice/base/ice_flow.h | 1 -
drivers/net/ice/base/ice_lan_tx_rx.h | 70 +--
drivers/net/ice/base/ice_nvm.c | 8 +-
drivers/net/ice/base/ice_protocol_type.h | 4 +-
drivers/net/ice/base/ice_sched.c | 719 ++++++++++++++++---------------
drivers/net/ice/base/ice_sched.h | 8 +-
drivers/net/ice/base/ice_switch.c | 120 +++---
drivers/net/ice/base/ice_switch.h | 20 +-
drivers/net/ice/base/ice_type.h | 34 +-
17 files changed, 804 insertions(+), 802 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a1b9edd14..5a599280e 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -71,7 +71,7 @@ struct ice_aqc_req_res {
#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000
#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000
#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000
- /* For SDP: pin id of the SDP */
+ /* For SDP: pin ID of the SDP */
__le32 res_number;
/* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */
__le16 status;
@@ -854,7 +854,6 @@ struct ice_aqc_delete_elem {
-
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
* Query RL profile (indirect 0x0411)
@@ -1154,8 +1153,8 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
-#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
-#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
+#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
+#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
#define ICE_AQ_PHY_ENA_LINK BIT(3)
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
@@ -1228,7 +1227,7 @@ struct ice_aqc_get_link_status_data {
u8 ext_info;
#define ICE_AQ_LINK_PHY_TEMP_ALARM BIT(0)
#define ICE_AQ_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
- /* Port TX Suspended */
+ /* Port Tx Suspended */
#define ICE_AQ_LINK_TX_S 2
#define ICE_AQ_LINK_TX_M (0x03 << ICE_AQ_LINK_TX_S)
#define ICE_AQ_LINK_TX_ACTIVE 0
@@ -1441,7 +1440,7 @@ struct ice_aqc_get_set_rss_lut {
-/* Add TX LAN Queues (indirect 0x0C30) */
+/* Add Tx LAN Queues (indirect 0x0C30) */
struct ice_aqc_add_txqs {
u8 num_qgrps;
u8 reserved[3];
@@ -1451,7 +1450,7 @@ struct ice_aqc_add_txqs {
};
-/* This is the descriptor of each queue entry for the Add TX LAN Queues
+/* This is the descriptor of each queue entry for the Add Tx LAN Queues
* command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp.
*/
struct ice_aqc_add_txqs_perq {
@@ -1464,7 +1463,7 @@ struct ice_aqc_add_txqs_perq {
};
-/* The format of the command buffer for Add TX LAN Queues (0x0C30)
+/* The format of the command buffer for Add Tx LAN Queues (0x0C30)
* is an array of the following structs. Please note that the length of
* each struct ice_aqc_add_tx_qgrp is variable due
* to the variable number of queues in each group!
@@ -1477,7 +1476,7 @@ struct ice_aqc_add_tx_qgrp {
};
-/* Disable TX LAN Queues (indirect 0x0C31) */
+/* Disable Tx LAN Queues (indirect 0x0C31) */
struct ice_aqc_dis_txqs {
u8 cmd_type;
#define ICE_AQC_Q_DIS_CMD_S 0
@@ -1500,7 +1499,7 @@ struct ice_aqc_dis_txqs {
};
-/* The buffer for Disable TX LAN Queues (indirect 0x0C31)
+/* The buffer for Disable Tx LAN Queues (indirect 0x0C31)
* contains the following structures, arrayed one after the
* other.
* Note: Since the q_id is 16 bits wide, if the
@@ -1528,7 +1527,7 @@ struct ice_aqc_dis_txq {
};
-/* TX LAN Queues Cleanup Event (0x0C31) */
+/* Tx LAN Queues Cleanup Event (0x0C31) */
struct ice_aqc_txqs_cleanup {
__le16 caller_opc;
__le16 cmd_tag;
@@ -1536,7 +1535,7 @@ struct ice_aqc_txqs_cleanup {
};
-/* Move / Reconfigure TX Queues (indirect 0x0C32) */
+/* Move / Reconfigure Tx Queues (indirect 0x0C32) */
struct ice_aqc_move_txqs {
u8 cmd_type;
#define ICE_AQC_Q_CMD_TYPE_S 0
@@ -1557,7 +1556,7 @@ struct ice_aqc_move_txqs {
};
-/* This is the descriptor of each queue entry for the move TX LAN Queues
+/* This is the descriptor of each queue entry for the move Tx LAN Queues
* command (0x0C32).
*/
struct ice_aqc_move_txqs_elem {
@@ -1950,7 +1949,7 @@ enum ice_adminq_opc {
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
- /* TX queue handling commands/events */
+ /* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
ice_aqc_opc_dis_txqs = 0x0C31,
ice_aqc_opc_txqs_cleanup = 0x0C31,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 145f66a90..bcfa3014b 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -36,7 +36,7 @@
* @hw: pointer to the HW structure
*
* This function sets the MAC type of the adapter based on the
- * vendor ID and device ID stored in the hw structure.
+ * vendor ID and device ID stored in the HW structure.
*/
static enum ice_status ice_set_mac_type(struct ice_hw *hw)
{
@@ -79,7 +79,7 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
/**
* ice_aq_manage_mac_read - manage MAC address read command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the manage MAC read response
* @buf_size: Size of the virtual buffer
* @cd: pointer to command details structure or NULL
@@ -338,7 +338,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
/* flag cleared so calling functions don't call AQ again */
pi->phy.get_link_info = false;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -426,7 +426,7 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -446,7 +446,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
{
@@ -503,7 +503,7 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
/**
* ice_cfg_fw_log - configure FW logging
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @enable: enable certain FW logging events if true, disable all if false
*
* This function enables/disables the FW logging via Rx CQ events and a UART
@@ -652,7 +652,7 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable)
/**
* ice_output_fw_log
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: pointer to the AQ message descriptor
* @buf: pointer to the buffer accompanying the AQ message
*
@@ -668,7 +668,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
/**
* ice_get_itr_intrl_gran - determine int/intrl granularity
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
@@ -763,7 +763,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
goto err_unroll_cqinit;
}
- /* set the back pointer to hw */
+ /* set the back pointer to HW */
hw->port_info->hw = hw;
/* Initialize port_info struct with switch configuration data */
@@ -1034,7 +1034,7 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
* @ice_rxq_ctx: pointer to the rxq context
* @rxq_index: the index of the Rx queue
*
- * Copies rxq context from dense structure to hw register space
+ * Copies rxq context from dense structure to HW register space
*/
static enum ice_status
ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
@@ -1047,7 +1047,7 @@ ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
if (rxq_index > QRX_CTRL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, QRX_CONTEXT(i, rxq_index),
*((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
@@ -1091,7 +1091,7 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = {
* @rxq_index: the index of the Rx queue
*
* Converts rxq context from sparse to dense structure and then writes
- * it to hw register space
+ * it to HW register space
*/
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -1109,7 +1109,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
* @hw: pointer to the hardware structure
* @rxq_index: the index of the Rx queue to clear
*
- * Clears rxq context in hw register space
+ * Clears rxq context in HW register space
*/
enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
{
@@ -1166,7 +1166,7 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {
* @ice_tx_cmpltnq_ctx: pointer to the Tx completion queue context
* @tx_cmpltnq_index: the index of the completion queue
*
- * Copies Tx completion q context from dense structure to hw register space
+ * Copies Tx completion queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
@@ -1180,7 +1180,7 @@ ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
if (tx_cmpltnq_index > GLTCLAN_CQ_CNTX0_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS; i++) {
wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index),
*((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
@@ -1215,7 +1215,7 @@ static const struct ice_ctx_ele ice_tx_cmpltnq_ctx_info[] = {
* @tx_cmpltnq_index: the index of the completion queue
*
* Converts completion queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
@@ -1233,7 +1233,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_cmpltnq_index: the index of the completion queue to clear
*
- * Clears Tx completion queue context in hw register space
+ * Clears Tx completion queue context in HW register space
*/
enum ice_status
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
@@ -1256,7 +1256,7 @@ ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
* @ice_tx_drbell_q_ctx: pointer to the doorbell queue context
* @tx_drbell_q_index: the index of the doorbell queue
*
- * Copies doorbell q context from dense structure to hw register space
+ * Copies doorbell queue context from dense structure to HW register space
*/
static enum ice_status
ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
@@ -1270,7 +1270,7 @@ ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
if (tx_drbell_q_index > QTX_COMM_DBLQ_DBELL_MAX_INDEX)
return ICE_ERR_PARAM;
- /* Copy each dword separately to hw */
+ /* Copy each dword separately to HW */
for (i = 0; i < ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS; i++) {
wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index),
*((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
@@ -1306,7 +1306,7 @@ static const struct ice_ctx_ele ice_tx_drbell_q_ctx_info[] = {
* @tx_drbell_q_index: the index of the doorbell queue
*
* Converts doorbell queue context from sparse to dense structure and then
- * writes it to hw register space
+ * writes it to HW register space
*/
enum ice_status
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
@@ -1324,7 +1324,7 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
* @hw: pointer to the hardware structure
* @tx_drbell_q_index: the index of the doorbell queue to clear
*
- * Clears doorbell queue context in hw register space
+ * Clears doorbell queue context in HW register space
*/
enum ice_status
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
@@ -1394,7 +1394,7 @@ ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf, u16 buf_len)
/**
* ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @desc: descriptor describing the command
* @buf: buffer to use for indirect commands (NULL for direct commands)
* @buf_size: size of buffer for indirect commands (0 for direct commands)
@@ -1411,7 +1411,7 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
/**
* ice_aq_get_fw_ver
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cd: pointer to command details structure or NULL
*
* Get the firmware version (0x0001) from the admin queue commands
@@ -1446,7 +1446,7 @@ enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
/**
* ice_aq_q_shutdown
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @unloading: is the driver unloading itself
*
* Tell the Firmware that we're shutting down the AdminQ and whether
@@ -1469,8 +1469,8 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
/**
* ice_aq_req_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @access: access type
* @sdp_number: resource number
* @timeout: the maximum time in ms that the driver may hold the resource
@@ -1557,8 +1557,8 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_aq_release_res
- * @hw: pointer to the hw struct
- * @res: resource id
+ * @hw: pointer to the HW struct
+ * @res: resource ID
* @sdp_number: resource number
* @cd: pointer to command details structure or NULL
*
@@ -1586,7 +1586,7 @@ ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
/**
* ice_acquire_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
* @access: access type (read or write)
* @timeout: timeout in milliseconds
*
@@ -1650,7 +1650,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
/**
* ice_release_res
* @hw: pointer to the HW structure
- * @res: resource id
+ * @res: resource ID
*
* This function will release a resource using the proper Admin Command.
*/
@@ -1664,7 +1664,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
status = ice_aq_release_res(hw, res, 0, NULL);
/* there are some rare cases when trying to release the resource
- * results in an admin Q timeout, so handle them correctly
+ * results in an admin queue timeout, so handle them correctly
*/
while ((status == ICE_ERR_AQ_TIMEOUT) &&
(total_delay < hw->adminq.sq_cmd_timeout)) {
@@ -1676,7 +1676,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
/**
* ice_aq_alloc_free_res - command to allocate/free resources
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_entries: number of resource entries in buffer
* @buf: Indirect buffer to hold data parameters and response
* @buf_size: size of buffer for indirect commands
@@ -1714,7 +1714,7 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
/**
* ice_alloc_hw_res - allocate resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
* @sh: shared if true, dedicated if false
@@ -1751,8 +1751,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
}
/**
- * ice_free_hw_res - free allocated hw resource
- * @hw: pointer to the hw struct
+ * ice_free_hw_res - free allocated HW resource
+ * @hw: pointer to the HW struct
* @type: type of resource to free
* @num: number of resources
* @res: pointer to array that contains the resources to free
@@ -1786,7 +1786,7 @@ ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
/**
* ice_get_num_per_func - determine number of resources per PF
- * @hw: pointer to the hw structure
+ * @hw: pointer to the HW structure
* @max: value to be evenly split between each PF
*
* Determine the number of valid functions by going through the bitmap returned
@@ -1809,7 +1809,7 @@ static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)
/**
* ice_parse_caps - parse function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: pointer to a buffer containing function/device capability records
* @cap_count: number of capability records in the list
* @opc: type of capabilities list to parse
@@ -1929,7 +1929,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
/**
* ice_aq_discover_caps - query function/device capabilities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf: a virtual buffer to hold the capabilities
* @buf_size: Size of the virtual buffer
* @cap_count: cap count needed if AQ err==ENOMEM
@@ -2028,7 +2028,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
/**
* ice_aq_manage_mac_write - manage MAC address write command
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address
* @flags: flags to control write behavior
* @cd: pointer to command details structure or NULL
@@ -2057,7 +2057,7 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
/**
* ice_aq_clear_pxe_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Tell the firmware that the driver is taking over from PXE (0x0110).
*/
@@ -2073,7 +2073,7 @@ static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw)
/**
* ice_clear_pxe_mode - clear pxe operations mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Make sure all PXE mode settings are cleared, including things
* like descriptor fetch/write-back mode.
@@ -2090,10 +2090,10 @@ void ice_clear_pxe_mode(struct ice_hw *hw)
* @phy_type_low: lower part of phy_type
* @phy_type_high: higher part of phy_type
*
- * This helper function will convert an entry in phy type structure
+ * This helper function will convert an entry in PHY type structure
* [phy_type_low, phy_type_high] to its corresponding link speed.
* Note: In the structure of [phy_type_low, phy_type_high], there should
- * be one bit set, as this function will convert one phy type to its
+ * be one bit set, as this function will convert one PHY type to its
* speed.
* If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
* If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
@@ -2263,7 +2263,7 @@ ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
/**
* ice_aq_set_phy_cfg
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @cfg: structure with PHY configuration data to be set
* @cd: pointer to command details structure or NULL
@@ -2372,7 +2372,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
if (!pcaps)
return ICE_ERR_NO_MEMORY;
- /* Get the current phy config */
+ /* Get the current PHY config */
status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
NULL);
if (status) {
@@ -2561,7 +2561,7 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
/**
* ice_aq_set_event_mask
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @port_num: port number of the physical function
* @mask: event mask to be set
* @cd: pointer to command details structure or NULL
@@ -2587,7 +2587,7 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
/**
* ice_aq_set_mac_loopback
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @ena_lpbk: Enable or Disable loopback
* @cd: pointer to command details structure or NULL
*
@@ -2775,7 +2775,7 @@ ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type,
/**
* __ice_aq_get_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_id: VSI FW index
* @key: pointer to key info struct
* @set: set true to set the key, false to get the key
@@ -2810,7 +2810,7 @@ ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
/**
* ice_aq_get_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @key: pointer to key info struct
*
@@ -2829,7 +2829,7 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
/**
* ice_aq_set_rss_key
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @keys: pointer to key info struct
*
@@ -2916,8 +2916,8 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
* @num_qgrps: number of groups in the list
* @qg_list: the list of groups to disable
* @buf_size: the total size of the qg_list buffer in bytes
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* Disable LAN Tx queue (0x0C31)
@@ -2993,7 +2993,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",
vmvf_num, hw->adminq.sq_last_status);
else
- ice_debug(hw, ICE_DBG_SCHED, "disable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",
LE16_TO_CPU(qg_list[0].q_id[0]),
hw->adminq.sq_last_status);
}
@@ -3232,13 +3232,13 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @tc: tc number
+ * @tc: TC number
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
* @cd: pointer to command details structure or NULL
*
- * This function adds one lan q
+ * This function adds one LAN queue
*/
enum ice_status
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
@@ -3282,14 +3282,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* Bit 5-6.
* - Bit 7 is reserved.
* Without setting the generic section as valid in valid_sections, the
- * Admin Q command will fail with error code ICE_AQ_RC_EINVAL.
+ * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
*/
buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
- /* add the lan q */
+ /* add the LAN queue */
status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
if (status != ICE_SUCCESS) {
- ice_debug(hw, ICE_DBG_SCHED, "enable Q %d failed %d\n",
+ ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n",
LE16_TO_CPU(buf->txqs[0].txq_id),
hw->adminq.sq_last_status);
goto ena_txq_exit;
@@ -3298,7 +3298,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
- /* add a leaf node into schduler tree q layer */
+ /* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
ena_txq_exit:
@@ -3312,8 +3312,8 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* @num_queues: number of queues
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
- * @rst_src: if called due to reset, specifies the rst source
- * @vmvf_num: the relative vm or vf number that is undergoing the reset
+ * @rst_src: if called due to reset, specifies the reset source
+ * @vmvf_num: the relative VM or VF number that is undergoing the reset
* @cd: pointer to command details structure or NULL
*
* This function removes queues and their corresponding nodes in SW DB
@@ -3363,12 +3363,12 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
}
/**
- * ice_cfg_vsi_qs - configure the new/exisiting VSI queues
+ * ice_cfg_vsi_qs - configure the new/existing VSI queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
* @maxqs: max queues array per TC
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
* This function adds/updates the VSI queues per TC.
*/
@@ -3403,13 +3403,13 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
}
/**
- * ice_cfg_vsi_lan - configure VSI lan queues
+ * ice_cfg_vsi_lan - configure VSI LAN queues
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc_bitmap: TC bitmap
- * @max_lanqs: max lan queues array per TC
+ * @max_lanqs: max LAN queues array per TC
*
- * This function adds/updates the VSI lan queues per TC.
+ * This function adds/updates the VSI LAN queues per TC.
*/
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
@@ -3423,7 +3423,7 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
/**
* ice_replay_pre_init - replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Initializes required config data for VSI, FD, ACL, and RSS before replay.
*/
@@ -3447,9 +3447,9 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
}
/**
- * ice_replay_vsi - replay vsi configuration
- * @hw: pointer to the hw struct
- * @vsi_handle: driver vsi handle
+ * ice_replay_vsi - replay VSI configuration
+ * @hw: pointer to the HW struct
+ * @vsi_handle: driver VSI handle
*
* Restore all VSI configuration after reset. It is required to call this
* function with main VSI first.
@@ -3477,7 +3477,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_post - post replay configuration cleanup
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Post replay cleanup.
*/
@@ -3553,9 +3553,9 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
/**
- * ice_sched_query_elem - query element information from hw
- * @hw: pointer to the hw struct
- * @node_teid: node teid to be queried
+ * ice_sched_query_elem - query element information from HW
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID to be queried
* @buf: buffer to element information
*
* This function queries HW element information
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 5ac991ef2..f2ad86182 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -61,8 +61,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw);
* ... the value of pointer would equal 0x1008, since 0x1008 is the next
* address after 0x1006 which is divisible by 4.
*/
-#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
-
+#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
enum ice_status
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
@@ -149,7 +148,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
-
enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index cbc4cb4c2..1c0830cec 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -54,7 +54,7 @@ static void ice_mailbox_init_regs(struct ice_hw *hw)
/**
* ice_check_sq_alive
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if Queue is enabled else false.
@@ -729,7 +729,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_done - check if FW has processed the Admin Send Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
*
* Returns true if the firmware has processed all descriptors on the
@@ -745,7 +745,7 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/**
* ice_sq_send_cmd - send command to Control Queue (ATQ)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @desc: prefilled descriptor describing the command (non DMA mem)
* @buf: buffer to use for indirect commands (or NULL for direct commands)
@@ -990,7 +990,7 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
/**
* ice_clean_rq_elem
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cq: pointer to the specific Control queue
* @e: event info from the receive descriptor, includes any buffers
* @pending: number of events that could be left to process
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 493bc4e9b..c87424601 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -325,11 +325,11 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
* ice_boost_tcam_handler
* @sect_type: section type
* @section: pointer to section
- * @index: index of the boost tcam entry to be returned
- * @offset: pointer to receive absolute offset, always 0 for boost tcam sections
+ * @index: index of the boost TCAM entry to be returned
+ * @offset: pointer to receive absolute offset, always 0 for boost TCAM sections
*
* This is a callback function that can be passed to ice_pkg_enum_entry.
- * Handles enumeration of individual boost tcam entries.
+ * Handles enumeration of individual boost TCAM entries.
*/
static void *
ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
@@ -501,7 +501,7 @@ void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
label_name = ice_enum_labels(NULL, 0, &state, &val);
}
- /* Cache the appropriate boost tcam entry pointers */
+ /* Cache the appropriate boost TCAM entry pointers */
for (i = 0; i < hw->tnl.count; i++) {
ice_find_boost_entry(ice_seg, hw->tnl.tbl[i].boost_addr,
&hw->tnl.tbl[i].boost_entry);
@@ -1078,7 +1078,7 @@ enum ice_status ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg)
* @hw: pointer to the hardware structure
* @pkg_hdr: pointer to the driver's package hdr
*
- * Saves off the package details into the hw structure.
+ * Saves off the package details into the HW structure.
*/
enum ice_status
ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
@@ -1468,14 +1468,14 @@ ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
/**
* ice_get_sw_fv_list
* @hw: pointer to the HW structure
- * @prot_ids: field vector to search for with a given protocol id
+ * @prot_ids: field vector to search for with a given protocol ID
* @ids_cnt: lookup/protocol count
* @fv_list: Head of a list
*
* Finds all the field vector entries from switch block that contain
- * a given protocol id and returns a list of structures of type
+ * a given protocol ID and returns a list of structures of type
* "ice_sw_fv_list_entry". Every structure in the list has a field vector
- * definition and profile id information
+ * definition and profile ID information
* NOTE: The caller of the function is responsible for freeing the memory
* allocated for every list entry.
*/
@@ -1782,11 +1782,11 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
/* PTG Management */
/**
- * ice_ptg_update_xlt1 - Updates packet type groups in hw via xlt1 table
+ * ice_ptg_update_xlt1 - Updates packet type groups in HW via XLT1 table
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt1 hardware table to reflect the new
+ * This function will update the XLT1 hardware table to reflect the new
* packet type group configuration.
*/
enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
@@ -1817,7 +1817,7 @@ enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to search for
* @ptg: pointer to variable that receives the PTG
*
@@ -1838,7 +1838,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
/**
* ice_ptg_alloc_val - Allocates a new packet type group ID by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg to allocate
*
* This function allocates a given packet type group ID specified by the ptg
@@ -1853,7 +1853,7 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_alloc - Find a free entry and allocates a new packet type group ID
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function allocates and returns a new packet type group ID. Note
* that 0 is the default packet type group, so successfully created PTGs will
@@ -1877,7 +1877,7 @@ u8 ice_ptg_alloc(struct ice_hw *hw, enum ice_block blk)
/**
* ice_ptg_free - Frees a packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptg: the ptg ID to free
*
* This function frees a packet type group, and returns all the current ptypes
@@ -1902,7 +1902,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg)
/**
* ice_ptg_remove_ptype - Removes ptype from a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to remove
* @ptg: the ptg to remove the ptype from
*
@@ -1947,7 +1947,7 @@ ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/**
* ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to add or move
* @ptg: the ptg to add or move the ptype to
*
@@ -1998,10 +1998,10 @@ ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
/* Block / table size info */
struct ice_blk_size_details {
- u16 xlt1; /* # xlt1 entries */
- u16 xlt2; /* # xlt2 entries */
- u16 prof_tcam; /* # profile id tcam entries */
- u16 prof_id; /* # profile ids */
+ u16 xlt1; /* # XLT1 entries */
+ u16 xlt2; /* # XLT2 entries */
+ u16 prof_tcam; /* # profile ID TCAM entries */
+ u16 prof_id; /* # profile IDs */
u8 prof_cdid_bits; /* # cdid one-hot bits used in key */
u16 prof_redir; /* # profile redirection entries */
u16 es; /* # extraction sequence entries */
@@ -2079,7 +2079,7 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* profile cookies must compare, and in the exact same order to take
* into account priority
*/
- while (--count) {
+ while (count--) {
if (tmp2->profile_cookie != tmp1->profile_cookie)
return false;
@@ -2093,13 +2093,13 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
/* VSIG Management */
/**
- * ice_vsig_update_xlt2_sect - update one section of xlt2 table
+ * ice_vsig_update_xlt2_sect - update one section of XLT2 table
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: hw vsi number to program
- * @vsig: vsig for the vsi
+ * @blk: HW block
+ * @vsi: HW VSI number to program
+ * @vsig: vsig for the VSI
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration.
*/
static enum ice_status
@@ -2128,11 +2128,11 @@ ice_vsig_update_xlt2_sect(struct ice_hw *hw, enum ice_block blk, u16 vsi,
}
/**
- * ice_vsig_update_xlt2 - update xlt2 table with VSIG configuration
+ * ice_vsig_update_xlt2 - update XLT2 table with VSIG configuration
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
- * This function will update the xlt2 hardware table with the input vsi
+ * This function will update the XLT2 hardware table with the input VSI
* group configuration of used vsis.
*/
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
@@ -2158,14 +2158,14 @@ enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_vsig_find_vsi - find a VSIG that contains a specified vsi
+ * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi of interest
- * @vsig: pointer to receive the vsi group
+ * @blk: HW block
+ * @vsi: VSI of interest
+ * @vsig: pointer to receive the VSI group
*
- * This function will lookup the vsi entry in the XLT2 list and return
- * the vsi group its associated with.
+ * This function will lookup the VSI entry in the XLT2 list and return
+ * the VSI group its associated with.
*/
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
@@ -2174,7 +2174,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
return ICE_ERR_PARAM;
/* As long as there's a default or valid VSIG associated with the input
- * vsi, the functions returns a success. Any handling of VSIG will be
+ * VSI, the functions returns a success. Any handling of VSIG will be
* done by the following add, update or remove functions.
*/
*vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
@@ -2185,7 +2185,7 @@ ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
/**
* ice_vsig_alloc_val - allocate a new VSIG by value
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: the vsig to allocate
*
* This function will allocate a given VSIG specified by the vsig parameter.
@@ -2205,7 +2205,7 @@ static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
/**
* ice_vsig_alloc - Finds a free entry and allocates a new VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
*
* This function will iterate through the VSIG list and mark the first
* unused entry for the new VSIG entry as used and return that value.
@@ -2222,16 +2222,16 @@ static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_find_dup_props_vsig - find vsi group with a specified set of properties
+ * ice_find_dup_props_vsig - find VSI group with a specified set of properties
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @chs: characteristic list
* @vsig: returns the VSIG with the matching profiles, if found
*
- * Each VSIG is associated with a characteristic set; i.e. all vsis under
+ * Each VSIG is associated with a characteristic set; i.e. all VSIs under
* a group have the same characteristic set. To check if there exists a VSIG
* which has the same characteristics as the input characteristics; this
- * function will iterate through the xlt2 list and return the VSIG that has a
+ * function will iterate through the XLT2 list and return the VSIG that has a
* matching configuration. In order to make sure that priorities are accounted
* for, the list must match exactly, including the order in which the
* characteristics are listed.
@@ -2257,12 +2257,12 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_vsig_free - free vsi group
+ * ice_vsig_free - free VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to remove
*
- * The function will remove all vsis associated with the input VSIG and move
+ * The function will remove all VSIs associated with the input VSIG and move
* them to the DEFAULT_VSIG and mark the VSIG available.
*/
enum ice_status
@@ -2310,14 +2310,14 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_vsig_add_mv_vsi - add or move a vsi to a vsi group
+ * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to move
- * @vsig: destination vsi group
+ * @blk: HW block
+ * @vsi: VSI to move
+ * @vsig: destination VSI group
*
- * This function will move or add the input vsi to the target VSIG.
- * The function will find the original VSIG the vsi belongs to and
+ * This function will move or add the input VSI to the target VSIG.
+ * The function will find the original VSIG the VSI belongs to and
* move the entry to the DEFAULT_VSIG, update the original VSIG and
* then move entry to the new VSIG.
*/
@@ -2358,7 +2358,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
- /* Create vsi entry and add VSIG and prop_mask values */
+ /* Create VSI entry and add VSIG and prop_mask values */
hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
hw->blk[blk].xlt2.vsis[vsi].changed = 1;
@@ -2373,13 +2373,13 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_vsig_remove_vsi - remove vsi from VSIG
+ * ice_vsig_remove_vsi - remove VSI from VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
- * @vsi: vsi to remove
- * @vsig: vsi group to remove from
+ * @blk: HW block
+ * @vsi: VSI to remove
+ * @vsig: VSI group to remove from
*
- * The function will remove the input vsi from its vsi group and move it
+ * The function will remove the input VSI from its VSI group and move it
* to the DEFAULT_VSIG.
*/
enum ice_status
@@ -2396,7 +2396,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
return ICE_ERR_DOES_NOT_EXIST;
- /* entry already in default VSIG, dont have to remove */
+ /* entry already in default VSIG, don't have to remove */
if (idx == ICE_DEFAULT_VSIG)
return ICE_SUCCESS;
@@ -2407,7 +2407,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
vsi_cur = (*vsi_head);
- /* iterate the vsi list, skip over the entry to be removed */
+ /* iterate the VSI list, skip over the entry to be removed */
while (vsi_cur) {
if (vsi_tgt == vsi_cur) {
(*vsi_head) = vsi_cur->next_vsi;
@@ -2417,7 +2417,7 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
vsi_cur = vsi_cur->next_vsi;
}
- /* verify if vsi was removed from group list */
+ /* verify if VSI was removed from group list */
if (!vsi_cur)
return ICE_ERR_DOES_NOT_EXIST;
@@ -2429,11 +2429,11 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
}
/**
- * ice_find_prof_id - find profile id for a given field vector
+ * ice_find_prof_id - find profile ID for a given field vector
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @fv: field vector to search for
- * @prof_id: receives the profile id
+ * @prof_id: receives the profile ID
*/
static enum ice_status
ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
@@ -2456,7 +2456,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_id_rsrc_type - get profile id resource type for a block type
+ * ice_prof_id_rsrc_type - get profile ID resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2485,7 +2485,7 @@ static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_tcam_ent_rsrc_type - get tcam entry resource type for a block type
+ * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
* @blk: the block type
* @rsrc_type: pointer to variable to receive the resource type
*/
@@ -2707,10 +2707,10 @@ ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
}
/**
- * ice_alloc_tcam_ent - allocate hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the tcam for
- * @tcam_idx: pointer to variable to receive the tcam entry
+ * ice_alloc_tcam_ent - allocate hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the TCAM for
+ * @tcam_idx: pointer to variable to receive the TCAM entry
*
* This function allocates a new entry in a Profile ID TCAM for a specific
* block.
@@ -2727,10 +2727,10 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
}
/**
- * ice_free_tcam_ent - free hardware tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the tcam entry
- * @tcam_idx: the tcam entry to free
+ * ice_free_tcam_ent - free hardware TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the TCAM entry
+ * @tcam_idx: the TCAM entry to free
*
* This function frees an entry in a Profile ID TCAM for a specific block.
*/
@@ -2746,12 +2746,12 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
}
/**
- * ice_alloc_prof_id - allocate profile id
- * @hw: pointer to the hw struct
- * @blk: the block to allocate the profile id for
- * @prof_id: pointer to variable to receive the profile id
+ * ice_alloc_prof_id - allocate profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block to allocate the profile ID for
+ * @prof_id: pointer to variable to receive the profile ID
*
- * This function allocates a new profile id, which also corresponds to a Field
+ * This function allocates a new profile ID, which also corresponds to a Field
* Vector (Extraction Sequence) entry.
*/
static enum ice_status
@@ -2772,12 +2772,12 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
}
/**
- * ice_free_prof_id - free profile id
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id to free
+ * ice_free_prof_id - free profile ID
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID to free
*
- * This function frees a profile id, which also corresponds to a Field Vector.
+ * This function frees a profile ID, which also corresponds to a Field Vector.
*/
static enum ice_status
ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2801,9 +2801,9 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_inc_ref - increment reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to increment the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to increment the reference count
*/
static enum ice_status
ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2818,9 +2818,9 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_prof_dec_ref - decrement reference count for profile
- * @hw: pointer to the hw struct
- * @blk: the block from which to free the profile id
- * @prof_id: the profile id for which to decrement the reference count
+ * @hw: pointer to the HW struct
+ * @blk: the block from which to free the profile ID
+ * @prof_id: the profile ID for which to decrement the reference count
*/
static enum ice_status
ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
@@ -2838,9 +2838,9 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
/**
* ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block in which to write the extraction sequence
- * @prof_id: the profile id to write
+ * @prof_id: the profile ID to write
* @fv: pointer to the extraction sequence to write
*/
static void
@@ -2921,7 +2921,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
u8 *src, *dst;
void *sect;
- /* if the hw segment pointer is null then the first iteration of
+ /* if the HW segment pointer is null then the first iteration of
* ice_pkg_enum_section() will fail. In this case the Hw tables will
* not be filled and return success.
*/
@@ -3072,7 +3072,7 @@ static void ice_free_flow_profs(struct ice_hw *hw)
/**
* ice_free_prof_map - frees the profile map
* @hw: pointer to the hardware structure
- * @blk: the hw block which contains the profile map to be freed
+ * @blk: the HW block which contains the profile map to be freed
*/
static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
{
@@ -3091,7 +3091,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
/**
* ice_free_vsig_tbl - free complete VSIG table entries
* @hw: pointer to the hardware structure
- * @blk: the hw block on which to free the VSIG table entries
+ * @blk: the HW block on which to free the VSIG table entries
*/
static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
{
@@ -3151,9 +3151,9 @@ static void ice_init_flow_profs(struct ice_hw *hw)
}
/**
- * ice_init_sw_xlt1_db - init software xlt1 database from hw tables
+ * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
@@ -3172,9 +3172,9 @@ void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_xlt2_db - init software xlt2 database from hw tables
+ * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
* @hw: pointer to the hardware structure
- * @blk: the hw block to initialize
+ * @blk: the HW block to initialize
*/
static
void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
@@ -3197,7 +3197,7 @@ void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
}
/**
- * ice_init_sw_db - init software database from hw tables
+ * ice_init_sw_db - init software database from HW tables
* @hw: pointer to the hardware structure
*/
static
@@ -3329,9 +3329,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
}
/**
- * ice_prof_gen_key - generate profile id key
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_prof_gen_key - generate profile ID key
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3339,7 +3339,7 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
* @vl_msk: valid mask
* @dc_msk: don't care mask
* @nm_msk: never match mask
- * @key: output of profile id key
+ * @key: output of profile ID key
*/
static enum ice_status
ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
@@ -3384,11 +3384,11 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
}
/**
- * ice_tcam_write_entry - write tcam entry
- * @hw: pointer to the hw struct
- * @blk: the block in which to write profile id to
+ * ice_tcam_write_entry - write TCAM entry
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write profile ID to
* @idx: the entry index to write to
- * @prof_id: profile id
+ * @prof_id: profile ID
* @ptg: packet type group (PTG) portion of key
* @vsig: VSIG portion of key
* @cdid: cdid portion of key
@@ -3418,9 +3418,9 @@ ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
}
/**
- * ice_vsig_get_ref - returns number of vsis belong to a VSIG
+ * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to query
* @refs: pointer to variable to receive the reference count
*/
@@ -3446,7 +3446,7 @@ ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
/**
* ice_get_ptg - get or allocate a ptg for a ptype
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @ptype: the ptype to retrieve the PTG for
* @ptg: receives the PTG of the ptype
* @add: receive boolean indicating whether PTG was added or not
@@ -3483,7 +3483,7 @@ ice_get_ptg(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg,
/**
* ice_has_prof_vsig - check to see if VSIG has a specific profile
* @hw: pointer to the hardware structure
- * @blk: hw block
+ * @blk: HW block
* @vsig: VSIG to check against
* @hdl: profile handle
*/
@@ -3500,14 +3500,14 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
}
ice_debug(hw, ICE_DBG_INIT,
- "Characteristic list for vsi group %d not found.\n",
+ "Characteristic list for VSI group %d not found.\n",
vsig);
return false;
}
/**
- * ice_prof_bld_es - build profile id extraction sequence changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_es - build profile ID extraction sequence changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3546,8 +3546,8 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_tcam - build profile id tcam changes
- * @hw: pointer to the hw struct
+ * ice_prof_bld_tcam - build profile ID TCAM changes
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3586,7 +3586,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
}
/**
- * ice_prof_bld_xlt1 - build xlt1 changes
+ * ice_prof_bld_xlt1 - build XLT1 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3619,7 +3619,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
}
/**
- * ice_prof_bld_xlt2 - build xlt2 changes
+ * ice_prof_bld_xlt2 - build XLT2 changes
* @blk: hardware block
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
@@ -3662,7 +3662,7 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
/**
* ice_upd_prof_hw - update hardware using the change list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @chgs: the list of changes to make in hardware
*/
@@ -3763,16 +3763,16 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
/**
* ice_add_prof - add profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @id: profile tracking id
+ * @id: profile tracking ID
* @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
* @es: extraction sequence (length of array is determined by the block)
*
* This function registers a profile, which matches a set of PTYPES with a
* particular extraction sequence. While the hardware profile is allocated
* it will not be written until the first call to ice_add_flow that specifies
- * the id value used here.
+ * the ID value used here.
*/
enum ice_status
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
@@ -3787,7 +3787,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/* search for existing profile */
status = ice_find_prof_id(hw, blk, es, &prof_id);
if (status) {
- /* allocate profile id */
+ /* allocate profile ID */
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
@@ -3851,7 +3851,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
/**
* ice_search_prof_id - Search for a profile tracking ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
@@ -3876,7 +3876,7 @@ ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_set_prof_context - Set context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: context
@@ -3895,7 +3895,7 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt)
/**
* ice_get_prof_context - Get context for a given profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
* @cntxt: pointer to variable to receive the context
@@ -3914,7 +3914,7 @@ ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt)
/**
* ice_vsig_prof_id_count - count profiles in a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
*/
@@ -3933,8 +3933,8 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
}
/**
- * ice_rel_tcam_idx - release a tcam index
- * @hw: pointer to the hw struct
+ * ice_rel_tcam_idx - release a TCAM index
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @idx: the index to release
*/
@@ -3947,13 +3947,13 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
enum ice_status status;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
dc_msk, nm_msk);
if (status)
return status;
- /* release the tcam entry */
+ /* release the TCAM entry */
status = ice_free_tcam_ent(hw, blk, idx);
return status;
@@ -3961,7 +3961,7 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
/**
* ice_rem_prof_id - remove one profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
@@ -4007,7 +4007,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_vsig - remove VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to remove
* @chg: the change list
@@ -4069,7 +4069,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_rem_prof_id_vsig - remove a specific profile from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG to remove the profile from
* @hdl: profile handle indicating which profile to remove
@@ -4105,7 +4105,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_rem_flow_all - remove all flows with a particular profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*/
@@ -4143,11 +4143,11 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_rem_prof - remove profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
- * This will remove the profile specified by the id parameter, which was
+ * This will remove the profile specified by the ID parameter, which was
* previously created through ice_add_prof. If any existing entries
* are associated with this profile, they will be removed as well.
*/
@@ -4177,7 +4177,7 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
/**
* ice_get_prof_ptgs - get ptgs for profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: profile handle
* @chg: change list
@@ -4190,7 +4190,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4231,7 +4231,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
/**
* ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: VSIG from which to copy the list
* @lst: output list
@@ -4272,7 +4272,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_to_lst - add profile entry to a list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @lst: the list to be added to
* @hdl: profile handle of entry to add
@@ -4320,7 +4320,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
/**
* ice_move_vsi - move VSI to another VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the VSI to move
* @vsig: the VSIG to move the VSI to
@@ -4357,15 +4357,15 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
}
/**
- * ice_prof_tcam_ena_dis - add enable or disable tcam change
- * @hw: pointer to the hw struct
+ * ice_prof_tcam_ena_dis - add enable or disable TCAM change
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @enable: true to enable, false to disable
- * @vsig: the vsig of the tcam entry
- * @tcam: pointer the tcam info structure of the tcam to disable
+ * @vsig: the vsig of the TCAM entry
+ * @tcam: pointer the TCAM info structure of the TCAM to disable
* @chg: the change list
*
- * This function appends an enable or disable tcam entry in the change log
+ * This function appends an enable or disable TCAM entry in the change log
*/
static enum ice_status
ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
@@ -4418,7 +4418,7 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
/**
* ice_adj_prof_priorities - adjust profile based on priorities
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG for which to adjust profile priorities
* @chg: the change list
@@ -4487,7 +4487,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/**
* ice_add_prof_id_vsig - add profile to VSIG
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsig: the VSIG to which this profile is to be added
* @hdl: the profile handle indicating the profile to add
@@ -4506,7 +4506,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
struct ice_chs_chg *p;
u16 i;
- /* Get the details on the profile specified by the handle id */
+ /* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
if (!map)
return ICE_ERR_DOES_NOT_EXIST;
@@ -4524,7 +4524,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
t->prof_id = map->prof_id;
t->tcam_count = map->ptype_count;
- /* create tcam entries */
+ /* create TCAM entries */
for (i = 0; i < map->ptype_count; i++) {
enum ice_status status;
u16 tcam_idx;
@@ -4543,7 +4543,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (!p)
goto err_ice_add_prof_id_vsig;
- /* allocate the tcam entry index */
+ /* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
if (status)
goto err_ice_add_prof_id_vsig;
@@ -4560,7 +4560,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
p->vsig = vsig;
p->tcam_idx = t->tcam[i].tcam_idx;
- /* write the tcam entry */
+ /* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
t->tcam[i].prof_id,
t->tcam[i].ptg, vsig, 0, 0,
@@ -4568,8 +4568,8 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many tcam entries
- * are using this hw profile id
+ /* this increments the reference count of how many TCAM entries
+ * are using this HW profile ID
*/
status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
@@ -4590,7 +4590,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/**
* ice_create_prof_id_vsig - add a new VSIG with a single profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @hdl: the profile handle of the profile that will be added to the VSIG
@@ -4632,7 +4632,7 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
/**
* ice_create_vsig_from_list - create a new VSIG with a list of profiles
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @vsi: the initial VSI that will be in VSIG
* @lst: the list of profile that will be added to the VSIG
@@ -4666,7 +4666,7 @@ ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
/**
* ice_find_prof_vsig - find a VSIG with a specific profile handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
* @hdl: the profile handle of the profile to search for
* @vsig: returns the VSIG with the matching profile
@@ -4697,13 +4697,13 @@ ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
/**
* ice_add_prof_id_flow - add profile flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi to enable with the profile specified by id
+ * @vsi: the VSI to enable with the profile specified by ID
* @hdl: profile handle
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4725,7 +4725,7 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
return status;
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool only_vsi;
@@ -4805,10 +4805,10 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
}
} else {
/* need to find or add a VSIG */
- /* search for an exising VSIG with an exact charc match */
+ /* search for an existing VSIG with an exact charc match */
if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
@@ -4847,14 +4847,14 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_add_flow - add flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs to enable with the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs to enable with the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* Calling this function will update the hardware tables to enable the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
enum ice_status
@@ -4875,7 +4875,7 @@ ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,
/**
* ice_rem_prof_from_list - remove a profile from list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lst: list to remove the profile from
* @hdl: the profile handle indicating the profile to remove
*/
@@ -4897,13 +4897,13 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
/**
* ice_rem_prof_id_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: the vsi from which to remove the profile specified by id
+ * @vsi: the VSI from which to remove the profile specified by ID
* @hdl: profile tracking handle
*
* Calling this function will update the hardware tables to remove the
- * profile indicated by the id parameter for the VSIs specified in the vsi
+ * profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be disabled.
*/
enum ice_status
@@ -4918,7 +4918,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
INIT_LIST_HEAD(©);
INIT_LIST_HEAD(&chg);
- /* determine if vsi is already part of a VSIG */
+ /* determine if VSI is already part of a VSIG */
status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
if (!status && vsig) {
bool last_profile;
@@ -4979,7 +4979,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else if (ice_find_dup_props_vsig(hw, blk, ©,
&vsig)) {
/* found an exact match */
- /* add or move vsi to the VSIG that matches */
+ /* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
* list
*/
@@ -4991,7 +4991,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
} else {
/* since no existing VSIG supports this
* characteristic pattern, we need to create a
- * new VSIG and tcam entries
+ * new VSIG and TCAM entries
*/
status = ice_create_vsig_from_lst(hw, blk, vsi,
©, &chg);
@@ -5029,14 +5029,14 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/**
* ice_rem_flow - remove flow
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: hardware block
- * @vsi: array of VSIs from which to remove the profile specified by id
- * @count: number of elements in the vsi array
- * @id: profile tracking id
+ * @vsi: array of VSIs from which to remove the profile specified by ID
+ * @count: number of elements in the VSI array
+ * @id: profile tracking ID
*
* The function will remove flows from the specified VSIs that were enabled
- * using ice_add_flow. The id value will indicated which profile will be
+ * using ice_add_flow. The ID value will indicated which profile will be
* removed. Once successfully called, the flow will be disabled.
*/
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 81e89aeeb..23fffed75 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -59,7 +59,7 @@ void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg);
enum ice_status
ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg);
-/* XLT2/Vsi group functions */
+/* XLT2/VSI group functions */
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);
enum ice_status
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 9f98f4f2a..aed23a067 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -350,7 +350,7 @@ struct ice_sw_fv_list_entry {
};
#pragma pack(1)
-/* The BOOST tcam stores the match packet header in reverse order, meaning
+/* The BOOST TCAM stores the match packet header in reverse order, meaning
* the fields are reversed; in addition, this means that the normally big endian
* fields of the packet are now little endian.
*/
@@ -602,7 +602,7 @@ struct ice_xlt2 {
};
/* Extraction sequence - list of match fields:
- * protocol id, offset, profile length
+ * protocol ID, offset, profile length
*/
union ice_match_fld {
struct {
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index cc3f69b51..574c927c4 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -292,6 +292,9 @@ struct ice_flow_prof_params {
u16 entry_length; /* # of bytes formatted entry will require */
u8 es_cnt;
+ /* For ACL, the es[0] will have the data of ICE_RX_MDID_PKT_FLAGS_15_0
+ * This will give us the direction flags.
+ */
struct ice_fv_word es[ICE_MAX_FV_WORDS];
ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
@@ -494,7 +497,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
/**
* ice_flow_xtract_fld - Create an extraction sequence entry for the given field
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: packet segment index of the field to be extracted
* @fld: ID of field to be extracted
@@ -656,7 +659,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_xtract_raws - Create extract sequence entries for raw bytes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
* @seg: index of packet segment whose raw fields are to be be extracted
*/
@@ -728,7 +731,7 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
/**
* ice_flow_create_xtrct_seq - Create an extraction sequence for given segments
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*
* This function iterates through all matched fields in the given segments, and
@@ -768,7 +771,7 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
/**
* ice_flow_proc_segs - process all packet segments associated with a profile
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @params: information about the flow to be processed
*/
static enum ice_status
@@ -807,7 +810,7 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
/**
* ice_flow_find_prof_conds - Find a profile matching headers and conditions
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -852,7 +855,7 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_find_prof - Look up a profile matching headers and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @segs: array of one or more packet segments that describe the flow
@@ -874,7 +877,7 @@ ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_find_prof_id - Look up a profile with given profile ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: unique ID to identify this flow profile
*/
@@ -893,7 +896,7 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
/**
* ice_flow_rem_entry_sync - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry: flow entry to be removed
*/
static enum ice_status
@@ -917,7 +920,7 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
/**
* ice_flow_add_prof_sync - Add a flow profile for packet segments and fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1057,7 +1060,7 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1089,7 +1092,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
* @vsi_handle: software VSI handle
*
* Assumption: the caller has acquired the lock to the profile list
- * and the software vsi handle has been validated
+ * and the software VSI handle has been validated
*/
static enum ice_status
ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
@@ -1115,7 +1118,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
/**
* ice_flow_add_prof - Add a flow profile for packet segments and matched fields
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @dir: flow direction
* @prof_id: unique ID to identify this flow profile
@@ -1160,7 +1163,7 @@ ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
/**
* ice_flow_rem_prof - Remove a flow profile and all entries associated with it
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: the block for which the flow profile is to be removed
* @prof_id: unique ID of the flow profile to be removed
*/
@@ -1188,11 +1191,11 @@ ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
}
/**
- * ice_flow_get_hw_prof - return the hw profile for a specific profile id handle
- * @hw: pointer to the hw struct
+ * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
+ * @hw: pointer to the HW struct
* @blk: classification stage
- * @prof_id: the profile id handle
- * @hw_prof_id: pointer to variable to receive the hw profile id
+ * @prof_id: the profile ID handle
+ * @hw_prof_id: pointer to variable to receive the HW profile ID
*/
enum ice_status
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
@@ -1211,7 +1214,7 @@ ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_find_entry - look for a flow entry using its unique ID
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @entry_id: unique ID to identify this flow entry
*
@@ -1249,7 +1252,7 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
/**
* ice_flow_add_entry - Add a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @blk: classification stage
* @prof_id: ID of the profile to add a new flow entry to
* @entry_id: unique ID to identify this flow entry
@@ -1335,7 +1338,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
/**
* ice_flow_rem_entry - Remove a flow entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @entry_h: handle to the flow entry to be removed
*/
enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h)
@@ -1712,12 +1715,12 @@ void ice_rem_all_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_rem_vsi_rss_cfg - remove RSS configurations associated with vsi
+ * ice_rem_vsi_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*
* This function will iterate through all flow profiles and disassociate
- * the vsi from that profile. If the flow profile has no vsis it will
+ * the VSI from that profile. If the flow profile has no VSIs it will
* be removed.
*/
enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
@@ -1847,7 +1850,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Search for a flow profile that has matching headers, hash fields
- * and has the input vsi associated to it. If found, no further
+ * and has the input VSI associated to it. If found, no further
* operations required and exit.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1858,8 +1861,8 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
goto exit;
/* Check if a flow profile exists with the same protocol headers and
- * associated with the input vsi. If so disasscociate the vsi from
- * this profile. The vsi will be added to a new profile created with
+ * associated with the input VSI. If so disasscociate the VSI from
+ * this profile. The VSI will be added to a new profile created with
* the protocol header and new hash field configuration.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
@@ -1871,7 +1874,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
else
goto exit;
- /* Remove profile if it has no vsis associated */
+ /* Remove profile if it has no VSIs associated */
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI)) {
status = ice_flow_rem_prof_sync(hw, blk, prof);
if (status)
@@ -1880,7 +1883,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/* Search for a profile that has same match fields only. If this
- * exists then associate the vsi to this profile.
+ * exists then associate the VSI to this profile.
*/
prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, 1,
vsi_handle,
@@ -2003,7 +2006,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
*
* This function will lookup the flow profile based on the input
* hash field bitmap, iterate through the profile entry list of
- * that profile and find entry associated with input vsi to be
+ * that profile and find entry associated with input VSI to be
* removed. Calls are made to underlying flow apis which will in
* turn build or update buffers for RSS XLT1 section.
*/
@@ -2025,7 +2028,7 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
}
/**
- * ice_replay_rss_cfg - remove RSS configurations associated with vsi
+ * ice_replay_rss_cfg - remove RSS configurations associated with VSI
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*/
@@ -2057,13 +2060,13 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
* @hdrs: protocol header type
*
* This function will return the match fields of the first instance of flow
- * profile having the given header types and containing input vsi
+ * profile having the given header types and containing input VSI
*/
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
{
struct ice_rss_cfg *r, *rss_cfg = NULL;
- /* verify if the protocol header is non zero and vsi is valid */
+ /* verify if the protocol header is non zero and VSI is valid */
if (hdrs == ICE_FLOW_SEG_HDR_NONE || !ice_is_vsi_valid(hw, vsi_handle))
return ICE_HASH_INVALID;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 51d7c3ac9..265e1ee3e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -227,7 +227,6 @@ struct ice_flow_entry {
u64 id;
u16 vsi_handle;
enum ice_flow_priority priority;
-
struct ice_flow_prof *prof;
/* Flow entry's content */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index d27045f7e..4a1ea0c7d 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -6,7 +6,7 @@
#define _ICE_LAN_TX_RX_H_
#include "ice_osdep.h"
-/* RX Descriptors */
+/* Rx Descriptors */
union ice_16byte_rx_desc {
struct {
__le64 pkt_addr; /* Packet buffer address */
@@ -20,7 +20,7 @@ union ice_16byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -46,7 +46,7 @@ union ice_32byte_rx_desc {
} lo_dword;
union {
__le32 rss; /* RSS Hash */
- __le32 fd_id; /* Flow Director filter id */
+ __le32 fd_id; /* Flow Director filter ID */
} hi_dword;
} qword0;
struct {
@@ -181,15 +181,15 @@ enum ice_rx_desc_status_bits {
ICE_RX_DESC_STATUS_L2TAG1P_S = 2,
ICE_RX_DESC_STATUS_L3L4P_S = 3,
ICE_RX_DESC_STATUS_CRCP_S = 4,
- ICE_RX_DESC_STATUS_TSYNINDX_S = 5, /* 2 BITS */
+ ICE_RX_DESC_STATUS_TSYNINDX_S = 5,
ICE_RX_DESC_STATUS_TSYNVALID_S = 7,
ICE_RX_DESC_STATUS_EXT_UDP_0_S = 8,
- ICE_RX_DESC_STATUS_UMBCAST_S = 9, /* 2 BITS */
+ ICE_RX_DESC_STATUS_UMBCAST_S = 9,
ICE_RX_DESC_STATUS_FLM_S = 11,
- ICE_RX_DESC_STATUS_FLTSTAT_S = 12, /* 2 BITS */
+ ICE_RX_DESC_STATUS_FLTSTAT_S = 12,
ICE_RX_DESC_STATUS_LPBK_S = 14,
ICE_RX_DESC_STATUS_IPV6EXADD_S = 15,
- ICE_RX_DESC_STATUS_RESERVED2_S = 16, /* 2 BITS */
+ ICE_RX_DESC_STATUS_RESERVED2_S = 16,
ICE_RX_DESC_STATUS_INT_UDP_0_S = 18,
ICE_RX_DESC_STATUS_LAST /* this entry must be last!!! */
};
@@ -325,8 +325,8 @@ enum ice_rx_desc_ext_status_bits {
/* Note: These are predefined bit offsets */
ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0,
ICE_RX_DESC_EXT_STATUS_L2TAG3P_S = 1,
- ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2, /* 2 BITS */
- ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4, /* 2 BITS */
+ ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2,
+ ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4,
ICE_RX_DESC_EXT_STATUS_FDLONGB_S = 9,
ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11,
};
@@ -373,7 +373,7 @@ enum ice_rx_prog_status_desc_error_bits {
ICE_RX_PROG_STATUS_DESC_NO_FD_ENTRY_S = 1,
};
-/* RX Flex Descriptor
+/* Rx Flex Descriptor
* This descriptor is used instead of the legacy version descriptor when
* ice_rlan_ctx.adv_desc is set
*/
@@ -387,7 +387,7 @@ union ice_32b_rx_flex_desc {
} read;
struct {
/* Qword 0 */
- u8 rxdid; /* descriptor builder profile id */
+ u8 rxdid; /* descriptor builder profile ID */
u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */
__le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */
__le16 pkt_len; /* [15:14] are reserved */
@@ -422,12 +422,12 @@ union ice_32b_rx_flex_desc {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 2
+ * RxDID Profile ID 2
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Flow Id higher 16-bits
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Flow ID higher 16-bits
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic {
/* Qword 0 */
@@ -461,8 +461,8 @@ struct ice_32b_rx_flex_desc_nic {
};
/* Rx Flex Descriptor Switch Profile
- * RxDID Profile Id 3
- * Flex-field 0: Source Vsi
+ * RxDID Profile ID 3
+ * Flex-field 0: Source VSI
*/
struct ice_32b_rx_flex_desc_sw {
/* Qword 0 */
@@ -491,8 +491,8 @@ struct ice_32b_rx_flex_desc_sw {
};
/* Rx Flex Descriptor NIC VEB Profile
- * RxDID Profile Id 4
- * Flex-field 0: Destination Vsi
+ * RxDID Profile ID 4
+ * Flex-field 0: Destination VSI
*/
struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 0 */
@@ -505,8 +505,8 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
/* Qword 1 */
__le16 status_error0;
__le16 l2tag1;
- __le16 dst_vsi; /* [0:12]: destination vsi */
- /* 13: vsi valid bit */
+ __le16 dst_vsi; /* [0:12]: destination VSI */
+ /* 13: VSI valid bit */
/* [14:15] are reserved */
__le16 flex_field_1;
@@ -523,7 +523,7 @@ struct ice_32b_rx_flex_desc_nic_veb_dbg {
};
/* Rx Flex Descriptor NIC ACL Profile
- * RxDID Profile Id 5
+ * RxDID Profile ID 5
* Flex-field 0: ACL Counter 0
* Flex-field 1: ACL Counter 1
* Flex-field 2: ACL Counter 2
@@ -556,12 +556,12 @@ struct ice_32b_rx_flex_desc_nic_acl_dbg {
};
/* Rx Flex Descriptor NIC Profile
- * RxDID Profile Id 6
+ * RxDID Profile ID 6
* Flex-field 0: RSS hash lower 16-bits
* Flex-field 1: RSS hash upper 16-bits
- * Flex-field 2: Flow Id lower 16-bits
- * Flex-field 3: Source Vsi
- * Flex-field 4: reserved, Vlan id taken from L2Tag
+ * Flex-field 2: Flow ID lower 16-bits
+ * Flex-field 3: Source VSI
+ * Flex-field 4: reserved, VLAN ID taken from L2Tag
*/
struct ice_32b_rx_flex_desc_nic_2 {
/* Qword 0 */
@@ -818,7 +818,7 @@ enum ice_rlan_ctx_rx_hsplit_1 {
ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS = 2,
};
-/* TX Descriptor */
+/* Tx Descriptor */
struct ice_tx_desc {
__le64 buf_addr; /* Address of descriptor's data buf */
__le64 cmd_type_offset_bsz;
@@ -846,15 +846,15 @@ enum ice_tx_desc_cmd_bits {
ICE_TX_DESC_CMD_RSVD = 0x0004,
ICE_TX_DESC_CMD_IL2TAG1 = 0x0008,
ICE_TX_DESC_CMD_DUMMY = 0x0010,
- ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040, /* 2 BITS */
- ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060, /* 2 BITS */
+ ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000,
+ ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020,
+ ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040,
+ ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060,
ICE_TX_DESC_CMD_RSVD2 = 0x0080,
- ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200, /* 2 BITS */
- ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300, /* 2 BITS */
+ ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000,
+ ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100,
+ ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200,
+ ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300,
ICE_TX_DESC_CMD_RE = 0x0400,
ICE_TX_DESC_CMD_RSVD3 = 0x0800,
};
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 25a2ca4cb..92de2ec3b 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -7,7 +7,7 @@
/**
* ice_aq_read_nvm
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @module_typeid: module pointer location in words from the NVM beginning
* @offset: byte offset from the module beginning
* @length: length of the section to be read (in bytes from the offset)
@@ -248,7 +248,7 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
/**
* ice_init_nvm - initializes NVM setting
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function reads and populates NVM settings such as Shadow RAM size,
* max_timeout, and blank_nvm_mode
@@ -264,7 +264,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
ice_debug(hw, ICE_DBG_TRACE, "ice_init_nvm");
- /* The SR size is stored regardless of the nvm programming mode
+ /* The SR size is stored regardless of the NVM programming mode
* as the blank mode may be used in the factory line.
*/
gens_stat = rd32(hw, GLNVM_GENS);
@@ -357,7 +357,7 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
/**
* ice_nvm_validate_checksum
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Verify NVM PFA checksum validity (0x0706)
*/
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 7b92c7105..f96964d86 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -18,7 +18,7 @@
/* Max recipes that can be chained */
#define ICE_MAX_CHAIN_RECIPE 5
-/* 1 word reserved for switch id from allowed 5 words.
+/* 1 word reserved for switch ID from allowed 5 words.
* So a recipe can have max 4 words. And you can chain 5 such recipes
* together. So maximum words that can be programmed for look up is 5 * 4.
*/
@@ -128,7 +128,7 @@ enum ice_prot_id {
#define ICE_PROTOCOL_MAX_ENTRIES 16
-/* Mapping of software defined protocol id to hardware defined protocol id */
+/* Mapping of software defined protocol ID to hardware defined protocol ID */
struct ice_protocol_entry {
enum ice_protocol_type type;
u8 protocol_id;
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 7acbae62c..2edc305b5 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -45,9 +45,9 @@ ice_sched_add_root_node(struct ice_port_info *pi,
/**
* ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
* @start_node: pointer to the starting ice_sched_node struct in a sub-tree
- * @teid: node teid to search
+ * @teid: node TEID to search
*
- * This function searches for a node matching the teid in the scheduling tree
+ * This function searches for a node matching the TEID in the scheduling tree
* from the SW DB. The search is recursive and is restricted by the number of
* layers it has searched through; stopping at the max supported layer.
*
@@ -68,7 +68,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
return NULL;
- /* Check if teid matches to any of the children nodes */
+ /* Check if TEID matches to any of the children nodes */
for (i = 0; i < start_node->num_children; i++)
if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
return start_node->children[i];
@@ -88,7 +88,7 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
/**
* ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @cmd_opc: cmd opcode
* @elems_req: number of elements to request
* @buf: pointer to buffer
@@ -120,7 +120,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
/**
* ice_aq_query_sched_elems - query scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -201,7 +201,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
/**
* ice_aq_delete_sched_elems - delete scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to delete
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -221,13 +221,13 @@ ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
}
/**
- * ice_sched_remove_elems - remove nodes from hw
- * @hw: pointer to the hw struct
+ * ice_sched_remove_elems - remove nodes from HW
+ * @hw: pointer to the HW struct
* @parent: pointer to the parent node
* @num_nodes: number of nodes
* @node_teids: array of node teids to be deleted
*
- * This function remove nodes from hw
+ * This function remove nodes from HW
*/
static enum ice_status
ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
@@ -260,7 +260,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
/**
* ice_sched_get_first_node - get the first node of the given layer
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @parent: pointer the base node of the subtree
* @layer: layer number
*
@@ -381,7 +381,7 @@ void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
/**
* ice_aq_get_dflt_topo - gets default scheduler topology
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @lport: logical port number
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -411,7 +411,7 @@ ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
/**
* ice_aq_add_sched_elems - adds scheduling element
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: the number of groups that are requested to be added
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -432,7 +432,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_cfg_sched_elems - configures scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -453,7 +453,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_move_sched_elems - move scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @grps_req: number of groups to move
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -474,7 +474,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
/**
* ice_aq_suspend_sched_elems - suspend scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to suspend
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -495,7 +495,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_resume_sched_elems - resume scheduler elements
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @elems_req: number of elements to resume
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -516,7 +516,7 @@ ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
/**
* ice_aq_query_sched_res - query scheduler resource
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @buf_size: buffer size in bytes
* @buf: pointer to buffer
* @cd: pointer to command details structure or NULL
@@ -535,13 +535,13 @@ ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
}
/**
- * ice_sched_suspend_resume_elems - suspend or resume hw nodes
- * @hw: pointer to the hw struct
+ * ice_sched_suspend_resume_elems - suspend or resume HW nodes
+ * @hw: pointer to the HW struct
* @num_nodes: number of nodes
* @node_teids: array of node teids to be suspended or resumed
* @suspend: true means suspend / false means resume
*
- * This function suspends or resumes hw nodes
+ * This function suspends or resumes HW nodes
*/
static enum ice_status
ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
@@ -577,7 +577,7 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
/**
* ice_aq_rl_profile - performs a rate limiting task
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
* @num_profiles: the number of profiles
* @buf: pointer to buffer
@@ -609,14 +609,14 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
/**
* ice_aq_add_rl_profile - adds rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to be add
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_added: total number of profiles added to return
* @cd: pointer to command details structure
*
- * Add rl profile (0x0410)
+ * Add RL profile (0x0410)
*/
static enum ice_status
ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -631,13 +631,13 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
/**
* ice_aq_query_rl_profile - query rate limiting profile(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to query
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure
*
- * Query rl profile (0x0411)
+ * Query RL profile (0x0411)
*/
enum ice_status
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -649,15 +649,15 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_aq_remove_rl_profile - removes rl profile(s)
- * @hw: pointer to the hw struct
+ * ice_aq_remove_rl_profile - removes RL profile(s)
+ * @hw: pointer to the HW struct
* @num_profiles: the number of profile(s) to remove
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_profiles_removed: total number of profiles removed to return
* @cd: pointer to command details structure or NULL
*
- * Remove rl profile (0x0415)
+ * Remove RL profile (0x0415)
*/
static enum ice_status
ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
@@ -671,10 +671,10 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
- * ice_sched_clear_rl_prof - clears rl prof entries
+ * ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
- * This function removes all rl profile from hw as well as from SW DB.
+ * This function removes all RL profile from HW as well as from SW DB.
*/
static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
{
@@ -704,10 +704,10 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
}
/**
- * ice_sched_clear_agg - clears the agg related information
+ * ice_sched_clear_agg - clears the aggregator related information
* @hw: pointer to the hardware structure
*
- * This function removes agg list and free up agg related memory
+ * This function removes aggregator list and free up aggregator related memory
* previously allocated.
*/
void ice_sched_clear_agg(struct ice_hw *hw)
@@ -742,7 +742,7 @@ static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
{
if (!pi)
return;
- /* remove rl profiles related lists */
+ /* remove RL profiles related lists */
ice_sched_clear_rl_prof(pi);
if (pi->root) {
ice_free_sched_node(pi, pi->root);
@@ -770,7 +770,7 @@ void ice_sched_clear_port(struct ice_port_info *pi)
/**
* ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Cleanup scheduling elements from SW DB for all the ports
*/
@@ -795,7 +795,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
/**
* ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_l2_nodes: the number of L2 nodes whose CGDs to configure
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
@@ -821,16 +821,16 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
/**
- * ice_sched_add_elems - add nodes to hw and SW DB
+ * ice_sched_add_elems - add nodes to HW and SW DB
* @pi: port information structure
* @tc_node: pointer to the branch node
* @parent: pointer to the parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes
* @num_nodes_added: pointer to num nodes added
- * @first_node_teid: if new nodes are added then return the teid of first node
+ * @first_node_teid: if new nodes are added then return the TEID of first node
*
- * This function add nodes to hw as well as to SW DB for a given layer
+ * This function add nodes to HW as well as to SW DB for a given layer
*/
static enum ice_status
ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
@@ -924,7 +924,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
* @parent: pointer to parent node
* @layer: layer number to add nodes
* @num_nodes: number of nodes to be added
- * @first_node_teid: pointer to the first node teid
+ * @first_node_teid: pointer to the first node TEID
* @num_nodes_added: pointer to number of nodes added
*
* This function add nodes to a given layer.
@@ -976,7 +976,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
*num_nodes_added += num_added;
}
- /* Don't modify the first node teid memory if the first node was
+ /* Don't modify the first node TEID memory if the first node was
* added already in the above call. Instead send some temp
* memory for all other recursive calls.
*/
@@ -1008,7 +1008,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
/**
* ice_sched_get_qgrp_layer - get the current queue group layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current queue group layer number
*/
@@ -1020,7 +1020,7 @@ static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
/**
* ice_sched_get_vsi_layer - get the current VSI layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current VSI layer number
*/
@@ -1031,7 +1031,7 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
* 7 4
* 5 or less sw_entry_point_layer
*/
- /* calculate the vsi layer based on number of layers. */
+ /* calculate the VSI layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
@@ -1043,17 +1043,17 @@ static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
/**
* ice_sched_get_agg_layer - get the current aggregator layer number
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function returns the current aggregator layer number
*/
static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
{
- /* Num Layers agg layer
+ /* Num Layers aggregator layer
* 9 4
* 7 or less sw_entry_point_layer
*/
- /* calculate the agg layer based on number of layers. */
+ /* calculate the aggregator layer based on number of layers. */
if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
@@ -1226,11 +1226,11 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)
}
/**
- * ice_sched_get_node - Get the struct ice_sched_node for given teid
+ * ice_sched_get_node - Get the struct ice_sched_node for given TEID
* @pi: port information structure
* @teid: Scheduler node TEID
*
- * This function retrieves the ice_sched_node struct for given teid from
+ * This function retrieves the ice_sched_node struct for given TEID from
* the SW DB and returns it to the caller.
*/
struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
@@ -1313,7 +1313,7 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
/**
* ice_sched_find_node_in_subtree - Find node in part of base node subtree
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @base: pointer to the base node
* @node: pointer to the node to search
*
@@ -1345,13 +1345,13 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
}
/**
- * ice_sched_get_free_qparent - Get a free lan or rdma q group node
+ * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: branch number
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function retrieves a free lan or rdma q group node
+ * This function retrieves a free LAN or RDMA queue group node
*/
struct ice_sched_node *
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -1369,11 +1369,11 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
if (!vsi_ctx)
return NULL;
vsi_node = vsi_ctx->sched.vsi_node[tc];
- /* validate invalid VSI id */
+ /* validate invalid VSI ID */
if (!vsi_node)
goto lan_q_exit;
- /* get the first q group node from VSI sub-tree */
+ /* get the first queue group node from VSI sub-tree */
qgrp_node = ice_sched_get_first_node(pi->hw, vsi_node, qgrp_layer);
while (qgrp_node) {
/* make sure the qgroup node is part of the VSI subtree */
@@ -1389,12 +1389,12 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_get_vsi_node - Get a VSI node based on VSI id
- * @hw: pointer to the hw struct
+ * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
* @vsi_handle: software VSI handle
*
- * This function retrieves a VSI node for a given VSI id from a given
+ * This function retrieves a VSI node for a given VSI ID from a given
* TC branch
*/
struct ice_sched_node *
@@ -1418,13 +1418,13 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
}
/**
- * ice_sched_get_agg_node - Get an aggregator node based on agg id
- * @hw: pointer to the hw struct
+ * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
+ * @hw: pointer to the HW struct
* @tc_node: pointer to the TC node
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function retrieves an aggregator node for a given agg id from a given
- * TC branch
+ * This function retrieves an aggregator node for a given aggregator ID from
+ * a given TC branch
*/
struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
@@ -1448,7 +1448,7 @@ ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
/**
* ice_sched_check_node - Compare node parameters between SW DB and HW DB
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function queries and compares the HW element with SW DB node parameters
@@ -1475,7 +1475,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
/**
* ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @num_qs: number of queues
* @num_nodes: num nodes array
*
@@ -1491,7 +1491,7 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
qgl = ice_sched_get_qgrp_layer(hw);
vsil = ice_sched_get_vsi_layer(hw);
- /* calculate num nodes from q group to VSI layer */
+ /* calculate num nodes from queue group to VSI layer */
for (i = qgl; i > vsil; i--) {
/* round to the next integer if there is a remainder */
num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
@@ -1507,10 +1507,10 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
* @vsi_handle: software VSI handle
* @tc_node: pointer to the TC node
* @num_nodes: pointer to the num nodes that needs to be added per layer
- * @owner: node owner (lan or rdma)
+ * @owner: node owner (LAN or RDMA)
*
* This function adds the VSI child nodes to tree. It gets called for
- * lan and rdma separately.
+ * LAN and RDMA separately.
*/
static enum ice_status
ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
@@ -1559,7 +1559,7 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @tc_node: pointer to TC node
* @num_nodes: pointer to num nodes array
*
@@ -1678,7 +1678,7 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
/* calculate number of supported nodes needed for this VSI */
ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes);
- /* add vsi supported nodes to tc subtree */
+ /* add VSI supported nodes to TC subtree */
return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
num_nodes);
}
@@ -1740,7 +1740,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
return status;
vsi_ctx->sched.max_lanq[tc] = new_numqs;
- return status;
+ return ICE_SUCCESS;
}
/**
@@ -1749,7 +1749,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
* @vsi_handle: software VSI handle
* @tc: TC number
* @maxqs: max number of queues
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
* @enable: TC enabled or disabled
*
* This function adds/updates VSI nodes based on the number of queues. If TC is
@@ -1774,7 +1774,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
return ICE_ERR_PARAM;
vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
- /* suspend the VSI if tc is not enabled */
+ /* suspend the VSI if TC is not enabled */
if (!enable) {
if (vsi_node && vsi_node->in_use) {
u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
@@ -1825,11 +1825,11 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
}
/**
- * ice_sched_rm_agg_vsi_entry - remove agg related vsi info entry
+ * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function removes single aggregator vsi info entry from
+ * This function removes single aggregator VSI info entry from
* aggregator list.
*/
static void
@@ -1876,9 +1876,9 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
* ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @owner: lan or rdma
+ * @owner: LAN or RDMA
*
- * This function removes the VSI and its lan or rdma children nodes from the
+ * This function removes the VSI and its LAN or RDMA children nodes from the
* scheduler tree.
*/
static enum ice_status
@@ -1931,7 +1931,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
ice_free_sched_node(pi, vsi_node);
vsi_ctx->sched.vsi_node[i] = NULL;
- /* clean up agg related vsi info if any */
+ /* clean up aggregator related VSI info if any */
ice_sched_rm_agg_vsi_info(pi, vsi_handle);
}
if (owner == ICE_SCHED_NODE_OWNER_LAN)
@@ -1945,11 +1945,11 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
}
/**
- * ice_rm_vsi_lan_cfg - remove VSI and its lan children nodes
+ * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function clears the VSI and its lan children nodes from scheduler tree
+ * This function clears the VSI and its LAN children nodes from scheduler tree
* for all TCs.
*/
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
@@ -1960,7 +1960,7 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
/**
* ice_sched_is_tree_balanced - Check tree nodes are identical or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: pointer to the ice_sched_node struct
*
* This function compares all the nodes for a given tree against HW DB nodes
@@ -1983,15 +1983,15 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
}
/**
- * ice_aq_query_node_to_root - retrieve the tree topology for a given node teid
- * @hw: pointer to the hw struct
- * @node_teid: node teid
+ * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
+ * @hw: pointer to the HW struct
+ * @node_teid: node TEID
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @cd: pointer to command details structure or NULL
*
* This function retrieves the tree topology from the firmware for a given
- * node teid to the root node.
+ * node TEID to the root node.
*/
enum ice_status
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
@@ -2008,12 +2008,12 @@ ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
}
/**
- * ice_get_agg_info - get the agg id
+ * ice_get_agg_info - get the aggregator ID
* @hw: pointer to the hardware structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function validates agg id. The function returns info if agg id is
- * prsent in list otherwise it returns null.
+ * This function validates aggregator ID. The function returns info if
+ * aggregator ID is present in list otherwise it returns null.
*/
static struct ice_sched_agg_info*
ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
@@ -2029,14 +2029,14 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
- * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default agg
+ * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
* @tc: traffic class number
* @rm_vsi_info: true or false
*
* This function move all the VSI(s) to the default aggregator and delete
- * agg vsi info based on passed in boolean parameter rm_vsi_info. The
+ * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
* caller holds the scheduler lock.
*/
static enum ice_status
@@ -2052,7 +2052,7 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
ice_sched_agg_vsi_info, list_entry) {
u16 vsi_handle = agg_vsi_info->vsi_handle;
- /* Move VSI to default agg */
+ /* Move VSI to default aggregator */
if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
continue;
@@ -2072,15 +2072,15 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove agg configuration for tc
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
* @pi: port information structure
- * @agg_info: aggregator id
- * @tc: tc number
+ * @agg_info: aggregator ID
+ * @tc: TC number
* @rm_vsi_info: bool value true or false
*
- * This function removes agg reference to vsi of given tc. It removes the agg
- * configuration completely for requested tc. The caller needs to hold the
- * scheduler lock.
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
*/
static enum ice_status
ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
@@ -2107,12 +2107,12 @@ ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
}
/**
- * ice_save_agg_tc_bitmap - save agg TC bitmap
+ * ice_save_agg_tc_bitmap - save aggregator TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc_bitmap: 8 bits TC bitmap
*
- * Save agg TC bitmap. This function needs to be called with scheduler
+ * Save aggregator TC bitmap. This function needs to be called with scheduler
* lock held.
*/
static enum ice_status
@@ -2130,19 +2130,19 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_sched_cfg_agg - configure agg node
+ * ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* It registers a unique aggregator node into scheduler services. It
* allows a user to register with a unique ID to track it's resources.
* The aggregator type determines if this is a queue group, VSI group
- * or aggregator group. It then creates the agg node(s) for requested
- * tc(s) or removes an existing agg node including its configuration
- * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release agg
- * resources and remove agg id.
+ * or aggregator group. It then creates the aggregator node(s) for requested
+ * TC(s) or removes an existing aggregator node including its configuration
+ * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
+ * resources and remove aggregator ID.
* This function needs to be called with scheduler lock held.
*/
static enum ice_status
@@ -2156,7 +2156,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info = ice_get_agg_info(hw, agg_id);
if (!agg_info) {
- /* Creat new entry for new agg id */
+ /* Create new entry for new aggregator ID */
agg_info = (struct ice_sched_agg_info *)
ice_malloc(hw, sizeof(*agg_info));
if (!agg_info) {
@@ -2167,32 +2167,32 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
agg_info->agg_type = agg_type;
agg_info->tc_bitmap[0] = 0;
- /* Initialize the aggregator vsi list head */
+ /* Initialize the aggregator VSI list head */
INIT_LIST_HEAD(&agg_info->agg_vsi_list);
- /* Add new entry in agg list */
+ /* Add new entry in aggregator list */
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
- /* Create agg node(s) for requested tc(s) */
+ /* Create aggregator node(s) for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
- /* Delete agg cfg tc if it exists previously */
+ /* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
if (status)
break;
continue;
}
- /* Check if agg node for tc already exists */
+ /* Check if aggregator node for TC already exists */
if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
continue;
- /* Create new agg node for tc */
+ /* Create new aggregator node for TC */
status = ice_sched_add_agg_cfg(pi, agg_id, tc);
if (status)
break;
- /* Save agg node's tc information */
+ /* Save aggregator node's TC information */
ice_set_bit(tc, agg_info->tc_bitmap);
}
exit_reg_agg:
@@ -2200,10 +2200,10 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_agg - config agg node
+ * ice_cfg_agg - config aggregator node
* @pi: port information structure
- * @agg_id: aggregator id
- * @agg_type: aggregator type queue, VSI, or agg group
+ * @agg_id: aggregator ID
+ * @agg_type: aggregator type queue, VSI, or aggregator group
* @tc_bitmap: bits TC bitmap
*
* This function configures aggregator node(s).
@@ -2226,12 +2226,12 @@ ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
}
/**
- * ice_get_agg_vsi_info - get the agg id
+ * ice_get_agg_vsi_info - get the aggregator ID
* @agg_info: aggregator info
* @vsi_handle: software VSI handle
*
- * The function returns agg VSI info based on VSI handle. This function needs
- * to be called with scheduler lock held.
+ * The function returns aggregator VSI info based on VSI handle. This function
+ * needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_vsi_info*
ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
@@ -2247,13 +2247,13 @@ ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
}
/**
- * ice_get_vsi_agg_info - get the agg info of VSI
+ * ice_get_vsi_agg_info - get the aggregator info of VSI
* @hw: pointer to the hardware structure
* @vsi_handle: Sw VSI handle
*
- * The function returns agg info of VSI represented via vsi_handle. The VSI has
- * in this case a different aggregator than the default one. This function
- * needs to be called with scheduler lock held.
+ * The function returns aggregator info of VSI represented via vsi_handle. The
+ * VSI has in this case a different aggregator than the default one. This
+ * function needs to be called with scheduler lock held.
*/
static struct ice_sched_agg_info*
ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
@@ -2274,9 +2274,9 @@ ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Save VSI to aggregator TC bitmap. This function needs to call with scheduler
* lock held.
@@ -2301,15 +2301,15 @@ ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_sched_assoc_vsi_to_agg - associate or move VSI to new or default agg
+ * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: TC bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* This function moves VSI to a new or default aggregator node. If VSI is
- * already associated to the agg node then no operation is performed on the
- * tree. This function needs to be called with scheduler lock held.
+ * already associated to the aggregator node then no operation is performed on
+ * the tree. This function needs to be called with scheduler lock held.
*/
static enum ice_status
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
@@ -2329,22 +2329,22 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
/* check if entry already exist */
agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
if (!agg_vsi_info) {
- /* Create new entry for vsi under agg list */
+ /* Create new entry for VSI under aggregator list */
agg_vsi_info = (struct ice_sched_agg_vsi_info *)
ice_malloc(hw, sizeof(*agg_vsi_info));
if (!agg_vsi_info)
return ICE_ERR_PARAM;
- /* add vsi id into the agg list */
+ /* add VSI ID into the aggregator list */
agg_vsi_info->vsi_handle = vsi_handle;
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
- /* Move vsi node to new agg node for requested tc(s) */
+ /* Move VSI node to new aggregator node for requested TC(s) */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
- /* Move VSI to new agg */
+ /* Move VSI to new aggregator */
status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
if (status)
break;
@@ -2354,7 +2354,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
else
ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
}
- /* If vsi moved back to default agg then delete entry agg_vsi_info. */
+ /* If VSI moved back to default aggregator, delete agg_vsi_info. */
if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
LIST_DEL(&agg_vsi_info->list_entry);
@@ -2364,11 +2364,11 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_move_vsi_to_agg - moves VSI to new or default agg
+ * ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @vsi_handle: software VSI handle
- * @tc_bitmap: tc bitmap of enabled tc(s)
+ * @tc_bitmap: TC bitmap of enabled TC(s)
*
* Move or associate VSI to a new or default aggregator node.
*/
@@ -2390,12 +2390,12 @@ ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
}
/**
- * ice_rm_agg_cfg - remove agg configuration
+ * ice_rm_agg_cfg - remove aggregator configuration
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes agg reference to vsi and delete agg id info.
- * It removes the agg configuration completely.
+ * This function removes aggregator reference to VSI and delete aggregator ID
+ * info. It removes the aggregator configuration completely.
*/
enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
{
@@ -2425,7 +2425,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
LIST_DEL(&agg_info->list_entry);
ice_free(pi->hw, agg_info);
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
exit_ice_rm_agg_cfg:
@@ -2434,11 +2434,11 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_set_clear_cir_bw_alloc - set or clear CIR bw alloc information
+ * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear CIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear CIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2452,11 +2452,11 @@ ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_set_clear_eir_bw_alloc - set or clear EIR bw alloc information
+ * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
* @bw_t_info: bandwidth type information structure
* @bw_alloc: Bandwidth allocation information
*
- * Save or clear EIR bw alloc information (bw_alloc) in the passed param
+ * Save or clear EIR BW alloc information (bw_alloc) in the passed param
* bw_t_info.
*/
static void
@@ -2470,14 +2470,14 @@ ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
}
/**
- * ice_sched_save_vsi_bw_alloc - save VSI node's bw alloc information
+ * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2506,11 +2506,11 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_set_clear_cir_bw - set or clear CIR bw
+ * ice_set_clear_cir_bw - set or clear CIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear CIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2519,18 +2519,18 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = 0;
} else {
- /* Save type of bw information */
+ /* Save type of BW information */
ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
bw_t_info->cir_bw.bw = bw;
}
}
/**
- * ice_set_clear_eir_bw - set or clear EIR bw
+ * ice_set_clear_eir_bw - set or clear EIR BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear EIR bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2539,24 +2539,24 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved shared bw information.
+ * First clear earlier saved shared BW information.
*/
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
- /* save EIR bw information */
+ /* save EIR BW information */
ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = bw;
}
}
/**
- * ice_set_clear_shared_bw - set or clear shared bw
+ * ice_set_clear_shared_bw - set or clear shared BW
* @bw_t_info: bandwidth type information structure
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save or clear shared bandwidth (bw) in the passed param bw_t_info.
+ * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
*/
static void
ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
@@ -2565,27 +2565,27 @@ ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = 0;
} else {
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element.
- * First clear earlier saved EIR bw information.
+ * First clear earlier saved EIR BW information.
*/
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
bw_t_info->eir_bw.bw = 0;
- /* save shared bw information */
+ /* save shared BW information */
ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
bw_t_info->shared_bw = bw;
}
}
/**
- * ice_sched_save_vsi_bw - save VSI node's bw information
+ * ice_sched_save_vsi_bw - save VSI node's BW information
* @pi: port information structure
* @vsi_handle: sw VSI handle
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of VSI type node for post replay use.
+ * Save BW information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
@@ -2658,14 +2658,14 @@ ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_sched_save_agg_bw_alloc - save agg node's bw alloc information
+ * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: bandwidth alloc information
*
- * Save bw alloc information of AGG type node for post replay use.
+ * Save BW alloc information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2692,14 +2692,14 @@ ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_sched_save_agg_bw - save agg node's bw information
+ * ice_sched_save_agg_bw - save aggregator node's BW information
* @pi: port information structure
- * @agg_id: node aggregator id
+ * @agg_id: node aggregator ID
* @tc: traffic class
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * Save bw information of AGG type node for post replay use.
+ * Save BW information of AGG type node for post replay use.
*/
static enum ice_status
ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2729,14 +2729,14 @@ ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_lmt_per_tc - configure VSI bw limit per tc
+ * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of VSI scheduling node based on tc
+ * This function configures BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2757,13 +2757,13 @@ ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI bw limit per tc
+ * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
* @rl_type: min or max
*
- * This function configures default bw limit of VSI scheduling node based on tc
+ * This function configures default BW limit of VSI scheduling node based on TC
* information.
*/
enum ice_status
@@ -2786,14 +2786,14 @@ ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
}
/**
- * ice_cfg_agg_bw_lmt_per_tc - configure aggregator bw limit per tc
+ * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function applies bw limit to aggregator scheduling node based on tc
+ * This function applies BW limit to aggregator scheduling node based on TC
* information.
*/
enum ice_status
@@ -2813,14 +2813,14 @@ ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator bw default limit per tc
+ * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
* @tc: traffic class
* @rl_type: min or max
*
- * This function applies default bw limit to aggregator scheduling node based
- * on tc information.
+ * This function applies default BW limit to aggregator scheduling node based
+ * on TC information.
*/
enum ice_status
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
@@ -2841,10 +2841,10 @@ ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
}
/**
- * ice_cfg_vsi_bw_shared_lmt - configure VSI bw shared limit
+ * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
* across all traffic classes for VSI matching handle.
@@ -2856,7 +2856,7 @@ ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
}
/**
- * ice_cfg_vsi_bw_no_shared_lmt - configure VSI bw for no shared limiter
+ * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
* @pi: port information structure
* @vsi_handle: software VSI handle
*
@@ -2871,13 +2871,13 @@ ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_cfg_agg_bw_shared_lmt - configure aggregator bw shared limit
+ * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function configures the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
@@ -2886,12 +2886,12 @@ ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/**
- * ice_cfg_agg_bw_no_shared_lmt - configure aggregator bw for no shared limiter
+ * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
- * This function removes the shared rate limiter(SRL) of all agg type nodes
- * across all traffic classes for aggregator matching agg_id.
+ * This function removes the shared rate limiter(SRL) of all aggregator type
+ * nodes across all traffic classes for aggregator matching agg_id.
*/
enum ice_status
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
@@ -2903,12 +2903,12 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
* ice_config_vsi_queue_priority - config VSI queue priority of node
* @pi: port information structure
* @num_qs: number of VSI queues
- * @q_ids: queue ids array
- * @q_ids: queue ids array
+ * @q_ids: queue IDs array
+ * @q_ids: queue IDs array
* @q_prio: queue priority array
*
* This function configures the queue node priority (Sibling Priority) of the
- * passed in VSI's queue(s) for a given traffic class (tc).
+ * passed in VSI's queue(s) for a given traffic class (TC).
*/
enum ice_status
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
@@ -2940,16 +2940,16 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
}
/**
- * ice_cfg_agg_vsi_priority_per_tc - config agg's VSI priority per tc
+ * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
* @pi: port information structure
- * @agg_id: Aggregator id
+ * @agg_id: Aggregator ID
* @num_vsis: number of VSI(s)
* @vsi_handle_arr: array of software VSI handles
* @node_prio: pointer to node priority
* @tc: traffic class
*
* This function configures the node priority (Sibling Priority) of the
- * passed in VSI's for a given traffic class (tc) of an Aggregator id.
+ * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
*/
enum ice_status
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
@@ -3027,14 +3027,14 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
}
/**
- * ice_cfg_vsi_bw_alloc - config VSI bw alloc per tc
+ * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @ena_tcmap: enabled tc map
+ * @ena_tcmap: enabled TC map
* @rl_type: Rate limit type CIR/EIR
- * @bw_alloc: Array of bw alloc
+ * @bw_alloc: Array of BW alloc
*
- * This function configures the bw allocation of the passed in VSI's
+ * This function configures the BW allocation of the passed in VSI's
* node(s) for enabled traffic class.
*/
enum ice_status
@@ -3049,7 +3049,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
@@ -3079,14 +3079,14 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
}
/**
- * ice_cfg_agg_bw_alloc - config agg bw alloc
+ * ice_cfg_agg_bw_alloc - config aggregator BW alloc
* @pi: port information structure
- * @agg_id: aggregator id
- * @ena_tcmap: enabled tc map
+ * @agg_id: aggregator ID
+ * @ena_tcmap: enabled TC map
* @rl_type: rate limit type CIR/EIR
- * @bw_alloc: array of bw alloc
+ * @bw_alloc: array of BW alloc
*
- * This function configures the bw allocation of passed in aggregator for
+ * This function configures the BW allocation of passed in aggregator for
* enabled traffic class(s).
*/
enum ice_status
@@ -3111,7 +3111,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
goto exit_cfg_agg_bw_alloc;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
@@ -3142,10 +3142,10 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/**
- * ice_sched_calc_wakeup - calculate rl profile wakeup parameter
- * @bw: bandwidth in kbps
+ * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
+ * @bw: bandwidth in Kbps
*
- * This function calculates the wakeup parameter of rl profile.
+ * This function calculates the wakeup parameter of RL profile.
*/
static u16 ice_sched_calc_wakeup(s32 bw)
{
@@ -3183,11 +3183,11 @@ static u16 ice_sched_calc_wakeup(s32 bw)
}
/**
- * ice_sched_bw_to_rl_profile - convert bw to profile parameters
- * @bw: bandwidth in kbps
+ * ice_sched_bw_to_rl_profile - convert BW to profile parameters
+ * @bw: bandwidth in Kbps
* @profile: profile parameters to return
*
- * This function converts the bw to profile structure format.
+ * This function converts the BW to profile structure format.
*/
static enum ice_status
ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
@@ -3203,7 +3203,7 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
return status;
- /* Bytes per second from kbps */
+ /* Bytes per second from Kbps */
bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
/* encode is 6 bits but really useful are 5 bits */
@@ -3247,16 +3247,16 @@ ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
}
/**
- * ice_sched_add_rl_profile - add rl profile
+ * ice_sched_add_rl_profile - add RL profile
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: specifies in which layer to create profile
*
- * This function first checks the existing list for corresponding bw
+ * This function first checks the existing list for corresponding BW
* parameter. If it exists, it returns the associated profile otherwise
- * it creates a new rate limit profile for requested bw, and adds it to
- * the hw db and local list. It returns the new profile or null on error.
+ * it creates a new rate limit profile for requested BW, and adds it to
+ * the HW DB and local list. It returns the new profile or null on error.
* The caller needs to hold the scheduler lock.
*/
static struct ice_aqc_rl_profile_info *
@@ -3291,10 +3291,10 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
rl_prof_elem->bw == bw)
- /* Return existing profile id info */
+ /* Return existing profile ID info */
return rl_prof_elem;
- /* Create new profile id */
+ /* Create new profile ID */
rl_prof_elem = (struct ice_aqc_rl_profile_info *)
ice_malloc(hw, sizeof(*rl_prof_elem));
@@ -3311,7 +3311,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
rl_prof_elem->profile.flags = profile_type;
rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
- /* Create new entry in hw db */
+ /* Create new entry in HW DB */
buf = (struct ice_aqc_rl_profile_generic_elem *)
&rl_prof_elem->profile;
status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
@@ -3435,12 +3435,12 @@ ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @rl_prof_id: rate limit profile id
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @rl_prof_id: rate limit profile ID
*
- * This function configures node element's bw limit.
+ * This function configures node element's BW limit.
*/
static enum ice_status
ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
@@ -3457,7 +3457,7 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_MAX_BW:
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
@@ -3466,11 +3466,11 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
break;
case ICE_SHARED_BW:
- /* Check for removing shared bw */
+ /* Check for removing shared BW */
if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
/* remove shared profile */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
- data->srl_id = 0; /* clear srl field */
+ data->srl_id = 0; /* clear SRL field */
/* enable back EIR to default profile */
data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
@@ -3478,16 +3478,16 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
break;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
(LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
ICE_SCHED_DFLT_RL_PROF_ID))
return ICE_ERR_CFG;
- /* EIR bw is set to default, disable it */
+ /* EIR BW is set to default, disable it */
data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
- /* Okay to enable shared bw now */
+ /* Okay to enable shared BW now */
data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
data->srl_id = CPU_TO_LE16(rl_prof_id);
break;
@@ -3501,12 +3501,12 @@ ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_get_node_rl_prof_id - get node's rate limit profile id
+ * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
* @node: sched node
* @rl_type: rate limit type
*
* If existing profile matches, it returns the corresponding rate
- * limit profile id, otherwise it returns an invalid id as error.
+ * limit profile ID, otherwise it returns an invalid ID as error.
*/
static u16
ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
@@ -3539,7 +3539,7 @@ ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
/**
* ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
* @pi: port information structure
- * @rl_type: type of rate limit bw - min, max, or shared
+ * @rl_type: type of rate limit BW - min, max, or shared
* @layer_index: layer index
*
* This function returns requested profile creation layer.
@@ -3603,14 +3603,14 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
}
/**
- * ice_sched_rm_rl_profile - remove rl profile id
+ * ice_sched_rm_rl_profile - remove RL profile ID
* @pi: port information structure
* @layer_num: layer number where profiles are saved
* @profile_type: profile type like EIR, CIR, or SRL
- * @profile_id: profile id to remove
+ * @profile_id: profile ID to remove
*
* This function removes rate limit profile from layer 'layer_num' of type
- * 'profile_type' and profile id as 'profile_id'. The caller needs to hold
+ * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
* scheduler lock.
*/
static enum ice_status
@@ -3620,7 +3620,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
struct ice_aqc_rl_profile_info *rl_prof_elem;
enum ice_status status = ICE_SUCCESS;
- /* Check the existing list for rl profile */
+ /* Check the existing list for RL profile */
LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
ice_aqc_rl_profile_info, list_entry)
if (rl_prof_elem->profile.flags == profile_type &&
@@ -3629,7 +3629,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
if (rl_prof_elem->prof_id_ref)
rl_prof_elem->prof_id_ref--;
- /* Remove old profile id from database */
+ /* Remove old profile ID from database */
status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
if (status && status != ICE_ERR_IN_USE)
ice_debug(pi->hw, ICE_DBG_SCHED,
@@ -3646,10 +3646,10 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
- * @layer_num: layer number where rl profiles are saved
+ * @layer_num: layer number where RL profiles are saved
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3681,17 +3681,18 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
default:
return ICE_ERR_PARAM;
}
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
- /* Remove stale rl profile id */
+ /* Remove stale RL profile ID */
if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
old_id == ICE_SCHED_INVAL_PROF_ID)
- return status;
+ return ICE_SUCCESS;
+
return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
}
@@ -3704,7 +3705,7 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
* @bw: bandwidth value
*
* This function prepares node element's bandwidth to SRL or EIR exclusively.
- * EIR bw and Shared bw profiles are mutually exclusive and hence only one of
+ * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
* them may be set for any given element. This function needs to be called
* with the scheduler lock held.
*/
@@ -3730,7 +3731,7 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
layer_num);
} else if (rl_type == ICE_MAX_BW &&
node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
- /* Remove Shared profile. Set default shared bw call
+ /* Remove Shared profile. Set default shared BW call
* removes shared profile for a node.
*/
return ice_sched_set_node_bw_dflt(pi, node,
@@ -3748,9 +3749,9 @@ ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
* @bw: bandwidth in Kbps - Kilo bits per sec
* @layer_num: layer number
*
- * This function adds new profile corresponding to requested bw, configures
- * node's rl profile id of type cir, eir, or srl, and removes old profile
- * id from local database. The caller needs to hold scheduler lock.
+ * This function adds new profile corresponding to requested BW, configures
+ * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
+ * ID from local database. The caller needs to hold scheduler lock.
*/
static enum ice_status
ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3767,21 +3768,21 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
- /* Save existing rl prof id for later clean up */
+ /* Save existing RL prof ID for later clean up */
old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
- /* Configure bw scheduling parameters */
+ /* Configure BW scheduling parameters */
status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
if (status)
return status;
/* New changes has been applied */
- /* Increment the profile id reference count */
+ /* Increment the profile ID reference count */
rl_prof_info->prof_id_ref++;
- /* Check for old id removal */
+ /* Check for old ID removal */
if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
- return status;
+ return ICE_SUCCESS;
return ice_sched_rm_rl_profile(pi, layer_num,
rl_prof_info->profile.flags,
@@ -3789,14 +3790,14 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_lmt - set node's bw limit
+ * ice_sched_set_node_bw_lmt - set node's BW limit
* @pi: port information structure
* @node: tree node
* @rl_type: rate limit type min, max, or shared
* @bw: bandwidth in Kbps - Kilo bits per sec
*
- * It updates node's bw limit parameters like bw rl profile id of type cir,
- * eir, or srl. The caller needs to hold scheduler lock.
+ * It updates node's BW limit parameters like BW RL profile ID of type CIR,
+ * EIR, or SRL. The caller needs to hold scheduler lock.
*/
enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
@@ -3811,7 +3812,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!pi)
return ICE_ERR_PARAM;
hw = pi->hw;
- /* Remove unused rl profile ids from HW and SW DB */
+ /* Remove unused RL profile IDs from HW and SW DB */
ice_sched_rm_unused_rl_prof(pi);
layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
node->tx_sched_layer);
@@ -3824,7 +3825,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
if (!cfg_node)
return ICE_ERR_CFG;
}
- /* EIR bw and Shared bw profiles are mutually exclusive and
+ /* EIR BW and Shared BW profiles are mutually exclusive and
* hence only one of them may be set for any given element
*/
status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
@@ -3838,13 +3839,13 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
}
/**
- * ice_sched_set_node_bw_dflt_lmt - set node's bw limit to default
+ * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
* @pi: port information structure
* @node: pointer to node structure
* @rl_type: rate limit type min, max, or shared
*
- * This function configures node element's bw rate limit profile id of
- * type cir, eir, or srl to default. This function needs to be called
+ * This function configures node element's BW rate limit profile ID of
+ * type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
static enum ice_status
@@ -3884,13 +3885,13 @@ ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
}
/**
- * ice_sched_set_q_bw_lmt - sets queue bw limit
+ * ice_sched_set_q_bw_lmt - sets queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of queue scheduling node.
+ * This function sets BW limit of queue scheduling node.
*/
static enum ice_status
ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3937,13 +3938,13 @@ ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_cfg_q_bw_lmt - configure queue bw limit
+ * ice_cfg_q_bw_lmt - configure queue BW limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of queue scheduling node.
+ * This function configures BW limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
@@ -3953,12 +3954,12 @@ ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
}
/**
- * ice_cfg_q_bw_dflt_lmt - configure queue bw default limit
+ * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
* @pi: port information structure
- * @q_id: queue id (leaf node teid)
+ * @q_id: queue ID (leaf node TEID)
* @rl_type: min, max, or shared
*
- * This function configures bw default limit of queue scheduling node.
+ * This function configures BW default limit of queue scheduling node.
*/
enum ice_status
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
@@ -3968,11 +3969,11 @@ ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
}
/**
- * ice_sched_save_tc_node_bw - save tc node bw limit
+ * ice_sched_save_tc_node_bw - save TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function saves the modified values of bandwidth settings for later
* replay purpose (restore) after reset.
@@ -4002,13 +4003,13 @@ ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_lmt - sets tc node bw limit
+ * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bandwidth limit of tc node.
+ * This function configures bandwidth limit of TC node.
*/
static enum ice_status
ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
@@ -4036,13 +4037,13 @@ ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_lmt - configure tc node bw limit
+ * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4053,12 +4054,12 @@ ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_dflt_lmt - configure tc node bw default limit
+ * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
*
- * This function configures bw default limit of tc node.
+ * This function configures BW default limit of TC node.
*/
enum ice_status
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
@@ -4068,13 +4069,13 @@ ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_save_tc_node_bw_alloc - save tc node's bw alloc information
+ * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
* @pi: port information structure
* @tc: traffic class
* @rl_type: rate limit type min or max
* @bw_alloc: Bandwidth allocation information
*
- * Save bw alloc information of VSI type node for post replay use.
+ * Save BW alloc information of VSI type node for post replay use.
*/
static enum ice_status
ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
@@ -4100,13 +4101,13 @@ ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_tc_node_bw_alloc - set tc node bw alloc
+ * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bandwidth alloc of tc node, also saves the
+ * This function configures bandwidth alloc of TC node, also saves the
* changed settings for replay purpose, and return success if it succeeds
* in modifying bandwidth alloc setting.
*/
@@ -4135,13 +4136,13 @@ ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_cfg_tc_node_bw_alloc - configure tc node bw alloc
+ * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
* @pi: port information structure
- * @tc: tc number
+ * @tc: TC number
* @rl_type: min or max
* @bw_alloc: bandwidth alloc
*
- * This function configures bw limit of tc node.
+ * This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
enum ice_status
@@ -4152,12 +4153,12 @@ ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
}
/**
- * ice_sched_set_agg_bw_dflt_lmt - set agg node's bw limit to default
+ * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
* @pi: port information structure
* @vsi_handle: software VSI handle
*
- * This function retrieves the aggregator id based on VSI id and tc,
- * and sets node's bw limit to default. This function needs to be
+ * This function retrieves the aggregator ID based on VSI ID and TC,
+ * and sets node's BW limit to default. This function needs to be
* called with the scheduler lock held.
*/
enum ice_status
@@ -4201,14 +4202,14 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_get_node_by_id_type - get node from id type
+ * ice_sched_get_node_by_id_type - get node from ID type
* @pi: port information structure
* @id: identifier
* @agg_type: type of aggregator
* @tc: traffic class
*
- * This function returns node identified by id of type aggregator, and
- * based on traffic class (tc). This function needs to be called with
+ * This function returns node identified by ID of type aggregator, and
+ * based on traffic class (TC). This function needs to be called with
* the scheduler lock held.
*/
static struct ice_sched_node *
@@ -4263,16 +4264,16 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
}
/**
- * ice_sched_set_node_bw_lmt_per_tc - set node bw limit per tc
+ * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
* @pi: port information structure
- * @id: id (software VSI handle or AGG id)
+ * @id: ID (software VSI handle or AGG ID)
* @agg_type: aggregator type (VSI or AGG type node)
* @tc: traffic class
* @rl_type: min or max
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
- * This function sets bw limit of VSI or Aggregator scheduling node
- * based on tc information from passed in argument bw.
+ * This function sets BW limit of VSI or Aggregator scheduling node
+ * based on TC information from passed in argument BW.
*/
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -4310,7 +4311,7 @@ ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
* @vsi_handle: software VSI handle
*
* This function validates SRL node of the VSI node if available SRL layer is
- * different than the VSI node layer on all tc(s).This function needs to be
+ * different than the VSI node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4322,7 +4323,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4356,13 +4357,13 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
}
/**
- * ice_sched_set_vsi_bw_shared_lmt - set VSI bw shared limit
+ * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
* @pi: port information structure
* @vsi_handle: software VSI handle
- * @bw: bandwidth in kbps
+ * @bw: bandwidth in Kbps
*
* This function Configures shared rate limiter(SRL) of all VSI type nodes
- * across all traffic classes for VSI matching handle. When bw value of
+ * across all traffic classes for VSI matching handle. When BW value of
* ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
*/
enum ice_status
@@ -4382,7 +4383,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
if (status)
goto exit_set_vsi_bw_shared_lmt;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4417,10 +4418,10 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
/**
* ice_sched_validate_agg_srl_node - validate AGG SRL node
* @pi: port information structure
- * @agg_id: aggregator id
+ * @agg_id: aggregator ID
*
* This function validates SRL node of the AGG node if available SRL layer is
- * different than the AGG node layer on all tc(s).This function needs to be
+ * different than the AGG node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
static enum ice_status
@@ -4440,7 +4441,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
if (!agg_id_present)
return ICE_ERR_PARAM;
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4472,14 +4473,14 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
}
/**
- * ice_sched_set_agg_bw_shared_lmt - set aggregator bw shared limit
+ * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
* @pi: port information structure
- * @agg_id: aggregator id
- * @bw: bandwidth in kbps
+ * @agg_id: aggregator ID
+ * @bw: bandwidth in Kbps
*
- * This function configures the shared rate limiter(SRL) of all agg type
+ * This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id. When
- * bw value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
+ * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
* node(s).
*/
enum ice_status
@@ -4511,7 +4512,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
goto exit_agg_bw_shared_lmt;
}
- /* Return success if no nodes are present across tc */
+ /* Return success if no nodes are present across TC */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -4975,7 +4976,7 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
/**
* ice_cfg_rl_burst_size - Set burst size value
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @bytes: burst size in bytes
*
* This function configures/set the burst size to requested new value. The new
@@ -4995,7 +4996,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_BYTE_GRANULARITY;
/* round number to nearest 256 granularity */
bytes = ice_round_to_num(bytes, 256);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_BYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_BYTE_GRANULARITY;
burst_size_to_prog |= (u16)bytes;
@@ -5005,7 +5006,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
burst_size_to_prog = ICE_KBYTE_GRANULARITY;
/* round number to nearest 1024 granularity */
bytes = ice_round_to_num(bytes, 1024);
- /* check rounding doesn't go beyound allowed */
+ /* check rounding doesn't go beyond allowed */
if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
/* The value is in k bytes */
@@ -5017,7 +5018,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
/*
* ice_sched_replay_node_prio - re-configure node priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: priority value
*
@@ -5043,12 +5044,12 @@ ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_node_bw - replay node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_node_bw - replay node(s) BW
+ * @hw: pointer to the HW struct
* @node: sched node to configure
- * @bw_t_info: bw type information
+ * @bw_t_info: BW type information
*
- * This function restores node's bw from bw_t_info. The caller needs
+ * This function restores node's BW from bw_t_info. The caller needs
* to hold the scheduler lock.
*/
static enum ice_status
@@ -5102,8 +5103,8 @@ ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_replay_agg_bw - replay aggregator node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_agg_bw - replay aggregator node(s) BW
+ * @hw: pointer to the HW struct
* @agg_info: aggregator data structure
*
* This function re-creates aggregator type nodes. The caller needs to hold
@@ -5157,7 +5158,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
{
u8 tc;
- /* Some tc(s) may be missing after reset, adjust for replay */
+ /* Some TC(s) may be missing after reset, adjust for replay */
for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
@@ -5166,10 +5167,10 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
/**
* ice_sched_replay_agg - recreate aggregator node(s)
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function recreate aggregator type nodes which are not replayed earlier.
- * It also replay aggregator bw information. These aggregator nodes are not
+ * It also replay aggregator BW information. These aggregator nodes are not
* associated with VSI type node yet.
*/
void ice_sched_replay_agg(struct ice_hw *hw)
@@ -5180,7 +5181,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
ice_acquire_lock(&pi->sched_lock);
LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
list_entry) {
- /* replay agg (re-create aggregator node) */
+ /* replay aggregator (re-create aggregator node) */
if (!ice_cmp_bitmap(agg_info->tc_bitmap,
agg_info->replay_tc_bitmap,
ICE_MAX_TRAFFIC_CLASS)) {
@@ -5203,7 +5204,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/* Move on to next one */
continue;
}
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
ice_info(hw, "Replay agg bw [id=%d] failed\n",
@@ -5215,7 +5216,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
/**
* ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* This function initialize aggregator(s) TC bitmap to zero. A required
* preinit step for replaying aggregators.
@@ -5239,10 +5240,10 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
}
/**
- * ice_sched_replay_tc_node_bw - replay tc node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_tc_node_bw - replay TC node(s) BW
+ * @hw: pointer to the HW struct
*
- * This function replay tc nodes. The caller needs to hold the scheduler lock.
+ * This function replay TC nodes. The caller needs to hold the scheduler lock.
*/
enum ice_status
ice_sched_replay_tc_node_bw(struct ice_hw *hw)
@@ -5257,7 +5258,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
if (!tc_node)
- continue; /* tc not present */
+ continue; /* TC not present */
status = ice_sched_replay_node_bw(hw, tc_node,
&hw->tc_node_bw_t_info[tc]);
if (status)
@@ -5268,8 +5269,8 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
}
/**
- * ice_sched_replay_vsi_bw - replay VSI type node(s) bw
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
* @tc_bitmap: 8 bits TC bitmap
*
@@ -5308,8 +5309,8 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
}
/**
- * ice_sched_replay_vsi_agg - replay agg & VSI to aggregator node(s)
- * @hw: pointer to the hw struct
+ * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays aggregator node, VSI to aggregator type nodes, and
@@ -5336,12 +5337,12 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
return ICE_SUCCESS; /* Not present in list - default Agg case */
ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
replay_bitmap);
- /* Replay agg node associated to vsi_handle */
+ /* Replay aggregator node associated to vsi_handle */
status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
ICE_AGG_TYPE_AGG, replay_bitmap);
if (status)
return status;
- /* Replay agg node bw (restore agg bw) */
+ /* Replay aggregator node BW (restore aggregator BW) */
status = ice_sched_replay_agg_bw(hw, agg_info);
if (status)
return status;
@@ -5354,14 +5355,14 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
replay_bitmap);
if (status)
return status;
- /* Replay VSI bw (restore VSI bw) */
+ /* Replay VSI BW (restore VSI BW) */
return ice_sched_replay_vsi_bw(hw, vsi_handle,
agg_vsi_info->tc_bitmap);
}
/**
* ice_replay_vsi_agg - replay VSI to aggregator node
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: software VSI handle
*
* This function replays association of VSI to aggregator type nodes, and
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index a5565945e..61fa6a85b 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -43,14 +43,14 @@ struct ice_aqc_rl_profile_info {
struct ice_aqc_rl_profile_elem profile;
struct LIST_ENTRY_TYPE list_entry;
u32 bw; /* requested */
- u16 prof_id_ref; /* profile id to node association ref count */
+ u16 prof_id_ref; /* profile ID to node association ref count */
};
struct ice_sched_agg_vsi_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u16 vsi_handle;
- /* save agg vsi TC bitmap */
+ /* save aggregator VSI TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
@@ -60,9 +60,9 @@ struct ice_sched_agg_info {
ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
u32 agg_id;
enum ice_agg_type agg_type;
- /* bw_t_info saves agg bw information */
+ /* bw_t_info saves aggregator BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
- /* save agg TC bitmap */
+ /* save aggregator TC bitmap */
ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
};
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a7b712e17..512e64b91 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -21,7 +21,7 @@
* byte 6 = 0x2: to identify it as locally administered SA MAC
* byte 12 = 0x81 & byte 13 = 0x00:
* In case of VLAN filter first two bytes defines ether type (0x8100)
- * and remaining two bytes are placeholder for programming a given VLAN id
+ * and remaining two bytes are placeholder for programming a given VLAN ID
* In case of Ether type filter it is treated as header without VLAN tag
* and byte 12 and 13 is used to program a given Ether type instead
*/
@@ -54,7 +54,7 @@ static const u8 dummy_eth_header[DUMMY_ETH_HDR_LEN] = { 0x2, 0, 0, 0, 0, 0,
/**
* ice_init_def_sw_recp - initialize the recipe book keeping tables
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Allocate memory for the entire recipe table and initialize the structures/
* entries corresponding to basic recipes.
@@ -282,7 +282,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
/**
* ice_aq_add_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -324,7 +324,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_free_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
* @cd: pointer to command details structure or NULL
@@ -360,7 +360,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
@@ -397,7 +397,7 @@ ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_is_vsi_valid - check whether the VSI is valid or not
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* check whether the VSI is valid or not
@@ -408,11 +408,11 @@ bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle)
}
/**
- * ice_get_hw_vsi_num - return the hw VSI number
- * @hw: pointer to the hw struct
+ * ice_get_hw_vsi_num - return the HW VSI number
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
- * return the hw VSI number
+ * return the HW VSI number
* Caution: call this function only if VSI is valid (ice_is_vsi_valid)
*/
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
@@ -422,7 +422,7 @@ u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_get_vsi_ctx - return the VSI context entry for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* return the VSI context entry for a given VSI handle
@@ -434,7 +434,7 @@ struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_save_vsi_ctx - save the VSI context for a given VSI handle
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
* @vsi: VSI context pointer
*
@@ -448,7 +448,7 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
/**
* ice_clear_vsi_ctx - clear the VSI context entry
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: VSI handle
*
* clear the VSI context entry
@@ -467,7 +467,7 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_clear_all_vsi_ctx - clear all the VSI context entries
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*/
void ice_clear_all_vsi_ctx(struct ice_hw *hw)
{
@@ -479,13 +479,13 @@ void ice_clear_all_vsi_ctx(struct ice_hw *hw)
/**
* ice_add_vsi - add VSI context to the hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle provided by drivers
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
*
* Add a VSI context to the hardware also add it into the VSI handle list.
- * If this function gets called after reset for exisiting VSIs then update
+ * If this function gets called after reset for existing VSIs then update
* with the new HW VSI number in the corresponding VSI handle list entry.
*/
enum ice_status
@@ -502,7 +502,7 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return status;
tmp_vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
if (!tmp_vsi_ctx) {
- /* Create a new vsi context */
+ /* Create a new VSI context */
tmp_vsi_ctx = (struct ice_vsi_ctx *)
ice_malloc(hw, sizeof(*tmp_vsi_ctx));
if (!tmp_vsi_ctx) {
@@ -519,12 +519,12 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
tmp_vsi_ctx->vsi_num = vsi_ctx->vsi_num;
}
- return status;
+ return ICE_SUCCESS;
}
/**
* ice_free_vsi- free VSI context from hardware and VSI handle list
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @keep_vsi_alloc: keep VSI allocation as part of this PF's resources
@@ -549,7 +549,7 @@ ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_update_vsi
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle: unique VSI handle
* @vsi_ctx: pointer to a VSI context struct
* @cd: pointer to command details structure or NULL
@@ -570,8 +570,8 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
/**
* ice_aq_alloc_free_vsi_list
- * @hw: pointer to the hw struct
- * @vsi_list_id: VSI list id returned or used for lookup
+ * @hw: pointer to the HW struct
+ * @vsi_list_id: VSI list ID returned or used for lookup
* @lkup_type: switch rule filter lookup type
* @opc: switch rules population command type - pass in the command opcode
*
@@ -629,7 +629,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
/**
* ice_aq_sw_rules - add/update/remove switch rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @rule_list: pointer to switch rule population list
* @rule_list_sz: total size of the rule list in bytes
* @num_rules: number of switch rules in the rule_list
@@ -798,7 +798,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
* 1. The switch is a VEB AND
* 2
* 2.1 The lookup is a directional lookup like ethertype,
- * promiscuous, ethertype-mac, promiscuous-vlan
+ * promiscuous, ethertype-MAC, promiscuous-VLAN
* and default-port OR
* 2.2 The lookup is VLAN, OR
* 2.3 The lookup is MAC with mcast or bcast addr for MAC, OR
@@ -829,7 +829,7 @@ static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
}
/**
- * ice_ilog2 - Caculates integer log base 2 of a number
+ * ice_ilog2 - Calculates integer log base 2 of a number
* @n: number on which to perform operation
*/
static int ice_ilog2(u64 n)
@@ -984,7 +984,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,
* @hw: pointer to the hardware structure
* @m_ent: the management entry for which sw marker needs to be added
* @sw_marker: sw marker to tag the Rx descriptor with
- * @l_id: large action resource id
+ * @l_id: large action resource ID
*
* Create a large action to hold software marker and update the switch rule
* entry pointed by m_ent with newly created large action
@@ -996,8 +996,8 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
struct ice_aqc_sw_rules_elem *lg_act, *rx_tx;
/* For software marker we need 3 large actions
* 1. FWD action: FWD TO VSI or VSI LIST
- * 2. GENERIC VALUE action to hold the profile id
- * 3. GENERIC VALUE action to hold the software marker id
+ * 2. GENERIC VALUE action to hold the profile ID
+ * 3. GENERIC VALUE action to hold the software marker ID
*/
const u16 num_lg_acts = 3;
enum ice_status status;
@@ -1060,13 +1060,13 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
ice_aqc_opc_update_sw_rules);
- /* Update the action to point to the large action id */
+ /* Update the action to point to the large action ID */
rx_tx->pdata.lkup_tx_rx.act =
CPU_TO_LE32(ICE_SINGLE_ACT_PTR |
((l_id << ICE_SINGLE_ACT_PTR_VAL_S) &
ICE_SINGLE_ACT_PTR_VAL_M));
- /* Use the filter rule id of the previously created rule with single
+ /* Use the filter rule ID of the previously created rule with single
* act. Once the update happens, hardware will treat this as large
* action
*/
@@ -1090,10 +1090,10 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to set in the VSI mapping
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
*
- * Helper function to create a new entry of VSI list id to VSI mapping
- * using the given VSI list id
+ * Helper function to create a new entry of VSI list ID to VSI mapping
+ * using the given VSI list ID
*/
static struct ice_vsi_list_map_info *
ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1122,13 +1122,13 @@ ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* @hw: pointer to the hardware structure
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @remove: Boolean value to indicate if this is a remove action
* @opc: switch rules population command type - pass in the command opcode
* @lkup_type: lookup type of the filter
*
* Call AQ command to add a new switch rule or update existing switch rule
- * using the given VSI list id
+ * using the given VSI list ID
*/
static enum ice_status
ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
@@ -1185,7 +1185,7 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
/**
* ice_create_vsi_list_rule - Creates and populates a VSI list rule
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @vsi_handle_arr: array of VSI handles to form a VSI list
* @num_vsi: number of VSI handles in the array
* @vsi_list_id: stores the ID of the VSI list to be created
@@ -1279,7 +1279,7 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw,
* @f_info: filter information for switch rule
*
* Call AQ command to update a previously created switch rule with a
- * VSI list id
+ * VSI list ID
*/
static enum ice_status
ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
@@ -1306,7 +1306,7 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
/**
* ice_update_sw_rule_bridge_mode
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Updates unicast switch filter rules based on VEB/VEPA mode
*/
@@ -1362,7 +1362,7 @@ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
* Allocate a new VSI list and add two VSIs
* to this list using switch rule command
* Update the previously created switch rule with the
- * newly created VSI list id
+ * newly created VSI list ID
* if a VSI list was previously created
* Add the new VSI to the previously created VSI list set
* using the update switch rule command
@@ -1443,7 +1443,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
return ICE_SUCCESS;
/* Update the previously created VSI list set with
- * the new VSI id passed in
+ * the new VSI ID passed in
*/
vsi_list_id = cur_fltr->fwd_id.vsi_list_id;
opcode = ice_aqc_opc_update_sw_rules;
@@ -1451,7 +1451,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,
status = ice_update_vsi_list_rule(hw, &vsi_handle, 1,
vsi_list_id, false, opcode,
new_fltr->lkup_type);
- /* update VSI list mapping info with new VSI id */
+ /* update VSI list mapping info with new VSI ID */
if (!status)
ice_set_bit(vsi_handle,
m_entry->vsi_list_info->vsi_map);
@@ -1495,7 +1495,7 @@ ice_find_rule_entry(struct ice_hw *hw, u8 recp_id, struct ice_fltr_info *f_info)
* @hw: pointer to the hardware structure
* @recp_id: lookup type for which VSI lists needs to be searched
* @vsi_handle: VSI handle to be found in VSI list
- * @vsi_list_id: VSI list id found contaning vsi_handle
+ * @vsi_list_id: VSI list ID found containing vsi_handle
*
* Helper function to search a VSI list with single entry containing given VSI
* handle element. This can be extended further to search VSI list with more
@@ -1527,7 +1527,7 @@ ice_find_vsi_list_entry(struct ice_hw *hw, u8 recp_id, u16 vsi_handle,
/**
* ice_add_rule_internal - add rule for a given lookup type
* @hw: pointer to the hardware structure
- * @recp_id: lookup type (recipe id) for which rule has to be added
+ * @recp_id: lookup type (recipe ID) for which rule has to be added
* @f_entry: structure containing MAC forwarding information
*
* Adds or updates the rule lists for a given recipe
@@ -1576,7 +1576,7 @@ ice_add_rule_internal(struct ice_hw *hw, u8 recp_id,
/**
* ice_remove_vsi_list_rule
* @hw: pointer to the hardware structure
- * @vsi_list_id: VSI list id generated as part of allocate resource
+ * @vsi_list_id: VSI list ID generated as part of allocate resource
* @lkup_type: switch rule filter lookup type
*
* The VSI list should be emptied before this function is called to remove the
@@ -1702,7 +1702,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
* ice_remove_rule_internal - Remove a filter rule of a given type
*
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @f_entry: rule entry containing filter information
*/
static enum ice_status
@@ -1752,7 +1752,7 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
status = ice_rem_update_vsi_list(hw, vsi_handle, list_elem);
if (status)
goto exit;
- /* if vsi count goes to zero after updating the vsi list */
+ /* if VSI count goes to zero after updating the VSI list */
if (list_elem->vsi_count == 0)
remove_rule = true;
}
@@ -1830,7 +1830,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
return ICE_ERR_PARAM;
hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
m_list_itr->fltr_info.fwd_id.hw_vsi_id = hw_vsi_id;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (m_list_itr->fltr_info.src_id != ICE_SRC_ID_VSI)
return ICE_ERR_PARAM;
m_list_itr->fltr_info.src = hw_vsi_id;
@@ -1907,7 +1907,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
((u8 *)r_iter + (elem_sent * s_rule_size));
}
- /* Fill up rule id based on the value returned from FW */
+ /* Fill up rule ID based on the value returned from FW */
r_iter = s_rule;
LIST_FOR_EACH_ENTRY(m_list_itr, m_list, ice_fltr_list_entry,
list_entry) {
@@ -1968,7 +1968,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);
new_fltr = &f_entry->fltr_info;
- /* VLAN id should only be 12 bits */
+ /* VLAN ID should only be 12 bits */
if (new_fltr->l_data.vlan.vlan_id > ICE_MAX_VLAN_ID)
return ICE_ERR_PARAM;
@@ -2026,7 +2026,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
}
}
} else if (v_list_itr->vsi_list_info->ref_cnt == 1) {
- /* Update existing VSI list to add new VSI id only if it used
+ /* Update existing VSI list to add new VSI ID only if it used
* by one VLAN rule.
*/
cur_fltr = &v_list_itr->fltr_info;
@@ -2036,7 +2036,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry)
/* If VLAN rule exists and VSI list being used by this rule is
* referenced by more than 1 VLAN rule. Then create a new VSI
* list appending previous VSI with new VSI and update existing
- * VLAN rule to point to new VSI list id
+ * VLAN rule to point to new VSI list ID
*/
struct ice_fltr_info tmp_fltr;
u16 vsi_handle_arr[2];
@@ -2130,9 +2130,9 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
* @hw: pointer to the hardware structure
* @mv_list: list of MAC and VLAN filters
*
- * If the VSI on which the mac-vlan pair has to be added has RX and Tx VLAN
+ * If the VSI on which the MAC-VLAN pair has to be added has Rx and Tx VLAN
* pruning bits enabled, then it is the responsibility of the caller to make
- * sure to add a vlan only filter on the same VSI. Packets belonging to that
+ * sure to add a VLAN only filter on the same VSI. Packets belonging to that
* VLAN won't be received on that VSI otherwise.
*/
enum ice_status
@@ -2446,7 +2446,7 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
struct ice_fltr_mgmt_list_entry *fm_entry;
enum ice_status status = ICE_SUCCESS;
- /* check to make sure VSI id is valid and within boundary */
+ /* check to make sure VSI ID is valid and within boundary */
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -2504,7 +2504,7 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
/**
* ice_remove_promisc - Remove promisc based filter rules
* @hw: pointer to the hardware structure
- * @recp_id: recipe id for which the rule needs to removed
+ * @recp_id: recipe ID for which the rule needs to removed
* @v_list: list of promisc entries
*/
static enum ice_status
@@ -2851,8 +2851,8 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
- * @recp_id: Recipe id for which rules need to be replayed
+ * @vsi_handle: driver VSI handle
+ * @recp_id: Recipe ID for which rules need to be replayed
* @list_head: list for which filters need to be replayed
*
* Replays the filter of recipe recp_id for a VSI represented via vsi_handle.
@@ -2877,7 +2877,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
f_entry.fltr_info = itr->fltr_info;
if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN &&
itr->fltr_info.vsi_handle == vsi_handle) {
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
status = ice_add_rule_internal(hw, recp_id, &f_entry);
@@ -2892,7 +2892,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
f_entry.fltr_info.vsi_handle = vsi_handle;
f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
- /* update the src in case it is vsi num */
+ /* update the src in case it is VSI num */
if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
f_entry.fltr_info.src = hw_vsi_id;
if (recp_id == ICE_SW_LKUP_VLAN)
@@ -2910,7 +2910,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
/**
* ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
* @hw: pointer to the hardware structure
- * @vsi_handle: driver vsi handle
+ * @vsi_handle: driver VSI handle
*
* Replays filters for requested VSI via vsi_handle.
*/
@@ -2938,7 +2938,7 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
/**
* ice_rm_all_sw_replay_rule_info - deletes filter replay rules
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
*
* Deletes the filter replay rules.
*/
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index dd21781f7..90dfdabcb 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -40,10 +40,10 @@ enum ice_sw_lkup_type {
ICE_SW_LKUP_DFLT = 5,
ICE_SW_LKUP_ETHERTYPE_MAC = 8,
ICE_SW_LKUP_PROMISC_VLAN = 9,
- ICE_SW_LKUP_LAST,
+ ICE_SW_LKUP_LAST
};
-/* type of filter src id */
+/* type of filter src ID */
enum ice_src_id {
ICE_SRC_ID_UNKNOWN = 0,
ICE_SRC_ID_VSI,
@@ -94,8 +94,8 @@ struct ice_fltr_info {
/* Depending on filter action */
union {
- /* queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 hw_vsi_id:10;
@@ -134,8 +134,8 @@ struct ice_sw_act_ctrl {
enum ice_sw_fwd_act_type fltr_act;
/* Depending on filter action */
union {
- /* This is a queue id in case of ICE_FWD_TO_Q and starting
- * queue id in case of ICE_FWD_TO_QGRP.
+ /* This is a queue ID in case of ICE_FWD_TO_Q and starting
+ * queue ID in case of ICE_FWD_TO_QGRP.
*/
u16 q_id:11;
u16 vsi_id:10;
@@ -178,7 +178,7 @@ struct ice_sw_recipe {
u8 chain_idx;
/* if this recipe is a collection of other recipe then count of other
- * recipes and recipe ids of those recipes
+ * recipes and recipe IDs of those recipes
*/
u8 n_grp_count;
@@ -211,9 +211,11 @@ struct ice_sw_recipe {
/* AQ buffer associated with this recipe */
struct ice_aqc_recipe_data_elem *root_buf;
+ /* This struct saves the fv_words for a given lookup */
+ struct ice_prot_lkup_ext lkup_exts;
};
-/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list id */
+/* Bookkeeping structure to hold bitmap of VSIs corresponding to VSI list ID */
struct ice_vsi_list_map_info {
struct LIST_ENTRY_TYPE list_entry;
ice_declare_bitmap(vsi_map, ICE_MAX_VSI);
@@ -235,7 +237,7 @@ struct ice_fltr_list_entry {
* used for VLAN membership.
*/
struct ice_fltr_mgmt_list_entry {
- /* back pointer to VSI list id to VSI list mapping */
+ /* back pointer to VSI list ID to VSI list mapping */
struct ice_vsi_list_map_info *vsi_list_info;
u16 vsi_count;
#define ICE_INVAL_LG_ACT_INDEX 0xffff
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 17d79ba21..08c974004 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -196,7 +196,7 @@ enum ice_q {
};
/* Different reset sources for which a disable queue AQ call has to be made in
- * order to clean the TX scheduler as a part of the reset
+ * order to clean the Tx scheduler as a part of the reset
*/
enum ice_disq_rst_src {
ICE_NO_RESET = 0,
@@ -242,11 +242,11 @@ struct ice_hw_common_caps {
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
u32 rss_table_entry_width; /* RSS Entry width in bits */
- /* TX/RX queues */
- u32 num_rxq; /* Number/Total RX queues */
- u32 rxq_first_id; /* First queue ID for RX queues */
- u32 num_txq; /* Number/Total TX queues */
- u32 txq_first_id; /* First queue ID for TX queues */
+ /* Tx/Rx queues */
+ u32 num_rxq; /* Number/Total Rx queues */
+ u32 rxq_first_id; /* First queue ID for Rx queues */
+ u32 num_txq; /* Number/Total Tx queues */
+ u32 txq_first_id; /* First queue ID for Tx queues */
/* MSI-X vectors */
u32 num_msix_vectors;
@@ -390,7 +390,7 @@ struct ice_sched_node {
struct ice_sched_node *sibling; /* next sibling in the same layer */
struct ice_sched_node **children;
struct ice_aqc_txsched_elem_data info;
- u32 agg_id; /* aggregator group id */
+ u32 agg_id; /* aggregator group ID */
u16 vsi_handle;
u8 in_use; /* suspended or in use */
u8 tx_sched_layer; /* Logical Layer (1-9) */
@@ -435,8 +435,8 @@ enum ice_agg_type {
/* Rate limit types */
enum ice_rl_type {
ICE_UNKNOWN_BW = 0,
- ICE_MIN_BW, /* for cir profile */
- ICE_MAX_BW, /* for eir profile */
+ ICE_MIN_BW, /* for CIR profile */
+ ICE_MAX_BW, /* for EIR profile */
ICE_SHARED_BW /* for shared profile */
};
@@ -475,7 +475,7 @@ enum ice_rl_type {
*
* (a) is the last_node_teid(not of type Leaf). A leaf node is created under
* (a) as child node where queues get added, add Tx/Rx queue admin commands;
- * need teid of (a) to add queues.
+ * need TEID of (a) to add queues.
*
* This tree
* -> has 8 branches (one for each TC)
@@ -487,7 +487,7 @@ enum ice_rl_type {
* Refer to the documentation for more info.
*/
- /* Data structure for saving bw information */
+ /* Data structure for saving BW information */
enum ice_bw_type {
ICE_BW_TYPE_PRIO,
ICE_BW_TYPE_CIR,
@@ -511,12 +511,12 @@ struct ice_bw_type_info {
u32 shared_bw;
};
-/* vsi type list entry to locate corresponding vsi/ag nodes */
+/* VSI type list entry to locate corresponding VSI/aggregator nodes */
struct ice_sched_vsi_info {
struct ice_sched_node *vsi_node[ICE_MAX_TRAFFIC_CLASS];
struct ice_sched_node *ag_node[ICE_MAX_TRAFFIC_CLASS];
u16 max_lanq[ICE_MAX_TRAFFIC_CLASS];
- /* bw_t_info saves VSI bw information */
+ /* bw_t_info saves VSI BW information */
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
@@ -577,7 +577,7 @@ struct ice_dcbx_cfg {
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
- struct ice_hw *hw; /* back pointer to hw instance */
+ struct ice_hw *hw; /* back pointer to HW instance */
u32 last_node_teid; /* scheduler last node info */
u16 sw_id; /* Initial switch ID belongs to port */
u16 pf_vf_num;
@@ -592,7 +592,7 @@ struct ice_port_info {
struct ice_mac_info mac;
struct ice_phy_info phy;
struct ice_lock sched_lock; /* protect access to TXSched tree */
- /* List contain profile id(s) and other params per layer */
+ /* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
@@ -648,7 +648,7 @@ struct ice_hw {
u8 pf_id; /* device profile info */
u16 max_burst_size; /* driver sets this value */
- /* TX Scheduler values */
+ /* Tx Scheduler values */
u16 num_tx_sched_layers;
u16 num_tx_sched_phys_layers;
u8 flattened_layers;
@@ -659,7 +659,7 @@ struct ice_hw {
struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
struct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];
u8 evb_veb; /* true for VEB, false for VEPA */
- u8 reset_ongoing; /* true if hw is in reset, false otherwise */
+ u8 reset_ongoing; /* true if HW is in reset, false otherwise */
struct ice_bus_info bus;
struct ice_nvm_info nvm;
struct ice_hw_dev_caps dev_caps; /* device capabilities */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 03/38] net/ice/base: add two helper functions
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (2 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 02/38] net/ice/base: improve comments Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 04/38] net/ice/base: add helper macros Qi Zhang
` (35 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two helper functions in common module.
1. ice_aq_set_mac_cfg to help configure maximum frame size with AQ
command
2. ice_get_ctx help to extract context bits from a packet structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 20 +++
drivers/net/ice/base/ice_common.c | 282 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_common.h | 4 +
3 files changed, 306 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 5a599280e..feb980475 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1168,6 +1168,25 @@ struct ice_aqc_set_phy_cfg_data {
};
+/* Set MAC Config command data structure (direct 0x0603) */
+struct ice_aqc_set_mac_cfg {
+ __le16 max_frame_size;
+ u8 params;
+#define ICE_AQ_SET_MAC_PACE_S 3
+#define ICE_AQ_SET_MAC_PACE_M (0xF << ICE_AQ_SET_MAC_PACE_S)
+#define ICE_AQ_SET_MAC_PACE_TYPE_M BIT(7)
+#define ICE_AQ_SET_MAC_PACE_TYPE_RATE 0
+#define ICE_AQ_SET_MAC_PACE_TYPE_FIXED ICE_AQ_SET_MAC_PACE_TYPE_M
+ u8 tx_tmr_priority;
+ __le16 tx_tmr_value;
+ __le16 fc_refresh_threshold;
+ u8 drop_opts;
+#define ICE_AQ_SET_MAC_AUTO_DROP_MASK BIT(0)
+#define ICE_AQ_SET_MAC_AUTO_DROP_NONE 0
+#define ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS BIT(0)
+ u8 reserved[7];
+};
+
/* Restart AN command data structure (direct 0x0605)
* Also used for response, with only the lport_num field present.
@@ -1782,6 +1801,7 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
} params;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index bcfa3014b..392183375 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -423,6 +423,74 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
}
}
+/**
+ * ice_aq_set_mac_cfg
+ * @hw: pointer to the HW struct
+ * @max_frame_size: Maximum Frame Size to be supported
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set MAC configuration (0x0603)
+ */
+enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
+{
+ u16 fc_threshold_val, tx_timer_val;
+ struct ice_aqc_set_mac_cfg *cmd;
+ struct ice_port_info *pi;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ u8 port_num = 0;
+ bool link_up;
+ u32 reg_val;
+
+ cmd = &desc.params.set_mac_cfg;
+
+ if (max_frame_size == 0)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_cfg);
+
+ cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
+
+ /* Retrieve the current data_pacing value in FW*/
+ pi = &hw->port_info[port_num];
+
+ /* We turn on the get_link_info so that ice_update_link_info(...)
+ * can be called.
+ */
+ pi->phy.get_link_info = 1;
+
+ status = ice_get_link_status(pi, &link_up);
+
+ if (status)
+ return status;
+
+ cmd->params = pi->phy.link_info.pacing;
+
+ /* We read back the transmit timer and fc threshold value of
+ * LFC. Thus, we will use index =
+ * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+ *
+ * Also, because we are opearating on transmit timer and fc
+ * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+ */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+ /* Retrieve the transmit timer */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+ tx_timer_val = reg_val &
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+ cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+ /* Retrieve the fc threshold */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+ fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
+ cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
@@ -3227,6 +3295,220 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+/**
+ * ice_read_byte - read context byte into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_byte(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u8 dest_byte, mask;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = (u8)(BIT(ce_info->width) - 1);
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&dest_byte, src, sizeof(dest_byte), ICE_DMA_TO_NONDMA);
+
+ dest_byte &= ~(mask);
+
+ dest_byte >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_byte, sizeof(dest_byte), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_word - read context word into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_word(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u16 dest_word, mask;
+ u8 *src, *target;
+ __le16 src_word;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = BIT(ce_info->width) - 1;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_word, src, sizeof(src_word), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_word &= ~(CPU_TO_LE16(mask));
+
+ /* get the data back into host order before shifting */
+ dest_word = LE16_TO_CPU(src_word);
+
+ dest_word >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_word, sizeof(dest_word), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_dword - read context dword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_dword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u32 dest_dword, mask;
+ __le32 src_dword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 32 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 5 bits so the shift will do nothing
+ */
+ if (ce_info->width < 32)
+ mask = BIT(ce_info->width) - 1;
+ else
+ mask = (u32)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_dword, src, sizeof(src_dword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_dword &= ~(CPU_TO_LE32(mask));
+
+ /* get the data back into host order before shifting */
+ dest_dword = LE32_TO_CPU(src_dword);
+
+ dest_dword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_dword, sizeof(dest_dword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_qword - read context qword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_qword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u64 dest_qword, mask;
+ __le64 src_qword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 64 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 6 bits so the shift will do nothing
+ */
+ if (ce_info->width < 64)
+ mask = BIT_ULL(ce_info->width) - 1;
+ else
+ mask = (u64)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_qword, src, sizeof(src_qword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_qword &= ~(CPU_TO_LE64(mask));
+
+ /* get the data back into host order before shifting */
+ dest_qword = LE64_TO_CPU(src_qword);
+
+ dest_qword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_qword, sizeof(dest_qword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_get_ctx - extract context bits from a packed structure
+ * @src_ctx: pointer to a generic packed context structure
+ * @dest_ctx: pointer to a generic non-packed context structure
+ * @ce_info: a description of the structure to be read from
+ */
+enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ int f;
+
+ for (f = 0; ce_info[f].width; f++) {
+ switch (ce_info[f].size_of) {
+ case 1:
+ ice_read_byte(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 2:
+ ice_read_word(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 4:
+ ice_read_dword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 8:
+ ice_read_qword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ default:
+ /* nothing to do, just keep going */
+ break;
+ }
+ }
+
+ return ICE_SUCCESS;
+}
/**
* ice_ena_vsi_txq
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index f2ad86182..0b387cdbe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -133,6 +133,8 @@ enum ice_status
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd);
enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
+enum ice_status
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd);
enum ice_status
@@ -149,6 +151,8 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
+enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cmd_details);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 03/38] net/ice/base: add two helper functions
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 03/38] net/ice/base: add two helper functions Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add two helper functions in common module.
1. ice_aq_set_mac_cfg to help configure maximum frame size with AQ
command
2. ice_get_ctx help to extract context bits from a packet structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 20 +++
drivers/net/ice/base/ice_common.c | 282 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_common.h | 4 +
3 files changed, 306 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 5a599280e..feb980475 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1168,6 +1168,25 @@ struct ice_aqc_set_phy_cfg_data {
};
+/* Set MAC Config command data structure (direct 0x0603) */
+struct ice_aqc_set_mac_cfg {
+ __le16 max_frame_size;
+ u8 params;
+#define ICE_AQ_SET_MAC_PACE_S 3
+#define ICE_AQ_SET_MAC_PACE_M (0xF << ICE_AQ_SET_MAC_PACE_S)
+#define ICE_AQ_SET_MAC_PACE_TYPE_M BIT(7)
+#define ICE_AQ_SET_MAC_PACE_TYPE_RATE 0
+#define ICE_AQ_SET_MAC_PACE_TYPE_FIXED ICE_AQ_SET_MAC_PACE_TYPE_M
+ u8 tx_tmr_priority;
+ __le16 tx_tmr_value;
+ __le16 fc_refresh_threshold;
+ u8 drop_opts;
+#define ICE_AQ_SET_MAC_AUTO_DROP_MASK BIT(0)
+#define ICE_AQ_SET_MAC_AUTO_DROP_NONE 0
+#define ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS BIT(0)
+ u8 reserved[7];
+};
+
/* Restart AN command data structure (direct 0x0605)
* Also used for response, with only the lport_num field present.
@@ -1782,6 +1801,7 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
} params;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index bcfa3014b..392183375 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -423,6 +423,74 @@ static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
}
}
+/**
+ * ice_aq_set_mac_cfg
+ * @hw: pointer to the HW struct
+ * @max_frame_size: Maximum Frame Size to be supported
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set MAC configuration (0x0603)
+ */
+enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
+{
+ u16 fc_threshold_val, tx_timer_val;
+ struct ice_aqc_set_mac_cfg *cmd;
+ struct ice_port_info *pi;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ u8 port_num = 0;
+ bool link_up;
+ u32 reg_val;
+
+ cmd = &desc.params.set_mac_cfg;
+
+ if (max_frame_size == 0)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_cfg);
+
+ cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
+
+ /* Retrieve the current data_pacing value in FW*/
+ pi = &hw->port_info[port_num];
+
+ /* We turn on the get_link_info so that ice_update_link_info(...)
+ * can be called.
+ */
+ pi->phy.get_link_info = 1;
+
+ status = ice_get_link_status(pi, &link_up);
+
+ if (status)
+ return status;
+
+ cmd->params = pi->phy.link_info.pacing;
+
+ /* We read back the transmit timer and fc threshold value of
+ * LFC. Thus, we will use index =
+ * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+ *
+ * Also, because we are opearating on transmit timer and fc
+ * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+ */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+ /* Retrieve the transmit timer */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+ tx_timer_val = reg_val &
+ PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+ cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+ /* Retrieve the fc threshold */
+ reg_val = rd32(hw,
+ PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+ fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
+ cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
@@ -3227,6 +3295,220 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+/**
+ * ice_read_byte - read context byte into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_byte(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u8 dest_byte, mask;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = (u8)(BIT(ce_info->width) - 1);
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&dest_byte, src, sizeof(dest_byte), ICE_DMA_TO_NONDMA);
+
+ dest_byte &= ~(mask);
+
+ dest_byte >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_byte, sizeof(dest_byte), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_word - read context word into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_word(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u16 dest_word, mask;
+ u8 *src, *target;
+ __le16 src_word;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+ mask = BIT(ce_info->width) - 1;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_word, src, sizeof(src_word), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_word &= ~(CPU_TO_LE16(mask));
+
+ /* get the data back into host order before shifting */
+ dest_word = LE16_TO_CPU(src_word);
+
+ dest_word >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_word, sizeof(dest_word), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_dword - read context dword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_dword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u32 dest_dword, mask;
+ __le32 src_dword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 32 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 5 bits so the shift will do nothing
+ */
+ if (ce_info->width < 32)
+ mask = BIT(ce_info->width) - 1;
+ else
+ mask = (u32)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_dword, src, sizeof(src_dword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_dword &= ~(CPU_TO_LE32(mask));
+
+ /* get the data back into host order before shifting */
+ dest_dword = LE32_TO_CPU(src_dword);
+
+ dest_dword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_dword, sizeof(dest_dword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_read_qword - read context qword into struct
+ * @src_ctx: the context structure to read from
+ * @dest_ctx: the context to be written to
+ * @ce_info: a description of the struct to be filled
+ */
+static void
+ice_read_qword(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ u64 dest_qword, mask;
+ __le64 src_qword;
+ u8 *src, *target;
+ u16 shift_width;
+
+ /* prepare the bits and mask */
+ shift_width = ce_info->lsb % 8;
+
+ /* if the field width is exactly 64 on an x86 machine, then the shift
+ * operation will not work because the SHL instructions count is masked
+ * to 6 bits so the shift will do nothing
+ */
+ if (ce_info->width < 64)
+ mask = BIT_ULL(ce_info->width) - 1;
+ else
+ mask = (u64)~0;
+
+ /* shift to correct alignment */
+ mask <<= shift_width;
+
+ /* get the current bits from the src bit string */
+ src = src_ctx + (ce_info->lsb / 8);
+
+ ice_memcpy(&src_qword, src, sizeof(src_qword), ICE_DMA_TO_NONDMA);
+
+ /* the data in the memory is stored as little endian so mask it
+ * correctly
+ */
+ src_qword &= ~(CPU_TO_LE64(mask));
+
+ /* get the data back into host order before shifting */
+ dest_qword = LE64_TO_CPU(src_qword);
+
+ dest_qword >>= shift_width;
+
+ /* get the address from the struct field */
+ target = dest_ctx + ce_info->offset;
+
+ /* put it back in the struct */
+ ice_memcpy(target, &dest_qword, sizeof(dest_qword), ICE_NONDMA_TO_DMA);
+}
+
+/**
+ * ice_get_ctx - extract context bits from a packed structure
+ * @src_ctx: pointer to a generic packed context structure
+ * @dest_ctx: pointer to a generic non-packed context structure
+ * @ce_info: a description of the structure to be read from
+ */
+enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
+{
+ int f;
+
+ for (f = 0; ce_info[f].width; f++) {
+ switch (ce_info[f].size_of) {
+ case 1:
+ ice_read_byte(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 2:
+ ice_read_word(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 4:
+ ice_read_dword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ case 8:
+ ice_read_qword(src_ctx, dest_ctx, &ce_info[f]);
+ break;
+ default:
+ /* nothing to do, just keep going */
+ break;
+ }
+ }
+
+ return ICE_SUCCESS;
+}
/**
* ice_ena_vsi_txq
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index f2ad86182..0b387cdbe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -133,6 +133,8 @@ enum ice_status
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd);
enum ice_status
+ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
+enum ice_status
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd);
enum ice_status
@@ -149,6 +151,8 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
+ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
+enum ice_status
ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cmd_details);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 04/38] net/ice/base: add helper macros
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (3 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 03/38] net/ice/base: add two helper functions Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 05/38] net/ice/base: allow package copy to be used after resets Qi Zhang
` (34 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Add macro ice_for_each_traffic_class to loop for each
traffic class.
2. Add macro MIN_T to wrap min with type conversion.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_nvm.c | 7 ++++---
drivers/net/ice/base/ice_sched.c | 30 +++++++++++++++---------------
drivers/net/ice/base/ice_type.h | 7 +++++++
4 files changed, 27 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 392183375..86d3be17a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3669,7 +3669,7 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
ice_acquire_lock(&pi->sched_lock);
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
/* configuration is possible only if TC node is present */
if (!ice_sched_get_tc_node(pi, i))
continue;
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 92de2ec3b..8d3d0b0ed 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -163,9 +163,10 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
*/
off_w = offset % ICE_SR_SECTOR_SIZE_IN_WORDS;
read_size = off_w ?
- min(*words,
- (u16)(ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
- min((*words - words_read), ICE_SR_SECTOR_SIZE_IN_WORDS);
+ MIN_T(u16, *words,
+ (ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
+ MIN_T(u16, (*words - words_read),
+ ICE_SR_SECTOR_SIZE_IN_WORDS);
/* Check if this is last command, if so set proper flag */
if ((words_read + read_size) >= *words)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2edc305b5..237bf7350 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1896,7 +1896,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
if (!vsi_ctx)
goto exit_sched_rm_vsi_cfg;
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
struct ice_sched_node *vsi_node, *tc_node;
u8 j = 0;
@@ -2174,7 +2174,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
/* Create aggregator node(s) for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
/* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
@@ -2340,7 +2340,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
/* Move VSI node to new aggregator node for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
@@ -2410,7 +2410,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
goto exit_ice_rm_agg_cfg;
}
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
if (status)
goto exit_ice_rm_agg_cfg;
@@ -3050,7 +3050,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -3112,7 +3112,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -4174,7 +4174,7 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *node;
node = vsi_ctx->sched.ag_node[tc];
@@ -4324,7 +4324,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
enum ice_status status;
@@ -4384,7 +4384,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
if (status)
goto exit_set_vsi_bw_shared_lmt;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4442,7 +4442,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
if (!agg_id_present)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4513,7 +4513,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -5119,7 +5119,7 @@ ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
if (!agg_info)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
ICE_BW_TYPE_CNT))
continue;
@@ -5159,7 +5159,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
u8 tc;
/* Some TC(s) may be missing after reset, adjust for replay */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
+ ice_for_each_traffic_class(tc)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
ice_set_bit(tc, ena_tc_bitmap);
@@ -5253,7 +5253,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
u8 tc;
ice_acquire_lock(&pi->sched_lock);
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node;
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
@@ -5291,7 +5291,7 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
tc_node = ice_sched_get_tc_node(pi, tc);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 08c974004..2e865a78f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -18,6 +18,9 @@
#define ICE_BYTES_PER_DWORD 4
#define ICE_MAX_TRAFFIC_CLASS 8
+#ifndef MIN_T
+#define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b))
+#endif
#include "ice_status.h"
#include "ice_hw_autogen.h"
@@ -379,6 +382,10 @@ struct ice_nvm_info {
/* Max number of port to queue branches w.r.t topology */
#define ICE_TXSCHED_MAX_BRANCHES ICE_MAX_TRAFFIC_CLASS
+
+#define ice_for_each_traffic_class(_i) \
+ for ((_i) = 0; (_i) < ICE_MAX_TRAFFIC_CLASS; (_i)++)
+
/* ICE_DFLT_AGG_ID means that all new VM(s)/VSI node connects
* to driver defined policy for default aggregator
*/
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 04/38] net/ice/base: add helper macros
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 04/38] net/ice/base: add helper macros Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Add macro ice_for_each_traffic_class to loop for each
traffic class.
2. Add macro MIN_T to wrap min with type conversion.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_nvm.c | 7 ++++---
drivers/net/ice/base/ice_sched.c | 30 +++++++++++++++---------------
drivers/net/ice/base/ice_type.h | 7 +++++++
4 files changed, 27 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 392183375..86d3be17a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3669,7 +3669,7 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
ice_acquire_lock(&pi->sched_lock);
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
/* configuration is possible only if TC node is present */
if (!ice_sched_get_tc_node(pi, i))
continue;
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 92de2ec3b..8d3d0b0ed 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -163,9 +163,10 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
*/
off_w = offset % ICE_SR_SECTOR_SIZE_IN_WORDS;
read_size = off_w ?
- min(*words,
- (u16)(ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
- min((*words - words_read), ICE_SR_SECTOR_SIZE_IN_WORDS);
+ MIN_T(u16, *words,
+ (ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
+ MIN_T(u16, (*words - words_read),
+ ICE_SR_SECTOR_SIZE_IN_WORDS);
/* Check if this is last command, if so set proper flag */
if ((words_read + read_size) >= *words)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2edc305b5..237bf7350 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1896,7 +1896,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
if (!vsi_ctx)
goto exit_sched_rm_vsi_cfg;
- for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
+ ice_for_each_traffic_class(i) {
struct ice_sched_node *vsi_node, *tc_node;
u8 j = 0;
@@ -2174,7 +2174,7 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_info->list_entry, &hw->agg_list);
}
/* Create aggregator node(s) for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc)) {
/* Delete aggregator cfg TC if it exists previously */
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
@@ -2340,7 +2340,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
}
/* Move VSI node to new aggregator node for requested TC(s) */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
@@ -2410,7 +2410,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
goto exit_ice_rm_agg_cfg;
}
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
if (status)
goto exit_ice_rm_agg_cfg;
@@ -3050,7 +3050,7 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
ice_acquire_lock(&pi->sched_lock);
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -3112,7 +3112,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
if (!ice_is_tc_ena(ena_tcmap, tc))
@@ -4174,7 +4174,7 @@ ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *node;
node = vsi_ctx->sched.ag_node[tc];
@@ -4324,7 +4324,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
enum ice_status status;
@@ -4384,7 +4384,7 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
if (status)
goto exit_set_vsi_bw_shared_lmt;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4442,7 +4442,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
if (!agg_id_present)
return ICE_ERR_PARAM;
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *agg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
@@ -4513,7 +4513,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
}
/* Return success if no nodes are present across TC */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
enum ice_rl_type rl_type = ICE_SHARED_BW;
struct ice_sched_node *tc_node, *agg_node;
@@ -5119,7 +5119,7 @@ ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
if (!agg_info)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
ICE_BW_TYPE_CNT))
continue;
@@ -5159,7 +5159,7 @@ ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
u8 tc;
/* Some TC(s) may be missing after reset, adjust for replay */
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++)
+ ice_for_each_traffic_class(tc)
if (ice_is_tc_ena(*tc_bitmap, tc) &&
(ice_sched_get_tc_node(pi, tc)))
ice_set_bit(tc, ena_tc_bitmap);
@@ -5253,7 +5253,7 @@ ice_sched_replay_tc_node_bw(struct ice_hw *hw)
u8 tc;
ice_acquire_lock(&pi->sched_lock);
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node;
tc_node = ice_sched_get_tc_node(hw->port_info, tc);
@@ -5291,7 +5291,7 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
if (!vsi_ctx)
return ICE_ERR_PARAM;
- for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
+ ice_for_each_traffic_class(tc) {
if (!ice_is_tc_ena(*tc_bitmap, tc))
continue;
tc_node = ice_sched_get_tc_node(pi, tc);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 08c974004..2e865a78f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -18,6 +18,9 @@
#define ICE_BYTES_PER_DWORD 4
#define ICE_MAX_TRAFFIC_CLASS 8
+#ifndef MIN_T
+#define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b))
+#endif
#include "ice_status.h"
#include "ice_hw_autogen.h"
@@ -379,6 +382,10 @@ struct ice_nvm_info {
/* Max number of port to queue branches w.r.t topology */
#define ICE_TXSCHED_MAX_BRANCHES ICE_MAX_TRAFFIC_CLASS
+
+#define ice_for_each_traffic_class(_i) \
+ for ((_i) = 0; (_i) < ICE_MAX_TRAFFIC_CLASS; (_i)++)
+
/* ICE_DFLT_AGG_ID means that all new VM(s)/VSI node connects
* to driver defined policy for default aggregator
*/
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 05/38] net/ice/base: allow package copy to be used after resets
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (4 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 04/38] net/ice/base: add helper macros Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 06/38] net/ice/base: clean code Qi Zhang
` (33 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
For components that make a copy of an external pipeline package file (i.e.
the Linux and FreeBSD drivers), save the size of the package file along
with the copy so that both can be used when calling ice_init_pkg() after a
CORER/GLOBR reset. Also, do not free the copy of the package file in
ice_init_pkg() since it is needed afterward for subsequent resets.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 9 +++++----
drivers/net/ice/base/ice_type.h | 1 +
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c87424601..66c47abda 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1269,6 +1269,7 @@ void ice_free_seg(struct ice_hw *hw)
if (hw->pkg_copy) {
ice_free(hw, hw->pkg_copy);
hw->pkg_copy = NULL;
+ hw->pkg_size = 0;
}
hw->seg = NULL;
}
@@ -1351,8 +1352,6 @@ static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
status = ICE_SUCCESS;
}
- /* Free a previous segment, if necessary */
- ice_free_seg(hw);
if (!status) {
hw->seg = seg;
/* on successful package download, update other required
@@ -1401,12 +1400,14 @@ enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
buf_copy = (u8 *)ice_memdup(hw, buf, len, ICE_NONDMA_TO_NONDMA);
status = ice_init_pkg(hw, buf_copy, len);
- if (status)
+ if (status) {
/* Free the copy, since we failed to initialize the package */
ice_free(hw, buf_copy);
- else
+ } else {
/* Track the copied pkg so we can free it later */
hw->pkg_copy = buf_copy;
+ hw->pkg_size = len;
+ }
return status;
}
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 2e865a78f..6bd73ed04 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -728,6 +728,7 @@ struct ice_hw {
/* Pointer to allocated copy of pkg memory */
u8 *pkg_copy;
+ u32 pkg_size;
/* tunneling info */
struct ice_tunnel_table tnl;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 05/38] net/ice/base: allow package copy to be used after resets
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 05/38] net/ice/base: allow package copy to be used after resets Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
For components that make a copy of an external pipeline package file (i.e.
the Linux and FreeBSD drivers), save the size of the package file along
with the copy so that both can be used when calling ice_init_pkg() after a
CORER/GLOBR reset. Also, do not free the copy of the package file in
ice_init_pkg() since it is needed afterward for subsequent resets.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 9 +++++----
drivers/net/ice/base/ice_type.h | 1 +
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c87424601..66c47abda 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1269,6 +1269,7 @@ void ice_free_seg(struct ice_hw *hw)
if (hw->pkg_copy) {
ice_free(hw, hw->pkg_copy);
hw->pkg_copy = NULL;
+ hw->pkg_size = 0;
}
hw->seg = NULL;
}
@@ -1351,8 +1352,6 @@ static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
status = ICE_SUCCESS;
}
- /* Free a previous segment, if necessary */
- ice_free_seg(hw);
if (!status) {
hw->seg = seg;
/* on successful package download, update other required
@@ -1401,12 +1400,14 @@ enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
buf_copy = (u8 *)ice_memdup(hw, buf, len, ICE_NONDMA_TO_NONDMA);
status = ice_init_pkg(hw, buf_copy, len);
- if (status)
+ if (status) {
/* Free the copy, since we failed to initialize the package */
ice_free(hw, buf_copy);
- else
+ } else {
/* Track the copied pkg so we can free it later */
hw->pkg_copy = buf_copy;
+ hw->pkg_size = len;
+ }
return status;
}
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 2e865a78f..6bd73ed04 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -728,6 +728,7 @@ struct ice_hw {
/* Pointer to allocated copy of pkg memory */
u8 *pkg_copy;
+ u32 pkg_size;
/* tunneling info */
struct ice_tunnel_table tnl;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 06/38] net/ice/base: clean code
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (5 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 05/38] net/ice/base: allow package copy to be used after resets Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 07/38] net/ice/base: declare functions as external Qi Zhang
` (32 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove unnecessary macro and data structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 -
drivers/net/ice/base/ice_flex_pipe.c | 2 -
drivers/net/ice/base/ice_flow.c | 136 ----------------------------------
drivers/net/ice/base/ice_type.h | 6 --
4 files changed, 146 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index feb980475..056a9fbef 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1930,8 +1930,6 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
- ice_aqc_opc_suspend_sched_traffic = 0x040B,
- ice_aqc_opc_resume_sched_traffic = 0x040C,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 66c47abda..2d23c36eb 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2247,8 +2247,6 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < xlt2->count; i++) {
if (xlt2->vsig_tbl[i].in_use &&
ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
- *vsig = (i | ((hw->pf_id << ICE_PF_NUM_S) &
- ICE_PF_NUM_M));
*vsig = ICE_VSIG_VALUE(i, hw->pf_id);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 574c927c4..03a324d49 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1554,142 +1554,6 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
return ICE_SUCCESS;
}
-/* Mapping of AVF hash bit fields to an L3-L4 hash combination.
- * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash,
- * convert its values to their appropriate flow L3, L4 values.
- */
-#define ICE_FLOW_AVF_RSS_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4))
-#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP))
-#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \
- ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP))
-
-#define ICE_FLOW_AVF_RSS_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6))
-#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP))
-#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \
- ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP))
-
-#define ICE_FLOW_MAX_CFG 10
-
-/**
- * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver
- * @hw: pointer to the hardware structure
- * @vsi_handle: software VSI handle
- * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure
- *
- * This function will take the hash bitmap provided by the AVF driver via a
- * message, convert it to ICE-compatible values, and configure RSS flow
- * profiles.
- */
-enum ice_status
-ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
-{
- u64 added_cfg[ICE_FLOW_MAX_CFG], hash_flds;
- enum ice_status status = ICE_SUCCESS;
- u8 i, idx = 0;
-
- if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||
- !ice_is_vsi_valid(hw, vsi_handle))
- return ICE_ERR_PARAM;
-
- /* Make sure no unsupported bits are specified */
- if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS |
- ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS))
- return ICE_ERR_CFG;
-
- hash_flds = avf_hash;
-
- /* Always create an L3 RSS configuration for any L4 RSS configuration */
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS;
-
- /* Create the corresponding RSS configuration for each valid hash bit */
- while (hash_flds) {
- u64 rss_hash = ICE_HASH_INVALID;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS;
- }
- } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS;
- }
- }
-
- if (rss_hash == ICE_HASH_INVALID)
- return ICE_ERR_OUT_OF_RANGE;
-
- status = ice_add_rss_cfg(hw, vsi_handle, rss_hash,
- ICE_FLOW_SEG_HDR_NONE);
- if (status)
- break;
- added_cfg[idx++] = rss_hash;
- }
-
- /* If status is not success, we must remove all hash configurations
- * that were successfully added previously in this call for the vsi
- */
- if (status)
- for (i = 0; i < idx; i++)
- ice_rem_rss_cfg(hw, vsi_handle, added_cfg[i],
- ICE_FLOW_SEG_HDR_NONE);
-
- return status;
-}
-
/**
* ice_rem_all_rss_vsi_ctx - remove all RSS configurations from VSI context
* @hw: pointer to the hardware structure
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6bd73ed04..25d64477f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -733,12 +733,6 @@ struct ice_hw {
/* tunneling info */
struct ice_tunnel_table tnl;
- /* PTYPE group and XLT1 management */
-#define ICE_MAX_PTGS 256
- struct ice_ptg_entry ptg_tbl[ICE_BLK_COUNT][ICE_MAX_PTGS];
-
-#define ICE_XLT1_CNT 1024
- struct ice_ptg_ptype xlt1_tbl[ICE_BLK_COUNT][ICE_XLT1_CNT];
#define ICE_PKG_FILENAME "package_file"
#define ICE_PKG_FILENAME_EXT "pkg"
#define ICE_PKG_FILE_MAJ_VER 1
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 06/38] net/ice/base: clean code
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 06/38] net/ice/base: clean code Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove unnecessary macro and data structure.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 -
drivers/net/ice/base/ice_flex_pipe.c | 2 -
drivers/net/ice/base/ice_flow.c | 136 ----------------------------------
drivers/net/ice/base/ice_type.h | 6 --
4 files changed, 146 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index feb980475..056a9fbef 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1930,8 +1930,6 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
- ice_aqc_opc_suspend_sched_traffic = 0x040B,
- ice_aqc_opc_resume_sched_traffic = 0x040C,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 66c47abda..2d23c36eb 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2247,8 +2247,6 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < xlt2->count; i++) {
if (xlt2->vsig_tbl[i].in_use &&
ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
- *vsig = (i | ((hw->pf_id << ICE_PF_NUM_S) &
- ICE_PF_NUM_M));
*vsig = ICE_VSIG_VALUE(i, hw->pf_id);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 574c927c4..03a324d49 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1554,142 +1554,6 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
return ICE_SUCCESS;
}
-/* Mapping of AVF hash bit fields to an L3-L4 hash combination.
- * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash,
- * convert its values to their appropriate flow L3, L4 values.
- */
-#define ICE_FLOW_AVF_RSS_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4))
-#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP))
-#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \
- ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP))
-
-#define ICE_FLOW_AVF_RSS_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6))
-#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP))
-#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \
- (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP))
-#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \
- (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \
- ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP))
-
-#define ICE_FLOW_MAX_CFG 10
-
-/**
- * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver
- * @hw: pointer to the hardware structure
- * @vsi_handle: software VSI handle
- * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure
- *
- * This function will take the hash bitmap provided by the AVF driver via a
- * message, convert it to ICE-compatible values, and configure RSS flow
- * profiles.
- */
-enum ice_status
-ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
-{
- u64 added_cfg[ICE_FLOW_MAX_CFG], hash_flds;
- enum ice_status status = ICE_SUCCESS;
- u8 i, idx = 0;
-
- if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||
- !ice_is_vsi_valid(hw, vsi_handle))
- return ICE_ERR_PARAM;
-
- /* Make sure no unsupported bits are specified */
- if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS |
- ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS))
- return ICE_ERR_CFG;
-
- hash_flds = avf_hash;
-
- /* Always create an L3 RSS configuration for any L4 RSS configuration */
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)
- hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS;
-
- /* Create the corresponding RSS configuration for each valid hash bit */
- while (hash_flds) {
- u64 rss_hash = ICE_HASH_INVALID;
-
- if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV4 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV4;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS;
- }
- } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) {
- if (hash_flds & ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_TCP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS;
- } else if (hash_flds &
- ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_UDP_PORT;
- hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS;
- } else if (hash_flds &
- BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) {
- rss_hash = ICE_FLOW_HASH_IPV6 |
- ICE_FLOW_HASH_SCTP_PORT;
- hash_flds &=
- ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP);
- } else if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) {
- rss_hash = ICE_FLOW_HASH_IPV6;
- hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS;
- }
- }
-
- if (rss_hash == ICE_HASH_INVALID)
- return ICE_ERR_OUT_OF_RANGE;
-
- status = ice_add_rss_cfg(hw, vsi_handle, rss_hash,
- ICE_FLOW_SEG_HDR_NONE);
- if (status)
- break;
- added_cfg[idx++] = rss_hash;
- }
-
- /* If status is not success, we must remove all hash configurations
- * that were successfully added previously in this call for the vsi
- */
- if (status)
- for (i = 0; i < idx; i++)
- ice_rem_rss_cfg(hw, vsi_handle, added_cfg[i],
- ICE_FLOW_SEG_HDR_NONE);
-
- return status;
-}
-
/**
* ice_rem_all_rss_vsi_ctx - remove all RSS configurations from VSI context
* @hw: pointer to the hardware structure
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6bd73ed04..25d64477f 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -733,12 +733,6 @@ struct ice_hw {
/* tunneling info */
struct ice_tunnel_table tnl;
- /* PTYPE group and XLT1 management */
-#define ICE_MAX_PTGS 256
- struct ice_ptg_entry ptg_tbl[ICE_BLK_COUNT][ICE_MAX_PTGS];
-
-#define ICE_XLT1_CNT 1024
- struct ice_ptg_ptype xlt1_tbl[ICE_BLK_COUNT][ICE_XLT1_CNT];
#define ICE_PKG_FILENAME "package_file"
#define ICE_PKG_FILENAME_EXT "pkg"
#define ICE_PKG_FILE_MAJ_VER 1
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 07/38] net/ice/base: declare functions as external
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (6 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 06/38] net/ice/base: clean code Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 08/38] net/ice/base: add more APIs in switch module Qi Zhang
` (31 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove static of below functions and declare them as external
APIs.
ice_aq_add_vsi
ice_aq_free_vsi
ice_aq_update_vsi
ice_aq_add_lan_txq
ice_init_pkg
So far the purpose is just to sync with kernel driver.
They are reserved for future use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 4 ++++
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.h | 2 ++
drivers/net/ice/base/ice_switch.c | 6 +++---
drivers/net/ice/base/ice_switch.h | 9 +++++++++
6 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 86d3be17a..015db11e0 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2935,7 +2935,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
* Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
* flow.
*/
-static enum ice_status
+enum ice_status
ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 0b387cdbe..63f4a5ebe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -94,6 +94,10 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
enum ice_status
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
+enum ice_status
+ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
+ struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
+ struct ice_sq_cd *cd);
bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 2d23c36eb..ff615f94f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1314,7 +1314,7 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
* ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
* case.
*/
-static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
+enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
{
struct ice_pkg_hdr *pkg;
enum ice_status status;
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 23fffed75..00c2b6682 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -88,6 +88,8 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);
struct ice_prof_map *
ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);
enum ice_status
+ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);
+enum ice_status
ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
void ice_free_seg(struct ice_hw *hw);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 512e64b91..e6fc9fcee 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -288,7 +288,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
*
* Add a VSI context to the hardware (0x0210)
*/
-static enum ice_status
+enum ice_status
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
@@ -331,7 +331,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Free VSI context info from hardware (0x0213)
*/
-static enum ice_status
+enum ice_status
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd)
{
@@ -366,7 +366,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Update VSI context in the hardware (0x0211)
*/
-static enum ice_status
+enum ice_status
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 90dfdabcb..b28e55a4f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -271,6 +271,15 @@ enum ice_promisc_flags {
/* VSI related commands */
enum ice_status
+ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ bool keep_vsi_alloc, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 07/38] net/ice/base: declare functions as external
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 07/38] net/ice/base: declare functions as external Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Remove static of below functions and declare them as external
APIs.
ice_aq_add_vsi
ice_aq_free_vsi
ice_aq_update_vsi
ice_aq_add_lan_txq
ice_init_pkg
So far the purpose is just to sync with kernel driver.
They are reserved for future use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 4 ++++
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.h | 2 ++
drivers/net/ice/base/ice_switch.c | 6 +++---
drivers/net/ice/base/ice_switch.h | 9 +++++++++
6 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 86d3be17a..015db11e0 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2935,7 +2935,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
* Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
* flow.
*/
-static enum ice_status
+enum ice_status
ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 0b387cdbe..63f4a5ebe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -94,6 +94,10 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
enum ice_status
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
+enum ice_status
+ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
+ struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
+ struct ice_sq_cd *cd);
bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 2d23c36eb..ff615f94f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1314,7 +1314,7 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
* ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
* case.
*/
-static enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
+enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
{
struct ice_pkg_hdr *pkg;
enum ice_status status;
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 23fffed75..00c2b6682 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -88,6 +88,8 @@ ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);
struct ice_prof_map *
ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);
enum ice_status
+ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);
+enum ice_status
ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
void ice_free_seg(struct ice_hw *hw);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 512e64b91..e6fc9fcee 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -288,7 +288,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
*
* Add a VSI context to the hardware (0x0210)
*/
-static enum ice_status
+enum ice_status
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
@@ -331,7 +331,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Free VSI context info from hardware (0x0213)
*/
-static enum ice_status
+enum ice_status
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd)
{
@@ -366,7 +366,7 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Update VSI context in the hardware (0x0211)
*/
-static enum ice_status
+enum ice_status
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 90dfdabcb..b28e55a4f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -271,6 +271,15 @@ enum ice_promisc_flags {
/* VSI related commands */
enum ice_status
+ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ bool keep_vsi_alloc, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 08/38] net/ice/base: add more APIs in switch module
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (7 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 07/38] net/ice/base: declare functions as external Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 09/38] net/ice/base: add VSI queue context framework Qi Zhang
` (30 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add below APIs in switch module
1. ice_aq_get_vsi_params - get VSI context info
2. ice_aq_add_update_mir_rule - add/update mirror rule
3. ice_aq_delete_mir_rule - delete mirror rule
4. ice_aq_set_storm_ctrl - set storm control configuration
5. ice_aq_get_storm_ctrl - get storm control configuration
PMD can use these APIs to enable mirror rule and storm control
related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 136 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.c | 228 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 29 +++++
3 files changed, 393 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 056a9fbef..724657af6 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -177,6 +177,13 @@ struct ice_aqc_clear_pxe {
};
+/* Configure No-Drop Policy Command (direct 0x0112) */
+struct ice_aqc_config_no_drop_policy {
+ u8 opts;
+#define ICE_AQC_FORCE_NO_DROP BIT(0)
+ u8 rsvd[15];
+};
+
/* Get switch configuration (0x0200) */
struct ice_aqc_get_sw_cfg {
/* Reserved for command and copy of request flags for response */
@@ -350,6 +357,19 @@ struct ice_aqc_add_update_free_vsi_resp {
};
+struct ice_aqc_get_vsi_resp {
+ __le16 vsi_num;
+ u8 vf_id;
+ /* The vsi_flags field uses the ICE_AQ_VSI_TYPE_* defines for values.
+ * These are found above in struct ice_aqc_add_get_update_free_vsi.
+ */
+ u8 vsi_flags;
+ __le16 vsi_used;
+ __le16 vsi_free;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
struct ice_aqc_vsi_props {
__le16 valid_sections;
@@ -506,6 +526,110 @@ struct ice_aqc_vsi_props {
};
+/* Add/update mirror rule - direct (0x0260) */
+#define ICE_AQC_RULE_ID_VALID_S 7
+#define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S)
+#define ICE_AQC_RULE_ID_S 0
+#define ICE_AQC_RULE_ID_M (0x3F << ICE_AQC_RULE_ID_S)
+
+/* Following defines to be used while processing caller specified mirror list
+ * of VSI indexes.
+ */
+/* Action: Byte.bit (1.7)
+ * 0 = Remove VSI from mirror rule
+ * 1 = Add VSI to mirror rule
+ */
+#define ICE_AQC_RULE_ACT_S 15
+#define ICE_AQC_RULE_ACT_M (0x1 << ICE_AQC_RULE_ACT_S)
+/* Action: 1.2:0.0 = Mirrored VSI */
+#define ICE_AQC_RULE_MIRRORED_VSI_S 0
+#define ICE_AQC_RULE_MIRRORED_VSI_M (0x7FF << ICE_AQC_RULE_MIRRORED_VSI_S)
+
+/* This is to be used by add/update mirror rule Admin Queue command.
+ * In case of add mirror rule - if rule ID is specified as
+ * INVAL_MIRROR_RULE_ID, new rule ID is allocated from shared pool.
+ * If specified rule_id is valid, then it is used. If specified rule_id
+ * is in use then new mirroring rule is added.
+ */
+#define ICE_INVAL_MIRROR_RULE_ID 0xFFFF
+
+struct ice_aqc_add_update_mir_rule {
+ __le16 rule_id;
+
+ __le16 rule_type;
+#define ICE_AQC_RULE_TYPE_S 0
+#define ICE_AQC_RULE_TYPE_M (0x7 << ICE_AQC_RULE_TYPE_S)
+ /* VPORT ingress/egress */
+#define ICE_AQC_RULE_TYPE_VPORT_INGRESS 0x1
+#define ICE_AQC_RULE_TYPE_VPORT_EGRESS 0x2
+ /* Physical port ingress mirroring.
+ * All traffic received by this port
+ */
+#define ICE_AQC_RULE_TYPE_PPORT_INGRESS 0x6
+ /* Physical port egress mirroring. All traffic sent by this port */
+#define ICE_AQC_RULE_TYPE_PPORT_EGRESS 0x7
+
+ /* Number of mirrored entries.
+ * The values are in the command buffer
+ */
+ __le16 num_entries;
+
+ /* Destination VSI */
+ __le16 dest;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Delete mirror rule - direct(0x0261) */
+struct ice_aqc_delete_mir_rule {
+ __le16 rule_id;
+ __le16 rsvd;
+
+ /* Byte.bit: 20.0 = Keep allocation. If set VSI stays part of
+ * the PF allocated resources, otherwise it is returned to the
+ * shared pool
+ */
+#define ICE_AQC_FLAG_KEEP_ALLOCD_S 0
+#define ICE_AQC_FLAG_KEEP_ALLOCD_M (0x1 << ICE_AQC_FLAG_KEEP_ALLOCD_S)
+ __le16 flags;
+
+ u8 reserved[10];
+};
+
+/* Set/Get storm config - (direct 0x0280, 0x0281) */
+/* This structure holds get storm configuration response and same structure
+ * is used to perform set_storm_cfg
+ */
+struct ice_aqc_storm_cfg {
+ __le32 bcast_thresh_size;
+ __le32 mcast_thresh_size;
+ /* Bit 18:0 - Traffic upper threshold size
+ * Bit 31:19 - Reserved
+ */
+#define ICE_AQ_THRESHOLD_S 0
+#define ICE_AQ_THRESHOLD_M (0x7FFFF << ICE_AQ_THRESHOLD_S)
+
+ __le32 storm_ctrl_ctrl;
+ /* Bit 0: MDIPW - Drop Multicast packets in previous window
+ * Bit 1: MDICW - Drop multicast packets in current window
+ * Bit 2: BDIPW - Drop broadcast packets in previous window
+ * Bit 3: BDICW - Drop broadcast packets in current window
+ */
+#define ICE_AQ_STORM_CTRL_MDIPW_DROP_MULTICAST BIT(0)
+#define ICE_AQ_STORM_CTRL_MDICW_DROP_MULTICAST BIT(1)
+#define ICE_AQ_STORM_CTRL_BDIPW_DROP_MULTICAST BIT(2)
+#define ICE_AQ_STORM_CTRL_BDICW_DROP_MULTICAST BIT(3)
+ /* Bit 7:5 : Reserved */
+ /* Bit 27:8 : Interval - BSC/MSC Time-interval specification: The
+ * interval size for applying ingress broadcast or multicast storm
+ * control.
+ */
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S 8
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_M \
+ (0xFFFFF << ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S)
+ __le32 reserved;
+};
+
#define ICE_MAX_NUM_RECIPES 64
@@ -1771,6 +1895,9 @@ struct ice_aq_desc {
struct ice_aqc_manage_mac_read mac_read;
struct ice_aqc_manage_mac_write mac_write;
struct ice_aqc_clear_pxe clear_pxe;
+ struct ice_aqc_config_no_drop_policy no_drop;
+ struct ice_aqc_add_update_mir_rule add_update_rule;
+ struct ice_aqc_delete_mir_rule del_rule;
struct ice_aqc_list_caps get_cap;
struct ice_aqc_get_phy_caps get_phy;
struct ice_aqc_set_phy_cfg set_phy;
@@ -1778,6 +1905,7 @@ struct ice_aq_desc {
struct ice_aqc_set_port_id_led set_port_id_led;
struct ice_aqc_get_sw_cfg get_sw_conf;
struct ice_aqc_sw_rules sw_rules;
+ struct ice_aqc_storm_cfg storm_conf;
struct ice_aqc_get_topo get_topo;
struct ice_aqc_sched_elem_cmd sched_elem_cmd;
struct ice_aqc_query_txsched_res query_sched_res;
@@ -1795,6 +1923,7 @@ struct ice_aq_desc {
struct ice_aqc_txqs_cleanup txqs_cleanup;
struct ice_aqc_add_get_update_free_vsi vsi_cmd;
struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res;
+ struct ice_aqc_get_vsi_resp get_vsi_resp;
struct ice_aqc_download_pkg download_pkg;
struct ice_aqc_get_pkg_info_list get_pkg_info_list;
struct ice_aqc_fw_logging fw_logging;
@@ -1912,6 +2041,13 @@ enum ice_adminq_opc {
ice_aqc_opc_get_vsi_params = 0x0212,
ice_aqc_opc_free_vsi = 0x0213,
+ /* Mirroring rules - add/update, delete */
+ ice_aqc_opc_add_update_mir_rule = 0x0260,
+ ice_aqc_opc_del_mir_rule = 0x0261,
+
+ /* storm configuration */
+ ice_aqc_opc_set_storm_cfg = 0x0280,
+ ice_aqc_opc_get_storm_cfg = 0x0281,
/* switch rules population commands */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e6fc9fcee..34637c1be 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -566,7 +566,174 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return ice_aq_update_vsi(hw, vsi_ctx, cd);
}
+/**
+ * ice_aq_get_vsi_params
+ * @hw: pointer to the HW struct
+ * @vsi_ctx: pointer to a VSI context struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get VSI context info from hardware (0x0212)
+ */
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_add_get_update_free_vsi *cmd;
+ struct ice_aqc_get_vsi_resp *resp;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.vsi_cmd;
+ resp = &desc.params.get_vsi_resp;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_vsi_params);
+
+ cmd->vsi_num = CPU_TO_LE16(vsi_ctx->vsi_num | ICE_AQ_VSI_IS_VALID);
+
+ status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,
+ sizeof(vsi_ctx->info), cd);
+ if (!status) {
+ vsi_ctx->vsi_num = LE16_TO_CPU(resp->vsi_num) &
+ ICE_AQ_VSI_NUM_M;
+ vsi_ctx->vsis_allocd = LE16_TO_CPU(resp->vsi_used);
+ vsi_ctx->vsis_unallocated = LE16_TO_CPU(resp->vsi_free);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_add_update_mir_rule - add/update a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_type: Rule Type
+ * @dest_vsi: VSI number to which packets will be mirrored
+ * @count: length of the list
+ * @mr_buf: buffer for list of mirrored VSI numbers
+ * @cd: pointer to command details structure or NULL
+ * @rule_id: Rule ID
+ *
+ * Add/Update Mirror Rule (0x260).
+ */
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id)
+{
+ struct ice_aqc_add_update_mir_rule *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ __le16 *mr_list = NULL;
+ u16 buf_size = 0;
+
+ switch (rule_type) {
+ case ICE_AQC_RULE_TYPE_VPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_VPORT_EGRESS:
+ /* Make sure count and mr_buf are set for these rule_types */
+ if (!(count && mr_buf))
+ return ICE_ERR_PARAM;
+
+ buf_size = count * sizeof(__le16);
+ mr_list = (__le16 *)ice_malloc(hw, buf_size);
+ if (!mr_list)
+ return ICE_ERR_NO_MEMORY;
+ break;
+ case ICE_AQC_RULE_TYPE_PPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_PPORT_EGRESS:
+ /* Make sure count and mr_buf are not set for these
+ * rule_types
+ */
+ if (count || mr_buf)
+ return ICE_ERR_PARAM;
+ break;
+ default:
+ ice_debug(hw, ICE_DBG_SW,
+ "Error due to unsupported rule_type %u\n", rule_type);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_update_mir_rule);
+
+ /* Pre-process 'mr_buf' items for add/update of virtual port
+ * ingress/egress mirroring (but not physical port ingress/egress
+ * mirroring)
+ */
+ if (mr_buf) {
+ int i;
+
+ for (i = 0; i < count; i++) {
+ u16 id;
+
+ id = mr_buf[i].vsi_idx & ICE_AQC_RULE_MIRRORED_VSI_M;
+
+ /* Validate specified VSI number, make sure it is less
+ * than ICE_MAX_VSI, if not return with error.
+ */
+ if (id >= ICE_MAX_VSI) {
+ ice_debug(hw, ICE_DBG_SW,
+ "Error VSI index (%u) out-of-range\n",
+ id);
+ ice_free(hw, mr_list);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ /* add VSI to mirror rule */
+ if (mr_buf[i].add)
+ mr_list[i] =
+ CPU_TO_LE16(id | ICE_AQC_RULE_ACT_M);
+ else /* remove VSI from mirror rule */
+ mr_list[i] = CPU_TO_LE16(id);
+ }
+ }
+
+ cmd = &desc.params.add_update_rule;
+ if ((*rule_id) != ICE_INVAL_MIRROR_RULE_ID)
+ cmd->rule_id = CPU_TO_LE16(((*rule_id) & ICE_AQC_RULE_ID_M) |
+ ICE_AQC_RULE_ID_VALID_M);
+ cmd->rule_type = CPU_TO_LE16(rule_type & ICE_AQC_RULE_TYPE_M);
+ cmd->num_entries = CPU_TO_LE16(count);
+ cmd->dest = CPU_TO_LE16(dest_vsi);
+
+ status = ice_aq_send_cmd(hw, &desc, mr_list, buf_size, cd);
+ if (!status)
+ *rule_id = LE16_TO_CPU(cmd->rule_id) & ICE_AQC_RULE_ID_M;
+ ice_free(hw, mr_list);
+
+ return status;
+}
+
+/**
+ * ice_aq_delete_mir_rule - delete a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_id: Mirror rule ID (to be deleted)
+ * @keep_allocd: if set, the VSI stays part of the PF allocated res,
+ * otherwise it is returned to the shared pool
+ * @cd: pointer to command details structure or NULL
+ *
+ * Delete Mirror Rule (0x261).
+ */
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_delete_mir_rule *cmd;
+ struct ice_aq_desc desc;
+
+ /* rule_id should be in the range 0...63 */
+ if (rule_id >= ICE_MAX_NUM_MIRROR_RULES)
+ return ICE_ERR_OUT_OF_RANGE;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_del_mir_rule);
+
+ cmd = &desc.params.del_rule;
+ rule_id |= ICE_AQC_RULE_ID_VALID_M;
+ cmd->rule_id = CPU_TO_LE16(rule_id);
+
+ if (keep_allocd)
+ cmd->flags = CPU_TO_LE16(ICE_AQC_FLAG_KEEP_ALLOCD_M);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_aq_alloc_free_vsi_list
@@ -626,6 +793,67 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
return status;
}
+/**
+ * ice_aq_set_storm_ctrl - Sets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Sets the storm control configuration (0x0280)
+ */
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask)
+{
+ struct ice_aqc_storm_cfg *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.storm_conf;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_storm_cfg);
+
+ cmd->bcast_thresh_size = CPU_TO_LE32(bcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->mcast_thresh_size = CPU_TO_LE32(mcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->storm_ctrl_ctrl = CPU_TO_LE32(ctl_bitmask);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_aq_get_storm_ctrl - gets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Gets the storm control configuration (0x0281)
+ */
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask)
+{
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_storm_cfg);
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+ if (!status) {
+ struct ice_aqc_storm_cfg *resp = &desc.params.storm_conf;
+
+ if (bcast_thresh)
+ *bcast_thresh = LE32_TO_CPU(resp->bcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (mcast_thresh)
+ *mcast_thresh = LE32_TO_CPU(resp->mcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (ctl_bitmask)
+ *ctl_bitmask = LE32_TO_CPU(resp->storm_ctrl_ctrl);
+ }
+
+ return status;
+}
/**
* ice_aq_sw_rules - add/update/remove switch rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b28e55a4f..ebcfaa120 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -29,6 +29,19 @@ struct ice_vsi_ctx {
struct LIST_HEAD_TYPE rss_list_head;
};
+/* This is to be used by add/update mirror rule Admin Queue command */
+struct ice_mir_rule_buf {
+ u16 vsi_idx; /* VSI index */
+
+ /* For each VSI, user can specify whether corresponding VSI
+ * should be added/removed to/from mirror rule
+ *
+ * add mirror rule: this should always be TRUE.
+ * update mirror rule: add(true) or remove(false) VSI to/from
+ * mirror rule
+ */
+ u8 add;
+};
/* Switch recipe ID enum values are specific to hardware */
enum ice_sw_lkup_type {
@@ -290,6 +303,22 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id);
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask);
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask);
/* Switch config */
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 08/38] net/ice/base: add more APIs in switch module
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 08/38] net/ice/base: add more APIs in switch module Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add below APIs in switch module
1. ice_aq_get_vsi_params - get VSI context info
2. ice_aq_add_update_mir_rule - add/update mirror rule
3. ice_aq_delete_mir_rule - delete mirror rule
4. ice_aq_set_storm_ctrl - set storm control configuration
5. ice_aq_get_storm_ctrl - get storm control configuration
PMD can use these APIs to enable mirror rule and storm control
related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 136 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.c | 228 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 29 +++++
3 files changed, 393 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 056a9fbef..724657af6 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -177,6 +177,13 @@ struct ice_aqc_clear_pxe {
};
+/* Configure No-Drop Policy Command (direct 0x0112) */
+struct ice_aqc_config_no_drop_policy {
+ u8 opts;
+#define ICE_AQC_FORCE_NO_DROP BIT(0)
+ u8 rsvd[15];
+};
+
/* Get switch configuration (0x0200) */
struct ice_aqc_get_sw_cfg {
/* Reserved for command and copy of request flags for response */
@@ -350,6 +357,19 @@ struct ice_aqc_add_update_free_vsi_resp {
};
+struct ice_aqc_get_vsi_resp {
+ __le16 vsi_num;
+ u8 vf_id;
+ /* The vsi_flags field uses the ICE_AQ_VSI_TYPE_* defines for values.
+ * These are found above in struct ice_aqc_add_get_update_free_vsi.
+ */
+ u8 vsi_flags;
+ __le16 vsi_used;
+ __le16 vsi_free;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
struct ice_aqc_vsi_props {
__le16 valid_sections;
@@ -506,6 +526,110 @@ struct ice_aqc_vsi_props {
};
+/* Add/update mirror rule - direct (0x0260) */
+#define ICE_AQC_RULE_ID_VALID_S 7
+#define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S)
+#define ICE_AQC_RULE_ID_S 0
+#define ICE_AQC_RULE_ID_M (0x3F << ICE_AQC_RULE_ID_S)
+
+/* Following defines to be used while processing caller specified mirror list
+ * of VSI indexes.
+ */
+/* Action: Byte.bit (1.7)
+ * 0 = Remove VSI from mirror rule
+ * 1 = Add VSI to mirror rule
+ */
+#define ICE_AQC_RULE_ACT_S 15
+#define ICE_AQC_RULE_ACT_M (0x1 << ICE_AQC_RULE_ACT_S)
+/* Action: 1.2:0.0 = Mirrored VSI */
+#define ICE_AQC_RULE_MIRRORED_VSI_S 0
+#define ICE_AQC_RULE_MIRRORED_VSI_M (0x7FF << ICE_AQC_RULE_MIRRORED_VSI_S)
+
+/* This is to be used by add/update mirror rule Admin Queue command.
+ * In case of add mirror rule - if rule ID is specified as
+ * INVAL_MIRROR_RULE_ID, new rule ID is allocated from shared pool.
+ * If specified rule_id is valid, then it is used. If specified rule_id
+ * is in use then new mirroring rule is added.
+ */
+#define ICE_INVAL_MIRROR_RULE_ID 0xFFFF
+
+struct ice_aqc_add_update_mir_rule {
+ __le16 rule_id;
+
+ __le16 rule_type;
+#define ICE_AQC_RULE_TYPE_S 0
+#define ICE_AQC_RULE_TYPE_M (0x7 << ICE_AQC_RULE_TYPE_S)
+ /* VPORT ingress/egress */
+#define ICE_AQC_RULE_TYPE_VPORT_INGRESS 0x1
+#define ICE_AQC_RULE_TYPE_VPORT_EGRESS 0x2
+ /* Physical port ingress mirroring.
+ * All traffic received by this port
+ */
+#define ICE_AQC_RULE_TYPE_PPORT_INGRESS 0x6
+ /* Physical port egress mirroring. All traffic sent by this port */
+#define ICE_AQC_RULE_TYPE_PPORT_EGRESS 0x7
+
+ /* Number of mirrored entries.
+ * The values are in the command buffer
+ */
+ __le16 num_entries;
+
+ /* Destination VSI */
+ __le16 dest;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Delete mirror rule - direct(0x0261) */
+struct ice_aqc_delete_mir_rule {
+ __le16 rule_id;
+ __le16 rsvd;
+
+ /* Byte.bit: 20.0 = Keep allocation. If set VSI stays part of
+ * the PF allocated resources, otherwise it is returned to the
+ * shared pool
+ */
+#define ICE_AQC_FLAG_KEEP_ALLOCD_S 0
+#define ICE_AQC_FLAG_KEEP_ALLOCD_M (0x1 << ICE_AQC_FLAG_KEEP_ALLOCD_S)
+ __le16 flags;
+
+ u8 reserved[10];
+};
+
+/* Set/Get storm config - (direct 0x0280, 0x0281) */
+/* This structure holds get storm configuration response and same structure
+ * is used to perform set_storm_cfg
+ */
+struct ice_aqc_storm_cfg {
+ __le32 bcast_thresh_size;
+ __le32 mcast_thresh_size;
+ /* Bit 18:0 - Traffic upper threshold size
+ * Bit 31:19 - Reserved
+ */
+#define ICE_AQ_THRESHOLD_S 0
+#define ICE_AQ_THRESHOLD_M (0x7FFFF << ICE_AQ_THRESHOLD_S)
+
+ __le32 storm_ctrl_ctrl;
+ /* Bit 0: MDIPW - Drop Multicast packets in previous window
+ * Bit 1: MDICW - Drop multicast packets in current window
+ * Bit 2: BDIPW - Drop broadcast packets in previous window
+ * Bit 3: BDICW - Drop broadcast packets in current window
+ */
+#define ICE_AQ_STORM_CTRL_MDIPW_DROP_MULTICAST BIT(0)
+#define ICE_AQ_STORM_CTRL_MDICW_DROP_MULTICAST BIT(1)
+#define ICE_AQ_STORM_CTRL_BDIPW_DROP_MULTICAST BIT(2)
+#define ICE_AQ_STORM_CTRL_BDICW_DROP_MULTICAST BIT(3)
+ /* Bit 7:5 : Reserved */
+ /* Bit 27:8 : Interval - BSC/MSC Time-interval specification: The
+ * interval size for applying ingress broadcast or multicast storm
+ * control.
+ */
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S 8
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_M \
+ (0xFFFFF << ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S)
+ __le32 reserved;
+};
+
#define ICE_MAX_NUM_RECIPES 64
@@ -1771,6 +1895,9 @@ struct ice_aq_desc {
struct ice_aqc_manage_mac_read mac_read;
struct ice_aqc_manage_mac_write mac_write;
struct ice_aqc_clear_pxe clear_pxe;
+ struct ice_aqc_config_no_drop_policy no_drop;
+ struct ice_aqc_add_update_mir_rule add_update_rule;
+ struct ice_aqc_delete_mir_rule del_rule;
struct ice_aqc_list_caps get_cap;
struct ice_aqc_get_phy_caps get_phy;
struct ice_aqc_set_phy_cfg set_phy;
@@ -1778,6 +1905,7 @@ struct ice_aq_desc {
struct ice_aqc_set_port_id_led set_port_id_led;
struct ice_aqc_get_sw_cfg get_sw_conf;
struct ice_aqc_sw_rules sw_rules;
+ struct ice_aqc_storm_cfg storm_conf;
struct ice_aqc_get_topo get_topo;
struct ice_aqc_sched_elem_cmd sched_elem_cmd;
struct ice_aqc_query_txsched_res query_sched_res;
@@ -1795,6 +1923,7 @@ struct ice_aq_desc {
struct ice_aqc_txqs_cleanup txqs_cleanup;
struct ice_aqc_add_get_update_free_vsi vsi_cmd;
struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res;
+ struct ice_aqc_get_vsi_resp get_vsi_resp;
struct ice_aqc_download_pkg download_pkg;
struct ice_aqc_get_pkg_info_list get_pkg_info_list;
struct ice_aqc_fw_logging fw_logging;
@@ -1912,6 +2041,13 @@ enum ice_adminq_opc {
ice_aqc_opc_get_vsi_params = 0x0212,
ice_aqc_opc_free_vsi = 0x0213,
+ /* Mirroring rules - add/update, delete */
+ ice_aqc_opc_add_update_mir_rule = 0x0260,
+ ice_aqc_opc_del_mir_rule = 0x0261,
+
+ /* storm configuration */
+ ice_aqc_opc_set_storm_cfg = 0x0280,
+ ice_aqc_opc_get_storm_cfg = 0x0281,
/* switch rules population commands */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e6fc9fcee..34637c1be 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -566,7 +566,174 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
return ice_aq_update_vsi(hw, vsi_ctx, cd);
}
+/**
+ * ice_aq_get_vsi_params
+ * @hw: pointer to the HW struct
+ * @vsi_ctx: pointer to a VSI context struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get VSI context info from hardware (0x0212)
+ */
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_add_get_update_free_vsi *cmd;
+ struct ice_aqc_get_vsi_resp *resp;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.vsi_cmd;
+ resp = &desc.params.get_vsi_resp;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_vsi_params);
+
+ cmd->vsi_num = CPU_TO_LE16(vsi_ctx->vsi_num | ICE_AQ_VSI_IS_VALID);
+
+ status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,
+ sizeof(vsi_ctx->info), cd);
+ if (!status) {
+ vsi_ctx->vsi_num = LE16_TO_CPU(resp->vsi_num) &
+ ICE_AQ_VSI_NUM_M;
+ vsi_ctx->vsis_allocd = LE16_TO_CPU(resp->vsi_used);
+ vsi_ctx->vsis_unallocated = LE16_TO_CPU(resp->vsi_free);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_add_update_mir_rule - add/update a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_type: Rule Type
+ * @dest_vsi: VSI number to which packets will be mirrored
+ * @count: length of the list
+ * @mr_buf: buffer for list of mirrored VSI numbers
+ * @cd: pointer to command details structure or NULL
+ * @rule_id: Rule ID
+ *
+ * Add/Update Mirror Rule (0x260).
+ */
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id)
+{
+ struct ice_aqc_add_update_mir_rule *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+ __le16 *mr_list = NULL;
+ u16 buf_size = 0;
+
+ switch (rule_type) {
+ case ICE_AQC_RULE_TYPE_VPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_VPORT_EGRESS:
+ /* Make sure count and mr_buf are set for these rule_types */
+ if (!(count && mr_buf))
+ return ICE_ERR_PARAM;
+
+ buf_size = count * sizeof(__le16);
+ mr_list = (__le16 *)ice_malloc(hw, buf_size);
+ if (!mr_list)
+ return ICE_ERR_NO_MEMORY;
+ break;
+ case ICE_AQC_RULE_TYPE_PPORT_INGRESS:
+ case ICE_AQC_RULE_TYPE_PPORT_EGRESS:
+ /* Make sure count and mr_buf are not set for these
+ * rule_types
+ */
+ if (count || mr_buf)
+ return ICE_ERR_PARAM;
+ break;
+ default:
+ ice_debug(hw, ICE_DBG_SW,
+ "Error due to unsupported rule_type %u\n", rule_type);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_update_mir_rule);
+
+ /* Pre-process 'mr_buf' items for add/update of virtual port
+ * ingress/egress mirroring (but not physical port ingress/egress
+ * mirroring)
+ */
+ if (mr_buf) {
+ int i;
+
+ for (i = 0; i < count; i++) {
+ u16 id;
+
+ id = mr_buf[i].vsi_idx & ICE_AQC_RULE_MIRRORED_VSI_M;
+
+ /* Validate specified VSI number, make sure it is less
+ * than ICE_MAX_VSI, if not return with error.
+ */
+ if (id >= ICE_MAX_VSI) {
+ ice_debug(hw, ICE_DBG_SW,
+ "Error VSI index (%u) out-of-range\n",
+ id);
+ ice_free(hw, mr_list);
+ return ICE_ERR_OUT_OF_RANGE;
+ }
+
+ /* add VSI to mirror rule */
+ if (mr_buf[i].add)
+ mr_list[i] =
+ CPU_TO_LE16(id | ICE_AQC_RULE_ACT_M);
+ else /* remove VSI from mirror rule */
+ mr_list[i] = CPU_TO_LE16(id);
+ }
+ }
+
+ cmd = &desc.params.add_update_rule;
+ if ((*rule_id) != ICE_INVAL_MIRROR_RULE_ID)
+ cmd->rule_id = CPU_TO_LE16(((*rule_id) & ICE_AQC_RULE_ID_M) |
+ ICE_AQC_RULE_ID_VALID_M);
+ cmd->rule_type = CPU_TO_LE16(rule_type & ICE_AQC_RULE_TYPE_M);
+ cmd->num_entries = CPU_TO_LE16(count);
+ cmd->dest = CPU_TO_LE16(dest_vsi);
+
+ status = ice_aq_send_cmd(hw, &desc, mr_list, buf_size, cd);
+ if (!status)
+ *rule_id = LE16_TO_CPU(cmd->rule_id) & ICE_AQC_RULE_ID_M;
+ ice_free(hw, mr_list);
+
+ return status;
+}
+
+/**
+ * ice_aq_delete_mir_rule - delete a mirror rule
+ * @hw: pointer to the HW struct
+ * @rule_id: Mirror rule ID (to be deleted)
+ * @keep_allocd: if set, the VSI stays part of the PF allocated res,
+ * otherwise it is returned to the shared pool
+ * @cd: pointer to command details structure or NULL
+ *
+ * Delete Mirror Rule (0x261).
+ */
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_delete_mir_rule *cmd;
+ struct ice_aq_desc desc;
+
+ /* rule_id should be in the range 0...63 */
+ if (rule_id >= ICE_MAX_NUM_MIRROR_RULES)
+ return ICE_ERR_OUT_OF_RANGE;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_del_mir_rule);
+
+ cmd = &desc.params.del_rule;
+ rule_id |= ICE_AQC_RULE_ID_VALID_M;
+ cmd->rule_id = CPU_TO_LE16(rule_id);
+
+ if (keep_allocd)
+ cmd->flags = CPU_TO_LE16(ICE_AQC_FLAG_KEEP_ALLOCD_M);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
/**
* ice_aq_alloc_free_vsi_list
@@ -626,6 +793,67 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
return status;
}
+/**
+ * ice_aq_set_storm_ctrl - Sets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Sets the storm control configuration (0x0280)
+ */
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask)
+{
+ struct ice_aqc_storm_cfg *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.storm_conf;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_storm_cfg);
+
+ cmd->bcast_thresh_size = CPU_TO_LE32(bcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->mcast_thresh_size = CPU_TO_LE32(mcast_thresh & ICE_AQ_THRESHOLD_M);
+ cmd->storm_ctrl_ctrl = CPU_TO_LE32(ctl_bitmask);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_aq_get_storm_ctrl - gets storm control configuration
+ * @hw: pointer to the HW struct
+ * @bcast_thresh: represents the upper threshold for broadcast storm control
+ * @mcast_thresh: represents the upper threshold for multicast storm control
+ * @ctl_bitmask: storm control control knobs
+ *
+ * Gets the storm control configuration (0x0281)
+ */
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask)
+{
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_storm_cfg);
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+ if (!status) {
+ struct ice_aqc_storm_cfg *resp = &desc.params.storm_conf;
+
+ if (bcast_thresh)
+ *bcast_thresh = LE32_TO_CPU(resp->bcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (mcast_thresh)
+ *mcast_thresh = LE32_TO_CPU(resp->mcast_thresh_size) &
+ ICE_AQ_THRESHOLD_M;
+ if (ctl_bitmask)
+ *ctl_bitmask = LE32_TO_CPU(resp->storm_ctrl_ctrl);
+ }
+
+ return status;
+}
/**
* ice_aq_sw_rules - add/update/remove switch rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b28e55a4f..ebcfaa120 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -29,6 +29,19 @@ struct ice_vsi_ctx {
struct LIST_HEAD_TYPE rss_list_head;
};
+/* This is to be used by add/update mirror rule Admin Queue command */
+struct ice_mir_rule_buf {
+ u16 vsi_idx; /* VSI index */
+
+ /* For each VSI, user can specify whether corresponding VSI
+ * should be added/removed to/from mirror rule
+ *
+ * add mirror rule: this should always be TRUE.
+ * update mirror rule: add(true) or remove(false) VSI to/from
+ * mirror rule
+ */
+ u8 add;
+};
/* Switch recipe ID enum values are specific to hardware */
enum ice_sw_lkup_type {
@@ -290,6 +303,22 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id);
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask);
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask);
/* Switch config */
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 09/38] net/ice/base: add VSI queue context framework
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (8 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 08/38] net/ice/base: add more APIs in switch module Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 10/38] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
` (29 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Added code to allocate VSI queue contexts to save the queue specific
information like bandwidth etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_sched.c | 52 +++++++++++++++++++++++++++++++++++----
drivers/net/ice/base/ice_switch.c | 26 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 8 ++++++
3 files changed, 81 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 237bf7350..ab6097237 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -576,6 +576,48 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
}
/**
+ * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ * @tc: TC number
+ * @new_numqs: number of queues
+ */
+static enum ice_status
+ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
+{
+ struct ice_vsi_ctx *vsi_ctx;
+ struct ice_q_ctx *q_ctx;
+
+ vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi_ctx)
+ return ICE_ERR_PARAM;
+ /* allocate LAN queue contexts */
+ if (!vsi_ctx->lan_q_ctx[tc]) {
+ vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!vsi_ctx->lan_q_ctx[tc])
+ return ICE_ERR_NO_MEMORY;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ return ICE_SUCCESS;
+ }
+ /* num queues are increased, update the queue contexts */
+ if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
+ u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
+
+ q_ctx = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!q_ctx)
+ return ICE_ERR_NO_MEMORY;
+ ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
+ prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
+ ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
+ vsi_ctx->lan_q_ctx[tc] = q_ctx;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
* ice_aq_rl_profile - performs a rate limiting task
* @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
@@ -1717,14 +1759,14 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
if (!vsi_ctx)
return ICE_ERR_PARAM;
- if (owner == ICE_SCHED_NODE_OWNER_LAN)
- prev_numqs = vsi_ctx->sched.max_lanq[tc];
- else
- return ICE_ERR_PARAM;
-
+ prev_numqs = vsi_ctx->sched.max_lanq[tc];
/* num queues are not changed or less than the previous number */
if (new_numqs <= prev_numqs)
return status;
+ status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
+ if (status)
+ return status;
+
if (new_numqs)
ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
/* Keep the max number of queue configuration all the time. Update the
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 34637c1be..4b53636b4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3,6 +3,8 @@
*/
#include "ice_switch.h"
+#include "ice_flex_type.h"
+#include "ice_flow.h"
#define ICE_ETH_DA_OFFSET 0
@@ -447,6 +449,27 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
}
/**
+ * ice_clear_vsi_q_ctx - clear VSI queue contexts for all TCs
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ */
+static void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ u8 i;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return;
+ ice_for_each_traffic_class(i) {
+ if (vsi->lan_q_ctx[i]) {
+ ice_free(hw, vsi->lan_q_ctx[i]);
+ vsi->lan_q_ctx[i] = NULL;
+ }
+ }
+}
+
+/**
* ice_clear_vsi_ctx - clear the VSI context entry
* @hw: pointer to the HW struct
* @vsi_handle: VSI handle
@@ -459,6 +482,9 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
vsi = ice_get_vsi_ctx(hw, vsi_handle);
if (vsi) {
+ if (!LIST_EMPTY(&vsi->rss_list_head))
+ ice_rem_all_rss_vsi_ctx(hw, vsi_handle);
+ ice_clear_vsi_q_ctx(hw, vsi_handle);
ice_destroy_lock(&vsi->rss_locks);
ice_free(hw, vsi);
hw->vsi_ctx[vsi_handle] = NULL;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index ebcfaa120..c6d31475c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -15,6 +15,12 @@
#define ICE_VSI_INVAL_ID 0xFFFF
+#define ICE_INVAL_Q_HANDLE 0xFFFF
+
+/* VSI queue context structure */
+struct ice_q_ctx {
+ u16 q_handle;
+};
/* VSI context structure for add/get/update/free operations */
struct ice_vsi_ctx {
@@ -25,6 +31,8 @@ struct ice_vsi_ctx {
struct ice_aqc_vsi_props info;
struct ice_sched_vsi_info sched;
u8 alloc_from_pool;
+ u16 num_lan_q_entries[ICE_MAX_TRAFFIC_CLASS];
+ struct ice_q_ctx *lan_q_ctx[ICE_MAX_TRAFFIC_CLASS];
struct ice_lock rss_locks; /* protect rss config in VSI ctx */
struct LIST_HEAD_TYPE rss_list_head;
};
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 09/38] net/ice/base: add VSI queue context framework
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 09/38] net/ice/base: add VSI queue context framework Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Added code to allocate VSI queue contexts to save the queue specific
information like bandwidth etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_sched.c | 52 +++++++++++++++++++++++++++++++++++----
drivers/net/ice/base/ice_switch.c | 26 ++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 8 ++++++
3 files changed, 81 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 237bf7350..ab6097237 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -576,6 +576,48 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
}
/**
+ * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ * @tc: TC number
+ * @new_numqs: number of queues
+ */
+static enum ice_status
+ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
+{
+ struct ice_vsi_ctx *vsi_ctx;
+ struct ice_q_ctx *q_ctx;
+
+ vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi_ctx)
+ return ICE_ERR_PARAM;
+ /* allocate LAN queue contexts */
+ if (!vsi_ctx->lan_q_ctx[tc]) {
+ vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!vsi_ctx->lan_q_ctx[tc])
+ return ICE_ERR_NO_MEMORY;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ return ICE_SUCCESS;
+ }
+ /* num queues are increased, update the queue contexts */
+ if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
+ u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
+
+ q_ctx = (struct ice_q_ctx *)
+ ice_calloc(hw, new_numqs, sizeof(*q_ctx));
+ if (!q_ctx)
+ return ICE_ERR_NO_MEMORY;
+ ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
+ prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
+ ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
+ vsi_ctx->lan_q_ctx[tc] = q_ctx;
+ vsi_ctx->num_lan_q_entries[tc] = new_numqs;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
* ice_aq_rl_profile - performs a rate limiting task
* @hw: pointer to the HW struct
* @opcode:opcode for add, query, or remove profile(s)
@@ -1717,14 +1759,14 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
if (!vsi_ctx)
return ICE_ERR_PARAM;
- if (owner == ICE_SCHED_NODE_OWNER_LAN)
- prev_numqs = vsi_ctx->sched.max_lanq[tc];
- else
- return ICE_ERR_PARAM;
-
+ prev_numqs = vsi_ctx->sched.max_lanq[tc];
/* num queues are not changed or less than the previous number */
if (new_numqs <= prev_numqs)
return status;
+ status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
+ if (status)
+ return status;
+
if (new_numqs)
ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
/* Keep the max number of queue configuration all the time. Update the
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 34637c1be..4b53636b4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3,6 +3,8 @@
*/
#include "ice_switch.h"
+#include "ice_flex_type.h"
+#include "ice_flow.h"
#define ICE_ETH_DA_OFFSET 0
@@ -447,6 +449,27 @@ ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)
}
/**
+ * ice_clear_vsi_q_ctx - clear VSI queue contexts for all TCs
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ */
+static void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ u8 i;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return;
+ ice_for_each_traffic_class(i) {
+ if (vsi->lan_q_ctx[i]) {
+ ice_free(hw, vsi->lan_q_ctx[i]);
+ vsi->lan_q_ctx[i] = NULL;
+ }
+ }
+}
+
+/**
* ice_clear_vsi_ctx - clear the VSI context entry
* @hw: pointer to the HW struct
* @vsi_handle: VSI handle
@@ -459,6 +482,9 @@ static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)
vsi = ice_get_vsi_ctx(hw, vsi_handle);
if (vsi) {
+ if (!LIST_EMPTY(&vsi->rss_list_head))
+ ice_rem_all_rss_vsi_ctx(hw, vsi_handle);
+ ice_clear_vsi_q_ctx(hw, vsi_handle);
ice_destroy_lock(&vsi->rss_locks);
ice_free(hw, vsi);
hw->vsi_ctx[vsi_handle] = NULL;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index ebcfaa120..c6d31475c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -15,6 +15,12 @@
#define ICE_VSI_INVAL_ID 0xFFFF
+#define ICE_INVAL_Q_HANDLE 0xFFFF
+
+/* VSI queue context structure */
+struct ice_q_ctx {
+ u16 q_handle;
+};
/* VSI context structure for add/get/update/free operations */
struct ice_vsi_ctx {
@@ -25,6 +31,8 @@ struct ice_vsi_ctx {
struct ice_aqc_vsi_props info;
struct ice_sched_vsi_info sched;
u8 alloc_from_pool;
+ u16 num_lan_q_entries[ICE_MAX_TRAFFIC_CLASS];
+ struct ice_q_ctx *lan_q_ctx[ICE_MAX_TRAFFIC_CLASS];
struct ice_lock rss_locks; /* protect rss config in VSI ctx */
struct LIST_HEAD_TYPE rss_list_head;
};
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 10/38] net/ice/base: add APIs to add remove ethertype filter
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (9 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 09/38] net/ice/base: add VSI queue context framework Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 11/38] net/ice/base: add APIs to get allocated resources Qi Zhang
` (28 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add API ice_remove_eth_mac and ice_add_eth_mac to support
adding / removing ethertype (or MAC) based filter rules.
PMD driver can use these APIs to enable related rte_flow rule.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 57 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 4 +++
2 files changed, 61 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4b53636b4..4af6a323c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2415,6 +2415,63 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
}
#endif
+/**
+ * ice_add_eth_mac - Add ethertype and MAC based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ether type MAC filter, MAC is optional
+ */
+enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr;
+
+ LIST_FOR_EACH_ENTRY(em_list_itr, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->fltr_info.flag = ICE_FLTR_TX;
+ em_list_itr->status = ice_add_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_remove_eth_mac - Remove an ethertype (or MAC) based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ethertype or ethertype MAC entries
+ */
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr, *tmp;
+
+ if (!em_list || !hw)
+ return ICE_ERR_PARAM;
+
+ LIST_FOR_EACH_ENTRY_SAFE(em_list_itr, tmp, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->status = ice_remove_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
/**
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index c6d31475c..f331621e1 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -347,6 +347,10 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#ifndef NO_MACVLAN_SUPPORT
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 10/38] net/ice/base: add APIs to add remove ethertype filter
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 10/38] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add API ice_remove_eth_mac and ice_add_eth_mac to support
adding / removing ethertype (or MAC) based filter rules.
PMD driver can use these APIs to enable related rte_flow rule.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 57 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 4 +++
2 files changed, 61 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4b53636b4..4af6a323c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2415,6 +2415,63 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
}
#endif
+/**
+ * ice_add_eth_mac - Add ethertype and MAC based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ether type MAC filter, MAC is optional
+ */
+enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr;
+
+ LIST_FOR_EACH_ENTRY(em_list_itr, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->fltr_info.flag = ICE_FLTR_TX;
+ em_list_itr->status = ice_add_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_remove_eth_mac - Remove an ethertype (or MAC) based filter rule
+ * @hw: pointer to the hardware structure
+ * @em_list: list of ethertype or ethertype MAC entries
+ */
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
+{
+ struct ice_fltr_list_entry *em_list_itr, *tmp;
+
+ if (!em_list || !hw)
+ return ICE_ERR_PARAM;
+
+ LIST_FOR_EACH_ENTRY_SAFE(em_list_itr, tmp, em_list, ice_fltr_list_entry,
+ list_entry) {
+ enum ice_sw_lkup_type l_type =
+ em_list_itr->fltr_info.lkup_type;
+
+ if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC &&
+ l_type != ICE_SW_LKUP_ETHERTYPE)
+ return ICE_ERR_PARAM;
+
+ em_list_itr->status = ice_remove_rule_internal(hw, l_type,
+ em_list_itr);
+ if (em_list_itr->status)
+ return em_list_itr->status;
+ }
+ return ICE_SUCCESS;
+}
/**
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index c6d31475c..f331621e1 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -347,6 +347,10 @@ ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#ifndef NO_MACVLAN_SUPPORT
enum ice_status
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 11/38] net/ice/base: add APIs to get allocated resources
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (10 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 10/38] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 12/38] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
` (27 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_aq_get_res_alloc - get allocated resources.
2. ice_aq_get_res_descs - get allocated resource descriptors.
These APIs may help to PMD to enable some debug utilities to
dump the resource allocation status.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 53 +++++++++++++++++++++-
drivers/net/ice/base/ice_switch.c | 83 +++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 12 +++++
3 files changed, 147 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 724657af6..ca3d40c8b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -281,6 +281,34 @@ struct ice_aqc_get_sw_cfg_resp {
#define ICE_AQC_RES_TYPE_FLAG_DEDICATED 0x00
+#define ICE_AQC_RES_TYPE_S 0
+#define ICE_AQC_RES_TYPE_M (0x07F << ICE_AQC_RES_TYPE_S)
+
+/* Get Resource Allocation command (indirect 0x0204) */
+struct ice_aqc_get_res_alloc {
+ __le16 resp_elem_num; /* Used in response, reserved in command */
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Resource Allocation Response Buffer per response */
+struct ice_aqc_get_res_resp_elem {
+ __le16 res_type; /* Types defined above cmd 0x0204 */
+ __le16 total_capacity; /* Resources available to all PF's */
+ __le16 total_function; /* Resources allocated for a PF */
+ __le16 total_shared; /* Resources allocated as shared */
+ __le16 total_free; /* Resources un-allocated/not reserved by any PF */
+};
+
+/* Buffer for Get Resource command */
+struct ice_aqc_get_res_resp {
+ /* Number of resource entries to be calculated using
+ * datalen/sizeof(struct ice_aqc_cmd_resp)).
+ * Value of 'datalen' gets updated as part of response.
+ */
+ struct ice_aqc_get_res_resp_elem elem[1];
+};
/* Allocate Resources command (indirect 0x0208)
@@ -314,6 +342,28 @@ struct ice_aqc_alloc_free_res_elem {
};
+/* Get Allocated Resource Descriptors Command (indirect 0x020A) */
+struct ice_aqc_get_allocd_res_desc {
+ union {
+ struct {
+ __le16 res; /* Types defined above cmd 0x0204 */
+ __le16 first_desc;
+ __le32 reserved;
+ } cmd;
+ struct {
+ __le16 res;
+ __le16 next_desc;
+ __le16 num_desc;
+ __le16 reserved;
+ } resp;
+ } ops;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_get_allocd_res_desc_resp {
+ struct ice_aqc_res_elem elem[1];
+};
/* Add VSI (indirect 0x0210)
@@ -1912,7 +1962,6 @@ struct ice_aq_desc {
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
struct ice_aqc_rl_profile rl_profile;
-
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
@@ -1930,6 +1979,8 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_get_res_alloc get_res;
+ struct ice_aqc_get_allocd_res_desc get_res_desc;
struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4af6a323c..c985c1e31 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2042,6 +2042,89 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
return status;
}
+/**
+ * ice_aq_get_res_alloc - get allocated resources
+ * @hw: pointer to the HW struct
+ * @num_entries: pointer to u16 to store the number of resource entries returned
+ * @buf: pointer to user-supplied buffer
+ * @buf_size: size of buff
+ * @cd: pointer to command details structure or NULL
+ *
+ * The user-supplied buffer must be large enough to store the resource
+ * information for all resource types. Each resource type is an
+ * ice_aqc_get_res_resp_data_elem structure.
+ */
+enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_res_alloc *resp;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ if (!buf)
+ return ICE_ERR_BAD_PTR;
+
+ if (buf_size < ICE_AQ_GET_RES_ALLOC_BUF_LEN)
+ return ICE_ERR_INVAL_SIZE;
+
+ resp = &desc.params.get_res;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_res_alloc);
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+
+ if (!status && num_entries)
+ *num_entries = LE16_TO_CPU(resp->resp_elem_num);
+
+ return status;
+}
+
+/**
+ * ice_aq_get_res_descs - get allocated resource descriptors
+ * @hw: pointer to the hardware structure
+ * @num_entries: number of resource entries in buffer
+ * @buf: Indirect buffer to hold data parameters and response
+ * @buf_size: size of buffer for indirect commands
+ * @res_type: resource type
+ * @res_shared: is resource shared
+ * @desc_id: input - first desc ID to start; output - next desc ID
+ * @cd: pointer to command details structure or NULL
+ */
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_allocd_res_desc *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ ice_debug(hw, ICE_DBG_TRACE, "ice_aq_get_res_descs");
+
+ cmd = &desc.params.get_res_desc;
+
+ if (!buf)
+ return ICE_ERR_PARAM;
+
+ if (buf_size != (num_entries * sizeof(*buf)))
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_allocd_res_desc);
+
+ cmd->ops.cmd.res = CPU_TO_LE16(((res_type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | (res_shared ?
+ ICE_AQC_RES_TYPE_FLAG_SHARED : 0));
+ cmd->ops.cmd.first_desc = CPU_TO_LE16(*desc_id);
+
+ desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status)
+ *desc_id = LE16_TO_CPU(cmd->ops.resp.next_desc);
+
+ return status;
+}
/**
* ice_add_mac - Add a MAC address based filter rule
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index f331621e1..4b77d920f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -13,6 +13,10 @@
#define ICE_DFLT_VSI_INVAL 0xff
+/* Worst case buffer length for ice_aqc_opc_get_res_alloc */
+#define ICE_MAX_RES_TYPES 0x80
+#define ICE_AQ_GET_RES_ALLOC_BUF_LEN \
+ (ICE_MAX_RES_TYPES * sizeof(struct ice_aqc_get_res_resp_elem))
#define ICE_VSI_INVAL_ID 0xFFFF
#define ICE_INVAL_Q_HANDLE 0xFFFF
@@ -343,6 +347,14 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
enum ice_status
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 11/38] net/ice/base: add APIs to get allocated resources
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 11/38] net/ice/base: add APIs to get allocated resources Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_aq_get_res_alloc - get allocated resources.
2. ice_aq_get_res_descs - get allocated resource descriptors.
These APIs may help to PMD to enable some debug utilities to
dump the resource allocation status.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 53 +++++++++++++++++++++-
drivers/net/ice/base/ice_switch.c | 83 +++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 12 +++++
3 files changed, 147 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 724657af6..ca3d40c8b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -281,6 +281,34 @@ struct ice_aqc_get_sw_cfg_resp {
#define ICE_AQC_RES_TYPE_FLAG_DEDICATED 0x00
+#define ICE_AQC_RES_TYPE_S 0
+#define ICE_AQC_RES_TYPE_M (0x07F << ICE_AQC_RES_TYPE_S)
+
+/* Get Resource Allocation command (indirect 0x0204) */
+struct ice_aqc_get_res_alloc {
+ __le16 resp_elem_num; /* Used in response, reserved in command */
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Resource Allocation Response Buffer per response */
+struct ice_aqc_get_res_resp_elem {
+ __le16 res_type; /* Types defined above cmd 0x0204 */
+ __le16 total_capacity; /* Resources available to all PF's */
+ __le16 total_function; /* Resources allocated for a PF */
+ __le16 total_shared; /* Resources allocated as shared */
+ __le16 total_free; /* Resources un-allocated/not reserved by any PF */
+};
+
+/* Buffer for Get Resource command */
+struct ice_aqc_get_res_resp {
+ /* Number of resource entries to be calculated using
+ * datalen/sizeof(struct ice_aqc_cmd_resp)).
+ * Value of 'datalen' gets updated as part of response.
+ */
+ struct ice_aqc_get_res_resp_elem elem[1];
+};
/* Allocate Resources command (indirect 0x0208)
@@ -314,6 +342,28 @@ struct ice_aqc_alloc_free_res_elem {
};
+/* Get Allocated Resource Descriptors Command (indirect 0x020A) */
+struct ice_aqc_get_allocd_res_desc {
+ union {
+ struct {
+ __le16 res; /* Types defined above cmd 0x0204 */
+ __le16 first_desc;
+ __le32 reserved;
+ } cmd;
+ struct {
+ __le16 res;
+ __le16 next_desc;
+ __le16 num_desc;
+ __le16 reserved;
+ } resp;
+ } ops;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_get_allocd_res_desc_resp {
+ struct ice_aqc_res_elem elem[1];
+};
/* Add VSI (indirect 0x0210)
@@ -1912,7 +1962,6 @@ struct ice_aq_desc {
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
struct ice_aqc_rl_profile rl_profile;
-
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
@@ -1930,6 +1979,8 @@ struct ice_aq_desc {
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_get_res_alloc get_res;
+ struct ice_aqc_get_allocd_res_desc get_res_desc;
struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4af6a323c..c985c1e31 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2042,6 +2042,89 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id,
return status;
}
+/**
+ * ice_aq_get_res_alloc - get allocated resources
+ * @hw: pointer to the HW struct
+ * @num_entries: pointer to u16 to store the number of resource entries returned
+ * @buf: pointer to user-supplied buffer
+ * @buf_size: size of buff
+ * @cd: pointer to command details structure or NULL
+ *
+ * The user-supplied buffer must be large enough to store the resource
+ * information for all resource types. Each resource type is an
+ * ice_aqc_get_res_resp_data_elem structure.
+ */
+enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_res_alloc *resp;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+
+ if (!buf)
+ return ICE_ERR_BAD_PTR;
+
+ if (buf_size < ICE_AQ_GET_RES_ALLOC_BUF_LEN)
+ return ICE_ERR_INVAL_SIZE;
+
+ resp = &desc.params.get_res;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_res_alloc);
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+
+ if (!status && num_entries)
+ *num_entries = LE16_TO_CPU(resp->resp_elem_num);
+
+ return status;
+}
+
+/**
+ * ice_aq_get_res_descs - get allocated resource descriptors
+ * @hw: pointer to the hardware structure
+ * @num_entries: number of resource entries in buffer
+ * @buf: Indirect buffer to hold data parameters and response
+ * @buf_size: size of buffer for indirect commands
+ * @res_type: resource type
+ * @res_shared: is resource shared
+ * @desc_id: input - first desc ID to start; output - next desc ID
+ * @cd: pointer to command details structure or NULL
+ */
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_get_allocd_res_desc *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ ice_debug(hw, ICE_DBG_TRACE, "ice_aq_get_res_descs");
+
+ cmd = &desc.params.get_res_desc;
+
+ if (!buf)
+ return ICE_ERR_PARAM;
+
+ if (buf_size != (num_entries * sizeof(*buf)))
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_allocd_res_desc);
+
+ cmd->ops.cmd.res = CPU_TO_LE16(((res_type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | (res_shared ?
+ ICE_AQC_RES_TYPE_FLAG_SHARED : 0));
+ cmd->ops.cmd.first_desc = CPU_TO_LE16(*desc_id);
+
+ desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status)
+ *desc_id = LE16_TO_CPU(cmd->ops.resp.next_desc);
+
+ return status;
+}
/**
* ice_add_mac - Add a MAC address based filter rule
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index f331621e1..4b77d920f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -13,6 +13,10 @@
#define ICE_DFLT_VSI_INVAL 0xff
+/* Worst case buffer length for ice_aqc_opc_get_res_alloc */
+#define ICE_MAX_RES_TYPES 0x80
+#define ICE_AQ_GET_RES_ALLOC_BUF_LEN \
+ (ICE_MAX_RES_TYPES * sizeof(struct ice_aqc_get_res_resp_elem))
#define ICE_VSI_INVAL_ID 0xFFFF
#define ICE_INVAL_Q_HANDLE 0xFFFF
@@ -343,6 +347,14 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
enum ice_status
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
+ u16 buf_size, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_get_allocd_res_desc_resp *buf,
+ u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 12/38] net/ice/base: add APIs to alloc/free resource counter
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (11 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 11/38] net/ice/base: add APIs to get allocated resources Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 13/38] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
` (26 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_alloc_res_cntr - allocate resource counter
2. ice_free_res_cntr - free resource counter
3. ice_alloc_vlan_res_counter - allocate vlan resource counter
4. ice_free_vlan_res_counter - free vlan resource counter
These APIs will be used when try to count the number of a flow be
hitted.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 97 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 6 +++
2 files changed, 103 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index c985c1e31..26fc0b46b 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3238,9 +3238,106 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_PROMISC_VLAN);
}
+/**
+ * ice_alloc_res_cntr - allocating resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries requested for FD resource type
+ * @counter_id: counter index returned by AQ call
+ */
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ /* Allocate resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (status)
+ goto exit;
+
+ *counter_id = LE16_TO_CPU(buf->elem[0].e.sw_resp);
+
+exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_free_res_cntr - free resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries to be freed for FD resource type
+ * @counter_id: counter ID resource which needs to be freed
+ */
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+ /* Free resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+ buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status)
+ ice_debug(hw, ICE_DBG_SW,
+ "counter resource could not be freed\n");
+
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_alloc_vlan_res_counter - obtain counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: returns counter index
+ */
+enum ice_status ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
+
+/**
+ * ice_free_vlan_res_counter - Free counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: counter index to be freed
+ */
+enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 4b77d920f..364083eb4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -338,6 +338,12 @@ enum ice_status
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
enum ice_status
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id);
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 12/38] net/ice/base: add APIs to alloc/free resource counter
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 12/38] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_alloc_res_cntr - allocate resource counter
2. ice_free_res_cntr - free resource counter
3. ice_alloc_vlan_res_counter - allocate vlan resource counter
4. ice_free_vlan_res_counter - free vlan resource counter
These APIs will be used when try to count the number of a flow be
hitted.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 97 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 6 +++
2 files changed, 103 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index c985c1e31..26fc0b46b 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3238,9 +3238,106 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_PROMISC_VLAN);
}
+/**
+ * ice_alloc_res_cntr - allocating resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries requested for FD resource type
+ * @counter_id: counter index returned by AQ call
+ */
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ /* Allocate resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (status)
+ goto exit;
+
+ *counter_id = LE16_TO_CPU(buf->elem[0].e.sw_resp);
+
+exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_free_res_cntr - free resource counter
+ * @hw: pointer to the hardware structure
+ * @type: type of resource
+ * @alloc_shared: if set it is shared else dedicated
+ * @num_items: number of entries to be freed for FD resource type
+ * @counter_id: counter ID resource which needs to be freed
+ */
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id)
+{
+ struct ice_aqc_alloc_free_res_elem *buf;
+ enum ice_status status;
+ u16 buf_len;
+ /* Free resource */
+ buf_len = sizeof(*buf);
+ buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+ buf->num_elems = CPU_TO_LE16(num_items);
+ buf->res_type = CPU_TO_LE16(((type << ICE_AQC_RES_TYPE_S) &
+ ICE_AQC_RES_TYPE_M) | alloc_shared);
+ buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);
+ status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
+ ice_aqc_opc_free_res, NULL);
+ if (status)
+ ice_debug(hw, ICE_DBG_SW,
+ "counter resource could not be freed\n");
+
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_alloc_vlan_res_counter - obtain counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: returns counter index
+ */
+enum ice_status ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
+
+/**
+ * ice_free_vlan_res_counter - Free counter resource for VLAN type
+ * @hw: pointer to the hardware structure
+ * @counter_id: counter index to be freed
+ */
+enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
+ counter_id);
+}
/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 4b77d920f..364083eb4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -338,6 +338,12 @@ enum ice_status
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
enum ice_status
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id);
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 13/38] net/ice/base: add APIs to get VSI promiscuous mode
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (12 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 12/38] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 14/38] net/ice/base: add MAC filter with marker and counter Qi Zhang
` (25 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_get_vsi_promisc - get promiscuous mode of give VSI.
2. ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI.
PMD may use these APIs to check the real HW status, but not rely on
a software flag when something abnormal.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 79 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 7 ++++
2 files changed, 86 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 26fc0b46b..e4024a0b0 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2894,6 +2894,85 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
return promisc_mask;
}
+/**
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head,
+ ice_fltr_mgmt_list_entry, list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
/**
* ice_remove_promisc - Remove promisc based filter rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 364083eb4..0d70b38f4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -394,6 +394,13 @@ enum ice_status
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc);
+/* Get VSIs Promisc/defport settings */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 13/38] net/ice/base: add APIs to get VSI promiscuous mode
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 13/38] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_get_vsi_promisc - get promiscuous mode of give VSI.
2. ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI.
PMD may use these APIs to check the real HW status, but not rely on
a software flag when something abnormal.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 79 +++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 7 ++++
2 files changed, 86 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 26fc0b46b..e4024a0b0 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2894,6 +2894,85 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
return promisc_mask;
}
+/**
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head,
+ ice_fltr_mgmt_list_entry, list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE *rule_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ return ICE_ERR_PARAM;
+
+ *vid = 0;
+ *promisc_mask = 0;
+ rule_head = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rules;
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_PROMISC_VLAN].filt_rule_lock;
+
+ ice_acquire_lock(rule_lock);
+ LIST_FOR_EACH_ENTRY(itr, rule_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ /* Continue if this filter doesn't apply to this VSI or the
+ * VSI ID is not in the VSI map for this filter
+ */
+ if (!ice_vsi_uses_fltr(itr, vsi_handle))
+ continue;
+
+ *promisc_mask |= ice_determine_promisc_mask(&itr->fltr_info);
+ }
+ ice_release_lock(rule_lock);
+
+ return ICE_SUCCESS;
+}
/**
* ice_remove_promisc - Remove promisc based filter rules
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 364083eb4..0d70b38f4 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -394,6 +394,13 @@ enum ice_status
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc);
+/* Get VSIs Promisc/defport settings */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 14/38] net/ice/base: add MAC filter with marker and counter
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (13 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 13/38] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 15/38] net/ice/base: add two helper functions for flow management Qi Zhang
` (24 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_add_mac_with_sw_marker - add filter with software marker.
2. ice_add_mac_with_counter - add filter with counter enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 328 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 +
2 files changed, 333 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e4024a0b0..bfcb33ea6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1338,6 +1338,95 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
return status;
}
+/**
+ * ice_add_counter_act - add/update filter rule with counter action
+ * @hw: pointer to the hardware structure
+ * @m_ent: the management entry for which counter needs to be added
+ * @counter_id: VLAN counter ID returned as part of allocate resource
+ * @l_id: large action resource ID
+ */
+static enum ice_status
+ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
+ u16 counter_id, u16 l_id)
+{
+ struct ice_aqc_sw_rules_elem *lg_act;
+ struct ice_aqc_sw_rules_elem *rx_tx;
+ enum ice_status status;
+ /* 2 actions will be added while adding a large action counter */
+ const int num_acts = 2;
+ u16 lg_act_size;
+ u16 rules_size;
+ u16 f_rule_id;
+ u32 act;
+ u16 id;
+
+ if (m_ent->fltr_info.lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ /* Create two back-to-back switch rules and submit them to the HW using
+ * one memory buffer:
+ * 1. Large Action
+ * 2. Look up Tx Rx
+ */
+ lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts);
+ rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE;
+ lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
+ rules_size);
+ if (!lg_act)
+ return ICE_ERR_NO_MEMORY;
+
+ rx_tx = (struct ice_aqc_sw_rules_elem *)
+ ((u8 *)lg_act + lg_act_size);
+
+ /* Fill in the first switch rule i.e. large action */
+ lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT);
+ lg_act->pdata.lg_act.index = CPU_TO_LE16(l_id);
+ lg_act->pdata.lg_act.size = CPU_TO_LE16(num_acts);
+
+ /* First action VSI forwarding or VSI list forwarding depending on how
+ * many VSIs
+ */
+ id = (m_ent->vsi_count > 1) ? m_ent->fltr_info.fwd_id.vsi_list_id :
+ m_ent->fltr_info.fwd_id.hw_vsi_id;
+
+ act = ICE_LG_ACT_VSI_FORWARDING | ICE_LG_ACT_VALID_BIT;
+ act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) &
+ ICE_LG_ACT_VSI_LIST_ID_M;
+ if (m_ent->vsi_count > 1)
+ act |= ICE_LG_ACT_VSI_LIST;
+ lg_act->pdata.lg_act.act[0] = CPU_TO_LE32(act);
+
+ /* Second action counter ID */
+ act = ICE_LG_ACT_STAT_COUNT;
+ act |= (counter_id << ICE_LG_ACT_STAT_COUNT_S) &
+ ICE_LG_ACT_STAT_COUNT_M;
+ lg_act->pdata.lg_act.act[1] = CPU_TO_LE32(act);
+
+ /* call the fill switch rule to fill the lookup Tx Rx structure */
+ ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
+ ice_aqc_opc_update_sw_rules);
+
+ act = ICE_SINGLE_ACT_PTR;
+ act |= (l_id << ICE_SINGLE_ACT_PTR_VAL_S) & ICE_SINGLE_ACT_PTR_VAL_M;
+ rx_tx->pdata.lkup_tx_rx.act = CPU_TO_LE32(act);
+
+ /* Use the filter rule ID of the previously created rule with single
+ * act. Once the update happens, hardware will treat this as large
+ * action
+ */
+ f_rule_id = m_ent->fltr_info.fltr_rule_id;
+ rx_tx->pdata.lkup_tx_rx.index = CPU_TO_LE16(f_rule_id);
+
+ status = ice_aq_sw_rules(hw, lg_act, rules_size, 2,
+ ice_aqc_opc_update_sw_rules, NULL);
+ if (!status) {
+ m_ent->lg_act_idx = l_id;
+ m_ent->counter_index = counter_id;
+ }
+
+ ice_free(hw, lg_act);
+ return status;
+}
/**
* ice_create_vsi_list_map
@@ -3419,6 +3508,245 @@ enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
}
/**
+ * ice_alloc_res_lg_act - add large action resource
+ * @hw: pointer to the hardware structure
+ * @l_id: large action ID to fill it in
+ * @num_acts: number of actions to hold with a large action entry
+ */
+static enum ice_status
+ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ if (num_acts > ICE_MAX_LG_ACT || num_acts == 0)
+ return ICE_ERR_PARAM;
+
+ /* Allocate resource for large action */
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ sw_buf->num_elems = CPU_TO_LE16(1);
+
+ /* If num_acts is 1, use ICE_AQC_RES_TYPE_WIDE_TABLE_1.
+ * If num_acts is 2, use ICE_AQC_RES_TYPE_WIDE_TABLE_3.
+ * If num_acts is greater than 2, then use
+ * ICE_AQC_RES_TYPE_WIDE_TABLE_4.
+ * The num_acts cannot exceed 4. This was ensured at the
+ * beginning of the function.
+ */
+ if (num_acts == 1)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_1);
+ else if (num_acts == 2)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_2);
+ else
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_4);
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (!status)
+ *l_id = LE16_TO_CPU(sw_buf->elem[0].e.sw_resp);
+
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_add_mac_with_sw_marker - add filter with sw marker
+ * @hw: pointer to the hardware structure
+ * @f_info: filter info structure containing the MAC filter information
+ * @sw_marker: sw marker to tag the Rx descriptor with
+ */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exists;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (sw_marker == ICE_INVAL_SW_MARKER_ID)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+
+ INIT_LIST_HEAD(&l_head);
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ entry_exists = false;
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exists = true;
+ else if (ret)
+ return ret;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+ ice_acquire_lock(rule_lock);
+ /* Get the book keeping entry for the filter */
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry)
+ goto exit_error;
+
+ /* If counter action was enabled for this rule then don't enable
+ * sw marker large action
+ */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* if same marker was added before */
+ if (m_entry->sw_marker_id == sw_marker) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to hold large act. Three actions
+ * for marker based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 3);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the marker action */
+ ret = ice_add_marker_act(hw, m_entry, sw_marker, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exists)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
+ * ice_add_mac_with_counter - add filter with counter enabled
+ * @hw: pointer to the hardware structure
+ * @f_info: pointer to filter info structure containing the MAC filter
+ * information
+ */
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exist;
+ u16 counter_id;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ entry_exist = false;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+ INIT_LIST_HEAD(&l_head);
+
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exist = true;
+ else if (ret)
+ return ret;
+
+ ice_acquire_lock(rule_lock);
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry) {
+ ret = ICE_ERR_BAD_PTR;
+ goto exit_error;
+ }
+
+ /* Don't enable counter for a filter for which sw marker was enabled */
+ if (m_entry->sw_marker_id != ICE_INVAL_SW_MARKER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* If a counter was already enabled then don't need to add again */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to VLAN counter */
+ ret = ice_alloc_vlan_res_counter(hw, &counter_id);
+ if (ret)
+ goto exit_error;
+
+ /* Allocate a hardware table entry to hold large act. Two actions for
+ * counter based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 2);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the counter action */
+ ret = ice_add_counter_act(hw, m_entry, counter_id, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exist)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 0d70b38f4..b396a486c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -377,6 +377,11 @@ enum ice_status
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#endif /* !NO_MACVLAN_SUPPORT */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker);
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 14/38] net/ice/base: add MAC filter with marker and counter
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 14/38] net/ice/base: add MAC filter with marker and counter Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_add_mac_with_sw_marker - add filter with software marker.
2. ice_add_mac_with_counter - add filter with counter enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 328 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 5 +
2 files changed, 333 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e4024a0b0..bfcb33ea6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1338,6 +1338,95 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
return status;
}
+/**
+ * ice_add_counter_act - add/update filter rule with counter action
+ * @hw: pointer to the hardware structure
+ * @m_ent: the management entry for which counter needs to be added
+ * @counter_id: VLAN counter ID returned as part of allocate resource
+ * @l_id: large action resource ID
+ */
+static enum ice_status
+ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
+ u16 counter_id, u16 l_id)
+{
+ struct ice_aqc_sw_rules_elem *lg_act;
+ struct ice_aqc_sw_rules_elem *rx_tx;
+ enum ice_status status;
+ /* 2 actions will be added while adding a large action counter */
+ const int num_acts = 2;
+ u16 lg_act_size;
+ u16 rules_size;
+ u16 f_rule_id;
+ u32 act;
+ u16 id;
+
+ if (m_ent->fltr_info.lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ /* Create two back-to-back switch rules and submit them to the HW using
+ * one memory buffer:
+ * 1. Large Action
+ * 2. Look up Tx Rx
+ */
+ lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts);
+ rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE;
+ lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
+ rules_size);
+ if (!lg_act)
+ return ICE_ERR_NO_MEMORY;
+
+ rx_tx = (struct ice_aqc_sw_rules_elem *)
+ ((u8 *)lg_act + lg_act_size);
+
+ /* Fill in the first switch rule i.e. large action */
+ lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT);
+ lg_act->pdata.lg_act.index = CPU_TO_LE16(l_id);
+ lg_act->pdata.lg_act.size = CPU_TO_LE16(num_acts);
+
+ /* First action VSI forwarding or VSI list forwarding depending on how
+ * many VSIs
+ */
+ id = (m_ent->vsi_count > 1) ? m_ent->fltr_info.fwd_id.vsi_list_id :
+ m_ent->fltr_info.fwd_id.hw_vsi_id;
+
+ act = ICE_LG_ACT_VSI_FORWARDING | ICE_LG_ACT_VALID_BIT;
+ act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) &
+ ICE_LG_ACT_VSI_LIST_ID_M;
+ if (m_ent->vsi_count > 1)
+ act |= ICE_LG_ACT_VSI_LIST;
+ lg_act->pdata.lg_act.act[0] = CPU_TO_LE32(act);
+
+ /* Second action counter ID */
+ act = ICE_LG_ACT_STAT_COUNT;
+ act |= (counter_id << ICE_LG_ACT_STAT_COUNT_S) &
+ ICE_LG_ACT_STAT_COUNT_M;
+ lg_act->pdata.lg_act.act[1] = CPU_TO_LE32(act);
+
+ /* call the fill switch rule to fill the lookup Tx Rx structure */
+ ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,
+ ice_aqc_opc_update_sw_rules);
+
+ act = ICE_SINGLE_ACT_PTR;
+ act |= (l_id << ICE_SINGLE_ACT_PTR_VAL_S) & ICE_SINGLE_ACT_PTR_VAL_M;
+ rx_tx->pdata.lkup_tx_rx.act = CPU_TO_LE32(act);
+
+ /* Use the filter rule ID of the previously created rule with single
+ * act. Once the update happens, hardware will treat this as large
+ * action
+ */
+ f_rule_id = m_ent->fltr_info.fltr_rule_id;
+ rx_tx->pdata.lkup_tx_rx.index = CPU_TO_LE16(f_rule_id);
+
+ status = ice_aq_sw_rules(hw, lg_act, rules_size, 2,
+ ice_aqc_opc_update_sw_rules, NULL);
+ if (!status) {
+ m_ent->lg_act_idx = l_id;
+ m_ent->counter_index = counter_id;
+ }
+
+ ice_free(hw, lg_act);
+ return status;
+}
/**
* ice_create_vsi_list_map
@@ -3419,6 +3508,245 @@ enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
}
/**
+ * ice_alloc_res_lg_act - add large action resource
+ * @hw: pointer to the hardware structure
+ * @l_id: large action ID to fill it in
+ * @num_acts: number of actions to hold with a large action entry
+ */
+static enum ice_status
+ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
+{
+ struct ice_aqc_alloc_free_res_elem *sw_buf;
+ enum ice_status status;
+ u16 buf_len;
+
+ if (num_acts > ICE_MAX_LG_ACT || num_acts == 0)
+ return ICE_ERR_PARAM;
+
+ /* Allocate resource for large action */
+ buf_len = sizeof(*sw_buf);
+ sw_buf = (struct ice_aqc_alloc_free_res_elem *)
+ ice_malloc(hw, buf_len);
+ if (!sw_buf)
+ return ICE_ERR_NO_MEMORY;
+
+ sw_buf->num_elems = CPU_TO_LE16(1);
+
+ /* If num_acts is 1, use ICE_AQC_RES_TYPE_WIDE_TABLE_1.
+ * If num_acts is 2, use ICE_AQC_RES_TYPE_WIDE_TABLE_3.
+ * If num_acts is greater than 2, then use
+ * ICE_AQC_RES_TYPE_WIDE_TABLE_4.
+ * The num_acts cannot exceed 4. This was ensured at the
+ * beginning of the function.
+ */
+ if (num_acts == 1)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_1);
+ else if (num_acts == 2)
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_2);
+ else
+ sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_4);
+
+ status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,
+ ice_aqc_opc_alloc_res, NULL);
+ if (!status)
+ *l_id = LE16_TO_CPU(sw_buf->elem[0].e.sw_resp);
+
+ ice_free(hw, sw_buf);
+ return status;
+}
+
+/**
+ * ice_add_mac_with_sw_marker - add filter with sw marker
+ * @hw: pointer to the hardware structure
+ * @f_info: filter info structure containing the MAC filter information
+ * @sw_marker: sw marker to tag the Rx descriptor with
+ */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exists;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (sw_marker == ICE_INVAL_SW_MARKER_ID)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+
+ INIT_LIST_HEAD(&l_head);
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ entry_exists = false;
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exists = true;
+ else if (ret)
+ return ret;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+ ice_acquire_lock(rule_lock);
+ /* Get the book keeping entry for the filter */
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry)
+ goto exit_error;
+
+ /* If counter action was enabled for this rule then don't enable
+ * sw marker large action
+ */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* if same marker was added before */
+ if (m_entry->sw_marker_id == sw_marker) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to hold large act. Three actions
+ * for marker based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 3);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the marker action */
+ ret = ice_add_marker_act(hw, m_entry, sw_marker, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exists)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
+ * ice_add_mac_with_counter - add filter with counter enabled
+ * @hw: pointer to the hardware structure
+ * @f_info: pointer to filter info structure containing the MAC filter
+ * information
+ */
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ struct ice_fltr_mgmt_list_entry *m_entry;
+ struct ice_fltr_list_entry fl_info;
+ struct LIST_HEAD_TYPE l_head;
+ struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ enum ice_status ret;
+ bool entry_exist;
+ u16 counter_id;
+ u16 lg_act_id;
+
+ if (f_info->fltr_act != ICE_FWD_TO_VSI)
+ return ICE_ERR_PARAM;
+
+ if (f_info->lkup_type != ICE_SW_LKUP_MAC)
+ return ICE_ERR_PARAM;
+
+ if (!ice_is_vsi_valid(hw, f_info->vsi_handle))
+ return ICE_ERR_PARAM;
+ f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);
+
+ entry_exist = false;
+
+ rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
+
+ /* Add filter if it doesn't exist so then the adding of large
+ * action always results in update
+ */
+ INIT_LIST_HEAD(&l_head);
+
+ fl_info.fltr_info = *f_info;
+ LIST_ADD(&fl_info.list_entry, &l_head);
+
+ ret = ice_add_mac(hw, &l_head);
+ if (ret == ICE_ERR_ALREADY_EXISTS)
+ entry_exist = true;
+ else if (ret)
+ return ret;
+
+ ice_acquire_lock(rule_lock);
+ m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info);
+ if (!m_entry) {
+ ret = ICE_ERR_BAD_PTR;
+ goto exit_error;
+ }
+
+ /* Don't enable counter for a filter for which sw marker was enabled */
+ if (m_entry->sw_marker_id != ICE_INVAL_SW_MARKER_ID) {
+ ret = ICE_ERR_PARAM;
+ goto exit_error;
+ }
+
+ /* If a counter was already enabled then don't need to add again */
+ if (m_entry->counter_index != ICE_INVAL_COUNTER_ID) {
+ ret = ICE_ERR_ALREADY_EXISTS;
+ goto exit_error;
+ }
+
+ /* Allocate a hardware table entry to VLAN counter */
+ ret = ice_alloc_vlan_res_counter(hw, &counter_id);
+ if (ret)
+ goto exit_error;
+
+ /* Allocate a hardware table entry to hold large act. Two actions for
+ * counter based large action
+ */
+ ret = ice_alloc_res_lg_act(hw, &lg_act_id, 2);
+ if (ret)
+ goto exit_error;
+
+ if (lg_act_id == ICE_INVAL_LG_ACT_INDEX)
+ goto exit_error;
+
+ /* Update the switch rule to add the counter action */
+ ret = ice_add_counter_act(hw, m_entry, counter_id, lg_act_id);
+ if (!ret) {
+ ice_release_lock(rule_lock);
+ return ret;
+ }
+
+exit_error:
+ ice_release_lock(rule_lock);
+ /* only remove entry if it did not exist previously */
+ if (!entry_exist)
+ ret = ice_remove_mac(hw, &l_head);
+
+ return ret;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 0d70b38f4..b396a486c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -377,6 +377,11 @@ enum ice_status
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
#endif /* !NO_MACVLAN_SUPPORT */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker);
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 15/38] net/ice/base: add two helper functions for flow management
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (14 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 14/38] net/ice/base: add MAC filter with marker and counter Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 16/38] net/ice/base: fix minor issues Qi Zhang
` (23 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_rem_all_sw_rules_info - remove all switch rules.
2. ice_reply_all_fltr - replay all filters stored in book keeping list.
These APIs will be used when switch rule feature is enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 107 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 2 +
2 files changed, 109 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index bfcb33ea6..a0c39b5d7 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2667,6 +2667,23 @@ ice_rem_sw_rule_info(struct ice_hw *hw, struct LIST_HEAD_TYPE *rule_head)
}
+/**
+ * ice_rem_all_sw_rules_info
+ * @hw: pointer to the hardware structure
+ */
+void ice_rem_all_sw_rules_info(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *rule_head;
+
+ rule_head = &sw->recp_list[i].filt_rules;
+ if (!sw->recp_list[i].adv_rule)
+ ice_rem_sw_rule_info(hw, rule_head);
+ }
+}
/**
* ice_cfg_dflt_vsi - change state of VSI to set/clear default
@@ -3747,6 +3764,96 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
}
/**
+ * ice_replay_fltr - Replay all the filters stored by a specific list head
+ * @hw: pointer to the hardware structure
+ * @list_head: list for which filters needs to be replayed
+ * @recp_id: Recipe ID for which rules need to be replayed
+ */
+static enum ice_status
+ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
+{
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE l_head;
+ enum ice_status status = ICE_SUCCESS;
+
+ if (LIST_EMPTY(list_head))
+ return status;
+
+ /* Move entries from the given list_head to a temporary l_head so that
+ * they can be replayed. Otherwise when trying to re-add the same
+ * filter, the function will return already exists
+ */
+ LIST_REPLACE_INIT(list_head, &l_head);
+
+ /* Mark the given list_head empty by reinitializing it so filters
+ * could be added again by *handler
+ */
+ LIST_FOR_EACH_ENTRY(itr, &l_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ struct ice_fltr_list_entry f_entry;
+
+ f_entry.fltr_info = itr->fltr_info;
+ if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) {
+ status = ice_add_rule_internal(hw, recp_id, &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ continue;
+ }
+
+ /* Add a filter per VSI separately */
+ while (1) {
+ u16 vsi_handle;
+
+ vsi_handle =
+ ice_find_first_bit(itr->vsi_list_info->vsi_map,
+ ICE_MAX_VSI);
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ break;
+
+ ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
+ f_entry.fltr_info.vsi_handle = vsi_handle;
+ f_entry.fltr_info.fwd_id.hw_vsi_id =
+ ice_get_hw_vsi_num(hw, vsi_handle);
+ f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
+ if (recp_id == ICE_SW_LKUP_VLAN)
+ status = ice_add_vlan_internal(hw, &f_entry);
+ else
+ status = ice_add_rule_internal(hw, recp_id,
+ &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ }
+ }
+end:
+ /* Clear the filter management list */
+ ice_rem_sw_rule_info(hw, &l_head);
+ return status;
+}
+
+/**
+ * ice_replay_all_fltr - replay all filters stored in bookkeeping lists
+ * @hw: pointer to the hardware structure
+ *
+ * NOTE: This function does not clean up partially added filters on error.
+ * It is up to caller of the function to issue a reset or fail early.
+ */
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ enum ice_status status = ICE_SUCCESS;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *head = &sw->recp_list[i].filt_rules;
+
+ status = ice_replay_fltr(hw, i, head);
+ if (status != ICE_SUCCESS)
+ return status;
+ }
+ return status;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b396a486c..3cc2c10e8 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -362,6 +362,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
+void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
@@ -409,6 +410,7 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
enum ice_status ice_init_def_sw_recp(struct ice_hw *hw);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 15/38] net/ice/base: add two helper functions for flow management
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 15/38] net/ice/base: add two helper functions for flow management Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ice_rem_all_sw_rules_info - remove all switch rules.
2. ice_reply_all_fltr - replay all filters stored in book keeping list.
These APIs will be used when switch rule feature is enabled.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_switch.c | 107 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_switch.h | 2 +
2 files changed, 109 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index bfcb33ea6..a0c39b5d7 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2667,6 +2667,23 @@ ice_rem_sw_rule_info(struct ice_hw *hw, struct LIST_HEAD_TYPE *rule_head)
}
+/**
+ * ice_rem_all_sw_rules_info
+ * @hw: pointer to the hardware structure
+ */
+void ice_rem_all_sw_rules_info(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *rule_head;
+
+ rule_head = &sw->recp_list[i].filt_rules;
+ if (!sw->recp_list[i].adv_rule)
+ ice_rem_sw_rule_info(hw, rule_head);
+ }
+}
/**
* ice_cfg_dflt_vsi - change state of VSI to set/clear default
@@ -3747,6 +3764,96 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
}
/**
+ * ice_replay_fltr - Replay all the filters stored by a specific list head
+ * @hw: pointer to the hardware structure
+ * @list_head: list for which filters needs to be replayed
+ * @recp_id: Recipe ID for which rules need to be replayed
+ */
+static enum ice_status
+ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
+{
+ struct ice_fltr_mgmt_list_entry *itr;
+ struct LIST_HEAD_TYPE l_head;
+ enum ice_status status = ICE_SUCCESS;
+
+ if (LIST_EMPTY(list_head))
+ return status;
+
+ /* Move entries from the given list_head to a temporary l_head so that
+ * they can be replayed. Otherwise when trying to re-add the same
+ * filter, the function will return already exists
+ */
+ LIST_REPLACE_INIT(list_head, &l_head);
+
+ /* Mark the given list_head empty by reinitializing it so filters
+ * could be added again by *handler
+ */
+ LIST_FOR_EACH_ENTRY(itr, &l_head, ice_fltr_mgmt_list_entry,
+ list_entry) {
+ struct ice_fltr_list_entry f_entry;
+
+ f_entry.fltr_info = itr->fltr_info;
+ if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) {
+ status = ice_add_rule_internal(hw, recp_id, &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ continue;
+ }
+
+ /* Add a filter per VSI separately */
+ while (1) {
+ u16 vsi_handle;
+
+ vsi_handle =
+ ice_find_first_bit(itr->vsi_list_info->vsi_map,
+ ICE_MAX_VSI);
+ if (!ice_is_vsi_valid(hw, vsi_handle))
+ break;
+
+ ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
+ f_entry.fltr_info.vsi_handle = vsi_handle;
+ f_entry.fltr_info.fwd_id.hw_vsi_id =
+ ice_get_hw_vsi_num(hw, vsi_handle);
+ f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
+ if (recp_id == ICE_SW_LKUP_VLAN)
+ status = ice_add_vlan_internal(hw, &f_entry);
+ else
+ status = ice_add_rule_internal(hw, recp_id,
+ &f_entry);
+ if (status != ICE_SUCCESS)
+ goto end;
+ }
+ }
+end:
+ /* Clear the filter management list */
+ ice_rem_sw_rule_info(hw, &l_head);
+ return status;
+}
+
+/**
+ * ice_replay_all_fltr - replay all filters stored in bookkeeping lists
+ * @hw: pointer to the hardware structure
+ *
+ * NOTE: This function does not clean up partially added filters on error.
+ * It is up to caller of the function to issue a reset or fail early.
+ */
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
+{
+ struct ice_switch_info *sw = hw->switch_info;
+ enum ice_status status = ICE_SUCCESS;
+ u8 i;
+
+ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
+ struct LIST_HEAD_TYPE *head = &sw->recp_list[i].filt_rules;
+
+ status = ice_replay_fltr(hw, i, head);
+ if (status != ICE_SUCCESS)
+ return status;
+ }
+ return status;
+}
+
+/**
* ice_replay_vsi_fltr - Replay filters for requested VSI
* @hw: pointer to the hardware structure
* @vsi_handle: driver VSI handle
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index b396a486c..3cc2c10e8 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -362,6 +362,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
+void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
@@ -409,6 +410,7 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
enum ice_status ice_init_def_sw_recp(struct ice_hw *hw);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 16/38] net/ice/base: fix minor issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (15 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 15/38] net/ice/base: add two helper functions for flow management Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 17/38] net/ice/base: update macros Qi Zhang
` (22 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ICE_SW_LKUP_LAST need to be handled correctly in
ice_aq_alloc_free_vsi_list and ice_update_vsi_list_rule
2. ICE_SW_LKUP_ETHERTYPE_MAC need to be handled correctly in
ice_update_vsi_lkup_fltr
3. free package segment pointer during ice_deinit_hw
Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 1 +
drivers/net/ice/base/ice_switch.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 015db11e0..4085ccc12 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -938,6 +938,7 @@ void ice_deinit_hw(struct ice_hw *hw)
ice_sched_cleanup_all(hw);
ice_sched_clear_agg(hw);
+ ice_free_seg(hw);
if (hw->port_info) {
ice_free(hw, hw->port_info);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a0c39b5d7..e47c1d845 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -792,7 +792,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN) {
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST) {
sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VSI_LIST_REP);
} else if (lkup_type == ICE_SW_LKUP_VLAN) {
sw_buf->res_type =
@@ -1492,7 +1493,8 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN)
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST)
type = remove ? ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR :
ICE_AQC_SW_RULES_T_VSI_LIST_SET;
else if (lkup_type == ICE_SW_LKUP_VLAN)
@@ -3388,6 +3390,8 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
break;
case ICE_SW_LKUP_ETHERTYPE:
case ICE_SW_LKUP_ETHERTYPE_MAC:
+ ice_remove_eth_mac(hw, &remove_list_head);
+ break;
case ICE_SW_LKUP_DFLT:
ice_debug(hw, ICE_DBG_SW,
"Remove filters for this lookup type hasn't been implemented yet\n");
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 16/38] net/ice/base: fix minor issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 16/38] net/ice/base: fix minor issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. ICE_SW_LKUP_LAST need to be handled correctly in
ice_aq_alloc_free_vsi_list and ice_update_vsi_list_rule
2. ICE_SW_LKUP_ETHERTYPE_MAC need to be handled correctly in
ice_update_vsi_lkup_fltr
3. free package segment pointer during ice_deinit_hw
Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 1 +
drivers/net/ice/base/ice_switch.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 015db11e0..4085ccc12 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -938,6 +938,7 @@ void ice_deinit_hw(struct ice_hw *hw)
ice_sched_cleanup_all(hw);
ice_sched_clear_agg(hw);
+ ice_free_seg(hw);
if (hw->port_info) {
ice_free(hw, hw->port_info);
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a0c39b5d7..e47c1d845 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -792,7 +792,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN) {
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST) {
sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VSI_LIST_REP);
} else if (lkup_type == ICE_SW_LKUP_VLAN) {
sw_buf->res_type =
@@ -1492,7 +1493,8 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
lkup_type == ICE_SW_LKUP_ETHERTYPE ||
lkup_type == ICE_SW_LKUP_ETHERTYPE_MAC ||
lkup_type == ICE_SW_LKUP_PROMISC ||
- lkup_type == ICE_SW_LKUP_PROMISC_VLAN)
+ lkup_type == ICE_SW_LKUP_PROMISC_VLAN ||
+ lkup_type == ICE_SW_LKUP_LAST)
type = remove ? ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR :
ICE_AQC_SW_RULES_T_VSI_LIST_SET;
else if (lkup_type == ICE_SW_LKUP_VLAN)
@@ -3388,6 +3390,8 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
break;
case ICE_SW_LKUP_ETHERTYPE:
case ICE_SW_LKUP_ETHERTYPE_MAC:
+ ice_remove_eth_mac(hw, &remove_list_head);
+ break;
case ICE_SW_LKUP_DFLT:
ice_debug(hw, ICE_DBG_SW,
"Remove filters for this lookup type hasn't been implemented yet\n");
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 17/38] net/ice/base: update macros
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (16 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 16/38] net/ice/base: fix minor issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 18/38] net/ice/base: clean code Qi Zhang
` (21 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update macros for metadata and package flags.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 36 ++++++++---------
drivers/net/ice/base/ice_flow.h | 17 ++++++--
drivers/net/ice/base/ice_lan_tx_rx.h | 77 +++++++++++++++++++++++-------------
3 files changed, 80 insertions(+), 50 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4085ccc12..e0fe06e9c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -365,22 +365,22 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_FIN, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,
+ ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,
+ ICE_FLG_FIN, idx++);
/* flex flag 1 is not used for flexi-flag programming, skipping
* these four FLG64 bits.
*/
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100,
- ICE_RXFLG_EVLAN_x9100, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC,
- ICE_RXFLG_TNL0, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,
+ ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,
+ ICE_FLG_EVLAN_x9100, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,
+ ICE_FLG_TNL0, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);
break;
default:
@@ -399,17 +399,17 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
{
- enum ice_flex_rx_mdid mdid;
+ enum ice_flex_mdid mdid;
switch (prof_id) {
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?
- ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;
+ ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH;
ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 265e1ee3e..3db10cd6f 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -278,14 +278,23 @@ enum ice_flow_action_type {
ICE_FLOW_ACT_NOP,
ICE_FLOW_ACT_ALLOW,
ICE_FLOW_ACT_DROP,
- ICE_FLOW_ACT_COUNT,
+ ICE_FLOW_ACT_CNTR_PKT,
ICE_FLOW_ACT_FWD_VSI,
ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
- ICE_FLOW_ACTION_PUSH,
- ICE_FLOW_ACTION_POP,
- ICE_FLOW_ACTION_MODIFY,
+ ICE_FLOW_ACT_PUSH,
+ ICE_FLOW_ACT_POP,
+ ICE_FLOW_ACT_MODIFY,
+ ICE_FLOW_ACT_CNTR_BYTES,
+ ICE_FLOW_ACT_CNTR_PKT_BYTES,
+ ICE_FLOW_ACT_GENERIC_0,
+ ICE_FLOW_ACT_GENERIC_1,
+ ICE_FLOW_ACT_GENERIC_2,
+ ICE_FLOW_ACT_GENERIC_3,
+ ICE_FLOW_ACT_GENERIC_4,
+ ICE_FLOW_ACT_RPT_FLOW_ID,
+ ICE_FLOW_ACT_BUILD_PROF_IDX,
};
struct ice_flow_action {
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 4a1ea0c7d..b1963b5eb 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -627,39 +627,60 @@ enum ice_flex_opcode {
ICE_RX_OPC_PROTID
};
-/* Receive Descriptor MDID values */
-enum ice_flex_rx_mdid {
- ICE_RX_MDID_FLOW_ID_LOWER = 5,
- ICE_RX_MDID_FLOW_ID_HIGH,
- ICE_RX_MDID_DST_VSI = 13,
- ICE_RX_MDID_SRC_VSI = 19,
- ICE_RX_MDID_HASH_LOW = 56,
- ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR0 = ICE_RX_MDID_HASH_LOW,
- ICE_RX_MDID_ACL_CTR1 = ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR2 = 59
+/* Receive Descriptor MDID values that access packet flags */
+enum ice_flex_mdid_pkt_flags {
+ ICE_RX_MDID_PKT_FLAGS_15_0 = 20,
+ ICE_RX_MDID_PKT_FLAGS_31_16,
+ ICE_RX_MDID_PKT_FLAGS_47_32,
+ ICE_RX_MDID_PKT_FLAGS_63_48,
+};
+
+/* Generic descriptor MDID values */
+enum ice_flex_mdid {
+ ICE_MDID_GENERIC_WORD_0,
+ ICE_MDID_GENERIC_WORD_1,
+ ICE_MDID_GENERIC_WORD_2,
+ ICE_MDID_GENERIC_WORD_3,
+ ICE_MDID_GENERIC_WORD_4,
+ ICE_MDID_FLOW_ID_LOWER,
+ ICE_MDID_FLOW_ID_HIGH,
+ ICE_MDID_RX_DESCR_PROF_IDX,
+ ICE_MDID_RX_PKT_DROP,
+ ICE_MDID_RX_DST_Q = 12,
+ ICE_MDID_RX_DST_VSI,
+ ICE_MDID_SRC_VSI = 19,
+ ICE_MDID_ACL_NOP = 55,
+ /* Entry 56 */
+ ICE_MDID_RX_HASH_LOW,
+ ICE_MDID_ACL_CNTR_PKT = ICE_MDID_RX_HASH_LOW,
+ /* Entry 57 */
+ ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_BYTES = ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_PKT_BYTES
};
/* for ice_32byte_rx_flex_desc.mir_id_umb_cast member */
#define ICE_RX_FLEX_DESC_MIRROR_M (0x3F) /* 6-bits */
-/* Rx Flag64 packet flag bits */
-enum ice_rx_flg64_bits {
- ICE_RXFLG_PKT_DSI = 0,
- ICE_RXFLG_EVLAN_x8100 = 15,
- ICE_RXFLG_EVLAN_x9100,
- ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_MAC = 22,
- ICE_RXFLG_TNL_VLAN,
- ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_FIN = 32,
- ICE_RXFLG_SYN,
- ICE_RXFLG_RST,
- ICE_RXFLG_TNL0 = 38,
- ICE_RXFLG_TNL1,
- ICE_RXFLG_TNL2,
- ICE_RXFLG_UDP_GRE,
- ICE_RXFLG_RSVD = 63
+/* Rx/Tx Flag64 packet flag bits */
+enum ice_flg64_bits {
+ ICE_FLG_PKT_DSI = 0,
+ /* If there is a 1 in this bit position then that means Rx packet */
+ ICE_FLG_PKT_DIR = 4,
+ ICE_FLG_EVLAN_x8100 = 15,
+ ICE_FLG_EVLAN_x9100,
+ ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_MAC = 22,
+ ICE_FLG_TNL_VLAN,
+ ICE_FLG_PKT_FRG,
+ ICE_FLG_FIN = 32,
+ ICE_FLG_SYN,
+ ICE_FLG_RST,
+ ICE_FLG_TNL0 = 38,
+ ICE_FLG_TNL1,
+ ICE_FLG_TNL2,
+ ICE_FLG_UDP_GRE,
+ ICE_FLG_RSVD = 63
};
enum ice_rx_flex_desc_umb_cast_bits { /* field is 2 bits long */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 17/38] net/ice/base: update macros
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 17/38] net/ice/base: update macros Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update macros for metadata and package flags.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 36 ++++++++---------
drivers/net/ice/base/ice_flow.h | 17 ++++++--
drivers/net/ice/base/ice_lan_tx_rx.h | 77 +++++++++++++++++++++++-------------
3 files changed, 80 insertions(+), 50 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4085ccc12..e0fe06e9c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -365,22 +365,22 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_FIN, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,
+ ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,
+ ICE_FLG_FIN, idx++);
/* flex flag 1 is not used for flexi-flag programming, skipping
* these four FLG64 bits.
*/
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100,
- ICE_RXFLG_EVLAN_x9100, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC,
- ICE_RXFLG_TNL0, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,
- ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,
+ ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,
+ ICE_FLG_EVLAN_x9100, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,
+ ICE_FLG_TNL0, idx++);
+ ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,
+ ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);
break;
default:
@@ -399,17 +399,17 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
*/
static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
{
- enum ice_flex_rx_mdid mdid;
+ enum ice_flex_mdid mdid;
switch (prof_id) {
case ICE_RXDID_FLEX_NIC:
case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
+ ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?
- ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;
+ ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH;
ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 265e1ee3e..3db10cd6f 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -278,14 +278,23 @@ enum ice_flow_action_type {
ICE_FLOW_ACT_NOP,
ICE_FLOW_ACT_ALLOW,
ICE_FLOW_ACT_DROP,
- ICE_FLOW_ACT_COUNT,
+ ICE_FLOW_ACT_CNTR_PKT,
ICE_FLOW_ACT_FWD_VSI,
ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
- ICE_FLOW_ACTION_PUSH,
- ICE_FLOW_ACTION_POP,
- ICE_FLOW_ACTION_MODIFY,
+ ICE_FLOW_ACT_PUSH,
+ ICE_FLOW_ACT_POP,
+ ICE_FLOW_ACT_MODIFY,
+ ICE_FLOW_ACT_CNTR_BYTES,
+ ICE_FLOW_ACT_CNTR_PKT_BYTES,
+ ICE_FLOW_ACT_GENERIC_0,
+ ICE_FLOW_ACT_GENERIC_1,
+ ICE_FLOW_ACT_GENERIC_2,
+ ICE_FLOW_ACT_GENERIC_3,
+ ICE_FLOW_ACT_GENERIC_4,
+ ICE_FLOW_ACT_RPT_FLOW_ID,
+ ICE_FLOW_ACT_BUILD_PROF_IDX,
};
struct ice_flow_action {
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 4a1ea0c7d..b1963b5eb 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -627,39 +627,60 @@ enum ice_flex_opcode {
ICE_RX_OPC_PROTID
};
-/* Receive Descriptor MDID values */
-enum ice_flex_rx_mdid {
- ICE_RX_MDID_FLOW_ID_LOWER = 5,
- ICE_RX_MDID_FLOW_ID_HIGH,
- ICE_RX_MDID_DST_VSI = 13,
- ICE_RX_MDID_SRC_VSI = 19,
- ICE_RX_MDID_HASH_LOW = 56,
- ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR0 = ICE_RX_MDID_HASH_LOW,
- ICE_RX_MDID_ACL_CTR1 = ICE_RX_MDID_HASH_HIGH,
- ICE_RX_MDID_ACL_CTR2 = 59
+/* Receive Descriptor MDID values that access packet flags */
+enum ice_flex_mdid_pkt_flags {
+ ICE_RX_MDID_PKT_FLAGS_15_0 = 20,
+ ICE_RX_MDID_PKT_FLAGS_31_16,
+ ICE_RX_MDID_PKT_FLAGS_47_32,
+ ICE_RX_MDID_PKT_FLAGS_63_48,
+};
+
+/* Generic descriptor MDID values */
+enum ice_flex_mdid {
+ ICE_MDID_GENERIC_WORD_0,
+ ICE_MDID_GENERIC_WORD_1,
+ ICE_MDID_GENERIC_WORD_2,
+ ICE_MDID_GENERIC_WORD_3,
+ ICE_MDID_GENERIC_WORD_4,
+ ICE_MDID_FLOW_ID_LOWER,
+ ICE_MDID_FLOW_ID_HIGH,
+ ICE_MDID_RX_DESCR_PROF_IDX,
+ ICE_MDID_RX_PKT_DROP,
+ ICE_MDID_RX_DST_Q = 12,
+ ICE_MDID_RX_DST_VSI,
+ ICE_MDID_SRC_VSI = 19,
+ ICE_MDID_ACL_NOP = 55,
+ /* Entry 56 */
+ ICE_MDID_RX_HASH_LOW,
+ ICE_MDID_ACL_CNTR_PKT = ICE_MDID_RX_HASH_LOW,
+ /* Entry 57 */
+ ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_BYTES = ICE_MDID_RX_HASH_HIGH,
+ ICE_MDID_ACL_CNTR_PKT_BYTES
};
/* for ice_32byte_rx_flex_desc.mir_id_umb_cast member */
#define ICE_RX_FLEX_DESC_MIRROR_M (0x3F) /* 6-bits */
-/* Rx Flag64 packet flag bits */
-enum ice_rx_flg64_bits {
- ICE_RXFLG_PKT_DSI = 0,
- ICE_RXFLG_EVLAN_x8100 = 15,
- ICE_RXFLG_EVLAN_x9100,
- ICE_RXFLG_VLAN_x8100,
- ICE_RXFLG_TNL_MAC = 22,
- ICE_RXFLG_TNL_VLAN,
- ICE_RXFLG_PKT_FRG,
- ICE_RXFLG_FIN = 32,
- ICE_RXFLG_SYN,
- ICE_RXFLG_RST,
- ICE_RXFLG_TNL0 = 38,
- ICE_RXFLG_TNL1,
- ICE_RXFLG_TNL2,
- ICE_RXFLG_UDP_GRE,
- ICE_RXFLG_RSVD = 63
+/* Rx/Tx Flag64 packet flag bits */
+enum ice_flg64_bits {
+ ICE_FLG_PKT_DSI = 0,
+ /* If there is a 1 in this bit position then that means Rx packet */
+ ICE_FLG_PKT_DIR = 4,
+ ICE_FLG_EVLAN_x8100 = 15,
+ ICE_FLG_EVLAN_x9100,
+ ICE_FLG_VLAN_x8100,
+ ICE_FLG_TNL_MAC = 22,
+ ICE_FLG_TNL_VLAN,
+ ICE_FLG_PKT_FRG,
+ ICE_FLG_FIN = 32,
+ ICE_FLG_SYN,
+ ICE_FLG_RST,
+ ICE_FLG_TNL0 = 38,
+ ICE_FLG_TNL1,
+ ICE_FLG_TNL2,
+ ICE_FLG_UDP_GRE,
+ ICE_FLG_RSVD = 63
};
enum ice_rx_flex_desc_umb_cast_bits { /* field is 2 bits long */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 18/38] net/ice/base: clean code
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (17 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 17/38] net/ice/base: update macros Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 19/38] net/ice/base: enable VSI queue context Qi Zhang
` (20 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Change below function as static and also relocated code line
to align with kernel driver.
ice_aq_move_sched_elems
ice_sched_get_agg_node
ice_sched_set_node_bw_lmt
ice_sched_cfg_node_bw_alloc
ice_sched_add_agg_cfg
ice_sched_rm_agg_cfg
ice_sched_move_vsi_to_agg
ice_sched_del_rl_profile
ice_sched_rm_unused_rl_prof
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_sched.c | 1038 +++++++++++++++++++-------------------
drivers/net/ice/base/ice_sched.h | 24 -
2 files changed, 519 insertions(+), 543 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index ab6097237..2dd9f6f6c 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -462,7 +462,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
*
* Move scheduling elements (0x0408)
*/
-enum ice_status
+static enum ice_status
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd)
@@ -713,6 +713,41 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
+ * ice_sched_del_rl_profile - remove RL profile
+ * @hw: pointer to the HW struct
+ * @rl_info: rate limit profile information
+ *
+ * If the profile ID is not referenced anymore, it removes profile ID with
+ * its associated parameters from HW DB,and locally. The caller needs to
+ * hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_del_rl_profile(struct ice_hw *hw,
+ struct ice_aqc_rl_profile_info *rl_info)
+{
+ struct ice_aqc_rl_profile_generic_elem *buf;
+ u16 num_profiles_removed;
+ enum ice_status status;
+ u16 num_profiles = 1;
+
+ if (rl_info->prof_id_ref != 0)
+ return ICE_ERR_IN_USE;
+
+ /* Safe to remove profile ID */
+ buf = (struct ice_aqc_rl_profile_generic_elem *)
+ &rl_info->profile;
+ status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
+ &num_profiles_removed, NULL);
+ if (status || num_profiles_removed != num_profiles)
+ return ICE_ERR_CFG;
+
+ /* Delete stale entry now */
+ LIST_DEL(&rl_info->list_entry);
+ ice_free(hw, rl_info);
+ return status;
+}
+
+/**
* ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
@@ -1468,7 +1503,7 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
* This function retrieves an aggregator node for a given aggregator ID from
* a given TC branch
*/
-struct ice_sched_node *
+static struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u32 agg_id)
{
@@ -2071,6 +2106,220 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
+ * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
+ * @hw: pointer to the HW struct
+ * @node: pointer to a child node
+ * @num_nodes: num nodes count array
+ *
+ * This function walks through the aggregator subtree to find a free parent
+ * node
+ */
+static struct ice_sched_node *
+ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
+ u16 *num_nodes)
+{
+ u8 l = node->tx_sched_layer;
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(hw);
+
+ /* Is it VSI parent layer ? */
+ if (l == vsil - 1)
+ return (node->num_children < hw->max_children[l]) ? node : NULL;
+
+ /* We have intermediate nodes. Let's walk through the subtree. If the
+ * intermediate node has space to add a new node then clear the count
+ */
+ if (node->num_children < hw->max_children[l])
+ num_nodes[l] = 0;
+ /* The below recursive call is intentional and wouldn't go more than
+ * 2 or 3 iterations.
+ */
+
+ for (i = 0; i < node->num_children; i++) {
+ struct ice_sched_node *parent;
+
+ parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
+ num_nodes);
+ if (parent)
+ return parent;
+ }
+
+ return NULL;
+}
+
+/**
+ * ice_sched_update_parent - update the new parent in SW DB
+ * @new_parent: pointer to a new parent node
+ * @node: pointer to a child node
+ *
+ * This function removes the child from the old parent and adds it to a new
+ * parent
+ */
+static void
+ice_sched_update_parent(struct ice_sched_node *new_parent,
+ struct ice_sched_node *node)
+{
+ struct ice_sched_node *old_parent;
+ u8 i, j;
+
+ old_parent = node->parent;
+
+ /* update the old parent children */
+ for (i = 0; i < old_parent->num_children; i++)
+ if (old_parent->children[i] == node) {
+ for (j = i + 1; j < old_parent->num_children; j++)
+ old_parent->children[j - 1] =
+ old_parent->children[j];
+ old_parent->num_children--;
+ break;
+ }
+
+ /* now move the node to a new parent */
+ new_parent->children[new_parent->num_children++] = node;
+ node->parent = new_parent;
+ node->info.parent_teid = new_parent->info.node_teid;
+}
+
+/**
+ * ice_sched_move_nodes - move child nodes to a given parent
+ * @pi: port information structure
+ * @parent: pointer to parent node
+ * @num_items: number of child nodes to be moved
+ * @list: pointer to child node teids
+ *
+ * This function move the child nodes to a given parent.
+ */
+static enum ice_status
+ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
+ u16 num_items, u32 *list)
+{
+ struct ice_aqc_move_elem *buf;
+ struct ice_sched_node *node;
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw;
+ u16 grps_movd = 0;
+ u8 i;
+
+ hw = pi->hw;
+
+ if (!parent || !num_items)
+ return ICE_ERR_PARAM;
+
+ /* Does parent have enough space */
+ if (parent->num_children + num_items >=
+ hw->max_children[parent->tx_sched_layer])
+ return ICE_ERR_AQ_FULL;
+
+ buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ for (i = 0; i < num_items; i++) {
+ node = ice_sched_find_node_by_teid(pi->root, list[i]);
+ if (!node) {
+ status = ICE_ERR_PARAM;
+ goto move_err_exit;
+ }
+
+ buf->hdr.src_parent_teid = node->info.parent_teid;
+ buf->hdr.dest_parent_teid = parent->info.node_teid;
+ buf->teid[0] = node->info.node_teid;
+ buf->hdr.num_elems = CPU_TO_LE16(1);
+ status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
+ &grps_movd, NULL);
+ if (status && grps_movd != 1) {
+ status = ICE_ERR_CFG;
+ goto move_err_exit;
+ }
+
+ /* update the SW DB */
+ ice_sched_update_parent(parent, node);
+ }
+
+move_err_exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_sched_move_vsi_to_agg - move VSI to aggregator node
+ * @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function moves a VSI to an aggregator node or its subtree.
+ * Intermediate nodes may be created if required.
+ */
+static enum ice_status
+ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
+ u8 tc)
+{
+ struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ u32 first_node_teid, vsi_teid;
+ enum ice_status status;
+ u16 num_nodes_added;
+ u8 aggl, vsil, i;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
+ if (!vsi_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ aggl = ice_sched_get_agg_layer(pi->hw);
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+
+ /* set intermediate node count to 1 between aggregator and VSI layers */
+ for (i = aggl + 1; i < vsil; i++)
+ num_nodes[i] = 1;
+
+ /* Check if the aggregator subtree has any free node to add the VSI */
+ for (i = 0; i < agg_node->num_children; i++) {
+ parent = ice_sched_get_free_vsi_parent(pi->hw,
+ agg_node->children[i],
+ num_nodes);
+ if (parent)
+ goto move_nodes;
+ }
+
+ /* add new nodes */
+ parent = agg_node;
+ for (i = aggl + 1; i < vsil; i++) {
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added)
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ else
+ parent = parent->children[0];
+
+ if (!parent)
+ return ICE_ERR_CFG;
+ }
+
+move_nodes:
+ vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
+ return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
+}
+
+/**
* ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
@@ -2114,20 +2363,89 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
* @pi: port information structure
- * @agg_info: aggregator ID
- * @tc: TC number
- * @rm_vsi_info: bool value true or false
+ * @node: node pointer
*
- * This function removes aggregator reference to VSI of given TC. It removes
- * the aggregator configuration completely for requested TC. The caller needs
- * to hold the scheduler lock.
+ * This function checks whether the aggregator is attached with any VSI or not.
*/
-static enum ice_status
-ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
- u8 tc, bool rm_vsi_info)
-{
+static bool
+ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
+{
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+ if (node->tx_sched_layer < vsil - 1) {
+ for (i = 0; i < node->num_children; i++)
+ if (ice_sched_is_agg_inuse(pi, node->children[i]))
+ return true;
+ return false;
+ } else {
+ return node->num_children ? true : false;
+ }
+}
+
+/**
+ * ice_sched_rm_agg_cfg - remove the aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function removes the aggregator node and intermediate nodes if any
+ * from the given TC
+ */
+static enum ice_status
+ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *tc_node, *agg_node;
+ struct ice_hw *hw = pi->hw;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ /* Can't remove the aggregator node if it has children */
+ if (ice_sched_is_agg_inuse(pi, agg_node))
+ return ICE_ERR_IN_USE;
+
+ /* need to remove the whole subtree if aggregator node is the
+ * only child.
+ */
+ while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
+ struct ice_sched_node *parent = agg_node->parent;
+
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ if (parent->num_children > 1)
+ break;
+
+ agg_node = parent;
+ }
+
+ ice_free_sched_node(pi, agg_node);
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * @pi: port information structure
+ * @agg_info: aggregator ID
+ * @tc: TC number
+ * @rm_vsi_info: bool value true or false
+ *
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
+ */
+static enum ice_status
+ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
+ u8 tc, bool rm_vsi_info)
+{
enum ice_status status = ICE_SUCCESS;
/* If nothing to remove - return success */
@@ -2172,6 +2490,89 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_add_agg_cfg - create an aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function creates an aggregator node and intermediate nodes if required
+ * for the given TC
+ */
+static enum ice_status
+ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *parent, *agg_node, *tc_node;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw = pi->hw;
+ u32 first_node_teid;
+ u16 num_nodes_added;
+ u8 i, aggl;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ /* Does Agg node already exist ? */
+ if (agg_node)
+ return status;
+
+ aggl = ice_sched_get_agg_layer(hw);
+
+ /* need one node in Agg layer */
+ num_nodes[aggl] = 1;
+
+ /* Check whether the intermediate nodes have space to add the
+ * new aggregator. If they are full, then SW needs to allocate a new
+ * intermediate node on those layers
+ */
+ for (i = hw->sw_entry_point_layer; i < aggl; i++) {
+ parent = ice_sched_get_first_node(hw, tc_node, i);
+
+ /* scan all the siblings */
+ while (parent) {
+ if (parent->num_children < hw->max_children[i])
+ break;
+ parent = parent->sibling;
+ }
+
+ /* all the nodes are full, reserve one for this layer */
+ if (!parent)
+ num_nodes[i]++;
+ }
+
+ /* add the aggregator node */
+ parent = tc_node;
+ for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added) {
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ /* register aggregator ID with the aggregator node */
+ if (parent && i == aggl)
+ parent->agg_id = agg_id;
+ } else {
+ parent = parent->children[0];
+ }
+ }
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
* @agg_id: aggregator ID
@@ -2406,6 +2807,109 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_rm_unused_rl_prof - remove unused RL profile
+ * @pi: port information structure
+ *
+ * This function removes unused rate limit profiles from the HW and
+ * SW DB. The caller needs to hold scheduler lock.
+ */
+static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
+{
+ u8 ln;
+
+ for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+ struct ice_aqc_rl_profile_info *rl_prof_elem;
+ struct ice_aqc_rl_profile_info *rl_prof_tmp;
+
+ LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
+ &pi->rl_prof_list[ln],
+ ice_aqc_rl_profile_info, list_entry) {
+ if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
+ ice_debug(pi->hw, ICE_DBG_SCHED,
+ "Removed rl profile\n");
+ }
+ }
+}
+
+/**
+ * ice_sched_update_elem - update element
+ * @hw: pointer to the HW struct
+ * @node: pointer to node
+ * @info: node info to update
+ *
+ * It updates the HW DB, and local SW DB of node. It updates the scheduling
+ * parameters of node from argument info data buffer (Info->data buf) and
+ * returns success or error on config sched element failure. The caller
+ * needs to hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
+ struct ice_aqc_txsched_elem_data *info)
+{
+ struct ice_aqc_conf_elem buf;
+ enum ice_status status;
+ u16 elem_cfgd = 0;
+ u16 num_elems = 1;
+
+ buf.generic[0] = *info;
+ /* Parent TEID is reserved field in this aq call */
+ buf.generic[0].parent_teid = 0;
+ /* Element type is reserved field in this aq call */
+ buf.generic[0].data.elem_type = 0;
+ /* Flags is reserved field in this aq call */
+ buf.generic[0].data.flags = 0;
+
+ /* Update HW DB */
+ /* Configure element node */
+ status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
+ &elem_cfgd, NULL);
+ if (status || elem_cfgd != num_elems) {
+ ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
+ return ICE_ERR_CFG;
+ }
+
+ /* Config success case */
+ /* Now update local SW DB */
+ /* Only copy the data portion of info buffer */
+ node->info.data = info->data;
+ return status;
+}
+
+/**
+ * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
+ * @hw: pointer to the HW struct
+ * @node: sched node to configure
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @bw_alloc: BW weight/allocation
+ *
+ * This function configures node element's BW allocation.
+ */
+static enum ice_status
+ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
+ enum ice_rl_type rl_type, u8 bw_alloc)
+{
+ struct ice_aqc_txsched_elem_data buf;
+ struct ice_aqc_txsched_elem *data;
+ enum ice_status status;
+
+ buf = node->info;
+ data = &buf.data;
+ if (rl_type == ICE_MIN_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
+ data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else if (rl_type == ICE_MAX_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
+ data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else {
+ return ICE_ERR_PARAM;
+ }
+
+ /* Configure element */
+ status = ice_sched_update_elem(hw, node, &buf);
+ return status;
+}
+
+/**
* ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
* @agg_id: aggregator ID
@@ -3372,110 +3876,6 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
}
/**
- * ice_sched_del_rl_profile - remove rl profile
- * @hw: pointer to the hw struct
- * @rl_info: rate limit profile information
- *
- * If the profile id is not referenced anymore, it removes profile id with
- * its associated parameters from hw db,and locally. The caller needs to
- * hold scheduler lock.
- */
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info)
-{
- struct ice_aqc_rl_profile_generic_elem *buf;
- u16 num_profiles_removed;
- enum ice_status status;
- u16 num_profiles = 1;
-
- if (rl_info->prof_id_ref != 0)
- return ICE_ERR_IN_USE;
-
- /* Safe to remove profile id */
- buf = (struct ice_aqc_rl_profile_generic_elem *)
- &rl_info->profile;
- status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
- &num_profiles_removed, NULL);
- if (status || num_profiles_removed != num_profiles)
- return ICE_ERR_CFG;
-
- /* Delete stale entry now */
- LIST_DEL(&rl_info->list_entry);
- ice_free(hw, rl_info);
- return status;
-}
-
-/**
- * ice_sched_rm_unused_rl_prof - remove unused rl profile
- * @pi: port information structure
- *
- * This function removes unused rate limit profiles from the hw and
- * SW DB. The caller needs to hold scheduler lock.
- */
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
-{
- u8 ln;
-
- for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
- struct ice_aqc_rl_profile_info *rl_prof_elem;
- struct ice_aqc_rl_profile_info *rl_prof_tmp;
-
- LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
- &pi->rl_prof_list[ln],
- ice_aqc_rl_profile_info, list_entry) {
- if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
- ice_debug(pi->hw, ICE_DBG_SCHED,
- "Removed rl profile\n");
- }
- }
-}
-
-/**
- * ice_sched_update_elem - update element
- * @hw: pointer to the hw struct
- * @node: pointer to node
- * @info: node info to update
- *
- * It updates the HW DB, and local SW DB of node. It updates the scheduling
- * parameters of node from argument info data buffer (Info->data buf) and
- * returns success or error on config sched element failure. The caller
- * needs to hold scheduler lock.
- */
-static enum ice_status
-ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
- struct ice_aqc_txsched_elem_data *info)
-{
- struct ice_aqc_conf_elem buf;
- enum ice_status status;
- u16 elem_cfgd = 0;
- u16 num_elems = 1;
-
- buf.generic[0] = *info;
- /* Parent teid is reserved field in this aq call */
- buf.generic[0].parent_teid = 0;
- /* Element type is reserved field in this aq call */
- buf.generic[0].data.elem_type = 0;
- /* Flags is reserved field in this aq call */
- buf.generic[0].data.flags = 0;
-
- /* Update HW DB */
- /* Configure element node */
- status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
- &elem_cfgd, NULL);
- if (status || elem_cfgd != num_elems) {
- ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
- return ICE_ERR_CFG;
- }
-
- /* Config success case */
- /* Now update local SW DB */
- /* Only copy the data portion of info buffer */
- node->info.data = info->data;
- return status;
-}
-
-/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
* @hw: pointer to the HW struct
* @node: sched node to configure
@@ -3841,7 +4241,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
* It updates node's BW limit parameters like BW RL profile ID of type CIR,
* EIR, or SRL. The caller needs to hold scheduler lock.
*/
-enum ice_status
+static enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4588,7 +4988,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
/**
* ice_sched_cfg_sibl_node_prio - configure node sibling priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: sibling priority
*
@@ -4617,406 +5017,6 @@ ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_cfg_node_bw_alloc - configure node bw weight/alloc params
- * @hw: pointer to the hw struct
- * @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @bw_alloc: bw weight/allocation
- *
- * This function configures node element's bw allocation.
- */
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc)
-{
- struct ice_aqc_txsched_elem_data buf;
- struct ice_aqc_txsched_elem *data;
- enum ice_status status;
-
- buf = node->info;
- data = &buf.data;
- if (rl_type == ICE_MIN_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
- data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else if (rl_type == ICE_MAX_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
- data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else {
- return ICE_ERR_PARAM;
- }
-
- /* Configure element */
- status = ice_sched_update_elem(hw, node, &buf);
- return status;
-}
-
-/**
- * ice_sched_add_agg_cfg - create an aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function creates an aggregator node and intermediate nodes if required
- * for the given TC
- */
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *parent, *agg_node, *tc_node;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw = pi->hw;
- u32 first_node_teid;
- u16 num_nodes_added;
- u8 i, aggl;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- /* Does Agg node already exist ? */
- if (agg_node)
- return status;
-
- aggl = ice_sched_get_agg_layer(hw);
-
- /* need one node in Agg layer */
- num_nodes[aggl] = 1;
-
- /* Check whether the intermediate nodes have space to add the
- * new agg. If they are full, then SW needs to allocate a new
- * intermediate node on those layers
- */
- for (i = hw->sw_entry_point_layer; i < aggl; i++) {
- parent = ice_sched_get_first_node(hw, tc_node, i);
-
- /* scan all the siblings */
- while (parent) {
- if (parent->num_children < hw->max_children[i])
- break;
- parent = parent->sibling;
- }
-
- /* all the nodes are full, reserve one for this layer */
- if (!parent)
- num_nodes[i]++;
- }
-
- /* add the agg node */
- parent = tc_node;
- for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
- if (!parent)
- return ICE_ERR_CFG;
-
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added) {
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- /* register the aggregator id with the agg node */
- if (parent && i == aggl)
- parent->agg_id = agg_id;
- } else {
- parent = parent->children[0];
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_is_agg_inuse - check whether the agg is in use or not
- * @pi: port information structure
- * @node: node pointer
- *
- * This function checks whether the agg is attached with any vsi or not.
- */
-static bool
-ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
-{
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(pi->hw);
- if (node->tx_sched_layer < vsil - 1) {
- for (i = 0; i < node->num_children; i++)
- if (ice_sched_is_agg_inuse(pi, node->children[i]))
- return true;
- return false;
- } else {
- return node->num_children ? true : false;
- }
-}
-
-/**
- * ice_sched_rm_agg_cfg - remove the aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function removes the aggregator node and intermediate nodes if any
- * from the given TC
- */
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *tc_node, *agg_node;
- struct ice_hw *hw = pi->hw;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- /* Can't remove the agg node if it has children */
- if (ice_sched_is_agg_inuse(pi, agg_node))
- return ICE_ERR_IN_USE;
-
- /* need to remove the whole subtree if agg node is the
- * only child.
- */
- while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
- struct ice_sched_node *parent = agg_node->parent;
-
- if (!parent)
- return ICE_ERR_CFG;
-
- if (parent->num_children > 1)
- break;
-
- agg_node = parent;
- }
-
- ice_free_sched_node(pi, agg_node);
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_get_free_vsi_parent - Find a free parent node in agg subtree
- * @hw: pointer to the hw struct
- * @node: pointer to a child node
- * @num_nodes: num nodes count array
- *
- * This function walks through the aggregator subtree to find a free parent
- * node
- */
-static struct ice_sched_node *
-ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
- u16 *num_nodes)
-{
- u8 l = node->tx_sched_layer;
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(hw);
-
- /* Is it VSI parent layer ? */
- if (l == vsil - 1)
- return (node->num_children < hw->max_children[l]) ? node : NULL;
-
- /* We have intermediate nodes. Let's walk through the subtree. If the
- * intermediate node has space to add a new node then clear the count
- */
- if (node->num_children < hw->max_children[l])
- num_nodes[l] = 0;
- /* The below recursive call is intentional and wouldn't go more than
- * 2 or 3 iterations.
- */
-
- for (i = 0; i < node->num_children; i++) {
- struct ice_sched_node *parent;
-
- parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
- num_nodes);
- if (parent)
- return parent;
- }
-
- return NULL;
-}
-
-/**
- * ice_sched_update_new_parent - update the new parent in SW DB
- * @new_parent: pointer to a new parent node
- * @node: pointer to a child node
- *
- * This function removes the child from the old parent and adds it to a new
- * parent
- */
-static void
-ice_sched_update_parent(struct ice_sched_node *new_parent,
- struct ice_sched_node *node)
-{
- struct ice_sched_node *old_parent;
- u8 i, j;
-
- old_parent = node->parent;
-
- /* update the old parent children */
- for (i = 0; i < old_parent->num_children; i++)
- if (old_parent->children[i] == node) {
- for (j = i + 1; j < old_parent->num_children; j++)
- old_parent->children[j - 1] =
- old_parent->children[j];
- old_parent->num_children--;
- break;
- }
-
- /* now move the node to a new parent */
- new_parent->children[new_parent->num_children++] = node;
- node->parent = new_parent;
- node->info.parent_teid = new_parent->info.node_teid;
-}
-
-/**
- * ice_sched_move_nodes - move child nodes to a given parent
- * @pi: port information structure
- * @parent: pointer to parent node
- * @num_items: number of child nodes to be moved
- * @list: pointer to child node teids
- *
- * This function move the child nodes to a given parent.
- */
-static enum ice_status
-ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
- u16 num_items, u32 *list)
-{
- struct ice_aqc_move_elem *buf;
- struct ice_sched_node *node;
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw;
- u16 grps_movd = 0;
- u8 i;
-
- hw = pi->hw;
-
- if (!parent || !num_items)
- return ICE_ERR_PARAM;
-
- /* Does parent have enough space */
- if (parent->num_children + num_items >=
- hw->max_children[parent->tx_sched_layer])
- return ICE_ERR_AQ_FULL;
-
- buf = (struct ice_aqc_move_elem *) ice_malloc(hw, sizeof(*buf));
- if (!buf)
- return ICE_ERR_NO_MEMORY;
-
- for (i = 0; i < num_items; i++) {
- node = ice_sched_find_node_by_teid(pi->root, list[i]);
- if (!node) {
- status = ICE_ERR_PARAM;
- goto move_err_exit;
- }
-
- buf->hdr.src_parent_teid = node->info.parent_teid;
- buf->hdr.dest_parent_teid = parent->info.node_teid;
- buf->teid[0] = node->info.node_teid;
- buf->hdr.num_elems = CPU_TO_LE16(1);
- status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
- &grps_movd, NULL);
- if (status && grps_movd != 1) {
- status = ICE_ERR_CFG;
- goto move_err_exit;
- }
-
- /* update the SW DB */
- ice_sched_update_parent(parent, node);
- }
-
-move_err_exit:
- ice_free(hw, buf);
- return status;
-}
-
-/**
- * ice_sched_move_vsi_to_agg - move VSI to aggregator node
- * @pi: port information structure
- * @vsi_handle: software VSI handle
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function moves a VSI to an aggregator node or its subtree.
- * Intermediate nodes may be created if required.
- */
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc)
-{
- struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- u32 first_node_teid, vsi_teid;
- enum ice_status status;
- u16 num_nodes_added;
- u8 aggl, vsil, i;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
- if (!vsi_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- aggl = ice_sched_get_agg_layer(pi->hw);
- vsil = ice_sched_get_vsi_layer(pi->hw);
-
- /* initialize intermediate node count to 1 between agg and VSI layers */
- for (i = aggl + 1; i < vsil; i++)
- num_nodes[i] = 1;
-
- /* Check whether the agg subtree has any free node to add the VSI */
- for (i = 0; i < agg_node->num_children; i++) {
- parent = ice_sched_get_free_vsi_parent(pi->hw,
- agg_node->children[i],
- num_nodes);
- if (parent)
- goto move_nodes;
- }
-
- /* add new nodes */
- parent = agg_node;
- for (i = aggl + 1; i < vsil; i++) {
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added)
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- else
- parent = parent->children[0];
-
- if (!parent)
- return ICE_ERR_CFG;
- }
-
-move_nodes:
- vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
- return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
-}
-
-/**
* ice_cfg_rl_burst_size - Set burst size value
* @hw: pointer to the HW struct
* @bytes: burst size in bytes
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 61fa6a85b..09de765ff 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -76,10 +76,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
-ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
- struct ice_aqc_move_elem *buf, u16 buf_size,
- u16 *grps_movd, struct ice_sq_cd *cd);
-enum ice_status
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_get_elem *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd);
@@ -109,9 +105,6 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable);
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
struct ice_sched_node *
-ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
- u32 agg_id);
-struct ice_sched_node *
ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u16 vsi_handle);
bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
@@ -177,9 +170,6 @@ bool
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
struct ice_sched_node *node);
enum ice_status
-ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u32 bw);
-enum ice_status
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -193,18 +183,4 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);
enum ice_status
ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
u8 priority);
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc);
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc);
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info);
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi);
#endif /* _ICE_SCHED_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 18/38] net/ice/base: clean code
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 18/38] net/ice/base: clean code Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Change below function as static and also relocated code line
to align with kernel driver.
ice_aq_move_sched_elems
ice_sched_get_agg_node
ice_sched_set_node_bw_lmt
ice_sched_cfg_node_bw_alloc
ice_sched_add_agg_cfg
ice_sched_rm_agg_cfg
ice_sched_move_vsi_to_agg
ice_sched_del_rl_profile
ice_sched_rm_unused_rl_prof
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_sched.c | 1038 +++++++++++++++++++-------------------
drivers/net/ice/base/ice_sched.h | 24 -
2 files changed, 519 insertions(+), 543 deletions(-)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index ab6097237..2dd9f6f6c 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -462,7 +462,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
*
* Move scheduling elements (0x0408)
*/
-enum ice_status
+static enum ice_status
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd)
@@ -713,6 +713,41 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
}
/**
+ * ice_sched_del_rl_profile - remove RL profile
+ * @hw: pointer to the HW struct
+ * @rl_info: rate limit profile information
+ *
+ * If the profile ID is not referenced anymore, it removes profile ID with
+ * its associated parameters from HW DB,and locally. The caller needs to
+ * hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_del_rl_profile(struct ice_hw *hw,
+ struct ice_aqc_rl_profile_info *rl_info)
+{
+ struct ice_aqc_rl_profile_generic_elem *buf;
+ u16 num_profiles_removed;
+ enum ice_status status;
+ u16 num_profiles = 1;
+
+ if (rl_info->prof_id_ref != 0)
+ return ICE_ERR_IN_USE;
+
+ /* Safe to remove profile ID */
+ buf = (struct ice_aqc_rl_profile_generic_elem *)
+ &rl_info->profile;
+ status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
+ &num_profiles_removed, NULL);
+ if (status || num_profiles_removed != num_profiles)
+ return ICE_ERR_CFG;
+
+ /* Delete stale entry now */
+ LIST_DEL(&rl_info->list_entry);
+ ice_free(hw, rl_info);
+ return status;
+}
+
+/**
* ice_sched_clear_rl_prof - clears RL prof entries
* @pi: port information structure
*
@@ -1468,7 +1503,7 @@ ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
* This function retrieves an aggregator node for a given aggregator ID from
* a given TC branch
*/
-struct ice_sched_node *
+static struct ice_sched_node *
ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u32 agg_id)
{
@@ -2071,6 +2106,220 @@ ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
}
/**
+ * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
+ * @hw: pointer to the HW struct
+ * @node: pointer to a child node
+ * @num_nodes: num nodes count array
+ *
+ * This function walks through the aggregator subtree to find a free parent
+ * node
+ */
+static struct ice_sched_node *
+ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
+ u16 *num_nodes)
+{
+ u8 l = node->tx_sched_layer;
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(hw);
+
+ /* Is it VSI parent layer ? */
+ if (l == vsil - 1)
+ return (node->num_children < hw->max_children[l]) ? node : NULL;
+
+ /* We have intermediate nodes. Let's walk through the subtree. If the
+ * intermediate node has space to add a new node then clear the count
+ */
+ if (node->num_children < hw->max_children[l])
+ num_nodes[l] = 0;
+ /* The below recursive call is intentional and wouldn't go more than
+ * 2 or 3 iterations.
+ */
+
+ for (i = 0; i < node->num_children; i++) {
+ struct ice_sched_node *parent;
+
+ parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
+ num_nodes);
+ if (parent)
+ return parent;
+ }
+
+ return NULL;
+}
+
+/**
+ * ice_sched_update_parent - update the new parent in SW DB
+ * @new_parent: pointer to a new parent node
+ * @node: pointer to a child node
+ *
+ * This function removes the child from the old parent and adds it to a new
+ * parent
+ */
+static void
+ice_sched_update_parent(struct ice_sched_node *new_parent,
+ struct ice_sched_node *node)
+{
+ struct ice_sched_node *old_parent;
+ u8 i, j;
+
+ old_parent = node->parent;
+
+ /* update the old parent children */
+ for (i = 0; i < old_parent->num_children; i++)
+ if (old_parent->children[i] == node) {
+ for (j = i + 1; j < old_parent->num_children; j++)
+ old_parent->children[j - 1] =
+ old_parent->children[j];
+ old_parent->num_children--;
+ break;
+ }
+
+ /* now move the node to a new parent */
+ new_parent->children[new_parent->num_children++] = node;
+ node->parent = new_parent;
+ node->info.parent_teid = new_parent->info.node_teid;
+}
+
+/**
+ * ice_sched_move_nodes - move child nodes to a given parent
+ * @pi: port information structure
+ * @parent: pointer to parent node
+ * @num_items: number of child nodes to be moved
+ * @list: pointer to child node teids
+ *
+ * This function move the child nodes to a given parent.
+ */
+static enum ice_status
+ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
+ u16 num_items, u32 *list)
+{
+ struct ice_aqc_move_elem *buf;
+ struct ice_sched_node *node;
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw;
+ u16 grps_movd = 0;
+ u8 i;
+
+ hw = pi->hw;
+
+ if (!parent || !num_items)
+ return ICE_ERR_PARAM;
+
+ /* Does parent have enough space */
+ if (parent->num_children + num_items >=
+ hw->max_children[parent->tx_sched_layer])
+ return ICE_ERR_AQ_FULL;
+
+ buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
+ if (!buf)
+ return ICE_ERR_NO_MEMORY;
+
+ for (i = 0; i < num_items; i++) {
+ node = ice_sched_find_node_by_teid(pi->root, list[i]);
+ if (!node) {
+ status = ICE_ERR_PARAM;
+ goto move_err_exit;
+ }
+
+ buf->hdr.src_parent_teid = node->info.parent_teid;
+ buf->hdr.dest_parent_teid = parent->info.node_teid;
+ buf->teid[0] = node->info.node_teid;
+ buf->hdr.num_elems = CPU_TO_LE16(1);
+ status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
+ &grps_movd, NULL);
+ if (status && grps_movd != 1) {
+ status = ICE_ERR_CFG;
+ goto move_err_exit;
+ }
+
+ /* update the SW DB */
+ ice_sched_update_parent(parent, node);
+ }
+
+move_err_exit:
+ ice_free(hw, buf);
+ return status;
+}
+
+/**
+ * ice_sched_move_vsi_to_agg - move VSI to aggregator node
+ * @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function moves a VSI to an aggregator node or its subtree.
+ * Intermediate nodes may be created if required.
+ */
+static enum ice_status
+ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
+ u8 tc)
+{
+ struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ u32 first_node_teid, vsi_teid;
+ enum ice_status status;
+ u16 num_nodes_added;
+ u8 aggl, vsil, i;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
+ if (!vsi_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ aggl = ice_sched_get_agg_layer(pi->hw);
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+
+ /* set intermediate node count to 1 between aggregator and VSI layers */
+ for (i = aggl + 1; i < vsil; i++)
+ num_nodes[i] = 1;
+
+ /* Check if the aggregator subtree has any free node to add the VSI */
+ for (i = 0; i < agg_node->num_children; i++) {
+ parent = ice_sched_get_free_vsi_parent(pi->hw,
+ agg_node->children[i],
+ num_nodes);
+ if (parent)
+ goto move_nodes;
+ }
+
+ /* add new nodes */
+ parent = agg_node;
+ for (i = aggl + 1; i < vsil; i++) {
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added)
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ else
+ parent = parent->children[0];
+
+ if (!parent)
+ return ICE_ERR_CFG;
+ }
+
+move_nodes:
+ vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
+ return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
+}
+
+/**
* ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
* @pi: port information structure
* @agg_info: aggregator info
@@ -2114,20 +2363,89 @@ ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
}
/**
- * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
* @pi: port information structure
- * @agg_info: aggregator ID
- * @tc: TC number
- * @rm_vsi_info: bool value true or false
+ * @node: node pointer
*
- * This function removes aggregator reference to VSI of given TC. It removes
- * the aggregator configuration completely for requested TC. The caller needs
- * to hold the scheduler lock.
+ * This function checks whether the aggregator is attached with any VSI or not.
*/
-static enum ice_status
-ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
- u8 tc, bool rm_vsi_info)
-{
+static bool
+ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
+{
+ u8 vsil, i;
+
+ vsil = ice_sched_get_vsi_layer(pi->hw);
+ if (node->tx_sched_layer < vsil - 1) {
+ for (i = 0; i < node->num_children; i++)
+ if (ice_sched_is_agg_inuse(pi, node->children[i]))
+ return true;
+ return false;
+ } else {
+ return node->num_children ? true : false;
+ }
+}
+
+/**
+ * ice_sched_rm_agg_cfg - remove the aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function removes the aggregator node and intermediate nodes if any
+ * from the given TC
+ */
+static enum ice_status
+ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *tc_node, *agg_node;
+ struct ice_hw *hw = pi->hw;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ if (!agg_node)
+ return ICE_ERR_DOES_NOT_EXIST;
+
+ /* Can't remove the aggregator node if it has children */
+ if (ice_sched_is_agg_inuse(pi, agg_node))
+ return ICE_ERR_IN_USE;
+
+ /* need to remove the whole subtree if aggregator node is the
+ * only child.
+ */
+ while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
+ struct ice_sched_node *parent = agg_node->parent;
+
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ if (parent->num_children > 1)
+ break;
+
+ agg_node = parent;
+ }
+
+ ice_free_sched_node(pi, agg_node);
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
+ * @pi: port information structure
+ * @agg_info: aggregator ID
+ * @tc: TC number
+ * @rm_vsi_info: bool value true or false
+ *
+ * This function removes aggregator reference to VSI of given TC. It removes
+ * the aggregator configuration completely for requested TC. The caller needs
+ * to hold the scheduler lock.
+ */
+static enum ice_status
+ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
+ u8 tc, bool rm_vsi_info)
+{
enum ice_status status = ICE_SUCCESS;
/* If nothing to remove - return success */
@@ -2172,6 +2490,89 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_add_agg_cfg - create an aggregator node
+ * @pi: port information structure
+ * @agg_id: aggregator ID
+ * @tc: TC number
+ *
+ * This function creates an aggregator node and intermediate nodes if required
+ * for the given TC
+ */
+static enum ice_status
+ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
+{
+ struct ice_sched_node *parent, *agg_node, *tc_node;
+ u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_hw *hw = pi->hw;
+ u32 first_node_teid;
+ u16 num_nodes_added;
+ u8 i, aggl;
+
+ tc_node = ice_sched_get_tc_node(pi, tc);
+ if (!tc_node)
+ return ICE_ERR_CFG;
+
+ agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ /* Does Agg node already exist ? */
+ if (agg_node)
+ return status;
+
+ aggl = ice_sched_get_agg_layer(hw);
+
+ /* need one node in Agg layer */
+ num_nodes[aggl] = 1;
+
+ /* Check whether the intermediate nodes have space to add the
+ * new aggregator. If they are full, then SW needs to allocate a new
+ * intermediate node on those layers
+ */
+ for (i = hw->sw_entry_point_layer; i < aggl; i++) {
+ parent = ice_sched_get_first_node(hw, tc_node, i);
+
+ /* scan all the siblings */
+ while (parent) {
+ if (parent->num_children < hw->max_children[i])
+ break;
+ parent = parent->sibling;
+ }
+
+ /* all the nodes are full, reserve one for this layer */
+ if (!parent)
+ num_nodes[i]++;
+ }
+
+ /* add the aggregator node */
+ parent = tc_node;
+ for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
+ if (!parent)
+ return ICE_ERR_CFG;
+
+ status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
+ num_nodes[i],
+ &first_node_teid,
+ &num_nodes_added);
+ if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
+ return ICE_ERR_CFG;
+
+ /* The newly added node can be a new parent for the next
+ * layer nodes
+ */
+ if (num_nodes_added) {
+ parent = ice_sched_find_node_by_teid(tc_node,
+ first_node_teid);
+ /* register aggregator ID with the aggregator node */
+ if (parent && i == aggl)
+ parent->agg_id = agg_id;
+ } else {
+ parent = parent->children[0];
+ }
+ }
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_sched_cfg_agg - configure aggregator node
* @pi: port information structure
* @agg_id: aggregator ID
@@ -2406,6 +2807,109 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
}
/**
+ * ice_sched_rm_unused_rl_prof - remove unused RL profile
+ * @pi: port information structure
+ *
+ * This function removes unused rate limit profiles from the HW and
+ * SW DB. The caller needs to hold scheduler lock.
+ */
+static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
+{
+ u8 ln;
+
+ for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+ struct ice_aqc_rl_profile_info *rl_prof_elem;
+ struct ice_aqc_rl_profile_info *rl_prof_tmp;
+
+ LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
+ &pi->rl_prof_list[ln],
+ ice_aqc_rl_profile_info, list_entry) {
+ if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
+ ice_debug(pi->hw, ICE_DBG_SCHED,
+ "Removed rl profile\n");
+ }
+ }
+}
+
+/**
+ * ice_sched_update_elem - update element
+ * @hw: pointer to the HW struct
+ * @node: pointer to node
+ * @info: node info to update
+ *
+ * It updates the HW DB, and local SW DB of node. It updates the scheduling
+ * parameters of node from argument info data buffer (Info->data buf) and
+ * returns success or error on config sched element failure. The caller
+ * needs to hold scheduler lock.
+ */
+static enum ice_status
+ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
+ struct ice_aqc_txsched_elem_data *info)
+{
+ struct ice_aqc_conf_elem buf;
+ enum ice_status status;
+ u16 elem_cfgd = 0;
+ u16 num_elems = 1;
+
+ buf.generic[0] = *info;
+ /* Parent TEID is reserved field in this aq call */
+ buf.generic[0].parent_teid = 0;
+ /* Element type is reserved field in this aq call */
+ buf.generic[0].data.elem_type = 0;
+ /* Flags is reserved field in this aq call */
+ buf.generic[0].data.flags = 0;
+
+ /* Update HW DB */
+ /* Configure element node */
+ status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
+ &elem_cfgd, NULL);
+ if (status || elem_cfgd != num_elems) {
+ ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
+ return ICE_ERR_CFG;
+ }
+
+ /* Config success case */
+ /* Now update local SW DB */
+ /* Only copy the data portion of info buffer */
+ node->info.data = info->data;
+ return status;
+}
+
+/**
+ * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
+ * @hw: pointer to the HW struct
+ * @node: sched node to configure
+ * @rl_type: rate limit type CIR, EIR, or shared
+ * @bw_alloc: BW weight/allocation
+ *
+ * This function configures node element's BW allocation.
+ */
+static enum ice_status
+ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
+ enum ice_rl_type rl_type, u8 bw_alloc)
+{
+ struct ice_aqc_txsched_elem_data buf;
+ struct ice_aqc_txsched_elem *data;
+ enum ice_status status;
+
+ buf = node->info;
+ data = &buf.data;
+ if (rl_type == ICE_MIN_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
+ data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else if (rl_type == ICE_MAX_BW) {
+ data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
+ data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
+ } else {
+ return ICE_ERR_PARAM;
+ }
+
+ /* Configure element */
+ status = ice_sched_update_elem(hw, node, &buf);
+ return status;
+}
+
+/**
* ice_move_vsi_to_agg - moves VSI to new or default aggregator
* @pi: port information structure
* @agg_id: aggregator ID
@@ -3372,110 +3876,6 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
}
/**
- * ice_sched_del_rl_profile - remove rl profile
- * @hw: pointer to the hw struct
- * @rl_info: rate limit profile information
- *
- * If the profile id is not referenced anymore, it removes profile id with
- * its associated parameters from hw db,and locally. The caller needs to
- * hold scheduler lock.
- */
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info)
-{
- struct ice_aqc_rl_profile_generic_elem *buf;
- u16 num_profiles_removed;
- enum ice_status status;
- u16 num_profiles = 1;
-
- if (rl_info->prof_id_ref != 0)
- return ICE_ERR_IN_USE;
-
- /* Safe to remove profile id */
- buf = (struct ice_aqc_rl_profile_generic_elem *)
- &rl_info->profile;
- status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
- &num_profiles_removed, NULL);
- if (status || num_profiles_removed != num_profiles)
- return ICE_ERR_CFG;
-
- /* Delete stale entry now */
- LIST_DEL(&rl_info->list_entry);
- ice_free(hw, rl_info);
- return status;
-}
-
-/**
- * ice_sched_rm_unused_rl_prof - remove unused rl profile
- * @pi: port information structure
- *
- * This function removes unused rate limit profiles from the hw and
- * SW DB. The caller needs to hold scheduler lock.
- */
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
-{
- u8 ln;
-
- for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
- struct ice_aqc_rl_profile_info *rl_prof_elem;
- struct ice_aqc_rl_profile_info *rl_prof_tmp;
-
- LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
- &pi->rl_prof_list[ln],
- ice_aqc_rl_profile_info, list_entry) {
- if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
- ice_debug(pi->hw, ICE_DBG_SCHED,
- "Removed rl profile\n");
- }
- }
-}
-
-/**
- * ice_sched_update_elem - update element
- * @hw: pointer to the hw struct
- * @node: pointer to node
- * @info: node info to update
- *
- * It updates the HW DB, and local SW DB of node. It updates the scheduling
- * parameters of node from argument info data buffer (Info->data buf) and
- * returns success or error on config sched element failure. The caller
- * needs to hold scheduler lock.
- */
-static enum ice_status
-ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
- struct ice_aqc_txsched_elem_data *info)
-{
- struct ice_aqc_conf_elem buf;
- enum ice_status status;
- u16 elem_cfgd = 0;
- u16 num_elems = 1;
-
- buf.generic[0] = *info;
- /* Parent teid is reserved field in this aq call */
- buf.generic[0].parent_teid = 0;
- /* Element type is reserved field in this aq call */
- buf.generic[0].data.elem_type = 0;
- /* Flags is reserved field in this aq call */
- buf.generic[0].data.flags = 0;
-
- /* Update HW DB */
- /* Configure element node */
- status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
- &elem_cfgd, NULL);
- if (status || elem_cfgd != num_elems) {
- ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
- return ICE_ERR_CFG;
- }
-
- /* Config success case */
- /* Now update local SW DB */
- /* Only copy the data portion of info buffer */
- node->info.data = info->data;
- return status;
-}
-
-/**
* ice_sched_cfg_node_bw_lmt - configure node sched params
* @hw: pointer to the HW struct
* @node: sched node to configure
@@ -3841,7 +4241,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
* It updates node's BW limit parameters like BW RL profile ID of type CIR,
* EIR, or SRL. The caller needs to hold scheduler lock.
*/
-enum ice_status
+static enum ice_status
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4588,7 +4988,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
/**
* ice_sched_cfg_sibl_node_prio - configure node sibling priority
- * @hw: pointer to the hw struct
+ * @hw: pointer to the HW struct
* @node: sched node to configure
* @priority: sibling priority
*
@@ -4617,406 +5017,6 @@ ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
}
/**
- * ice_sched_cfg_node_bw_alloc - configure node bw weight/alloc params
- * @hw: pointer to the hw struct
- * @node: sched node to configure
- * @rl_type: rate limit type cir, eir, or shared
- * @bw_alloc: bw weight/allocation
- *
- * This function configures node element's bw allocation.
- */
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc)
-{
- struct ice_aqc_txsched_elem_data buf;
- struct ice_aqc_txsched_elem *data;
- enum ice_status status;
-
- buf = node->info;
- data = &buf.data;
- if (rl_type == ICE_MIN_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
- data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else if (rl_type == ICE_MAX_BW) {
- data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
- data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
- } else {
- return ICE_ERR_PARAM;
- }
-
- /* Configure element */
- status = ice_sched_update_elem(hw, node, &buf);
- return status;
-}
-
-/**
- * ice_sched_add_agg_cfg - create an aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function creates an aggregator node and intermediate nodes if required
- * for the given TC
- */
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *parent, *agg_node, *tc_node;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw = pi->hw;
- u32 first_node_teid;
- u16 num_nodes_added;
- u8 i, aggl;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- /* Does Agg node already exist ? */
- if (agg_node)
- return status;
-
- aggl = ice_sched_get_agg_layer(hw);
-
- /* need one node in Agg layer */
- num_nodes[aggl] = 1;
-
- /* Check whether the intermediate nodes have space to add the
- * new agg. If they are full, then SW needs to allocate a new
- * intermediate node on those layers
- */
- for (i = hw->sw_entry_point_layer; i < aggl; i++) {
- parent = ice_sched_get_first_node(hw, tc_node, i);
-
- /* scan all the siblings */
- while (parent) {
- if (parent->num_children < hw->max_children[i])
- break;
- parent = parent->sibling;
- }
-
- /* all the nodes are full, reserve one for this layer */
- if (!parent)
- num_nodes[i]++;
- }
-
- /* add the agg node */
- parent = tc_node;
- for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
- if (!parent)
- return ICE_ERR_CFG;
-
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added) {
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- /* register the aggregator id with the agg node */
- if (parent && i == aggl)
- parent->agg_id = agg_id;
- } else {
- parent = parent->children[0];
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_is_agg_inuse - check whether the agg is in use or not
- * @pi: port information structure
- * @node: node pointer
- *
- * This function checks whether the agg is attached with any vsi or not.
- */
-static bool
-ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
-{
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(pi->hw);
- if (node->tx_sched_layer < vsil - 1) {
- for (i = 0; i < node->num_children; i++)
- if (ice_sched_is_agg_inuse(pi, node->children[i]))
- return true;
- return false;
- } else {
- return node->num_children ? true : false;
- }
-}
-
-/**
- * ice_sched_rm_agg_cfg - remove the aggregator node
- * @pi: port information structure
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function removes the aggregator node and intermediate nodes if any
- * from the given TC
- */
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
-{
- struct ice_sched_node *tc_node, *agg_node;
- struct ice_hw *hw = pi->hw;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- /* Can't remove the agg node if it has children */
- if (ice_sched_is_agg_inuse(pi, agg_node))
- return ICE_ERR_IN_USE;
-
- /* need to remove the whole subtree if agg node is the
- * only child.
- */
- while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
- struct ice_sched_node *parent = agg_node->parent;
-
- if (!parent)
- return ICE_ERR_CFG;
-
- if (parent->num_children > 1)
- break;
-
- agg_node = parent;
- }
-
- ice_free_sched_node(pi, agg_node);
- return ICE_SUCCESS;
-}
-
-/**
- * ice_sched_get_free_vsi_parent - Find a free parent node in agg subtree
- * @hw: pointer to the hw struct
- * @node: pointer to a child node
- * @num_nodes: num nodes count array
- *
- * This function walks through the aggregator subtree to find a free parent
- * node
- */
-static struct ice_sched_node *
-ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
- u16 *num_nodes)
-{
- u8 l = node->tx_sched_layer;
- u8 vsil, i;
-
- vsil = ice_sched_get_vsi_layer(hw);
-
- /* Is it VSI parent layer ? */
- if (l == vsil - 1)
- return (node->num_children < hw->max_children[l]) ? node : NULL;
-
- /* We have intermediate nodes. Let's walk through the subtree. If the
- * intermediate node has space to add a new node then clear the count
- */
- if (node->num_children < hw->max_children[l])
- num_nodes[l] = 0;
- /* The below recursive call is intentional and wouldn't go more than
- * 2 or 3 iterations.
- */
-
- for (i = 0; i < node->num_children; i++) {
- struct ice_sched_node *parent;
-
- parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
- num_nodes);
- if (parent)
- return parent;
- }
-
- return NULL;
-}
-
-/**
- * ice_sched_update_new_parent - update the new parent in SW DB
- * @new_parent: pointer to a new parent node
- * @node: pointer to a child node
- *
- * This function removes the child from the old parent and adds it to a new
- * parent
- */
-static void
-ice_sched_update_parent(struct ice_sched_node *new_parent,
- struct ice_sched_node *node)
-{
- struct ice_sched_node *old_parent;
- u8 i, j;
-
- old_parent = node->parent;
-
- /* update the old parent children */
- for (i = 0; i < old_parent->num_children; i++)
- if (old_parent->children[i] == node) {
- for (j = i + 1; j < old_parent->num_children; j++)
- old_parent->children[j - 1] =
- old_parent->children[j];
- old_parent->num_children--;
- break;
- }
-
- /* now move the node to a new parent */
- new_parent->children[new_parent->num_children++] = node;
- node->parent = new_parent;
- node->info.parent_teid = new_parent->info.node_teid;
-}
-
-/**
- * ice_sched_move_nodes - move child nodes to a given parent
- * @pi: port information structure
- * @parent: pointer to parent node
- * @num_items: number of child nodes to be moved
- * @list: pointer to child node teids
- *
- * This function move the child nodes to a given parent.
- */
-static enum ice_status
-ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
- u16 num_items, u32 *list)
-{
- struct ice_aqc_move_elem *buf;
- struct ice_sched_node *node;
- enum ice_status status = ICE_SUCCESS;
- struct ice_hw *hw;
- u16 grps_movd = 0;
- u8 i;
-
- hw = pi->hw;
-
- if (!parent || !num_items)
- return ICE_ERR_PARAM;
-
- /* Does parent have enough space */
- if (parent->num_children + num_items >=
- hw->max_children[parent->tx_sched_layer])
- return ICE_ERR_AQ_FULL;
-
- buf = (struct ice_aqc_move_elem *) ice_malloc(hw, sizeof(*buf));
- if (!buf)
- return ICE_ERR_NO_MEMORY;
-
- for (i = 0; i < num_items; i++) {
- node = ice_sched_find_node_by_teid(pi->root, list[i]);
- if (!node) {
- status = ICE_ERR_PARAM;
- goto move_err_exit;
- }
-
- buf->hdr.src_parent_teid = node->info.parent_teid;
- buf->hdr.dest_parent_teid = parent->info.node_teid;
- buf->teid[0] = node->info.node_teid;
- buf->hdr.num_elems = CPU_TO_LE16(1);
- status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
- &grps_movd, NULL);
- if (status && grps_movd != 1) {
- status = ICE_ERR_CFG;
- goto move_err_exit;
- }
-
- /* update the SW DB */
- ice_sched_update_parent(parent, node);
- }
-
-move_err_exit:
- ice_free(hw, buf);
- return status;
-}
-
-/**
- * ice_sched_move_vsi_to_agg - move VSI to aggregator node
- * @pi: port information structure
- * @vsi_handle: software VSI handle
- * @agg_id: aggregator id
- * @tc: TC number
- *
- * This function moves a VSI to an aggregator node or its subtree.
- * Intermediate nodes may be created if required.
- */
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc)
-{
- struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
- u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- u32 first_node_teid, vsi_teid;
- enum ice_status status;
- u16 num_nodes_added;
- u8 aggl, vsil, i;
-
- tc_node = ice_sched_get_tc_node(pi, tc);
- if (!tc_node)
- return ICE_ERR_CFG;
-
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
- if (!agg_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
- if (!vsi_node)
- return ICE_ERR_DOES_NOT_EXIST;
-
- aggl = ice_sched_get_agg_layer(pi->hw);
- vsil = ice_sched_get_vsi_layer(pi->hw);
-
- /* initialize intermediate node count to 1 between agg and VSI layers */
- for (i = aggl + 1; i < vsil; i++)
- num_nodes[i] = 1;
-
- /* Check whether the agg subtree has any free node to add the VSI */
- for (i = 0; i < agg_node->num_children; i++) {
- parent = ice_sched_get_free_vsi_parent(pi->hw,
- agg_node->children[i],
- num_nodes);
- if (parent)
- goto move_nodes;
- }
-
- /* add new nodes */
- parent = agg_node;
- for (i = aggl + 1; i < vsil; i++) {
- status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
- num_nodes[i],
- &first_node_teid,
- &num_nodes_added);
- if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
- return ICE_ERR_CFG;
-
- /* The newly added node can be a new parent for the next
- * layer nodes
- */
- if (num_nodes_added)
- parent = ice_sched_find_node_by_teid(tc_node,
- first_node_teid);
- else
- parent = parent->children[0];
-
- if (!parent)
- return ICE_ERR_CFG;
- }
-
-move_nodes:
- vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
- return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
-}
-
-/**
* ice_cfg_rl_burst_size - Set burst size value
* @hw: pointer to the HW struct
* @bytes: burst size in bytes
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 61fa6a85b..09de765ff 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -76,10 +76,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
-ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
- struct ice_aqc_move_elem *buf, u16 buf_size,
- u16 *grps_movd, struct ice_sq_cd *cd);
-enum ice_status
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_get_elem *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd);
@@ -109,9 +105,6 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable);
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
struct ice_sched_node *
-ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
- u32 agg_id);
-struct ice_sched_node *
ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
u16 vsi_handle);
bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
@@ -177,9 +170,6 @@ bool
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
struct ice_sched_node *node);
enum ice_status
-ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u32 bw);
-enum ice_status
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
@@ -193,18 +183,4 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);
enum ice_status
ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
u8 priority);
-enum ice_status
-ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc);
-enum ice_status
-ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc);
-enum ice_status
-ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
- u8 tc);
-enum ice_status
-ice_sched_del_rl_profile(struct ice_hw *hw,
- struct ice_aqc_rl_profile_info *rl_info);
-void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi);
#endif /* _ICE_SCHED_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 19/38] net/ice/base: enable VSI queue context
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (18 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 18/38] net/ice/base: clean code Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 20/38] net/ice/base: ensure only valid bits are set Qi Zhang
` (19 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
The patch added to retrieve the queue context and update the queue
handle for lan queues.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 60 ++++++++++++++++++++++++++++++++++++---
drivers/net/ice/base/ice_common.h | 11 +++----
drivers/net/ice/ice_rxtx.c | 13 ++++++---
3 files changed, 71 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e0fe06e9c..f5cbd47c3 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3512,10 +3512,35 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
}
/**
+ * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
+ * @q_handle: software queue handle
+ */
+static struct ice_q_ctx *
+ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ struct ice_q_ctx *q_ctx;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return NULL;
+ if (q_handle >= vsi->num_lan_q_entries[tc])
+ return NULL;
+ if (!vsi->lan_q_ctx[tc])
+ return NULL;
+ q_ctx = vsi->lan_q_ctx[tc];
+ return &q_ctx[q_handle];
+}
+
+/**
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: TC number
+ * @q_handle: software queue handle
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
@@ -3524,12 +3549,13 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
* This function adds one LAN queue
*/
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_txsched_elem_data node = { 0 };
struct ice_sched_node *parent;
+ struct ice_q_ctx *q_ctx;
enum ice_status status;
struct ice_hw *hw;
@@ -3546,6 +3572,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
ice_acquire_lock(&pi->sched_lock);
+ q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle);
+ if (!q_ctx) {
+ ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n",
+ q_handle);
+ status = ICE_ERR_PARAM;
+ goto ena_txq_exit;
+ }
+
/* find a parent node */
parent = ice_sched_get_free_qparent(pi, vsi_handle, tc,
ICE_SCHED_NODE_OWNER_LAN);
@@ -3580,6 +3614,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
+ q_ctx->q_handle = q_handle;
/* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
@@ -3592,7 +3627,10 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
/**
* ice_dis_vsi_txq
* @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
* @num_queues: number of queues
+ * @q_handles: pointer to software queue handle array
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
* @rst_src: if called due to reset, specifies the reset source
@@ -3602,12 +3640,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* This function removes queues and their corresponding nodes in SW DB
*/
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handles, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd)
{
enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_aqc_dis_txq_item qg_list;
+ struct ice_q_ctx *q_ctx;
u16 i;
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
@@ -3630,6 +3670,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
if (!node)
continue;
+ q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);
+ if (!q_ctx) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
+ q_handles[i]);
+ continue;
+ }
+ if (q_ctx->q_handle != q_handles[i]) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
+ q_ctx->q_handle, q_handles[i]);
+ continue;
+ }
qg_list.parent_teid = node->info.parent_teid;
qg_list.num_qs = 1;
qg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);
@@ -3640,6 +3691,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
if (status != ICE_SUCCESS)
break;
ice_free_sched_node(pi, node);
+ q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
}
ice_release_lock(&pi->sched_lock);
return status;
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 63f4a5ebe..72560fbbf 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -157,15 +157,16 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
- struct ice_sq_cd *cmd_details);
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handle, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ struct ice_sq_cd *cd);
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
u16 *max_lanqs);
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
void ice_replay_post(struct ice_hw *hw);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index c794ee861..0dd4084b1 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -453,8 +453,9 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
/* Init the Tx tail register*/
ICE_PCI_REG_WRITE(txq->qtx_tail, 0);
- err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, 1, &txq_elem,
- sizeof(txq_elem), NULL);
+ /* Fix me, we assume TC always 0 here */
+ err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, tx_queue_id, 1,
+ &txq_elem, sizeof(txq_elem), NULL);
if (err) {
PMD_DRV_LOG(ERR, "Failed to add lan txq");
return -EIO;
@@ -528,9 +529,12 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct ice_tx_queue *txq;
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct ice_vsi *vsi = pf->main_vsi;
enum ice_status status;
uint16_t q_ids[1];
uint32_t q_teids[1];
+ uint16_t q_handle = tx_queue_id;
if (tx_queue_id >= dev->data->nb_tx_queues) {
PMD_DRV_LOG(ERR, "TX queue %u is out of range %u",
@@ -548,8 +552,9 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
q_ids[0] = txq->reg_idx;
q_teids[0] = txq->q_teid;
- status = ice_dis_vsi_txq(hw->port_info, 1, q_ids, q_teids,
- ICE_NO_RESET, 0, NULL);
+ /* Fix me, we assume TC always 0 here */
+ status = ice_dis_vsi_txq(hw->port_info, vsi->idx, 0, 1, &q_handle,
+ q_ids, q_teids, ICE_NO_RESET, 0, NULL);
if (status != ICE_SUCCESS) {
PMD_DRV_LOG(DEBUG, "Failed to disable Lan Tx queue");
return -EINVAL;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 19/38] net/ice/base: enable VSI queue context
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 19/38] net/ice/base: enable VSI queue context Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
The patch added to retrieve the queue context and update the queue
handle for lan queues.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 60 ++++++++++++++++++++++++++++++++++++---
drivers/net/ice/base/ice_common.h | 11 +++----
drivers/net/ice/ice_rxtx.c | 13 ++++++---
3 files changed, 71 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e0fe06e9c..f5cbd47c3 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3512,10 +3512,35 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
}
/**
+ * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
+ * @hw: pointer to the HW struct
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
+ * @q_handle: software queue handle
+ */
+static struct ice_q_ctx *
+ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)
+{
+ struct ice_vsi_ctx *vsi;
+ struct ice_q_ctx *q_ctx;
+
+ vsi = ice_get_vsi_ctx(hw, vsi_handle);
+ if (!vsi)
+ return NULL;
+ if (q_handle >= vsi->num_lan_q_entries[tc])
+ return NULL;
+ if (!vsi->lan_q_ctx[tc])
+ return NULL;
+ q_ctx = vsi->lan_q_ctx[tc];
+ return &q_ctx[q_handle];
+}
+
+/**
* ice_ena_vsi_txq
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: TC number
+ * @q_handle: software queue handle
* @num_qgrps: Number of added queue groups
* @buf: list of queue groups to be added
* @buf_size: size of buffer for indirect command
@@ -3524,12 +3549,13 @@ ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info)
* This function adds one LAN queue
*/
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_txsched_elem_data node = { 0 };
struct ice_sched_node *parent;
+ struct ice_q_ctx *q_ctx;
enum ice_status status;
struct ice_hw *hw;
@@ -3546,6 +3572,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
ice_acquire_lock(&pi->sched_lock);
+ q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle);
+ if (!q_ctx) {
+ ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n",
+ q_handle);
+ status = ICE_ERR_PARAM;
+ goto ena_txq_exit;
+ }
+
/* find a parent node */
parent = ice_sched_get_free_qparent(pi, vsi_handle, tc,
ICE_SCHED_NODE_OWNER_LAN);
@@ -3580,6 +3614,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
node.node_teid = buf->txqs[0].q_teid;
node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
+ q_ctx->q_handle = q_handle;
/* add a leaf node into schduler tree queue layer */
status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node);
@@ -3592,7 +3627,10 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
/**
* ice_dis_vsi_txq
* @pi: port information structure
+ * @vsi_handle: software VSI handle
+ * @tc: TC number
* @num_queues: number of queues
+ * @q_handles: pointer to software queue handle array
* @q_ids: pointer to the q_id array
* @q_teids: pointer to queue node teids
* @rst_src: if called due to reset, specifies the reset source
@@ -3602,12 +3640,14 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
* This function removes queues and their corresponding nodes in SW DB
*/
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handles, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd)
{
enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_aqc_dis_txq_item qg_list;
+ struct ice_q_ctx *q_ctx;
u16 i;
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
@@ -3630,6 +3670,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
if (!node)
continue;
+ q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);
+ if (!q_ctx) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
+ q_handles[i]);
+ continue;
+ }
+ if (q_ctx->q_handle != q_handles[i]) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
+ q_ctx->q_handle, q_handles[i]);
+ continue;
+ }
qg_list.parent_teid = node->info.parent_teid;
qg_list.num_qs = 1;
qg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);
@@ -3640,6 +3691,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
if (status != ICE_SUCCESS)
break;
ice_free_sched_node(pi, node);
+ q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
}
ice_release_lock(&pi->sched_lock);
return status;
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 63f4a5ebe..72560fbbf 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -157,15 +157,16 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
enum ice_status
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
enum ice_status
-ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
- u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
- struct ice_sq_cd *cmd_details);
+ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
+ u16 *q_handle, u16 *q_ids, u32 *q_teids,
+ enum ice_disq_rst_src rst_src, u16 vmvf_num,
+ struct ice_sq_cd *cd);
enum ice_status
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
u16 *max_lanqs);
enum ice_status
-ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
- struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
+ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
+ u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
void ice_replay_post(struct ice_hw *hw);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index c794ee861..0dd4084b1 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -453,8 +453,9 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
/* Init the Tx tail register*/
ICE_PCI_REG_WRITE(txq->qtx_tail, 0);
- err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, 1, &txq_elem,
- sizeof(txq_elem), NULL);
+ /* Fix me, we assume TC always 0 here */
+ err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, tx_queue_id, 1,
+ &txq_elem, sizeof(txq_elem), NULL);
if (err) {
PMD_DRV_LOG(ERR, "Failed to add lan txq");
return -EIO;
@@ -528,9 +529,12 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
{
struct ice_tx_queue *txq;
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct ice_vsi *vsi = pf->main_vsi;
enum ice_status status;
uint16_t q_ids[1];
uint32_t q_teids[1];
+ uint16_t q_handle = tx_queue_id;
if (tx_queue_id >= dev->data->nb_tx_queues) {
PMD_DRV_LOG(ERR, "TX queue %u is out of range %u",
@@ -548,8 +552,9 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
q_ids[0] = txq->reg_idx;
q_teids[0] = txq->q_teid;
- status = ice_dis_vsi_txq(hw->port_info, 1, q_ids, q_teids,
- ICE_NO_RESET, 0, NULL);
+ /* Fix me, we assume TC always 0 here */
+ status = ice_dis_vsi_txq(hw->port_info, vsi->idx, 0, 1, &q_handle,
+ q_ids, q_teids, ICE_NO_RESET, 0, NULL);
if (status != ICE_SUCCESS) {
PMD_DRV_LOG(DEBUG, "Failed to disable Lan Tx queue");
return -EINVAL;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 20/38] net/ice/base: ensure only valid bits are set
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (19 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 19/38] net/ice/base: enable VSI queue context Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 21/38] net/ice/base: enhance get link status command Qi Zhang
` (18 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Chinh T Cao
In the ice_aq_set_phy_cfg AQ command, the 16.4 bit is reserved.
This patch will make sure that this bit will never be set to 1.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 1 +
drivers/net/ice/base/ice_common.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ca3d40c8b..70cd0604b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1327,6 +1327,7 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
+#define ICE_AQ_PHY_ENA_VALID_MASK MAKEMASK(0xef, 0)
#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index f5cbd47c3..1c381b5e2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2351,6 +2351,15 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport,
if (!cfg)
return ICE_ERR_PARAM;
+ /* Ensure that only valid bits of cfg->caps can be turned on. */
+ if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
+ ice_debug(hw, ICE_DBG_PHY,
+ "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
+ cfg->caps);
+
+ cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
+ }
+
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg);
desc.params.set_phy.lport_num = lport;
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 20/38] net/ice/base: ensure only valid bits are set
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 20/38] net/ice/base: ensure only valid bits are set Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Chinh T Cao
In the ice_aq_set_phy_cfg AQ command, the 16.4 bit is reserved.
This patch will make sure that this bit will never be set to 1.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 1 +
drivers/net/ice/base/ice_common.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ca3d40c8b..70cd0604b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1327,6 +1327,7 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
+#define ICE_AQ_PHY_ENA_VALID_MASK MAKEMASK(0xef, 0)
#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index f5cbd47c3..1c381b5e2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2351,6 +2351,15 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport,
if (!cfg)
return ICE_ERR_PARAM;
+ /* Ensure that only valid bits of cfg->caps can be turned on. */
+ if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
+ ice_debug(hw, ICE_DBG_PHY,
+ "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
+ cfg->caps);
+
+ cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
+ }
+
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg);
desc.params.set_phy.lport_num = lport;
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 21/38] net/ice/base: enhance get link status command
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (20 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 20/38] net/ice/base: ensure only valid bits are set Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 22/38] net/ice/base: add RSS key related macro and structures Qi Zhang
` (17 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Matthew Vick
Extend the functionality of the admin queue command by including
additional status and ID bits to improve link topology configuration.
Signed-off-by: Matthew Vick <matthew.vick@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 70cd0604b..cb1e1ca1a 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1399,7 +1399,12 @@ struct ice_aqc_get_link_status_data {
#define ICE_AQ_LINK_TOPO_CONFLICT BIT(0)
#define ICE_AQ_LINK_MEDIA_CONFLICT BIT(1)
#define ICE_AQ_LINK_TOPO_CORRUPT BIT(2)
- u8 reserved1;
+#define ICE_AQ_LINK_TOPO_UNREACH_PRT BIT(4)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_PRT BIT(5)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA BIT(6)
+#define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA BIT(7)
+ u8 link_cfg_err;
+#define ICE_AQ_LINK_CFG_ERR BIT(0)
u8 link_info;
#define ICE_AQ_LINK_UP BIT(0) /* Link Status */
#define ICE_AQ_LINK_FAULT BIT(1)
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 21/38] net/ice/base: enhance get link status command
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 21/38] net/ice/base: enhance get link status command Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Matthew Vick
Extend the functionality of the admin queue command by including
additional status and ID bits to improve link topology configuration.
Signed-off-by: Matthew Vick <matthew.vick@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 70cd0604b..cb1e1ca1a 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1399,7 +1399,12 @@ struct ice_aqc_get_link_status_data {
#define ICE_AQ_LINK_TOPO_CONFLICT BIT(0)
#define ICE_AQ_LINK_MEDIA_CONFLICT BIT(1)
#define ICE_AQ_LINK_TOPO_CORRUPT BIT(2)
- u8 reserved1;
+#define ICE_AQ_LINK_TOPO_UNREACH_PRT BIT(4)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_PRT BIT(5)
+#define ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA BIT(6)
+#define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA BIT(7)
+ u8 link_cfg_err;
+#define ICE_AQ_LINK_CFG_ERR BIT(0)
u8 link_info;
#define ICE_AQ_LINK_UP BIT(0) /* Link Status */
#define ICE_AQ_LINK_FAULT BIT(1)
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 22/38] net/ice/base: add RSS key related macro and structures
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (21 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 21/38] net/ice/base: enhance get link status command Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 23/38] net/ice/base: do not write TCAM entries back Qi Zhang
` (16 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Paul Greenwalt
Add define for 52 byte RSS hash key size, and add struct
ice_aqc_get_set_rss_keys comments regarding setting 40 bytes and
52 byte hash key.
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index cb1e1ca1a..ed7dfae8c 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1593,7 +1593,20 @@ struct ice_aqc_get_set_rss_key {
#define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28
#define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC
+#define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \
+ (ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE + \
+ ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE)
+/**
+ * struct ice_aqc_get_set_rss_keys - Get/Set RSS hash key command buffer
+ * @standard_rss_key: 40 most significant bytes of hash key
+ * @extended_hash_key: 12 least significant bytes of hash key
+ *
+ * Set/Get 40 byte hash key using standard_rss_key field, and set
+ * extended_hash_key field to zero. Set/Get 52 byte hash key using
+ * standard_rss_key field for 40 most significant bytes and the
+ * extended_hash_key field for the 12 least significant bytes of hash key.
+ */
struct ice_aqc_get_set_rss_keys {
u8 standard_rss_key[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 22/38] net/ice/base: add RSS key related macro and structures
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 22/38] net/ice/base: add RSS key related macro and structures Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Paul Greenwalt
Add define for 52 byte RSS hash key size, and add struct
ice_aqc_get_set_rss_keys comments regarding setting 40 bytes and
52 byte hash key.
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index cb1e1ca1a..ed7dfae8c 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1593,7 +1593,20 @@ struct ice_aqc_get_set_rss_key {
#define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28
#define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC
+#define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \
+ (ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE + \
+ ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE)
+/**
+ * struct ice_aqc_get_set_rss_keys - Get/Set RSS hash key command buffer
+ * @standard_rss_key: 40 most significant bytes of hash key
+ * @extended_hash_key: 12 least significant bytes of hash key
+ *
+ * Set/Get 40 byte hash key using standard_rss_key field, and set
+ * extended_hash_key field to zero. Set/Get 52 byte hash key using
+ * standard_rss_key field for 40 most significant bytes and the
+ * extended_hash_key field for the 12 least significant bytes of hash key.
+ */
struct ice_aqc_get_set_rss_keys {
u8 standard_rss_key[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 23/38] net/ice/base: do not write TCAM entries back
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (22 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 22/38] net/ice/base: add RSS key related macro and structures Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 24/38] net/ice/base: remove local VSIG allocations Qi Zhang
` (15 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Profile TCAM entry removal is handled by the firmware when
freeing the resource, so the driver does not need to write these
default entries back with an update Package action.
This patch removes writing of the TCAM entry using Update Package
command when removing it, since the entry has already been freed
by firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 41 +++++++++---------------------------
drivers/net/ice/base/ice_flex_type.h | 2 --
2 files changed, 10 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index ff615f94f..900a19387 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -3558,8 +3558,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
struct ice_chs_chg *tmp;
LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
- if ((tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) ||
- tmp->type == ICE_TCAM_REM) {
+ if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
struct ice_prof_id_section *p;
u32 id;
@@ -3689,7 +3688,6 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
es++;
break;
case ICE_TCAM_ADD:
- case ICE_TCAM_REM:
tcam++;
break;
case ICE_VSIG_ADD:
@@ -3962,46 +3960,27 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
* ice_rem_prof_id - remove one profile from a VSIG
* @hw: pointer to the HW struct
* @blk: hardware block
- * @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
- * @chg: pointer to list to record changes
*/
static enum ice_status
-ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
- struct ice_vsig_prof *prof, struct LIST_HEAD_TYPE *chg)
+ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
+ struct ice_vsig_prof *prof)
{
enum ice_status status;
- struct ice_chs_chg *p;
u16 i;
for (i = 0; i < prof->tcam_count; i++) {
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_prof_id;
-
- p->type = ICE_TCAM_REM;
- p->vsig = vsig;
- p->prof_id = prof->tcam[i].prof_id;
- p->tcam_idx = prof->tcam[i].tcam_idx;
-
- p->ptg = prof->tcam[i].ptg;
prof->tcam[i].in_use = false;
- p->orig_ent = hw->blk[blk].prof.t[p->tcam_idx];
- status = ice_rel_tcam_idx(hw, blk, p->tcam_idx);
+ status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
if (!status)
- status = ice_prof_dec_ref(hw, blk, p->prof_id);
-
- LIST_ADD(&p->list_entry, chg);
+ status = ice_prof_dec_ref(hw, blk,
+ prof->tcam[i].prof_id);
if (status)
- goto err_ice_rem_prof_id;
+ return ICE_ERR_HW_TABLE;
}
return ICE_SUCCESS;
-
-err_ice_rem_prof_id:
- /* caller will clean up the change list */
- return ICE_ERR_NO_MEMORY;
}
/**
@@ -4024,9 +4003,9 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
LIST_FOR_EACH_ENTRY_SAFE(d, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list) {
- status = ice_rem_prof_id(hw, blk, vsig, d, chg);
+ status = ice_rem_prof_id(hw, blk, d);
if (status)
- goto err_ice_rem_vsig;
+ return status;
LIST_DEL(&d->list);
ice_free(hw, d);
@@ -4090,7 +4069,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* this is the last profile, remove the VSIG */
return ice_rem_vsig(hw, blk, vsig, chg);
- status = ice_rem_prof_id(hw, blk, vsig, p, chg);
+ status = ice_rem_prof_id(hw, blk, p);
if (!status) {
LIST_DEL(&p->list);
ice_free(hw, p);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index aed23a067..1bb865896 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -676,7 +676,6 @@ enum ice_chg_type {
ICE_TCAM_NONE = 0,
ICE_PTG_ES_ADD,
ICE_TCAM_ADD,
- ICE_TCAM_REM,
ICE_VSIG_ADD,
ICE_VSIG_REM,
ICE_VSI_MOVE,
@@ -697,7 +696,6 @@ struct ice_chs_chg {
u16 vsig;
u16 orig_vsig;
u16 tcam_idx;
- struct ice_prof_tcam_entry orig_ent;
};
#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 23/38] net/ice/base: do not write TCAM entries back
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 23/38] net/ice/base: do not write TCAM entries back Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Profile TCAM entry removal is handled by the firmware when
freeing the resource, so the driver does not need to write these
default entries back with an update Package action.
This patch removes writing of the TCAM entry using Update Package
command when removing it, since the entry has already been freed
by firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 41 +++++++++---------------------------
drivers/net/ice/base/ice_flex_type.h | 2 --
2 files changed, 10 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index ff615f94f..900a19387 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -3558,8 +3558,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
struct ice_chs_chg *tmp;
LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
- if ((tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) ||
- tmp->type == ICE_TCAM_REM) {
+ if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
struct ice_prof_id_section *p;
u32 id;
@@ -3689,7 +3688,6 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
es++;
break;
case ICE_TCAM_ADD:
- case ICE_TCAM_REM:
tcam++;
break;
case ICE_VSIG_ADD:
@@ -3962,46 +3960,27 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
* ice_rem_prof_id - remove one profile from a VSIG
* @hw: pointer to the HW struct
* @blk: hardware block
- * @vsig: VSIG to remove the profile from
* @prof: pointer to profile structure to remove
- * @chg: pointer to list to record changes
*/
static enum ice_status
-ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk, u16 vsig,
- struct ice_vsig_prof *prof, struct LIST_HEAD_TYPE *chg)
+ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
+ struct ice_vsig_prof *prof)
{
enum ice_status status;
- struct ice_chs_chg *p;
u16 i;
for (i = 0; i < prof->tcam_count; i++) {
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_prof_id;
-
- p->type = ICE_TCAM_REM;
- p->vsig = vsig;
- p->prof_id = prof->tcam[i].prof_id;
- p->tcam_idx = prof->tcam[i].tcam_idx;
-
- p->ptg = prof->tcam[i].ptg;
prof->tcam[i].in_use = false;
- p->orig_ent = hw->blk[blk].prof.t[p->tcam_idx];
- status = ice_rel_tcam_idx(hw, blk, p->tcam_idx);
+ status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
if (!status)
- status = ice_prof_dec_ref(hw, blk, p->prof_id);
-
- LIST_ADD(&p->list_entry, chg);
+ status = ice_prof_dec_ref(hw, blk,
+ prof->tcam[i].prof_id);
if (status)
- goto err_ice_rem_prof_id;
+ return ICE_ERR_HW_TABLE;
}
return ICE_SUCCESS;
-
-err_ice_rem_prof_id:
- /* caller will clean up the change list */
- return ICE_ERR_NO_MEMORY;
}
/**
@@ -4024,9 +4003,9 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
LIST_FOR_EACH_ENTRY_SAFE(d, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list) {
- status = ice_rem_prof_id(hw, blk, vsig, d, chg);
+ status = ice_rem_prof_id(hw, blk, d);
if (status)
- goto err_ice_rem_vsig;
+ return status;
LIST_DEL(&d->list);
ice_free(hw, d);
@@ -4090,7 +4069,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* this is the last profile, remove the VSIG */
return ice_rem_vsig(hw, blk, vsig, chg);
- status = ice_rem_prof_id(hw, blk, vsig, p, chg);
+ status = ice_rem_prof_id(hw, blk, p);
if (!status) {
LIST_DEL(&p->list);
ice_free(hw, p);
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index aed23a067..1bb865896 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -676,7 +676,6 @@ enum ice_chg_type {
ICE_TCAM_NONE = 0,
ICE_PTG_ES_ADD,
ICE_TCAM_ADD,
- ICE_TCAM_REM,
ICE_VSIG_ADD,
ICE_VSIG_REM,
ICE_VSI_MOVE,
@@ -697,7 +696,6 @@ struct ice_chs_chg {
u16 vsig;
u16 orig_vsig;
u16 tcam_idx;
- struct ice_prof_tcam_entry orig_ent;
};
#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 24/38] net/ice/base: remove local VSIG allocations
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (23 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 23/38] net/ice/base: do not write TCAM entries back Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 25/38] net/ice/base: fix minor issues Qi Zhang
` (14 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
If allocating a VSI to a VSIG fails the local allocations made for VSIG
profiles and change-lists will not be removed. Adding calls to free these
entries on error in VSIG management calls.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 900a19387..887609204 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4523,8 +4523,10 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
- if (status)
+ if (status) {
+ ice_free(hw, p);
goto err_ice_add_prof_id_vsig;
+ }
t->tcam[i].ptg = ptg;
t->tcam[i].prof_id = map->prof_id;
@@ -4563,6 +4565,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
err_ice_add_prof_id_vsig:
/* let caller clean up the change list */
+ ice_free(hw, t);
return ICE_ERR_NO_MEMORY;
}
@@ -4587,16 +4590,18 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
return ICE_ERR_NO_MEMORY;
new_vsig = ice_vsig_alloc(hw, blk);
- if (!new_vsig)
- return ICE_ERR_HW_TABLE;
+ if (!new_vsig) {
+ status = ICE_ERR_HW_TABLE;
+ goto err_ice_create_prof_id_vsig;
+ }
status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
p->type = ICE_VSIG_ADD;
p->vsi = vsi;
@@ -4606,6 +4611,11 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
LIST_ADD(&p->list_entry, chg);
return ICE_SUCCESS;
+
+err_ice_create_prof_id_vsig:
+ /* let caller clean up the change list */
+ ice_free(hw, p);
+ return status;
}
/**
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 24/38] net/ice/base: remove local VSIG allocations
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 24/38] net/ice/base: remove local VSIG allocations Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
If allocating a VSI to a VSIG fails the local allocations made for VSIG
profiles and change-lists will not be removed. Adding calls to free these
entries on error in VSIG management calls.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 900a19387..887609204 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4523,8 +4523,10 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
/* allocate the TCAM entry index */
status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
- if (status)
+ if (status) {
+ ice_free(hw, p);
goto err_ice_add_prof_id_vsig;
+ }
t->tcam[i].ptg = ptg;
t->tcam[i].prof_id = map->prof_id;
@@ -4563,6 +4565,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
err_ice_add_prof_id_vsig:
/* let caller clean up the change list */
+ ice_free(hw, t);
return ICE_ERR_NO_MEMORY;
}
@@ -4587,16 +4590,18 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
return ICE_ERR_NO_MEMORY;
new_vsig = ice_vsig_alloc(hw, blk);
- if (!new_vsig)
- return ICE_ERR_HW_TABLE;
+ if (!new_vsig) {
+ status = ICE_ERR_HW_TABLE;
+ goto err_ice_create_prof_id_vsig;
+ }
status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, chg);
if (status)
- return status;
+ goto err_ice_create_prof_id_vsig;
p->type = ICE_VSIG_ADD;
p->vsi = vsi;
@@ -4606,6 +4611,11 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
LIST_ADD(&p->list_entry, chg);
return ICE_SUCCESS;
+
+err_ice_create_prof_id_vsig:
+ /* let caller clean up the change list */
+ ice_free(hw, p);
+ return status;
}
/**
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 25/38] net/ice/base: fix minor issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (24 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 24/38] net/ice/base: remove local VSIG allocations Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 26/38] net/ice/base: update copyright time Qi Zhang
` (13 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Fix some problems with filling the HW tables.
2. Fix a logic error in ice_rem_prof_from_list.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 887609204..1dd121b28 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2935,9 +2935,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
while (sect) {
switch (sid) {
+ case ICE_SID_XLT1_SW:
case ICE_SID_XLT1_FD:
case ICE_SID_XLT1_RSS:
case ICE_SID_XLT1_ACL:
+ case ICE_SID_XLT1_PE:
xlt1 = (struct ice_xlt1_section *)sect;
src = xlt1->value;
sect_len = LE16_TO_CPU(xlt1->count) *
@@ -2946,9 +2948,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt1.count *
sizeof(*hw->blk[block_id].xlt1.t);
break;
+ case ICE_SID_XLT2_SW:
case ICE_SID_XLT2_FD:
case ICE_SID_XLT2_RSS:
case ICE_SID_XLT2_ACL:
+ case ICE_SID_XLT2_PE:
xlt2 = (struct ice_xlt2_section *)sect;
src = (u8 *)xlt2->value;
sect_len = LE16_TO_CPU(xlt2->count) *
@@ -2957,9 +2961,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt2.count *
sizeof(*hw->blk[block_id].xlt2.t);
break;
+ case ICE_SID_PROFID_TCAM_SW:
case ICE_SID_PROFID_TCAM_FD:
case ICE_SID_PROFID_TCAM_RSS:
case ICE_SID_PROFID_TCAM_ACL:
+ case ICE_SID_PROFID_TCAM_PE:
pid = (struct ice_prof_id_section *)sect;
src = (u8 *)pid->entry;
sect_len = LE16_TO_CPU(pid->count) *
@@ -2968,9 +2974,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof.count *
sizeof(*hw->blk[block_id].prof.t);
break;
+ case ICE_SID_PROFID_REDIR_SW:
case ICE_SID_PROFID_REDIR_FD:
case ICE_SID_PROFID_REDIR_RSS:
case ICE_SID_PROFID_REDIR_ACL:
+ case ICE_SID_PROFID_REDIR_PE:
pr = (struct ice_prof_redir_section *)sect;
src = pr->redir_value;
sect_len = LE16_TO_CPU(pr->count) *
@@ -2979,15 +2987,19 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof_redir.count *
sizeof(*hw->blk[block_id].prof_redir.t);
break;
+ case ICE_SID_FLD_VEC_SW:
case ICE_SID_FLD_VEC_FD:
case ICE_SID_FLD_VEC_RSS:
case ICE_SID_FLD_VEC_ACL:
+ case ICE_SID_FLD_VEC_PE:
es = (struct ice_sw_fv_section *)sect;
src = (u8 *)es->fv;
sect_len = LE16_TO_CPU(es->count) *
- sizeof(*hw->blk[block_id].prof_redir.t);
+ hw->blk[block_id].es.fvw *
+ sizeof(*hw->blk[block_id].es.t);
dst = (u8 *)hw->blk[block_id].es.t;
dst_len = hw->blk[block_id].es.count *
+ hw->blk[block_id].es.fvw *
sizeof(*hw->blk[block_id].es.t);
break;
default:
@@ -4964,8 +4976,8 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
goto err_ice_rem_prof_id_flow;
- } else if (ice_find_dup_props_vsig(hw, blk, ©,
- &vsig)) {
+ } else if (!ice_find_dup_props_vsig(hw, blk, ©,
+ &vsig)) {
/* found an exact match */
/* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 25/38] net/ice/base: fix minor issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 25/38] net/ice/base: fix minor issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. Fix some problems with filling the HW tables.
2. Fix a logic error in ice_rem_prof_from_list.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 887609204..1dd121b28 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2935,9 +2935,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
while (sect) {
switch (sid) {
+ case ICE_SID_XLT1_SW:
case ICE_SID_XLT1_FD:
case ICE_SID_XLT1_RSS:
case ICE_SID_XLT1_ACL:
+ case ICE_SID_XLT1_PE:
xlt1 = (struct ice_xlt1_section *)sect;
src = xlt1->value;
sect_len = LE16_TO_CPU(xlt1->count) *
@@ -2946,9 +2948,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt1.count *
sizeof(*hw->blk[block_id].xlt1.t);
break;
+ case ICE_SID_XLT2_SW:
case ICE_SID_XLT2_FD:
case ICE_SID_XLT2_RSS:
case ICE_SID_XLT2_ACL:
+ case ICE_SID_XLT2_PE:
xlt2 = (struct ice_xlt2_section *)sect;
src = (u8 *)xlt2->value;
sect_len = LE16_TO_CPU(xlt2->count) *
@@ -2957,9 +2961,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].xlt2.count *
sizeof(*hw->blk[block_id].xlt2.t);
break;
+ case ICE_SID_PROFID_TCAM_SW:
case ICE_SID_PROFID_TCAM_FD:
case ICE_SID_PROFID_TCAM_RSS:
case ICE_SID_PROFID_TCAM_ACL:
+ case ICE_SID_PROFID_TCAM_PE:
pid = (struct ice_prof_id_section *)sect;
src = (u8 *)pid->entry;
sect_len = LE16_TO_CPU(pid->count) *
@@ -2968,9 +2974,11 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof.count *
sizeof(*hw->blk[block_id].prof.t);
break;
+ case ICE_SID_PROFID_REDIR_SW:
case ICE_SID_PROFID_REDIR_FD:
case ICE_SID_PROFID_REDIR_RSS:
case ICE_SID_PROFID_REDIR_ACL:
+ case ICE_SID_PROFID_REDIR_PE:
pr = (struct ice_prof_redir_section *)sect;
src = pr->redir_value;
sect_len = LE16_TO_CPU(pr->count) *
@@ -2979,15 +2987,19 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
dst_len = hw->blk[block_id].prof_redir.count *
sizeof(*hw->blk[block_id].prof_redir.t);
break;
+ case ICE_SID_FLD_VEC_SW:
case ICE_SID_FLD_VEC_FD:
case ICE_SID_FLD_VEC_RSS:
case ICE_SID_FLD_VEC_ACL:
+ case ICE_SID_FLD_VEC_PE:
es = (struct ice_sw_fv_section *)sect;
src = (u8 *)es->fv;
sect_len = LE16_TO_CPU(es->count) *
- sizeof(*hw->blk[block_id].prof_redir.t);
+ hw->blk[block_id].es.fvw *
+ sizeof(*hw->blk[block_id].es.t);
dst = (u8 *)hw->blk[block_id].es.t;
dst_len = hw->blk[block_id].es.count *
+ hw->blk[block_id].es.fvw *
sizeof(*hw->blk[block_id].es.t);
break;
default:
@@ -4964,8 +4976,8 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
if (status)
goto err_ice_rem_prof_id_flow;
- } else if (ice_find_dup_props_vsig(hw, blk, ©,
- &vsig)) {
+ } else if (!ice_find_dup_props_vsig(hw, blk, ©,
+ &vsig)) {
/* found an exact match */
/* add or move VSI to the VSIG that matches */
/* Search for a VSIG with a matching profile
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 26/38] net/ice/base: update copyright time
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (25 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 25/38] net/ice/base: fix minor issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 27/38] net/ice/base: fix Klockwork analysis reported issues Qi Zhang
` (12 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update copyright time to 2019.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_controlq.c | 2 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 2 +-
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 2 +-
drivers/net/ice/base/ice_nvm.c | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2 +-
drivers/net/ice/base/ice_sched.h | 2 +-
drivers/net/ice/base/ice_status.h | 2 +-
drivers/net/ice/base/ice_switch.c | 2 +-
drivers/net/ice/base/ice_switch.h | 2 +-
drivers/net/ice/base/ice_type.h | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ed7dfae8c..81a331b41 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ADMINQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_alloc.h b/drivers/net/ice/base/ice_alloc.h
index 78831045b..cf823a2c2 100644
--- a/drivers/net/ice/base/ice_alloc.h
+++ b/drivers/net/ice/base/ice_alloc.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ALLOC_H_
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1c381b5e2..ae0e7fc5f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 72560fbbf..cc7a77747 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_COMMON_H_
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 1c0830cec..f3404023a 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h
index db2db9389..182db6754 100644
--- a/drivers/net/ice/base/ice_controlq.h
+++ b/drivers/net/ice/base/ice_controlq.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_CONTROLQ_H_
diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h
index 87f17ab91..5f1ac0422 100644
--- a/drivers/net/ice/base/ice_devids.h
+++ b/drivers/net/ice/base/ice_devids.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_DEVIDS_H_
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 1bb865896..951c2051f 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLEX_TYPE_H_
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 3db10cd6f..bad925c8c 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLOW_H_
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 8c79891ad..e63e41133 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
/* Machine-generated file; do not edit */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index b1963b5eb..8c9902994 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_LAN_TX_RX_H_
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 8d3d0b0ed..b770abfd0 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index f96964d86..6b3bd6542 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_PROTOCOL_TYPE_H_
diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h
index 6dff37871..70a019292 100644
--- a/drivers/net/ice/base/ice_sbq_cmd.h
+++ b/drivers/net/ice/base/ice_sbq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SBQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2dd9f6f6c..8773e62a9 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_sched.h"
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 09de765ff..92377a82e 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SCHED_H_
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index 898bfa6d8..cd561b0a4 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_STATUS_H_
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e47c1d845..a1c29d606 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_switch.h"
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 3cc2c10e8..13525d8d0 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SWITCH_H_
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 25d64477f..90736faa1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_TYPE_H_
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 26/38] net/ice/base: update copyright time
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 26/38] net/ice/base: update copyright time Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Update copyright time to 2019.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
drivers/net/ice/base/ice_alloc.h | 2 +-
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_controlq.c | 2 +-
drivers/net/ice/base/ice_controlq.h | 2 +-
drivers/net/ice/base/ice_devids.h | 2 +-
drivers/net/ice/base/ice_flex_type.h | 2 +-
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_hw_autogen.h | 2 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 2 +-
drivers/net/ice/base/ice_nvm.c | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
drivers/net/ice/base/ice_sched.c | 2 +-
drivers/net/ice/base/ice_sched.h | 2 +-
drivers/net/ice/base/ice_status.h | 2 +-
drivers/net/ice/base/ice_switch.c | 2 +-
drivers/net/ice/base/ice_switch.h | 2 +-
drivers/net/ice/base/ice_type.h | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index ed7dfae8c..81a331b41 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ADMINQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_alloc.h b/drivers/net/ice/base/ice_alloc.h
index 78831045b..cf823a2c2 100644
--- a/drivers/net/ice/base/ice_alloc.h
+++ b/drivers/net/ice/base/ice_alloc.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_ALLOC_H_
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1c381b5e2..ae0e7fc5f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 72560fbbf..cc7a77747 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_COMMON_H_
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 1c0830cec..f3404023a 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h
index db2db9389..182db6754 100644
--- a/drivers/net/ice/base/ice_controlq.h
+++ b/drivers/net/ice/base/ice_controlq.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_CONTROLQ_H_
diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h
index 87f17ab91..5f1ac0422 100644
--- a/drivers/net/ice/base/ice_devids.h
+++ b/drivers/net/ice/base/ice_devids.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_DEVIDS_H_
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 1bb865896..951c2051f 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLEX_TYPE_H_
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 3db10cd6f..bad925c8c 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_FLOW_H_
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 8c79891ad..e63e41133 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
/* Machine-generated file; do not edit */
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index b1963b5eb..8c9902994 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_LAN_TX_RX_H_
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 8d3d0b0ed..b770abfd0 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_common.h"
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index f96964d86..6b3bd6542 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_PROTOCOL_TYPE_H_
diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h
index 6dff37871..70a019292 100644
--- a/drivers/net/ice/base/ice_sbq_cmd.h
+++ b/drivers/net/ice/base/ice_sbq_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SBQ_CMD_H_
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2dd9f6f6c..8773e62a9 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_sched.h"
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 09de765ff..92377a82e 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SCHED_H_
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index 898bfa6d8..cd561b0a4 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_STATUS_H_
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e47c1d845..a1c29d606 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#include "ice_switch.h"
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 3cc2c10e8..13525d8d0 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_SWITCH_H_
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 25d64477f..90736faa1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2019
*/
#ifndef _ICE_TYPE_H_
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 27/38] net/ice/base: fix Klockwork analysis reported issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (26 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 26/38] net/ice/base: update copyright time Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 28/38] net/ice/base: return config error without queue to disable Qi Zhang
` (11 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
Klocwork points out some code is unreachable in
ice_get_itr_intrl_gran and ice_ptg_find_ptype.
The patch removed the unreachable code and resolved the static
analysis reported issues.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 12 ++----------
drivers/net/ice/base/ice_flex_pipe.c | 7 +------
2 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ae0e7fc5f..2362dd774 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -741,7 +741,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
*/
-static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
+static void ice_get_itr_intrl_gran(struct ice_hw *hw)
{
u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &
GL_PWR_MODE_CTL_CAR_MAX_BW_M) >>
@@ -758,13 +758,7 @@ static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
hw->itr_gran = ICE_ITR_GRAN_MAX_25;
hw->intrl_gran = ICE_INTRL_GRAN_MAX_25;
break;
- default:
- ice_debug(hw, ICE_DBG_INIT,
- "Failed to determine itr/intrl granularity\n");
- return ICE_ERR_CFG;
}
-
- return ICE_SUCCESS;
}
/**
@@ -795,9 +789,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
return status;
- status = ice_get_itr_intrl_gran(hw);
- if (status)
- return status;
+ ice_get_itr_intrl_gran(hw);
status = ice_init_all_ctrlq(hw);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 1dd121b28..525378079 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4288,17 +4288,12 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
p->tcam_count = map->ptype_count;
for (i = 0; i < map->ptype_count; i++) {
- enum ice_status status;
u8 ptg;
p->tcam[i].prof_id = map->prof_id;
p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
- status = ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
- if (status) {
- ice_free(hw, p);
- return status;
- }
+ ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
p->tcam[i].ptg = ptg;
}
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 27/38] net/ice/base: fix Klockwork analysis reported issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 27/38] net/ice/base: fix Klockwork analysis reported issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Bruce Allan
Klocwork points out some code is unreachable in
ice_get_itr_intrl_gran and ice_ptg_find_ptype.
The patch removed the unreachable code and resolved the static
analysis reported issues.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 12 ++----------
drivers/net/ice/base/ice_flex_pipe.c | 7 +------
2 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ae0e7fc5f..2362dd774 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -741,7 +741,7 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)
* Determines the itr/intrl granularities based on the maximum aggregate
* bandwidth according to the device's configuration during power-on.
*/
-static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
+static void ice_get_itr_intrl_gran(struct ice_hw *hw)
{
u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &
GL_PWR_MODE_CTL_CAR_MAX_BW_M) >>
@@ -758,13 +758,7 @@ static enum ice_status ice_get_itr_intrl_gran(struct ice_hw *hw)
hw->itr_gran = ICE_ITR_GRAN_MAX_25;
hw->intrl_gran = ICE_INTRL_GRAN_MAX_25;
break;
- default:
- ice_debug(hw, ICE_DBG_INIT,
- "Failed to determine itr/intrl granularity\n");
- return ICE_ERR_CFG;
}
-
- return ICE_SUCCESS;
}
/**
@@ -795,9 +789,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
return status;
- status = ice_get_itr_intrl_gran(hw);
- if (status)
- return status;
+ ice_get_itr_intrl_gran(hw);
status = ice_init_all_ctrlq(hw);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 1dd121b28..525378079 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4288,17 +4288,12 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
p->tcam_count = map->ptype_count;
for (i = 0; i < map->ptype_count; i++) {
- enum ice_status status;
u8 ptg;
p->tcam[i].prof_id = map->prof_id;
p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
- status = ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
- if (status) {
- ice_free(hw, p);
- return status;
- }
+ ice_ptg_find_ptype(hw, blk, map->ptype[i], &ptg);
p->tcam[i].ptg = ptg;
}
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 28/38] net/ice/base: return config error without queue to disable
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (27 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 27/38] net/ice/base: fix Klockwork analysis reported issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 29/38] net/ice/base: add function to check FW recovery mode Qi Zhang
` (10 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Akeem G Abodunrin
If there is no queue to disable, return appropriate configuration error
earlier without acquiring the lock.
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2362dd774..c35a2f91d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3654,14 +3654,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
return ICE_ERR_CFG;
- /* if queue is disabled already yet the disable queue command has to be
- * sent to complete the VF reset, then call ice_aq_dis_lan_txq without
- * any queue information
- */
- if (!num_queues && rst_src)
- return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src, vmvf_num,
- NULL);
+ if (!num_queues) {
+ /* if queue is disabled already yet the disable queue command
+ * has to be sent to complete the VF reset, then call
+ * ice_aq_dis_lan_txq without any queue information
+ */
+ if (rst_src)
+ return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,
+ vmvf_num, NULL);
+ return ICE_ERR_CFG;
+ }
ice_acquire_lock(&pi->sched_lock);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 28/38] net/ice/base: return config error without queue to disable
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 28/38] net/ice/base: return config error without queue to disable Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Akeem G Abodunrin
If there is no queue to disable, return appropriate configuration error
earlier without acquiring the lock.
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2362dd774..c35a2f91d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3654,14 +3654,17 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
return ICE_ERR_CFG;
- /* if queue is disabled already yet the disable queue command has to be
- * sent to complete the VF reset, then call ice_aq_dis_lan_txq without
- * any queue information
- */
- if (!num_queues && rst_src)
- return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src, vmvf_num,
- NULL);
+ if (!num_queues) {
+ /* if queue is disabled already yet the disable queue command
+ * has to be sent to complete the VF reset, then call
+ * ice_aq_dis_lan_txq without any queue information
+ */
+ if (rst_src)
+ return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,
+ vmvf_num, NULL);
+ return ICE_ERR_CFG;
+ }
ice_acquire_lock(&pi->sched_lock);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 29/38] net/ice/base: add function to check FW recovery mode
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (28 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 28/38] net/ice/base: return config error without queue to disable Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 30/38] net/ice/base: change profile id reference counting Qi Zhang
` (9 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Code added to check the FW recovery mode. This function will be
used by the drivers during init to check whether the FW is in
recovery mode or not. If FW is in recovery mode then the drivers
need to run in a recovery mode where it can allow only limited
operations. Link should be down, allow only certain AQ commands
etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 15 +++++++++++++++
drivers/net/ice/base/ice_common.h | 8 ++++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index c35a2f91d..2ebf95eed 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3915,3 +3915,18 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
ice_debug(hw, ICE_DBG_SCHED, "query element failed\n");
return status;
}
+
+/**
+ * ice_is_fw_in_rec_mode
+ * @hw: pointer to the HW struct
+ *
+ * This function returns true if fw is in recovery mode
+ */
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw)
+{
+ u32 reg;
+
+ /* check the current FW mode */
+ reg = rd32(hw, GL_MNG_FWSM);
+ return (reg & GL_MNG_FWSM_FW_MODES_M) > ICE_FW_MODE_DBG;
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index cc7a77747..9665f3204 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -10,6 +10,13 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+enum ice_fw_modes {
+ ICE_FW_MODE_NORMAL,
+ ICE_FW_MODE_DBG,
+ ICE_FW_MODE_REC,
+ ICE_FW_MODE_DBG_REC
+};
+
enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
void
@@ -188,4 +195,5 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
enum ice_status
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_get_elem *buf);
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw);
#endif /* _ICE_COMMON_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 29/38] net/ice/base: add function to check FW recovery mode
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 29/38] net/ice/base: add function to check FW recovery mode Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Victor Raj
Code added to check the FW recovery mode. This function will be
used by the drivers during init to check whether the FW is in
recovery mode or not. If FW is in recovery mode then the drivers
need to run in a recovery mode where it can allow only limited
operations. Link should be down, allow only certain AQ commands
etc.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 15 +++++++++++++++
drivers/net/ice/base/ice_common.h | 8 ++++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index c35a2f91d..2ebf95eed 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3915,3 +3915,18 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
ice_debug(hw, ICE_DBG_SCHED, "query element failed\n");
return status;
}
+
+/**
+ * ice_is_fw_in_rec_mode
+ * @hw: pointer to the HW struct
+ *
+ * This function returns true if fw is in recovery mode
+ */
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw)
+{
+ u32 reg;
+
+ /* check the current FW mode */
+ reg = rd32(hw, GL_MNG_FWSM);
+ return (reg & GL_MNG_FWSM_FW_MODES_M) > ICE_FW_MODE_DBG;
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index cc7a77747..9665f3204 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -10,6 +10,13 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+enum ice_fw_modes {
+ ICE_FW_MODE_NORMAL,
+ ICE_FW_MODE_DBG,
+ ICE_FW_MODE_REC,
+ ICE_FW_MODE_DBG_REC
+};
+
enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
void
@@ -188,4 +195,5 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
enum ice_status
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_get_elem *buf);
+bool ice_is_fw_in_rec_mode(struct ice_hw *hw);
#endif /* _ICE_COMMON_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 30/38] net/ice/base: change profile id reference counting
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (29 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 29/38] net/ice/base: add function to check FW recovery mode Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 31/38] net/ice/base: add DCB support Qi Zhang
` (8 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Improved the profile reference counting, by moving it from being
based on how many TCAM entries using the profile to how many
profile map entries are using the profile.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 70 ++++++++++++++++++++----------------
drivers/net/ice/base/ice_flex_type.h | 1 +
2 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 525378079..99108d81c 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2816,6 +2816,30 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
}
/**
+ * ice_write_es - write an extraction sequence to hardware
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write the extraction sequence
+ * @prof_id: the profile ID to write
+ * @fv: pointer to the extraction sequence to write - NULL to clear extraction
+ */
+static void
+ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
+ struct ice_fv_word *fv)
+{
+ u16 off;
+
+ off = prof_id * hw->blk[blk].es.fvw;
+ if (!fv) {
+ ice_memset(&hw->blk[blk].es.t[off], 0, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_MEM);
+ hw->blk[blk].es.written[prof_id] = false;
+ } else {
+ ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_TO_NONDMA);
+ }
+}
+
+/**
* ice_prof_dec_ref - decrement reference count for profile
* @hw: pointer to the HW struct
* @blk: the block from which to free the profile ID
@@ -2828,31 +2852,15 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
return ICE_ERR_PARAM;
if (hw->blk[blk].es.ref_count[prof_id] > 0) {
- if (!--hw->blk[blk].es.ref_count[prof_id])
+ if (!--hw->blk[blk].es.ref_count[prof_id]) {
+ ice_write_es(hw, blk, prof_id, NULL);
return ice_free_prof_id(hw, blk, prof_id);
+ }
}
return ICE_SUCCESS;
}
-/**
- * ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the HW struct
- * @blk: the block in which to write the extraction sequence
- * @prof_id: the profile ID to write
- * @fv: pointer to the extraction sequence to write
- */
-static void
-ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
- struct ice_fv_word *fv)
-{
- u16 off;
-
- off = prof_id * hw->blk[blk].es.fvw;
- ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw * 2,
- ICE_NONDMA_TO_NONDMA);
-}
-
/* Block / table section IDs */
static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
/* SWITCH */
@@ -3140,6 +3148,7 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].es.resource_used_hack);
ice_free(hw, hw->blk[i].prof.resource_used_hack);
+ ice_free(hw, hw->blk[i].es.written);
}
ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);
@@ -3309,6 +3318,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
es->ref_count = (u16 *)
ice_calloc(hw, es->count, sizeof(*es->ref_count));
+ es->written = (u8 *)
+ ice_calloc(hw, es->count, sizeof(*es->written));
+
if (!es->ref_count)
goto err;
@@ -3805,6 +3817,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
ice_write_es(hw, blk, prof_id, es);
}
+ ice_prof_inc_ref(hw, blk, prof_id);
+
/* add profile info */
prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof));
@@ -3984,10 +3998,6 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < prof->tcam_count; i++) {
prof->tcam[i].in_use = false;
status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
- if (!status)
- status = ice_prof_dec_ref(hw, blk,
- prof->tcam[i].prof_id);
-
if (status)
return ICE_ERR_HW_TABLE;
}
@@ -4159,6 +4169,9 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
+ /* dereference profile, and possibly remove */
+ ice_prof_dec_ref(hw, blk, pmap->prof_id);
+
LIST_DEL(&pmap->list);
ice_free(hw, pmap);
@@ -4194,7 +4207,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
if (status)
goto err_ice_get_prof_ptgs;
- if (add || !hw->blk[blk].es.ref_count[map->prof_id]) {
+ if (add || !hw->blk[blk].es.written[map->prof_id]) {
/* add PTG to change list */
p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
if (!p)
@@ -4205,9 +4218,11 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
p->ptg = ptg;
p->add_ptg = add;
- p->add_prof = !hw->blk[blk].es.ref_count[map->prof_id];
+ p->add_prof = !hw->blk[blk].es.written[map->prof_id];
p->prof_id = map->prof_id;
+ hw->blk[blk].es.written[map->prof_id] = true;
+
LIST_ADD(&p->list_entry, chg);
}
}
@@ -4555,11 +4570,6 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many TCAM entries
- * are using this HW profile ID
- */
- status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
-
/* log change */
LIST_ADD(&p->list_entry, chg);
}
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 951c2051f..365f33390 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -497,6 +497,7 @@ struct ice_es {
u16 count;
u16 fvw;
u16 *ref_count;
+ u8 *written;
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 30/38] net/ice/base: change profile id reference counting
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 30/38] net/ice/base: change profile id reference counting Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Improved the profile reference counting, by moving it from being
based on how many TCAM entries using the profile to how many
profile map entries are using the profile.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 70 ++++++++++++++++++++----------------
drivers/net/ice/base/ice_flex_type.h | 1 +
2 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 525378079..99108d81c 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2816,6 +2816,30 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
}
/**
+ * ice_write_es - write an extraction sequence to hardware
+ * @hw: pointer to the HW struct
+ * @blk: the block in which to write the extraction sequence
+ * @prof_id: the profile ID to write
+ * @fv: pointer to the extraction sequence to write - NULL to clear extraction
+ */
+static void
+ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
+ struct ice_fv_word *fv)
+{
+ u16 off;
+
+ off = prof_id * hw->blk[blk].es.fvw;
+ if (!fv) {
+ ice_memset(&hw->blk[blk].es.t[off], 0, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_MEM);
+ hw->blk[blk].es.written[prof_id] = false;
+ } else {
+ ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw *
+ sizeof(*fv), ICE_NONDMA_TO_NONDMA);
+ }
+}
+
+/**
* ice_prof_dec_ref - decrement reference count for profile
* @hw: pointer to the HW struct
* @blk: the block from which to free the profile ID
@@ -2828,31 +2852,15 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
return ICE_ERR_PARAM;
if (hw->blk[blk].es.ref_count[prof_id] > 0) {
- if (!--hw->blk[blk].es.ref_count[prof_id])
+ if (!--hw->blk[blk].es.ref_count[prof_id]) {
+ ice_write_es(hw, blk, prof_id, NULL);
return ice_free_prof_id(hw, blk, prof_id);
+ }
}
return ICE_SUCCESS;
}
-/**
- * ice_write_es - write an extraction sequence to hardware
- * @hw: pointer to the HW struct
- * @blk: the block in which to write the extraction sequence
- * @prof_id: the profile ID to write
- * @fv: pointer to the extraction sequence to write
- */
-static void
-ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
- struct ice_fv_word *fv)
-{
- u16 off;
-
- off = prof_id * hw->blk[blk].es.fvw;
- ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw * 2,
- ICE_NONDMA_TO_NONDMA);
-}
-
/* Block / table section IDs */
static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
/* SWITCH */
@@ -3140,6 +3148,7 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].es.resource_used_hack);
ice_free(hw, hw->blk[i].prof.resource_used_hack);
+ ice_free(hw, hw->blk[i].es.written);
}
ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);
@@ -3309,6 +3318,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
es->ref_count = (u16 *)
ice_calloc(hw, es->count, sizeof(*es->ref_count));
+ es->written = (u8 *)
+ ice_calloc(hw, es->count, sizeof(*es->written));
+
if (!es->ref_count)
goto err;
@@ -3805,6 +3817,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
ice_write_es(hw, blk, prof_id, es);
}
+ ice_prof_inc_ref(hw, blk, prof_id);
+
/* add profile info */
prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof));
@@ -3984,10 +3998,6 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < prof->tcam_count; i++) {
prof->tcam[i].in_use = false;
status = ice_rel_tcam_idx(hw, blk, prof->tcam[i].tcam_idx);
- if (!status)
- status = ice_prof_dec_ref(hw, blk,
- prof->tcam[i].prof_id);
-
if (status)
return ICE_ERR_HW_TABLE;
}
@@ -4159,6 +4169,9 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
+ /* dereference profile, and possibly remove */
+ ice_prof_dec_ref(hw, blk, pmap->prof_id);
+
LIST_DEL(&pmap->list);
ice_free(hw, pmap);
@@ -4194,7 +4207,7 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
if (status)
goto err_ice_get_prof_ptgs;
- if (add || !hw->blk[blk].es.ref_count[map->prof_id]) {
+ if (add || !hw->blk[blk].es.written[map->prof_id]) {
/* add PTG to change list */
p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
if (!p)
@@ -4205,9 +4218,11 @@ ice_get_prof_ptgs(struct ice_hw *hw, enum ice_block blk, u64 hdl,
p->ptg = ptg;
p->add_ptg = add;
- p->add_prof = !hw->blk[blk].es.ref_count[map->prof_id];
+ p->add_prof = !hw->blk[blk].es.written[map->prof_id];
p->prof_id = map->prof_id;
+ hw->blk[blk].es.written[map->prof_id] = true;
+
LIST_ADD(&p->list_entry, chg);
}
}
@@ -4555,11 +4570,6 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (status)
goto err_ice_add_prof_id_vsig;
- /* this increments the reference count of how many TCAM entries
- * are using this HW profile ID
- */
- status = ice_prof_inc_ref(hw, blk, t->tcam[i].prof_id);
-
/* log change */
LIST_ADD(&p->list_entry, chg);
}
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 951c2051f..365f33390 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -497,6 +497,7 @@ struct ice_es {
u16 count;
u16 fvw;
u16 *ref_count;
+ u8 *written;
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 31/38] net/ice/base: add DCB support
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (30 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 30/38] net/ice/base: change profile id reference counting Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 32/38] net/ice/base: add FDIR support Qi Zhang
` (7 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add module to support DCB related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 243 ++++++
drivers/net/ice/base/ice_common.c | 12 +
drivers/net/ice/base/ice_dcb.c | 1393 +++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 ++++++
drivers/net/ice/base/ice_status.h | 1 +
drivers/net/ice/base/ice_type.h | 14 +-
drivers/net/ice/base/meson.build | 1 +
8 files changed, 1884 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 61846cae2..89d21334e 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -51,6 +51,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_switch.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 81a331b41..4c5cf5419 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -100,6 +100,7 @@ struct ice_aqc_list_caps_elem {
__le16 cap;
#define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005
#define ICE_AQC_CAPS_VSI 0x0017
+#define ICE_AQC_CAPS_DCB 0x0018
#define ICE_AQC_CAPS_RSS 0x0040
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
@@ -894,6 +895,40 @@ struct ice_aqc_sw_rules_elem {
#pragma pack()
+/* PFC Ignore (direct 0x0301)
+ * The command and response use the same descriptor structure
+ */
+struct ice_aqc_pfc_ignore {
+ u8 tc_bitmap;
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_PFC_IGNORE_SET BIT(7)
+#define ICE_AQC_PFC_IGNORE_CLEAR 0
+ u8 reserved[14];
+};
+
+/* Set PFC Mode (direct 0x0303)
+ * Query PFC Mode (direct 0x0302)
+ */
+struct ice_aqc_set_query_pfc_mode {
+ u8 pfc_mode;
+/* For Set Command response, reserved in all other cases */
+#define ICE_AQC_PFC_NOT_CONFIGURED 0
+/* For Query Command response, reserved in all other cases */
+#define ICE_AQC_DCB_DIS 0
+#define ICE_AQC_PFC_VLAN_BASED_PFC 1
+#define ICE_AQC_PFC_DSCP_BASED_PFC 2
+ u8 rsvd[15];
+};
+
+/* Set DCB Parameters (direct 0x0306) */
+struct ice_aqc_set_dcb_params {
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG BIT(0)
+ u8 valid_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG_VALID BIT(0)
+ u8 rsvd[14];
+};
+
/* Get Default Topology (indirect 0x0400) */
struct ice_aqc_get_topo {
@@ -1027,6 +1062,32 @@ struct ice_aqc_delete_elem {
};
+/* Query Port ETS (indirect 0x040E)
+ *
+ * This indirect command is used to query port TC node configuration.
+ */
+struct ice_aqc_query_port_ets {
+ __le32 port_teid;
+ __le32 reserved;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_port_ets_elem {
+ u8 tc_valid_bits;
+ u8 reserved[3];
+ /* 3 bits for UP per TC 0-7, 4th byte reserved */
+ __le32 up2tc;
+ u8 tc_bw_share[8];
+ __le32 port_eir_prof_id;
+ __le32 port_cir_prof_id;
+ /* 3 bits per Node priority to TC 0-7, 4th byte reserved */
+ __le32 tc_node_prio;
+#define ICE_TC_NODE_PRIO_S 0x4
+ u8 reserved1[4];
+ __le32 tc_node_teid[8]; /* Used for response, reserved in command */
+};
+
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
@@ -1578,6 +1639,157 @@ struct ice_aqc_nvm_checksum {
+/* Get LLDP MIB (indirect 0x0A00)
+ * Note: This is also used by the LLDP MIB Change Event (0x0A01)
+ * as the format is the same.
+ */
+struct ice_aqc_lldp_get_mib {
+ u8 type;
+#define ICE_AQ_LLDP_MIB_TYPE_S 0
+#define ICE_AQ_LLDP_MIB_TYPE_M (0x3 << ICE_AQ_LLDP_MIB_TYPE_S)
+#define ICE_AQ_LLDP_MIB_LOCAL 0
+#define ICE_AQ_LLDP_MIB_REMOTE 1
+#define ICE_AQ_LLDP_MIB_LOCAL_AND_REMOTE 2
+#define ICE_AQ_LLDP_BRID_TYPE_S 2
+#define ICE_AQ_LLDP_BRID_TYPE_M (0x3 << ICE_AQ_LLDP_BRID_TYPE_S)
+#define ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID 0
+#define ICE_AQ_LLDP_BRID_TYPE_NON_TPMR 1
+/* Tx pause flags in the 0xA01 event use ICE_AQ_LLDP_TX_* */
+#define ICE_AQ_LLDP_TX_S 0x4
+#define ICE_AQ_LLDP_TX_M (0x03 << ICE_AQ_LLDP_TX_S)
+#define ICE_AQ_LLDP_TX_ACTIVE 0
+#define ICE_AQ_LLDP_TX_SUSPENDED 1
+#define ICE_AQ_LLDP_TX_FLUSHED 3
+/* The following bytes are reserved for the Get LLDP MIB command (0x0A00)
+ * and in the LLDP MIB Change Event (0x0A01). They are valid for the
+ * Get LLDP MIB (0x0A00) response only.
+ */
+ u8 reserved1;
+ __le16 local_len;
+ __le16 remote_len;
+ u8 reserved2[2];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Configure LLDP MIB Change Event (direct 0x0A01) */
+/* For MIB Change Event use ice_aqc_lldp_get_mib structure above */
+struct ice_aqc_lldp_set_mib_change {
+ u8 command;
+#define ICE_AQ_LLDP_MIB_UPDATE_ENABLE 0x0
+#define ICE_AQ_LLDP_MIB_UPDATE_DIS 0x1
+ u8 reserved[15];
+};
+
+/* Add LLDP TLV (indirect 0x0A02)
+ * Delete LLDP TLV (indirect 0x0A04)
+ */
+struct ice_aqc_lldp_add_delete_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved1[1];
+ __le16 len;
+ u8 reserved2[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Update LLDP TLV (indirect 0x0A03) */
+struct ice_aqc_lldp_update_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved;
+ __le16 old_len;
+ __le16 new_offset;
+ __le16 new_len;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Stop LLDP (direct 0x0A05) */
+struct ice_aqc_lldp_stop {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_STATE_MASK BIT(0)
+#define ICE_AQ_LLDP_AGENT_STOP 0x0
+#define ICE_AQ_LLDP_AGENT_SHUTDOWN ICE_AQ_LLDP_AGENT_STATE_MASK
+#define ICE_AQ_LLDP_AGENT_PERSIST_DIS BIT(1)
+ u8 reserved[15];
+};
+
+/* Start LLDP (direct 0x0A06) */
+struct ice_aqc_lldp_start {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_START BIT(0)
+#define ICE_AQ_LLDP_AGENT_PERSIST_ENA BIT(1)
+ u8 reserved[15];
+};
+
+/* Get CEE DCBX Oper Config (0x0A07)
+ * The command uses the generic descriptor struct and
+ * returns the struct below as an indirect response.
+ */
+struct ice_aqc_get_cee_dcb_cfg_resp {
+ u8 oper_num_tc;
+ u8 oper_prio_tc[4];
+ u8 oper_tc_bw[8];
+ u8 oper_pfc_en;
+ __le16 oper_app_prio;
+#define ICE_AQC_CEE_APP_FCOE_S 0
+#define ICE_AQC_CEE_APP_FCOE_M (0x7 << ICE_AQC_CEE_APP_FCOE_S)
+#define ICE_AQC_CEE_APP_ISCSI_S 3
+#define ICE_AQC_CEE_APP_ISCSI_M (0x7 << ICE_AQC_CEE_APP_ISCSI_S)
+#define ICE_AQC_CEE_APP_FIP_S 8
+#define ICE_AQC_CEE_APP_FIP_M (0x7 << ICE_AQC_CEE_APP_FIP_S)
+ __le32 tlv_status;
+#define ICE_AQC_CEE_PG_STATUS_S 0
+#define ICE_AQC_CEE_PG_STATUS_M (0x7 << ICE_AQC_CEE_PG_STATUS_S)
+#define ICE_AQC_CEE_PFC_STATUS_S 3
+#define ICE_AQC_CEE_PFC_STATUS_M (0x7 << ICE_AQC_CEE_PFC_STATUS_S)
+#define ICE_AQC_CEE_FCOE_STATUS_S 8
+#define ICE_AQC_CEE_FCOE_STATUS_M (0x7 << ICE_AQC_CEE_FCOE_STATUS_S)
+#define ICE_AQC_CEE_ISCSI_STATUS_S 11
+#define ICE_AQC_CEE_ISCSI_STATUS_M (0x7 << ICE_AQC_CEE_ISCSI_STATUS_S)
+#define ICE_AQC_CEE_FIP_STATUS_S 16
+#define ICE_AQC_CEE_FIP_STATUS_M (0x7 << ICE_AQC_CEE_FIP_STATUS_S)
+ u8 reserved[12];
+};
+
+/* Set Local LLDP MIB (indirect 0x0A08)
+ * Used to replace the local MIB of a given LLDP agent. e.g. DCBx
+ */
+struct ice_aqc_lldp_set_local_mib {
+ u8 type;
+#define SET_LOCAL_MIB_TYPE_DCBX_M BIT(0)
+#define SET_LOCAL_MIB_TYPE_LOCAL_MIB 0
+#define SET_LOCAL_MIB_TYPE_CEE_M BIT(1)
+#define SET_LOCAL_MIB_TYPE_CEE_WILLING 0
+#define SET_LOCAL_MIB_TYPE_CEE_NON_WILLING SET_LOCAL_MIB_TYPE_CEE_M
+ u8 reserved0;
+ __le16 length;
+ u8 reserved1[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_lldp_set_local_mib_resp {
+ u8 status;
+#define SET_LOCAL_MIB_RESP_EVENT_M BIT(0)
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_SILENT 0
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_EVENT SET_LOCAL_MIB_RESP_EVENT_M
+ u8 reserved[15];
+};
+
+/* Stop/Start LLDP Agent (direct 0x0A09)
+ * Used for stopping/starting specific LLDP agent. e.g. DCBx.
+ * The same structure is used for the response, with the command field
+ * being used as the status field.
+ */
+struct ice_aqc_lldp_stop_start_specific_agent {
+ u8 command;
+#define ICE_AQC_START_STOP_AGENT_M BIT(0)
+#define ICE_AQC_START_STOP_AGENT_STOP_DCBX 0
+#define ICE_AQC_START_STOP_AGENT_START_DCBX ICE_AQC_START_STOP_AGENT_M
+ u8 reserved[15];
+};
+
/* Get/Set RSS key (indirect 0x0B04/0x0B02) */
struct ice_aqc_get_set_rss_key {
@@ -1980,10 +2192,22 @@ struct ice_aq_desc {
struct ice_aqc_query_txsched_res query_sched_res;
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
+ struct ice_aqc_query_port_ets port_ets;
struct ice_aqc_rl_profile rl_profile;
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
+ struct ice_aqc_pfc_ignore pfc_ignore;
+ struct ice_aqc_set_query_pfc_mode set_query_pfc_mode;
+ struct ice_aqc_set_dcb_params set_dcb_params;
+ struct ice_aqc_lldp_get_mib lldp_get_mib;
+ struct ice_aqc_lldp_set_mib_change lldp_set_event;
+ struct ice_aqc_lldp_add_delete_tlv lldp_add_delete_tlv;
+ struct ice_aqc_lldp_update_tlv lldp_update_tlv;
+ struct ice_aqc_lldp_stop lldp_stop;
+ struct ice_aqc_lldp_start lldp_start;
+ struct ice_aqc_lldp_set_local_mib lldp_set_mib;
+ struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
struct ice_aqc_add_txqs add_txqs;
@@ -2096,6 +2320,8 @@ enum ice_adminq_opc {
/* PXE */
ice_aqc_opc_clear_pxe_mode = 0x0110,
+ ice_aqc_opc_config_no_drop_policy = 0x0112,
+
/* internal switch commands */
ice_aqc_opc_get_sw_cfg = 0x0200,
@@ -2127,6 +2353,11 @@ enum ice_adminq_opc {
ice_aqc_opc_get_sw_rules = 0x02A3,
ice_aqc_opc_clear_pf_cfg = 0x02A4,
+ /* DCB commands */
+ ice_aqc_opc_pfc_ignore = 0x0301,
+ ice_aqc_opc_query_pfc_mode = 0x0302,
+ ice_aqc_opc_set_pfc_mode = 0x0303,
+ ice_aqc_opc_set_dcb_params = 0x0306,
/* transmit scheduler commands */
ice_aqc_opc_get_dflt_topo = 0x0400,
@@ -2136,6 +2367,7 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
+ ice_aqc_opc_query_port_ets = 0x040E,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
@@ -2166,6 +2398,17 @@ enum ice_adminq_opc {
ice_aqc_opc_nvm_cfg_write = 0x0705,
ice_aqc_opc_nvm_checksum = 0x0706,
+ /* LLDP commands */
+ ice_aqc_opc_lldp_get_mib = 0x0A00,
+ ice_aqc_opc_lldp_set_mib_change = 0x0A01,
+ ice_aqc_opc_lldp_add_tlv = 0x0A02,
+ ice_aqc_opc_lldp_update_tlv = 0x0A03,
+ ice_aqc_opc_lldp_delete_tlv = 0x0A04,
+ ice_aqc_opc_lldp_stop = 0x0A05,
+ ice_aqc_opc_lldp_start = 0x0A06,
+ ice_aqc_opc_get_cee_dcb_cfg = 0x0A07,
+ ice_aqc_opc_lldp_set_local_mib = 0x0A08,
+ ice_aqc_opc_lldp_stop_start_specific_agent = 0x0A09,
/* RSS commands */
ice_aqc_opc_set_rss_key = 0x0B02,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2ebf95eed..202592710 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1930,6 +1930,18 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
number);
}
break;
+ case ICE_AQC_CAPS_DCB:
+ caps->dcb = (number == 1);
+ caps->active_tc_bitmap = logical_id;
+ caps->maxtc = phys_id;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: DCB = %d\n", caps->dcb);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Active TC bitmap = %d\n",
+ caps->active_tc_bitmap);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: TC Max = %d\n", caps->maxtc);
+ break;
case ICE_AQC_CAPS_RSS:
caps->rss_table_size = number;
caps->rss_table_entry_width = logical_id;
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
new file mode 100644
index 000000000..a7810578d
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -0,0 +1,1393 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_sched.h"
+#include "ice_dcb.h"
+
+/**
+ * ice_aq_get_lldp_mib
+ * @hw: pointer to the HW struct
+ * @bridge_type: type of bridge requested
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @local_len: length of the returned Local LLDP MIB
+ * @remote_len: length of the returned Remote LLDP MIB
+ * @cd: pointer to command details structure or NULL
+ *
+ * Requests the complete LLDP MIB (entire packet). (0x0A00)
+ */
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_get_mib *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.lldp_get_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_get_mib);
+
+ cmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M;
+ cmd->type |= (bridge_type << ICE_AQ_LLDP_BRID_TYPE_S) &
+ ICE_AQ_LLDP_BRID_TYPE_M;
+
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status) {
+ if (local_len)
+ *local_len = LE16_TO_CPU(cmd->local_len);
+ if (remote_len)
+ *remote_len = LE16_TO_CPU(cmd->remote_len);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_cfg_lldp_mib_change
+ * @hw: pointer to the HW struct
+ * @ena_update: Enable or Disable event posting
+ * @cd: pointer to command details structure or NULL
+ *
+ * Enable or Disable posting of an event on ARQ when LLDP MIB
+ * associated with the interface changes (0x0A01)
+ */
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_mib_change *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_event;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_mib_change);
+
+ if (!ena_update)
+ cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_stop_lldp
+ * @hw: pointer to the HW struct
+ * @shutdown_lldp_agent: True if LLDP Agent needs to be Shutdown
+ * False if LLDP Agent needs to be Stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Stop or Shutdown the embedded LLDP Agent (0x0A05)
+ */
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_stop;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_stop);
+
+ if (shutdown_lldp_agent)
+ cmd->command |= ICE_AQ_LLDP_AGENT_SHUTDOWN;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_start_lldp
+ * @hw: pointer to the HW struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start the embedded LLDP Agent on all ports. (0x0A06)
+ */
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_start *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_start;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_start);
+
+ cmd->command = ICE_AQ_LLDP_AGENT_START;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_set_lldp_mib - Set the LLDP MIB
+ * @hw: pointer to the HW struct
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set the LLDP MIB. (0x0A08)
+ */
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_local_mib *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib);
+
+ desc.flags |= CPU_TO_LE16((u16)ICE_AQ_FLAG_RD);
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ cmd->type = mib_type;
+ cmd->length = CPU_TO_LE16(buf_size);
+
+ return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+}
+
+/**
+ * ice_get_dcbx_status
+ * @hw: pointer to the HW struct
+ *
+ * Get the DCBX status from the Firmware
+ */
+u8 ice_get_dcbx_status(struct ice_hw *hw)
+{
+ u32 reg;
+
+ reg = rd32(hw, PRTDCB_GENS);
+ return (u8)((reg & PRTDCB_GENS_DCBX_STATUS_M) >>
+ PRTDCB_GENS_DCBX_STATUS_S);
+}
+
+/**
+ * ice_parse_ieee_ets_common_tlv
+ * @buf: Data buffer to be parsed for ETS CFG/REC data
+ * @ets_cfg: Container to store parsed data
+ *
+ * Parses the common data of IEEE 802.1Qaz ETS CFG/REC TLV
+ */
+static void
+ice_parse_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ ets_cfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>
+ ICE_IEEE_ETS_PRIO_1_S);
+ ets_cfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>
+ ICE_IEEE_ETS_PRIO_0_S);
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 9 | 10| 11| 12| 13| 14| 15| 16|
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ ets_cfg->tcbwtable[i] = buf[offset];
+ ets_cfg->tsatable[i] = buf[ICE_MAX_TRAFFIC_CLASS + offset++];
+ }
+}
+
+/**
+ * ice_parse_ieee_etscfg_tlv
+ * @tlv: IEEE 802.1Qaz ETS CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_parse_ieee_etscfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ etscfg->willing = ((buf[0] & ICE_IEEE_ETS_WILLING_M) >>
+ ICE_IEEE_ETS_WILLING_S);
+ etscfg->cbs = ((buf[0] & ICE_IEEE_ETS_CBS_M) >> ICE_IEEE_ETS_CBS_S);
+ etscfg->maxtcs = ((buf[0] & ICE_IEEE_ETS_MAXTC_M) >>
+ ICE_IEEE_ETS_MAXTC_S);
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_parse_ieee_etsrec_tlv
+ * @tlv: IEEE 802.1Qaz ETS REC TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Parses IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_parse_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], &dcbcfg->etsrec);
+}
+
+/**
+ * ice_parse_ieee_pfccfg_tlv
+ * @tlv: IEEE 802.1Qaz PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_parse_ieee_pfccfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ dcbcfg->pfc.willing = ((buf[0] & ICE_IEEE_PFC_WILLING_M) >>
+ ICE_IEEE_PFC_WILLING_S);
+ dcbcfg->pfc.mbc = ((buf[0] & ICE_IEEE_PFC_MBC_M) >> ICE_IEEE_PFC_MBC_S);
+ dcbcfg->pfc.pfccap = ((buf[0] & ICE_IEEE_PFC_CAP_M) >>
+ ICE_IEEE_PFC_CAP_S);
+ dcbcfg->pfc.pfcena = buf[1];
+}
+
+/**
+ * ice_parse_ieee_app_tlv
+ * @tlv: IEEE 802.1Qaz APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses IEEE 802.1Qaz APP PRIO TLV
+ */
+static void
+ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 offset = 0;
+ u16 typelen;
+ int i = 0;
+ u16 len;
+ u8 *buf;
+
+ typelen = NTOHS(tlv->typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ buf = tlv->tlvinfo;
+
+ /* Removing sizeof(ouisubtype) and reserved byte from len.
+ * Remaining len div 3 is number of APP TLVs.
+ */
+ len -= (sizeof(tlv->ouisubtype) + 1);
+
+ /* Move offset to App Priority Table */
+ offset++;
+
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (offset < len) {
+ dcbcfg->app[i].priority = ((buf[offset] &
+ ICE_IEEE_APP_PRIO_M) >>
+ ICE_IEEE_APP_PRIO_S);
+ dcbcfg->app[i].selector = ((buf[offset] &
+ ICE_IEEE_APP_SEL_M) >>
+ ICE_IEEE_APP_SEL_S);
+ dcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |
+ buf[offset + 2];
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+
+ dcbcfg->numapps = i;
+}
+
+/**
+ * ice_parse_ieee_tlv
+ * @tlv: IEEE 802.1Qaz TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_ieee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u8 subtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ switch (subtype) {
+ case ICE_IEEE_SUBTYPE_ETS_CFG:
+ ice_parse_ieee_etscfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_ETS_REC:
+ ice_parse_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_PFC_CFG:
+ ice_parse_ieee_pfccfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_APP_PRI:
+ ice_parse_ieee_app_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_parse_cee_pgcfg_tlv
+ * @tlv: CEE DCBX PG CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses CEE DCBX PG CFG TLV
+ */
+static void
+ice_parse_cee_pgcfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u16 offset = 0;
+ int i;
+
+ etscfg = &dcbcfg->etscfg;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ etscfg->willing = 1;
+
+ etscfg->cbs = 0;
+ /* Priority Group Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ etscfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ etscfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ offset++;
+ }
+
+ /* PG Percentage Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |pg0|pg1|pg2|pg3|pg4|pg5|pg6|pg7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i)
+ etscfg->tcbwtable[i] = buf[offset++];
+
+ /* Number of TCs supported (1 octet) */
+ etscfg->maxtcs = buf[offset];
+}
+
+/**
+ * ice_parse_cee_pfccfg_tlv
+ * @tlv: CEE DCBX PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses CEE DCBX PFC CFG TLV
+ */
+static void
+ice_parse_cee_pfccfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ dcbcfg->pfc.willing = 1;
+
+ /* ------------------------
+ * | PFC Enable | PFC TCs |
+ * ------------------------
+ * | 1 octet | 1 octet |
+ */
+ dcbcfg->pfc.pfcena = buf[0];
+ dcbcfg->pfc.pfccap = buf[1];
+}
+
+/**
+ * ice_parse_cee_app_tlv
+ * @tlv: CEE DCBX APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses CEE DCBX APP PRIO TLV
+ */
+static void
+ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, typelen, offset = 0;
+ struct ice_cee_app_prio *app;
+ u8 i;
+
+ typelen = NTOHS(tlv->hdr.typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+
+ dcbcfg->numapps = len / sizeof(*app);
+ if (!dcbcfg->numapps)
+ return;
+ if (dcbcfg->numapps > ICE_DCBX_MAX_APPS)
+ dcbcfg->numapps = ICE_DCBX_MAX_APPS;
+
+ for (i = 0; i < dcbcfg->numapps; i++) {
+ u8 up, selector;
+
+ app = (struct ice_cee_app_prio *)(tlv->tlvinfo + offset);
+ for (up = 0; up < ICE_MAX_USER_PRIORITY; up++)
+ if (app->prio_map & BIT(up))
+ break;
+
+ dcbcfg->app[i].priority = up;
+
+ /* Get Selector from lower 2 bits, and convert to IEEE */
+ selector = (app->upper_oui_sel & ICE_CEE_APP_SELECTOR_M);
+ switch (selector) {
+ case ICE_CEE_APP_SEL_ETHTYPE:
+ dcbcfg->app[i].selector = ICE_APP_SEL_ETHTYPE;
+ break;
+ case ICE_CEE_APP_SEL_TCPIP:
+ dcbcfg->app[i].selector = ICE_APP_SEL_TCPIP;
+ break;
+ default:
+ /* Keep selector as it is for unknown types */
+ dcbcfg->app[i].selector = selector;
+ }
+
+ dcbcfg->app[i].prot_id = NTOHS(app->protocol);
+ /* Move to next app */
+ offset += sizeof(*app);
+ }
+}
+
+/**
+ * ice_parse_cee_tlv
+ * @tlv: CEE DCBX TLV
+ * @dcbcfg: Local store to update DCBX config data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_cee_feat_tlv *sub_tlv;
+ u8 subtype, feat_tlv_count = 0;
+ u16 len, tlvlen, typelen;
+ u32 ouisubtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ /* Return if not CEE DCBX */
+ if (subtype != ICE_CEE_DCBX_TYPE)
+ return;
+
+ typelen = NTOHS(tlv->typelen);
+ tlvlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ len = sizeof(tlv->typelen) + sizeof(ouisubtype) +
+ sizeof(struct ice_cee_ctrl_tlv);
+ /* Return if no CEE DCBX Feature TLVs */
+ if (tlvlen <= len)
+ return;
+
+ sub_tlv = (struct ice_cee_feat_tlv *)((char *)tlv + len);
+ while (feat_tlv_count < ICE_CEE_MAX_FEAT_TYPE) {
+ u16 sublen;
+
+ typelen = NTOHS(sub_tlv->hdr.typelen);
+ sublen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ subtype = (u8)((typelen & ICE_LLDP_TLV_TYPE_M) >>
+ ICE_LLDP_TLV_TYPE_S);
+ switch (subtype) {
+ case ICE_CEE_SUBTYPE_PG_CFG:
+ ice_parse_cee_pgcfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_PFC_CFG:
+ ice_parse_cee_pfccfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_APP_PRI:
+ ice_parse_cee_app_tlv(sub_tlv, dcbcfg);
+ break;
+ default:
+ return; /* Invalid Sub-type return */
+ }
+ feat_tlv_count++;
+ /* Move to next sub TLV */
+ sub_tlv = (struct ice_cee_feat_tlv *)
+ ((char *)sub_tlv + sizeof(sub_tlv->hdr.typelen) +
+ sublen);
+ }
+}
+
+/**
+ * ice_parse_org_tlv
+ * @tlv: Organization specific TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Currently only IEEE 802.1Qaz TLV is supported, all others
+ * will be returned
+ */
+static void
+ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u32 oui;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ oui = ((ouisubtype & ICE_LLDP_TLV_OUI_M) >> ICE_LLDP_TLV_OUI_S);
+ switch (oui) {
+ case ICE_IEEE_8021QAZ_OUI:
+ ice_parse_ieee_tlv(tlv, dcbcfg);
+ break;
+ case ICE_CEE_DCBX_OUI:
+ ice_parse_cee_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_lldp_to_dcb_cfg
+ * @lldpmib: LLDPDU to be parsed
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Parse DCB configuration from the LLDPDU
+ */
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_lldp_org_tlv *tlv;
+ enum ice_status ret = ICE_SUCCESS;
+ u16 offset = 0;
+ u16 typelen;
+ u16 type;
+ u16 len;
+
+ if (!lldpmib || !dcbcfg)
+ return ICE_ERR_PARAM;
+
+ /* set to the start of LLDPDU */
+ lldpmib += ETH_HEADER_LEN;
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ typelen = NTOHS(tlv->typelen);
+ type = ((typelen & ICE_LLDP_TLV_TYPE_M) >> ICE_LLDP_TLV_TYPE_S);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ offset += sizeof(typelen) + len;
+
+ /* END TLV or beyond LLDPDU size */
+ if (type == ICE_TLV_TYPE_END || offset > ICE_LLDPDU_SIZE)
+ break;
+
+ switch (type) {
+ case ICE_TLV_TYPE_ORG:
+ ice_parse_org_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+
+ /* Move to next TLV */
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_aq_get_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @mib_type: mib type for the query
+ * @bridgetype: bridge type for the query (remote)
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Query DCB configuration from the firmware
+ */
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ enum ice_status ret;
+ u8 *lldpmib;
+
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ ret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,
+ ICE_LLDPDU_SIZE, NULL, NULL, NULL);
+
+ if (ret == ICE_SUCCESS)
+ /* Parse LLDP MIB to get DCB configuration */
+ ret = ice_lldp_to_dcb_cfg(lldpmib, dcbcfg);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_start_stop_dcbx - Start/Stop DCBx service in FW
+ * @hw: pointer to the HW struct
+ * @start_dcbx_agent: True if DCBx Agent needs to be started
+ * False if DCBx Agent needs to be stopped
+ * @dcbx_agent_status: FW indicates back the DCBx agent status
+ * True if DCBx Agent is active
+ * False if DCBx Agent is stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start/Stop the embedded dcbx Agent. In case that this wrapper function
+ * returns ICE_SUCCESS, caller will need to check if FW returns back the same
+ * value as stated in dcbx_agent_status, and react accordingly. (0x0A09)
+ */
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop_start_specific_agent *cmd;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+ u16 opcode;
+
+ cmd = &desc.params.lldp_agent_ctrl;
+
+ opcode = ice_aqc_opc_lldp_stop_start_specific_agent;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, opcode);
+
+ if (start_dcbx_agent)
+ cmd->command = ICE_AQC_START_STOP_AGENT_START_DCBX;
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+
+ *dcbx_agent_status = false;
+
+ if (status == ICE_SUCCESS &&
+ cmd->command == ICE_AQC_START_STOP_AGENT_START_DCBX)
+ *dcbx_agent_status = true;
+
+ return status;
+}
+
+/**
+ * ice_aq_get_cee_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @buff: response buffer that stores CEE operational configuration
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get CEE DCBX mode operational configuration from firmware (0x0A07)
+ */
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cee_dcb_cfg);
+
+ return ice_aq_send_cmd(hw, &desc, (void *)buff, sizeof(*buff), cd);
+}
+
+/**
+ * ice_cee_to_dcb_cfg
+ * @cee_cfg: pointer to CEE configuration struct
+ * @dcbcfg: DCB configuration struct
+ *
+ * Convert CEE configuration from firmware to DCB configuration
+ */
+static void
+ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
+ u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
+ u16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);
+ u8 i, err, sync, oper, app_index, ice_app_sel_type;
+ u16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;
+ u16 ice_app_prot_id_type;
+
+ /* CEE PG data to ETS config */
+ dcbcfg->etscfg.maxtcs = cee_cfg->oper_num_tc;
+
+ /* Note that the FW creates the oper_prio_tc nibbles reversed
+ * from those in the CEE Priority Group sub-TLV.
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ dcbcfg->etscfg.prio_table[i * 2] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ dcbcfg->etscfg.prio_table[i * 2 + 1] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ }
+
+ ice_for_each_traffic_class(i) {
+ dcbcfg->etscfg.tcbwtable[i] = cee_cfg->oper_tc_bw[i];
+
+ if (dcbcfg->etscfg.prio_table[i] == ICE_CEE_PGID_STRICT) {
+ /* Map it to next empty TC */
+ dcbcfg->etscfg.prio_table[i] = cee_cfg->oper_num_tc - 1;
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_STRICT;
+ } else {
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_ETS;
+ }
+ }
+
+ /* CEE PFC data to ETS config */
+ dcbcfg->pfc.pfcena = cee_cfg->oper_pfc_en;
+ dcbcfg->pfc.pfccap = ICE_MAX_TRAFFIC_CLASS;
+
+ app_index = 0;
+ for (i = 0; i < 3; i++) {
+ if (i == 0) {
+ /* FCoE APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FCOE_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FCOE_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FCOE_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FCOE_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FCOE;
+ } else if (i == 1) {
+ /* iSCSI APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_ISCSI_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_ISCSI_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_ISCSI_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_ISCSI_S;
+ ice_app_sel_type = ICE_APP_SEL_TCPIP;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_ISCSI;
+ } else {
+ /* FIP APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FIP_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FIP_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FIP_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FIP_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FIP;
+ }
+
+ status = (tlv_status & ice_aqc_cee_status_mask) >>
+ ice_aqc_cee_status_shift;
+ err = (status & ICE_TLV_STATUS_ERR) ? 1 : 0;
+ sync = (status & ICE_TLV_STATUS_SYNC) ? 1 : 0;
+ oper = (status & ICE_TLV_STATUS_OPER) ? 1 : 0;
+ /* Add FCoE/iSCSI/FIP APP if Error is False and
+ * Oper/Sync is True
+ */
+ if (!err && sync && oper) {
+ dcbcfg->app[app_index].priority =
+ (app_prio & ice_aqc_cee_app_mask) >>
+ ice_aqc_cee_app_shift;
+ dcbcfg->app[app_index].selector = ice_app_sel_type;
+ dcbcfg->app[app_index].prot_id = ice_app_prot_id_type;
+ app_index++;
+ }
+ }
+
+ dcbcfg->numapps = app_index;
+}
+
+/**
+ * ice_get_ieee_dcb_cfg
+ * @pi: port information structure
+ * @dcbx_mode: mode of DCBX (IEEE or CEE)
+ *
+ * Get IEEE or CEE mode DCB configuration from the Firmware
+ */
+STATIC enum ice_status
+ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
+{
+ struct ice_dcbx_cfg *dcbx_cfg = NULL;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ if (dcbx_mode == ICE_DCBX_MODE_IEEE)
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ else if (dcbx_mode == ICE_DCBX_MODE_CEE)
+ dcbx_cfg = &pi->desired_dcbx_cfg;
+
+ /* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE
+ * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE
+ */
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ if (ret)
+ goto out;
+
+ /* Get Remote DCB Config */
+ dcbx_cfg = &pi->remote_dcbx_cfg;
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ /* Don't treat ENOENT as an error for Remote MIBs */
+ if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+ ret = ICE_SUCCESS;
+
+out:
+ return ret;
+}
+
+/**
+ * ice_get_dcb_cfg
+ * @pi: port information structure
+ *
+ * Get DCB configuration from the Firmware
+ */
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
+{
+ struct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;
+ struct ice_dcbx_cfg *dcbx_cfg;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
+ if (ret == ICE_SUCCESS) {
+ /* CEE mode */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
+ dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
+ ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
+ } else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
+ /* CEE mode not enabled try querying IEEE data */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_init_dcb
+ * @hw: pointer to the HW struct
+ *
+ * Update DCB configuration from the Firmware
+ */
+enum ice_status ice_init_dcb(struct ice_hw *hw)
+{
+ struct ice_port_info *pi = hw->port_info;
+ enum ice_status ret = ICE_SUCCESS;
+
+ if (!hw->func_caps.common_cap.dcb)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ pi->is_sw_lldp = true;
+
+ /* Get DCBX status */
+ pi->dcbx_status = ice_get_dcbx_status(hw);
+
+ if (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||
+ pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS) {
+ /* Get current DCBX configuration */
+ ret = ice_get_dcb_cfg(pi);
+ pi->is_sw_lldp = (hw->adminq.sq_last_status == ICE_AQ_RC_EPERM);
+ if (ret)
+ return ret;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {
+ return ICE_ERR_NOT_READY;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_MULTIPLE_PEERS) {
+ }
+
+ /* Configure the LLDP MIB change event */
+ ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);
+ if (!ret)
+ pi->is_sw_lldp = false;
+
+ return ret;
+}
+
+/**
+ * ice_add_ieee_ets_common_tlv
+ * @buf: Data buffer to be populated with ice_dcb_ets_cfg data
+ * @ets_cfg: Container for ice_dcb_ets_cfg data
+ *
+ * Populate the TLV buffer with ice_dcb_ets_cfg data
+ */
+static void
+ice_add_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 priority0, priority1;
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ priority0 = ets_cfg->prio_table[i * 2] & 0xF;
+ priority1 = ets_cfg->prio_table[i * 2 + 1] & 0xF;
+ buf[offset] = (priority0 << ICE_IEEE_ETS_PRIO_1_S) | priority1;
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ buf[offset] = ets_cfg->tcbwtable[i];
+ buf[ICE_MAX_TRAFFIC_CLASS + offset] = ets_cfg->tsatable[i];
+ offset++;
+ }
+}
+
+/**
+ * ice_add_ieee_ets_tlv - Prepare ETS TLV in IEEE format
+ * @tlv: Fill the ETS config data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_add_ieee_ets_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u8 maxtcwilling = 0;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ if (etscfg->willing)
+ maxtcwilling = BIT(ICE_IEEE_ETS_WILLING_S);
+ maxtcwilling |= etscfg->maxtcs & ICE_IEEE_ETS_MAXTC_M;
+ buf[0] = maxtcwilling;
+
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_add_ieee_etsrec_tlv - Prepare ETS Recommended TLV in IEEE format
+ * @tlv: Fill ETS Recommended TLV in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_add_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etsrec;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_REC);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ etsrec = &dcbcfg->etsrec;
+
+ /* First Octet is reserved */
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etsrec);
+}
+
+/**
+ * ice_add_ieee_pfc_tlv - Prepare PFC TLV in IEEE format
+ * @tlv: Fill PFC TLV in IEEE format
+ * @dcbcfg: Local store which holds the PFC CFG data
+ *
+ * Prepare IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_add_ieee_pfc_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_PFC_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_PFC_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ if (dcbcfg->pfc.willing)
+ buf[0] = BIT(ICE_IEEE_PFC_WILLING_S);
+
+ if (dcbcfg->pfc.mbc)
+ buf[0] |= BIT(ICE_IEEE_PFC_MBC_S);
+
+ buf[0] |= dcbcfg->pfc.pfccap & 0xF;
+ buf[1] = dcbcfg->pfc.pfcena;
+}
+
+/**
+ * ice_add_ieee_app_pri_tlv - Prepare APP TLV in IEEE format
+ * @tlv: Fill APP TLV in IEEE format
+ * @dcbcfg: Local store which holds the APP CFG data
+ *
+ * Prepare IEEE 802.1Qaz APP CFG TLV
+ */
+static void
+ice_add_ieee_app_pri_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 typelen, len, offset = 0;
+ u8 priority, selector, i = 0;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+
+ /* No APP TLVs then just return */
+ if (dcbcfg->numapps == 0)
+ return;
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_APP_PRI);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* Move offset to App Priority Table */
+ offset++;
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (i < dcbcfg->numapps) {
+ priority = dcbcfg->app[i].priority & 0x7;
+ selector = dcbcfg->app[i].selector & 0x7;
+ buf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;
+ buf[offset + 1] = (dcbcfg->app[i].prot_id >> 0x8) & 0xFF;
+ buf[offset + 2] = dcbcfg->app[i].prot_id & 0xFF;
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+ /* len includes size of ouisubtype + 1 reserved + 3*numapps */
+ len = sizeof(tlv->ouisubtype) + 1 + (i * 3);
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) | (len & 0x1FF));
+ tlv->typelen = HTONS(typelen);
+}
+
+/**
+ * ice_add_dcb_tlv - Add all IEEE TLVs
+ * @tlv: Fill TLV data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ * @tlvid: Type of IEEE TLV
+ *
+ * Add tlv information
+ */
+static void
+ice_add_dcb_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg,
+ u16 tlvid)
+{
+ switch (tlvid) {
+ case ICE_IEEE_TLV_ID_ETS_CFG:
+ ice_add_ieee_ets_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_ETS_REC:
+ ice_add_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_PFC_CFG:
+ ice_add_ieee_pfc_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_APP_PRI:
+ ice_add_ieee_app_pri_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_dcb_cfg_to_lldp - Convert DCB configuration to MIB format
+ * @lldpmib: pointer to the HW struct
+ * @miblen: length of LLDP mib
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Convert the DCB configuration to MIB format
+ */
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, offset = 0, tlvid = ICE_TLV_ID_START;
+ struct ice_lldp_org_tlv *tlv;
+ u16 typelen;
+
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ ice_add_dcb_tlv(tlv, dcbcfg, tlvid++);
+ typelen = NTOHS(tlv->typelen);
+ len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
+ if (len)
+ offset += len + 2;
+ /* END TLV or beyond LLDPDU size */
+ if (tlvid >= ICE_TLV_ID_END_OF_LLDPPDU ||
+ offset > ICE_LLDPDU_SIZE)
+ break;
+ /* Move to next TLV */
+ if (len)
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+ *miblen = offset;
+}
+
+/**
+ * ice_set_dcb_cfg - Set the local LLDP MIB to FW
+ * @pi: port information structure
+ *
+ * Set DCB configuration to the Firmware
+ */
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
+{
+ u8 mib_type, *lldpmib = NULL;
+ struct ice_dcbx_cfg *dcbcfg;
+ enum ice_status ret;
+ struct ice_hw *hw;
+ u16 miblen;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ hw = pi->hw;
+
+ /* update the HW local config */
+ dcbcfg = &pi->local_dcbx_cfg;
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ mib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;
+ if (dcbcfg->app_mode == ICE_DCBX_APPS_NON_WILLING)
+ mib_type |= SET_LOCAL_MIB_TYPE_CEE_NON_WILLING;
+
+ ice_dcb_cfg_to_lldp(lldpmib, &miblen, dcbcfg);
+ ret = ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen,
+ NULL);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration
+ */
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_query_port_ets *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ cmd = &desc.params.port_ets;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_port_ets);
+ cmd->port_teid = pi->root->info.node_teid;
+
+ status = ice_aq_send_cmd(pi->hw, &desc, buf, buf_size, cd);
+ return status;
+}
+
+/**
+ * ice_update_port_tc_tree_cfg - update TC tree configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ *
+ * update the SW DB with the new TC changes
+ */
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf)
+{
+ struct ice_sched_node *node, *tc_node;
+ struct ice_aqc_get_elem elem;
+ enum ice_status status = ICE_SUCCESS;
+ u32 teid1, teid2;
+ u8 i, j;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ /* suspend the missing TC nodes */
+ for (i = 0; i < pi->root->num_children; i++) {
+ teid1 = LE32_TO_CPU(pi->root->children[i]->info.node_teid);
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid1 == teid2)
+ break;
+ }
+ if (j < ICE_MAX_TRAFFIC_CLASS)
+ continue;
+ /* TC is missing */
+ pi->root->children[i]->in_use = false;
+ }
+ /* add the new TC nodes */
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid2 == ICE_INVAL_TEID)
+ continue;
+ /* Is it already present in the tree ? */
+ for (i = 0; i < pi->root->num_children; i++) {
+ tc_node = pi->root->children[i];
+ if (!tc_node)
+ continue;
+ teid1 = LE32_TO_CPU(tc_node->info.node_teid);
+ if (teid1 == teid2) {
+ tc_node->tc_num = j;
+ tc_node->in_use = true;
+ break;
+ }
+ }
+ if (i < pi->root->num_children)
+ continue;
+ /* new TC */
+ status = ice_sched_query_elem(pi->hw, teid2, &elem);
+ if (!status)
+ status = ice_sched_add_node(pi, 1, &elem.generic[0]);
+ if (status)
+ break;
+ /* update the TC number */
+ node = ice_sched_find_node_by_teid(pi->root, teid2);
+ if (node)
+ node->tc_num = j;
+ }
+ return status;
+}
+
+/**
+ * ice_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration and update the
+ * SW DB with the TC changes
+ */
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ enum ice_status status;
+
+ ice_acquire_lock(&pi->sched_lock);
+ status = ice_aq_query_port_ets(pi, buf, buf_size, cd);
+ if (!status)
+ status = ice_update_port_tc_tree_cfg(pi, buf);
+ ice_release_lock(&pi->sched_lock);
+ return status;
+}
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
new file mode 100644
index 000000000..d922c8a29
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -0,0 +1,223 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_DCB_H_
+#define _ICE_DCB_H_
+
+#include "ice_type.h"
+
+#define ICE_DCBX_OFFLOAD_DIS 0
+#define ICE_DCBX_OFFLOAD_ENABLED 1
+
+#define ICE_DCBX_STATUS_NOT_STARTED 0
+#define ICE_DCBX_STATUS_IN_PROGRESS 1
+#define ICE_DCBX_STATUS_DONE 2
+#define ICE_DCBX_STATUS_MULTIPLE_PEERS 3
+#define ICE_DCBX_STATUS_DIS 7
+
+#define ICE_TLV_TYPE_END 0
+#define ICE_TLV_TYPE_ORG 127
+
+#define ICE_IEEE_8021QAZ_OUI 0x0080C2
+#define ICE_IEEE_SUBTYPE_ETS_CFG 9
+#define ICE_IEEE_SUBTYPE_ETS_REC 10
+#define ICE_IEEE_SUBTYPE_PFC_CFG 11
+#define ICE_IEEE_SUBTYPE_APP_PRI 12
+
+#define ICE_CEE_DCBX_OUI 0x001B21
+#define ICE_CEE_DCBX_TYPE 2
+
+#define ICE_CEE_SUBTYPE_CTRL 1
+#define ICE_CEE_SUBTYPE_PG_CFG 2
+#define ICE_CEE_SUBTYPE_PFC_CFG 3
+#define ICE_CEE_SUBTYPE_APP_PRI 4
+
+#define ICE_CEE_MAX_FEAT_TYPE 3
+#define ICE_LLDP_ADMINSTATUS_DIS 0
+#define ICE_LLDP_ADMINSTATUS_ENA_RX 1
+#define ICE_LLDP_ADMINSTATUS_ENA_TX 2
+#define ICE_LLDP_ADMINSTATUS_ENA_RXTX 3
+
+/* Defines for LLDP TLV header */
+#define ICE_LLDP_TLV_LEN_S 0
+#define ICE_LLDP_TLV_LEN_M (0x01FF << ICE_LLDP_TLV_LEN_S)
+#define ICE_LLDP_TLV_TYPE_S 9
+#define ICE_LLDP_TLV_TYPE_M (0x7F << ICE_LLDP_TLV_TYPE_S)
+#define ICE_LLDP_TLV_SUBTYPE_S 0
+#define ICE_LLDP_TLV_SUBTYPE_M (0xFF << ICE_LLDP_TLV_SUBTYPE_S)
+#define ICE_LLDP_TLV_OUI_S 8
+#define ICE_LLDP_TLV_OUI_M (0xFFFFFFUL << ICE_LLDP_TLV_OUI_S)
+
+/* Defines for IEEE ETS TLV */
+#define ICE_IEEE_ETS_MAXTC_S 0
+#define ICE_IEEE_ETS_MAXTC_M (0x7 << ICE_IEEE_ETS_MAXTC_S)
+#define ICE_IEEE_ETS_CBS_S 6
+#define ICE_IEEE_ETS_CBS_M BIT(ICE_IEEE_ETS_CBS_S)
+#define ICE_IEEE_ETS_WILLING_S 7
+#define ICE_IEEE_ETS_WILLING_M BIT(ICE_IEEE_ETS_WILLING_S)
+#define ICE_IEEE_ETS_PRIO_0_S 0
+#define ICE_IEEE_ETS_PRIO_0_M (0x7 << ICE_IEEE_ETS_PRIO_0_S)
+#define ICE_IEEE_ETS_PRIO_1_S 4
+#define ICE_IEEE_ETS_PRIO_1_M (0x7 << ICE_IEEE_ETS_PRIO_1_S)
+#define ICE_CEE_PGID_PRIO_0_S 0
+#define ICE_CEE_PGID_PRIO_0_M (0xF << ICE_CEE_PGID_PRIO_0_S)
+#define ICE_CEE_PGID_PRIO_1_S 4
+#define ICE_CEE_PGID_PRIO_1_M (0xF << ICE_CEE_PGID_PRIO_1_S)
+#define ICE_CEE_PGID_STRICT 15
+
+/* Defines for IEEE TSA types */
+#define ICE_IEEE_TSA_STRICT 0
+#define ICE_IEEE_TSA_CBS 1
+#define ICE_IEEE_TSA_ETS 2
+#define ICE_IEEE_TSA_VENDOR 255
+
+/* Defines for IEEE PFC TLV */
+#define ICE_IEEE_PFC_CAP_S 0
+#define ICE_IEEE_PFC_CAP_M (0xF << ICE_IEEE_PFC_CAP_S)
+#define ICE_IEEE_PFC_MBC_S 6
+#define ICE_IEEE_PFC_MBC_M BIT(ICE_IEEE_PFC_MBC_S)
+#define ICE_IEEE_PFC_WILLING_S 7
+#define ICE_IEEE_PFC_WILLING_M BIT(ICE_IEEE_PFC_WILLING_S)
+
+/* Defines for IEEE APP TLV */
+#define ICE_IEEE_APP_SEL_S 0
+#define ICE_IEEE_APP_SEL_M (0x7 << ICE_IEEE_APP_SEL_S)
+#define ICE_IEEE_APP_PRIO_S 5
+#define ICE_IEEE_APP_PRIO_M (0x7 << ICE_IEEE_APP_PRIO_S)
+
+/* TLV definitions for preparing MIB */
+#define ICE_TLV_ID_CHASSIS_ID 0
+#define ICE_TLV_ID_PORT_ID 1
+#define ICE_TLV_ID_TIME_TO_LIVE 2
+#define ICE_IEEE_TLV_ID_ETS_CFG 3
+#define ICE_IEEE_TLV_ID_ETS_REC 4
+#define ICE_IEEE_TLV_ID_PFC_CFG 5
+#define ICE_IEEE_TLV_ID_APP_PRI 6
+#define ICE_TLV_ID_END_OF_LLDPPDU 7
+#define ICE_TLV_ID_START ICE_IEEE_TLV_ID_ETS_CFG
+
+#define ICE_IEEE_ETS_TLV_LEN 25
+#define ICE_IEEE_PFC_TLV_LEN 6
+#define ICE_IEEE_APP_TLV_LEN 11
+
+#pragma pack(1)
+/* IEEE 802.1AB LLDP TLV structure */
+struct ice_lldp_generic_tlv {
+ __be16 typelen;
+ u8 tlvinfo[1];
+};
+
+/* IEEE 802.1AB LLDP Organization specific TLV */
+struct ice_lldp_org_tlv {
+ __be16 typelen;
+ __be32 ouisubtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack()
+
+struct ice_cee_tlv_hdr {
+ __be16 typelen;
+ u8 operver;
+ u8 maxver;
+};
+
+struct ice_cee_ctrl_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ __be32 seqno;
+ __be32 ackno;
+};
+
+struct ice_cee_feat_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
+#define ICE_CEE_FEAT_TLV_ENA_M 0x80
+#define ICE_CEE_FEAT_TLV_WILLING_M 0x40
+#define ICE_CEE_FEAT_TLV_ERR_M 0x20
+ u8 subtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack(1)
+struct ice_cee_app_prio {
+ __be16 protocol;
+ u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
+#define ICE_CEE_APP_SELECTOR_M 0x03
+ __be16 lower_oui;
+ u8 prio_map;
+};
+
+#pragma pack()
+
+/* TODO: The below structures related LLDP/DCBX variables
+ * and statistics are defined but need to find how to get
+ * the required information from the Firmware to use them
+ */
+
+/* IEEE 802.1AB LLDP Agent Statistics */
+struct ice_lldp_stats {
+ u64 remtablelastchangetime;
+ u64 remtableinserts;
+ u64 remtabledeletes;
+ u64 remtabledrops;
+ u64 remtableageouts;
+ u64 txframestotal;
+ u64 rxframesdiscarded;
+ u64 rxportframeerrors;
+ u64 rxportframestotal;
+ u64 rxporttlvsdiscardedtotal;
+ u64 rxporttlvsunrecognizedtotal;
+ u64 remtoomanyneighbors;
+};
+
+/* IEEE 802.1Qaz DCBX variables */
+struct ice_dcbx_variables {
+ u32 defmaxtrafficclasses;
+ u32 defprioritytcmapping;
+ u32 deftcbandwidth;
+ u32 deftsaassignment;
+};
+
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd);
+u8 ice_get_dcbx_status(struct ice_hw *hw);
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg);
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_init_dcb(struct ice_hw *hw);
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cmd_details);
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf);
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd);
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd);
+#endif /* _ICE_DCB_H_ */
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index cd561b0a4..ac120fa30 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -13,6 +13,7 @@ enum ice_status {
ICE_ERR_PARAM = -1,
ICE_ERR_NOT_IMPL = -2,
ICE_ERR_NOT_READY = -3,
+ ICE_ERR_NOT_SUPPORTED = -4,
ICE_ERR_BAD_PTR = -5,
ICE_ERR_INVAL_SIZE = -6,
ICE_ERR_DEVICE_NOT_SUPPORTED = -8,
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 90736faa1..6a08b3d28 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -240,6 +240,9 @@ struct ice_hw_common_caps {
u32 os2bmc;
u32 valid_functions;
+ /* DCB capabilities */
+ u32 active_tc_bitmap;
+ u32 maxtc;
/* RSS related capabilities */
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
@@ -276,6 +279,7 @@ struct ice_hw_common_caps {
u8 evb_802_1_qbg; /* Edge Virtual Bridging */
u8 evb_802_1_qbh; /* Bridge Port Extension */
+ u8 dcb;
u8 iscsi;
u8 mgmt_cem;
@@ -527,7 +531,6 @@ struct ice_sched_vsi_info {
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
/* CEE or IEEE 802.1Qaz ETS Configuration data */
struct ice_dcb_ets_cfg {
u8 willing;
@@ -580,7 +583,6 @@ struct ice_dcbx_cfg {
u8 app_mode;
#define ICE_DCBX_APPS_NON_WILLING 0x1
};
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
@@ -601,9 +603,13 @@ struct ice_port_info {
struct ice_lock sched_lock; /* protect access to TXSched tree */
/* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
+ /* DCBX info */
+ struct ice_dcbx_cfg remote_dcbx_cfg; /* Peer Cfg */
+ struct ice_dcbx_cfg desired_dcbx_cfg; /* CEE Desired Cfg */
+ /* LLDP/DCBX Status */
+ u8 dcbx_status;
+ u8 is_sw_lldp;
u8 lport;
#define ICE_LPORT_MASK 0xff
u8 is_vf;
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index d7f8536bc..755d2497b 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -9,6 +9,7 @@ sources = [
'ice_nvm.c',
'ice_flex_pipe.c',
'ice_flow.c',
+ 'ice_dcb.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 31/38] net/ice/base: add DCB support
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 31/38] net/ice/base: add DCB support Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add module to support DCB related features.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 243 ++++++
drivers/net/ice/base/ice_common.c | 12 +
drivers/net/ice/base/ice_dcb.c | 1393 +++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_dcb.h | 223 ++++++
drivers/net/ice/base/ice_status.h | 1 +
drivers/net/ice/base/ice_type.h | 14 +-
drivers/net/ice/base/meson.build | 1 +
8 files changed, 1884 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/ice/base/ice_dcb.c
create mode 100644 drivers/net/ice/base/ice_dcb.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 61846cae2..89d21334e 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -51,6 +51,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_switch.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 81a331b41..4c5cf5419 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -100,6 +100,7 @@ struct ice_aqc_list_caps_elem {
__le16 cap;
#define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005
#define ICE_AQC_CAPS_VSI 0x0017
+#define ICE_AQC_CAPS_DCB 0x0018
#define ICE_AQC_CAPS_RSS 0x0040
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
@@ -894,6 +895,40 @@ struct ice_aqc_sw_rules_elem {
#pragma pack()
+/* PFC Ignore (direct 0x0301)
+ * The command and response use the same descriptor structure
+ */
+struct ice_aqc_pfc_ignore {
+ u8 tc_bitmap;
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_PFC_IGNORE_SET BIT(7)
+#define ICE_AQC_PFC_IGNORE_CLEAR 0
+ u8 reserved[14];
+};
+
+/* Set PFC Mode (direct 0x0303)
+ * Query PFC Mode (direct 0x0302)
+ */
+struct ice_aqc_set_query_pfc_mode {
+ u8 pfc_mode;
+/* For Set Command response, reserved in all other cases */
+#define ICE_AQC_PFC_NOT_CONFIGURED 0
+/* For Query Command response, reserved in all other cases */
+#define ICE_AQC_DCB_DIS 0
+#define ICE_AQC_PFC_VLAN_BASED_PFC 1
+#define ICE_AQC_PFC_DSCP_BASED_PFC 2
+ u8 rsvd[15];
+};
+
+/* Set DCB Parameters (direct 0x0306) */
+struct ice_aqc_set_dcb_params {
+ u8 cmd_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG BIT(0)
+ u8 valid_flags; /* unused in response */
+#define ICE_AQC_LINK_UP_DCB_CFG_VALID BIT(0)
+ u8 rsvd[14];
+};
+
/* Get Default Topology (indirect 0x0400) */
struct ice_aqc_get_topo {
@@ -1027,6 +1062,32 @@ struct ice_aqc_delete_elem {
};
+/* Query Port ETS (indirect 0x040E)
+ *
+ * This indirect command is used to query port TC node configuration.
+ */
+struct ice_aqc_query_port_ets {
+ __le32 port_teid;
+ __le32 reserved;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_port_ets_elem {
+ u8 tc_valid_bits;
+ u8 reserved[3];
+ /* 3 bits for UP per TC 0-7, 4th byte reserved */
+ __le32 up2tc;
+ u8 tc_bw_share[8];
+ __le32 port_eir_prof_id;
+ __le32 port_cir_prof_id;
+ /* 3 bits per Node priority to TC 0-7, 4th byte reserved */
+ __le32 tc_node_prio;
+#define ICE_TC_NODE_PRIO_S 0x4
+ u8 reserved1[4];
+ __le32 tc_node_teid[8]; /* Used for response, reserved in command */
+};
+
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
@@ -1578,6 +1639,157 @@ struct ice_aqc_nvm_checksum {
+/* Get LLDP MIB (indirect 0x0A00)
+ * Note: This is also used by the LLDP MIB Change Event (0x0A01)
+ * as the format is the same.
+ */
+struct ice_aqc_lldp_get_mib {
+ u8 type;
+#define ICE_AQ_LLDP_MIB_TYPE_S 0
+#define ICE_AQ_LLDP_MIB_TYPE_M (0x3 << ICE_AQ_LLDP_MIB_TYPE_S)
+#define ICE_AQ_LLDP_MIB_LOCAL 0
+#define ICE_AQ_LLDP_MIB_REMOTE 1
+#define ICE_AQ_LLDP_MIB_LOCAL_AND_REMOTE 2
+#define ICE_AQ_LLDP_BRID_TYPE_S 2
+#define ICE_AQ_LLDP_BRID_TYPE_M (0x3 << ICE_AQ_LLDP_BRID_TYPE_S)
+#define ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID 0
+#define ICE_AQ_LLDP_BRID_TYPE_NON_TPMR 1
+/* Tx pause flags in the 0xA01 event use ICE_AQ_LLDP_TX_* */
+#define ICE_AQ_LLDP_TX_S 0x4
+#define ICE_AQ_LLDP_TX_M (0x03 << ICE_AQ_LLDP_TX_S)
+#define ICE_AQ_LLDP_TX_ACTIVE 0
+#define ICE_AQ_LLDP_TX_SUSPENDED 1
+#define ICE_AQ_LLDP_TX_FLUSHED 3
+/* The following bytes are reserved for the Get LLDP MIB command (0x0A00)
+ * and in the LLDP MIB Change Event (0x0A01). They are valid for the
+ * Get LLDP MIB (0x0A00) response only.
+ */
+ u8 reserved1;
+ __le16 local_len;
+ __le16 remote_len;
+ u8 reserved2[2];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Configure LLDP MIB Change Event (direct 0x0A01) */
+/* For MIB Change Event use ice_aqc_lldp_get_mib structure above */
+struct ice_aqc_lldp_set_mib_change {
+ u8 command;
+#define ICE_AQ_LLDP_MIB_UPDATE_ENABLE 0x0
+#define ICE_AQ_LLDP_MIB_UPDATE_DIS 0x1
+ u8 reserved[15];
+};
+
+/* Add LLDP TLV (indirect 0x0A02)
+ * Delete LLDP TLV (indirect 0x0A04)
+ */
+struct ice_aqc_lldp_add_delete_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved1[1];
+ __le16 len;
+ u8 reserved2[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Update LLDP TLV (indirect 0x0A03) */
+struct ice_aqc_lldp_update_tlv {
+ u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
+ u8 reserved;
+ __le16 old_len;
+ __le16 new_offset;
+ __le16 new_len;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Stop LLDP (direct 0x0A05) */
+struct ice_aqc_lldp_stop {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_STATE_MASK BIT(0)
+#define ICE_AQ_LLDP_AGENT_STOP 0x0
+#define ICE_AQ_LLDP_AGENT_SHUTDOWN ICE_AQ_LLDP_AGENT_STATE_MASK
+#define ICE_AQ_LLDP_AGENT_PERSIST_DIS BIT(1)
+ u8 reserved[15];
+};
+
+/* Start LLDP (direct 0x0A06) */
+struct ice_aqc_lldp_start {
+ u8 command;
+#define ICE_AQ_LLDP_AGENT_START BIT(0)
+#define ICE_AQ_LLDP_AGENT_PERSIST_ENA BIT(1)
+ u8 reserved[15];
+};
+
+/* Get CEE DCBX Oper Config (0x0A07)
+ * The command uses the generic descriptor struct and
+ * returns the struct below as an indirect response.
+ */
+struct ice_aqc_get_cee_dcb_cfg_resp {
+ u8 oper_num_tc;
+ u8 oper_prio_tc[4];
+ u8 oper_tc_bw[8];
+ u8 oper_pfc_en;
+ __le16 oper_app_prio;
+#define ICE_AQC_CEE_APP_FCOE_S 0
+#define ICE_AQC_CEE_APP_FCOE_M (0x7 << ICE_AQC_CEE_APP_FCOE_S)
+#define ICE_AQC_CEE_APP_ISCSI_S 3
+#define ICE_AQC_CEE_APP_ISCSI_M (0x7 << ICE_AQC_CEE_APP_ISCSI_S)
+#define ICE_AQC_CEE_APP_FIP_S 8
+#define ICE_AQC_CEE_APP_FIP_M (0x7 << ICE_AQC_CEE_APP_FIP_S)
+ __le32 tlv_status;
+#define ICE_AQC_CEE_PG_STATUS_S 0
+#define ICE_AQC_CEE_PG_STATUS_M (0x7 << ICE_AQC_CEE_PG_STATUS_S)
+#define ICE_AQC_CEE_PFC_STATUS_S 3
+#define ICE_AQC_CEE_PFC_STATUS_M (0x7 << ICE_AQC_CEE_PFC_STATUS_S)
+#define ICE_AQC_CEE_FCOE_STATUS_S 8
+#define ICE_AQC_CEE_FCOE_STATUS_M (0x7 << ICE_AQC_CEE_FCOE_STATUS_S)
+#define ICE_AQC_CEE_ISCSI_STATUS_S 11
+#define ICE_AQC_CEE_ISCSI_STATUS_M (0x7 << ICE_AQC_CEE_ISCSI_STATUS_S)
+#define ICE_AQC_CEE_FIP_STATUS_S 16
+#define ICE_AQC_CEE_FIP_STATUS_M (0x7 << ICE_AQC_CEE_FIP_STATUS_S)
+ u8 reserved[12];
+};
+
+/* Set Local LLDP MIB (indirect 0x0A08)
+ * Used to replace the local MIB of a given LLDP agent. e.g. DCBx
+ */
+struct ice_aqc_lldp_set_local_mib {
+ u8 type;
+#define SET_LOCAL_MIB_TYPE_DCBX_M BIT(0)
+#define SET_LOCAL_MIB_TYPE_LOCAL_MIB 0
+#define SET_LOCAL_MIB_TYPE_CEE_M BIT(1)
+#define SET_LOCAL_MIB_TYPE_CEE_WILLING 0
+#define SET_LOCAL_MIB_TYPE_CEE_NON_WILLING SET_LOCAL_MIB_TYPE_CEE_M
+ u8 reserved0;
+ __le16 length;
+ u8 reserved1[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_lldp_set_local_mib_resp {
+ u8 status;
+#define SET_LOCAL_MIB_RESP_EVENT_M BIT(0)
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_SILENT 0
+#define SET_LOCAL_MIB_RESP_MIB_CHANGE_EVENT SET_LOCAL_MIB_RESP_EVENT_M
+ u8 reserved[15];
+};
+
+/* Stop/Start LLDP Agent (direct 0x0A09)
+ * Used for stopping/starting specific LLDP agent. e.g. DCBx.
+ * The same structure is used for the response, with the command field
+ * being used as the status field.
+ */
+struct ice_aqc_lldp_stop_start_specific_agent {
+ u8 command;
+#define ICE_AQC_START_STOP_AGENT_M BIT(0)
+#define ICE_AQC_START_STOP_AGENT_STOP_DCBX 0
+#define ICE_AQC_START_STOP_AGENT_START_DCBX ICE_AQC_START_STOP_AGENT_M
+ u8 reserved[15];
+};
+
/* Get/Set RSS key (indirect 0x0B04/0x0B02) */
struct ice_aqc_get_set_rss_key {
@@ -1980,10 +2192,22 @@ struct ice_aq_desc {
struct ice_aqc_query_txsched_res query_sched_res;
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
+ struct ice_aqc_query_port_ets port_ets;
struct ice_aqc_rl_profile rl_profile;
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
+ struct ice_aqc_pfc_ignore pfc_ignore;
+ struct ice_aqc_set_query_pfc_mode set_query_pfc_mode;
+ struct ice_aqc_set_dcb_params set_dcb_params;
+ struct ice_aqc_lldp_get_mib lldp_get_mib;
+ struct ice_aqc_lldp_set_mib_change lldp_set_event;
+ struct ice_aqc_lldp_add_delete_tlv lldp_add_delete_tlv;
+ struct ice_aqc_lldp_update_tlv lldp_update_tlv;
+ struct ice_aqc_lldp_stop lldp_stop;
+ struct ice_aqc_lldp_start lldp_start;
+ struct ice_aqc_lldp_set_local_mib lldp_set_mib;
+ struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
struct ice_aqc_add_txqs add_txqs;
@@ -2096,6 +2320,8 @@ enum ice_adminq_opc {
/* PXE */
ice_aqc_opc_clear_pxe_mode = 0x0110,
+ ice_aqc_opc_config_no_drop_policy = 0x0112,
+
/* internal switch commands */
ice_aqc_opc_get_sw_cfg = 0x0200,
@@ -2127,6 +2353,11 @@ enum ice_adminq_opc {
ice_aqc_opc_get_sw_rules = 0x02A3,
ice_aqc_opc_clear_pf_cfg = 0x02A4,
+ /* DCB commands */
+ ice_aqc_opc_pfc_ignore = 0x0301,
+ ice_aqc_opc_query_pfc_mode = 0x0302,
+ ice_aqc_opc_set_pfc_mode = 0x0303,
+ ice_aqc_opc_set_dcb_params = 0x0306,
/* transmit scheduler commands */
ice_aqc_opc_get_dflt_topo = 0x0400,
@@ -2136,6 +2367,7 @@ enum ice_adminq_opc {
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
+ ice_aqc_opc_query_port_ets = 0x040E,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
@@ -2166,6 +2398,17 @@ enum ice_adminq_opc {
ice_aqc_opc_nvm_cfg_write = 0x0705,
ice_aqc_opc_nvm_checksum = 0x0706,
+ /* LLDP commands */
+ ice_aqc_opc_lldp_get_mib = 0x0A00,
+ ice_aqc_opc_lldp_set_mib_change = 0x0A01,
+ ice_aqc_opc_lldp_add_tlv = 0x0A02,
+ ice_aqc_opc_lldp_update_tlv = 0x0A03,
+ ice_aqc_opc_lldp_delete_tlv = 0x0A04,
+ ice_aqc_opc_lldp_stop = 0x0A05,
+ ice_aqc_opc_lldp_start = 0x0A06,
+ ice_aqc_opc_get_cee_dcb_cfg = 0x0A07,
+ ice_aqc_opc_lldp_set_local_mib = 0x0A08,
+ ice_aqc_opc_lldp_stop_start_specific_agent = 0x0A09,
/* RSS commands */
ice_aqc_opc_set_rss_key = 0x0B02,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2ebf95eed..202592710 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1930,6 +1930,18 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
number);
}
break;
+ case ICE_AQC_CAPS_DCB:
+ caps->dcb = (number == 1);
+ caps->active_tc_bitmap = logical_id;
+ caps->maxtc = phys_id;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: DCB = %d\n", caps->dcb);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Active TC bitmap = %d\n",
+ caps->active_tc_bitmap);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: TC Max = %d\n", caps->maxtc);
+ break;
case ICE_AQC_CAPS_RSS:
caps->rss_table_size = number;
caps->rss_table_entry_width = logical_id;
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
new file mode 100644
index 000000000..a7810578d
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -0,0 +1,1393 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_sched.h"
+#include "ice_dcb.h"
+
+/**
+ * ice_aq_get_lldp_mib
+ * @hw: pointer to the HW struct
+ * @bridge_type: type of bridge requested
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @local_len: length of the returned Local LLDP MIB
+ * @remote_len: length of the returned Remote LLDP MIB
+ * @cd: pointer to command details structure or NULL
+ *
+ * Requests the complete LLDP MIB (entire packet). (0x0A00)
+ */
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_get_mib *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ cmd = &desc.params.lldp_get_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_get_mib);
+
+ cmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M;
+ cmd->type |= (bridge_type << ICE_AQ_LLDP_BRID_TYPE_S) &
+ ICE_AQ_LLDP_BRID_TYPE_M;
+
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+ if (!status) {
+ if (local_len)
+ *local_len = LE16_TO_CPU(cmd->local_len);
+ if (remote_len)
+ *remote_len = LE16_TO_CPU(cmd->remote_len);
+ }
+
+ return status;
+}
+
+/**
+ * ice_aq_cfg_lldp_mib_change
+ * @hw: pointer to the HW struct
+ * @ena_update: Enable or Disable event posting
+ * @cd: pointer to command details structure or NULL
+ *
+ * Enable or Disable posting of an event on ARQ when LLDP MIB
+ * associated with the interface changes (0x0A01)
+ */
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_mib_change *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_event;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_mib_change);
+
+ if (!ena_update)
+ cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_stop_lldp
+ * @hw: pointer to the HW struct
+ * @shutdown_lldp_agent: True if LLDP Agent needs to be Shutdown
+ * False if LLDP Agent needs to be Stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Stop or Shutdown the embedded LLDP Agent (0x0A05)
+ */
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_stop;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_stop);
+
+ if (shutdown_lldp_agent)
+ cmd->command |= ICE_AQ_LLDP_AGENT_SHUTDOWN;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_start_lldp
+ * @hw: pointer to the HW struct
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start the embedded LLDP Agent on all ports. (0x0A06)
+ */
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_start *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_start;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_start);
+
+ cmd->command = ICE_AQ_LLDP_AGENT_START;
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_set_lldp_mib - Set the LLDP MIB
+ * @hw: pointer to the HW struct
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buf: pointer to the caller-supplied buffer to store the MIB block
+ * @buf_size: size of the buffer (in bytes)
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set the LLDP MIB. (0x0A08)
+ */
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_set_local_mib *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.lldp_set_mib;
+
+ if (buf_size == 0 || !buf)
+ return ICE_ERR_PARAM;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib);
+
+ desc.flags |= CPU_TO_LE16((u16)ICE_AQ_FLAG_RD);
+ desc.datalen = CPU_TO_LE16(buf_size);
+
+ cmd->type = mib_type;
+ cmd->length = CPU_TO_LE16(buf_size);
+
+ return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
+}
+
+/**
+ * ice_get_dcbx_status
+ * @hw: pointer to the HW struct
+ *
+ * Get the DCBX status from the Firmware
+ */
+u8 ice_get_dcbx_status(struct ice_hw *hw)
+{
+ u32 reg;
+
+ reg = rd32(hw, PRTDCB_GENS);
+ return (u8)((reg & PRTDCB_GENS_DCBX_STATUS_M) >>
+ PRTDCB_GENS_DCBX_STATUS_S);
+}
+
+/**
+ * ice_parse_ieee_ets_common_tlv
+ * @buf: Data buffer to be parsed for ETS CFG/REC data
+ * @ets_cfg: Container to store parsed data
+ *
+ * Parses the common data of IEEE 802.1Qaz ETS CFG/REC TLV
+ */
+static void
+ice_parse_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ ets_cfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>
+ ICE_IEEE_ETS_PRIO_1_S);
+ ets_cfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>
+ ICE_IEEE_ETS_PRIO_0_S);
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 9 | 10| 11| 12| 13| 14| 15| 16|
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ ets_cfg->tcbwtable[i] = buf[offset];
+ ets_cfg->tsatable[i] = buf[ICE_MAX_TRAFFIC_CLASS + offset++];
+ }
+}
+
+/**
+ * ice_parse_ieee_etscfg_tlv
+ * @tlv: IEEE 802.1Qaz ETS CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_parse_ieee_etscfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ etscfg->willing = ((buf[0] & ICE_IEEE_ETS_WILLING_M) >>
+ ICE_IEEE_ETS_WILLING_S);
+ etscfg->cbs = ((buf[0] & ICE_IEEE_ETS_CBS_M) >> ICE_IEEE_ETS_CBS_S);
+ etscfg->maxtcs = ((buf[0] & ICE_IEEE_ETS_MAXTC_M) >>
+ ICE_IEEE_ETS_MAXTC_S);
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_parse_ieee_etsrec_tlv
+ * @tlv: IEEE 802.1Qaz ETS REC TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Parses IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_parse_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* Begin parsing at Priority Assignment Table (offset 1 in buf) */
+ ice_parse_ieee_ets_common_tlv(&buf[1], &dcbcfg->etsrec);
+}
+
+/**
+ * ice_parse_ieee_pfccfg_tlv
+ * @tlv: IEEE 802.1Qaz PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_parse_ieee_pfccfg_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ dcbcfg->pfc.willing = ((buf[0] & ICE_IEEE_PFC_WILLING_M) >>
+ ICE_IEEE_PFC_WILLING_S);
+ dcbcfg->pfc.mbc = ((buf[0] & ICE_IEEE_PFC_MBC_M) >> ICE_IEEE_PFC_MBC_S);
+ dcbcfg->pfc.pfccap = ((buf[0] & ICE_IEEE_PFC_CAP_M) >>
+ ICE_IEEE_PFC_CAP_S);
+ dcbcfg->pfc.pfcena = buf[1];
+}
+
+/**
+ * ice_parse_ieee_app_tlv
+ * @tlv: IEEE 802.1Qaz APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses IEEE 802.1Qaz APP PRIO TLV
+ */
+static void
+ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 offset = 0;
+ u16 typelen;
+ int i = 0;
+ u16 len;
+ u8 *buf;
+
+ typelen = NTOHS(tlv->typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ buf = tlv->tlvinfo;
+
+ /* Removing sizeof(ouisubtype) and reserved byte from len.
+ * Remaining len div 3 is number of APP TLVs.
+ */
+ len -= (sizeof(tlv->ouisubtype) + 1);
+
+ /* Move offset to App Priority Table */
+ offset++;
+
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (offset < len) {
+ dcbcfg->app[i].priority = ((buf[offset] &
+ ICE_IEEE_APP_PRIO_M) >>
+ ICE_IEEE_APP_PRIO_S);
+ dcbcfg->app[i].selector = ((buf[offset] &
+ ICE_IEEE_APP_SEL_M) >>
+ ICE_IEEE_APP_SEL_S);
+ dcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |
+ buf[offset + 2];
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+
+ dcbcfg->numapps = i;
+}
+
+/**
+ * ice_parse_ieee_tlv
+ * @tlv: IEEE 802.1Qaz TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_ieee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u8 subtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ switch (subtype) {
+ case ICE_IEEE_SUBTYPE_ETS_CFG:
+ ice_parse_ieee_etscfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_ETS_REC:
+ ice_parse_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_PFC_CFG:
+ ice_parse_ieee_pfccfg_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_SUBTYPE_APP_PRI:
+ ice_parse_ieee_app_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_parse_cee_pgcfg_tlv
+ * @tlv: CEE DCBX PG CFG TLV
+ * @dcbcfg: Local store to update ETS CFG data
+ *
+ * Parses CEE DCBX PG CFG TLV
+ */
+static void
+ice_parse_cee_pgcfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u16 offset = 0;
+ int i;
+
+ etscfg = &dcbcfg->etscfg;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ etscfg->willing = 1;
+
+ etscfg->cbs = 0;
+ /* Priority Group Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < 4; i++) {
+ etscfg->prio_table[i * 2] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ etscfg->prio_table[i * 2 + 1] =
+ ((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ offset++;
+ }
+
+ /* PG Percentage Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |pg0|pg1|pg2|pg3|pg4|pg5|pg6|pg7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i)
+ etscfg->tcbwtable[i] = buf[offset++];
+
+ /* Number of TCs supported (1 octet) */
+ etscfg->maxtcs = buf[offset];
+}
+
+/**
+ * ice_parse_cee_pfccfg_tlv
+ * @tlv: CEE DCBX PFC CFG TLV
+ * @dcbcfg: Local store to update PFC CFG data
+ *
+ * Parses CEE DCBX PFC CFG TLV
+ */
+static void
+ice_parse_cee_pfccfg_tlv(struct ice_cee_feat_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+
+ if (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)
+ dcbcfg->pfc.willing = 1;
+
+ /* ------------------------
+ * | PFC Enable | PFC TCs |
+ * ------------------------
+ * | 1 octet | 1 octet |
+ */
+ dcbcfg->pfc.pfcena = buf[0];
+ dcbcfg->pfc.pfccap = buf[1];
+}
+
+/**
+ * ice_parse_cee_app_tlv
+ * @tlv: CEE DCBX APP TLV
+ * @dcbcfg: Local store to update APP PRIO data
+ *
+ * Parses CEE DCBX APP PRIO TLV
+ */
+static void
+ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, typelen, offset = 0;
+ struct ice_cee_app_prio *app;
+ u8 i;
+
+ typelen = NTOHS(tlv->hdr.typelen);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+
+ dcbcfg->numapps = len / sizeof(*app);
+ if (!dcbcfg->numapps)
+ return;
+ if (dcbcfg->numapps > ICE_DCBX_MAX_APPS)
+ dcbcfg->numapps = ICE_DCBX_MAX_APPS;
+
+ for (i = 0; i < dcbcfg->numapps; i++) {
+ u8 up, selector;
+
+ app = (struct ice_cee_app_prio *)(tlv->tlvinfo + offset);
+ for (up = 0; up < ICE_MAX_USER_PRIORITY; up++)
+ if (app->prio_map & BIT(up))
+ break;
+
+ dcbcfg->app[i].priority = up;
+
+ /* Get Selector from lower 2 bits, and convert to IEEE */
+ selector = (app->upper_oui_sel & ICE_CEE_APP_SELECTOR_M);
+ switch (selector) {
+ case ICE_CEE_APP_SEL_ETHTYPE:
+ dcbcfg->app[i].selector = ICE_APP_SEL_ETHTYPE;
+ break;
+ case ICE_CEE_APP_SEL_TCPIP:
+ dcbcfg->app[i].selector = ICE_APP_SEL_TCPIP;
+ break;
+ default:
+ /* Keep selector as it is for unknown types */
+ dcbcfg->app[i].selector = selector;
+ }
+
+ dcbcfg->app[i].prot_id = NTOHS(app->protocol);
+ /* Move to next app */
+ offset += sizeof(*app);
+ }
+}
+
+/**
+ * ice_parse_cee_tlv
+ * @tlv: CEE DCBX TLV
+ * @dcbcfg: Local store to update DCBX config data
+ *
+ * Get the TLV subtype and send it to parsing function
+ * based on the subtype value
+ */
+static void
+ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_cee_feat_tlv *sub_tlv;
+ u8 subtype, feat_tlv_count = 0;
+ u16 len, tlvlen, typelen;
+ u32 ouisubtype;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ subtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>
+ ICE_LLDP_TLV_SUBTYPE_S);
+ /* Return if not CEE DCBX */
+ if (subtype != ICE_CEE_DCBX_TYPE)
+ return;
+
+ typelen = NTOHS(tlv->typelen);
+ tlvlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ len = sizeof(tlv->typelen) + sizeof(ouisubtype) +
+ sizeof(struct ice_cee_ctrl_tlv);
+ /* Return if no CEE DCBX Feature TLVs */
+ if (tlvlen <= len)
+ return;
+
+ sub_tlv = (struct ice_cee_feat_tlv *)((char *)tlv + len);
+ while (feat_tlv_count < ICE_CEE_MAX_FEAT_TYPE) {
+ u16 sublen;
+
+ typelen = NTOHS(sub_tlv->hdr.typelen);
+ sublen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ subtype = (u8)((typelen & ICE_LLDP_TLV_TYPE_M) >>
+ ICE_LLDP_TLV_TYPE_S);
+ switch (subtype) {
+ case ICE_CEE_SUBTYPE_PG_CFG:
+ ice_parse_cee_pgcfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_PFC_CFG:
+ ice_parse_cee_pfccfg_tlv(sub_tlv, dcbcfg);
+ break;
+ case ICE_CEE_SUBTYPE_APP_PRI:
+ ice_parse_cee_app_tlv(sub_tlv, dcbcfg);
+ break;
+ default:
+ return; /* Invalid Sub-type return */
+ }
+ feat_tlv_count++;
+ /* Move to next sub TLV */
+ sub_tlv = (struct ice_cee_feat_tlv *)
+ ((char *)sub_tlv + sizeof(sub_tlv->hdr.typelen) +
+ sublen);
+ }
+}
+
+/**
+ * ice_parse_org_tlv
+ * @tlv: Organization specific TLV
+ * @dcbcfg: Local store to update ETS REC data
+ *
+ * Currently only IEEE 802.1Qaz TLV is supported, all others
+ * will be returned
+ */
+static void
+ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 ouisubtype;
+ u32 oui;
+
+ ouisubtype = NTOHL(tlv->ouisubtype);
+ oui = ((ouisubtype & ICE_LLDP_TLV_OUI_M) >> ICE_LLDP_TLV_OUI_S);
+ switch (oui) {
+ case ICE_IEEE_8021QAZ_OUI:
+ ice_parse_ieee_tlv(tlv, dcbcfg);
+ break;
+ case ICE_CEE_DCBX_OUI:
+ ice_parse_cee_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_lldp_to_dcb_cfg
+ * @lldpmib: LLDPDU to be parsed
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Parse DCB configuration from the LLDPDU
+ */
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_lldp_org_tlv *tlv;
+ enum ice_status ret = ICE_SUCCESS;
+ u16 offset = 0;
+ u16 typelen;
+ u16 type;
+ u16 len;
+
+ if (!lldpmib || !dcbcfg)
+ return ICE_ERR_PARAM;
+
+ /* set to the start of LLDPDU */
+ lldpmib += ETH_HEADER_LEN;
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ typelen = NTOHS(tlv->typelen);
+ type = ((typelen & ICE_LLDP_TLV_TYPE_M) >> ICE_LLDP_TLV_TYPE_S);
+ len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
+ offset += sizeof(typelen) + len;
+
+ /* END TLV or beyond LLDPDU size */
+ if (type == ICE_TLV_TYPE_END || offset > ICE_LLDPDU_SIZE)
+ break;
+
+ switch (type) {
+ case ICE_TLV_TYPE_ORG:
+ ice_parse_org_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+
+ /* Move to next TLV */
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_aq_get_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @mib_type: mib type for the query
+ * @bridgetype: bridge type for the query (remote)
+ * @dcbcfg: store for LLDPDU data
+ *
+ * Query DCB configuration from the firmware
+ */
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ enum ice_status ret;
+ u8 *lldpmib;
+
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ ret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,
+ ICE_LLDPDU_SIZE, NULL, NULL, NULL);
+
+ if (ret == ICE_SUCCESS)
+ /* Parse LLDP MIB to get DCB configuration */
+ ret = ice_lldp_to_dcb_cfg(lldpmib, dcbcfg);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_start_stop_dcbx - Start/Stop DCBx service in FW
+ * @hw: pointer to the HW struct
+ * @start_dcbx_agent: True if DCBx Agent needs to be started
+ * False if DCBx Agent needs to be stopped
+ * @dcbx_agent_status: FW indicates back the DCBx agent status
+ * True if DCBx Agent is active
+ * False if DCBx Agent is stopped
+ * @cd: pointer to command details structure or NULL
+ *
+ * Start/Stop the embedded dcbx Agent. In case that this wrapper function
+ * returns ICE_SUCCESS, caller will need to check if FW returns back the same
+ * value as stated in dcbx_agent_status, and react accordingly. (0x0A09)
+ */
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd)
+{
+ struct ice_aqc_lldp_stop_start_specific_agent *cmd;
+ enum ice_status status;
+ struct ice_aq_desc desc;
+ u16 opcode;
+
+ cmd = &desc.params.lldp_agent_ctrl;
+
+ opcode = ice_aqc_opc_lldp_stop_start_specific_agent;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, opcode);
+
+ if (start_dcbx_agent)
+ cmd->command = ICE_AQC_START_STOP_AGENT_START_DCBX;
+
+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+
+ *dcbx_agent_status = false;
+
+ if (status == ICE_SUCCESS &&
+ cmd->command == ICE_AQC_START_STOP_AGENT_START_DCBX)
+ *dcbx_agent_status = true;
+
+ return status;
+}
+
+/**
+ * ice_aq_get_cee_dcb_cfg
+ * @hw: pointer to the HW struct
+ * @buff: response buffer that stores CEE operational configuration
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get CEE DCBX mode operational configuration from firmware (0x0A07)
+ */
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aq_desc desc;
+
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cee_dcb_cfg);
+
+ return ice_aq_send_cmd(hw, &desc, (void *)buff, sizeof(*buff), cd);
+}
+
+/**
+ * ice_cee_to_dcb_cfg
+ * @cee_cfg: pointer to CEE configuration struct
+ * @dcbcfg: DCB configuration struct
+ *
+ * Convert CEE configuration from firmware to DCB configuration
+ */
+static void
+ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
+ u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
+ u16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);
+ u8 i, err, sync, oper, app_index, ice_app_sel_type;
+ u16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;
+ u16 ice_app_prot_id_type;
+
+ /* CEE PG data to ETS config */
+ dcbcfg->etscfg.maxtcs = cee_cfg->oper_num_tc;
+
+ /* Note that the FW creates the oper_prio_tc nibbles reversed
+ * from those in the CEE Priority Group sub-TLV.
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ dcbcfg->etscfg.prio_table[i * 2] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_0_M) >>
+ ICE_CEE_PGID_PRIO_0_S);
+ dcbcfg->etscfg.prio_table[i * 2 + 1] =
+ ((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_1_M) >>
+ ICE_CEE_PGID_PRIO_1_S);
+ }
+
+ ice_for_each_traffic_class(i) {
+ dcbcfg->etscfg.tcbwtable[i] = cee_cfg->oper_tc_bw[i];
+
+ if (dcbcfg->etscfg.prio_table[i] == ICE_CEE_PGID_STRICT) {
+ /* Map it to next empty TC */
+ dcbcfg->etscfg.prio_table[i] = cee_cfg->oper_num_tc - 1;
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_STRICT;
+ } else {
+ dcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_ETS;
+ }
+ }
+
+ /* CEE PFC data to ETS config */
+ dcbcfg->pfc.pfcena = cee_cfg->oper_pfc_en;
+ dcbcfg->pfc.pfccap = ICE_MAX_TRAFFIC_CLASS;
+
+ app_index = 0;
+ for (i = 0; i < 3; i++) {
+ if (i == 0) {
+ /* FCoE APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FCOE_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FCOE_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FCOE_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FCOE_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FCOE;
+ } else if (i == 1) {
+ /* iSCSI APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_ISCSI_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_ISCSI_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_ISCSI_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_ISCSI_S;
+ ice_app_sel_type = ICE_APP_SEL_TCPIP;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_ISCSI;
+ } else {
+ /* FIP APP */
+ ice_aqc_cee_status_mask = ICE_AQC_CEE_FIP_STATUS_M;
+ ice_aqc_cee_status_shift = ICE_AQC_CEE_FIP_STATUS_S;
+ ice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FIP_M;
+ ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FIP_S;
+ ice_app_sel_type = ICE_APP_SEL_ETHTYPE;
+ ice_app_prot_id_type = ICE_APP_PROT_ID_FIP;
+ }
+
+ status = (tlv_status & ice_aqc_cee_status_mask) >>
+ ice_aqc_cee_status_shift;
+ err = (status & ICE_TLV_STATUS_ERR) ? 1 : 0;
+ sync = (status & ICE_TLV_STATUS_SYNC) ? 1 : 0;
+ oper = (status & ICE_TLV_STATUS_OPER) ? 1 : 0;
+ /* Add FCoE/iSCSI/FIP APP if Error is False and
+ * Oper/Sync is True
+ */
+ if (!err && sync && oper) {
+ dcbcfg->app[app_index].priority =
+ (app_prio & ice_aqc_cee_app_mask) >>
+ ice_aqc_cee_app_shift;
+ dcbcfg->app[app_index].selector = ice_app_sel_type;
+ dcbcfg->app[app_index].prot_id = ice_app_prot_id_type;
+ app_index++;
+ }
+ }
+
+ dcbcfg->numapps = app_index;
+}
+
+/**
+ * ice_get_ieee_dcb_cfg
+ * @pi: port information structure
+ * @dcbx_mode: mode of DCBX (IEEE or CEE)
+ *
+ * Get IEEE or CEE mode DCB configuration from the Firmware
+ */
+STATIC enum ice_status
+ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
+{
+ struct ice_dcbx_cfg *dcbx_cfg = NULL;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ if (dcbx_mode == ICE_DCBX_MODE_IEEE)
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ else if (dcbx_mode == ICE_DCBX_MODE_CEE)
+ dcbx_cfg = &pi->desired_dcbx_cfg;
+
+ /* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE
+ * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE
+ */
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ if (ret)
+ goto out;
+
+ /* Get Remote DCB Config */
+ dcbx_cfg = &pi->remote_dcbx_cfg;
+ ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
+ ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
+ /* Don't treat ENOENT as an error for Remote MIBs */
+ if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+ ret = ICE_SUCCESS;
+
+out:
+ return ret;
+}
+
+/**
+ * ice_get_dcb_cfg
+ * @pi: port information structure
+ *
+ * Get DCB configuration from the Firmware
+ */
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
+{
+ struct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;
+ struct ice_dcbx_cfg *dcbx_cfg;
+ enum ice_status ret;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
+ if (ret == ICE_SUCCESS) {
+ /* CEE mode */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
+ dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
+ ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
+ } else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
+ /* CEE mode not enabled try querying IEEE data */
+ dcbx_cfg = &pi->local_dcbx_cfg;
+ dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;
+ ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);
+ }
+
+ return ret;
+}
+
+/**
+ * ice_init_dcb
+ * @hw: pointer to the HW struct
+ *
+ * Update DCB configuration from the Firmware
+ */
+enum ice_status ice_init_dcb(struct ice_hw *hw)
+{
+ struct ice_port_info *pi = hw->port_info;
+ enum ice_status ret = ICE_SUCCESS;
+
+ if (!hw->func_caps.common_cap.dcb)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ pi->is_sw_lldp = true;
+
+ /* Get DCBX status */
+ pi->dcbx_status = ice_get_dcbx_status(hw);
+
+ if (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||
+ pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS) {
+ /* Get current DCBX configuration */
+ ret = ice_get_dcb_cfg(pi);
+ pi->is_sw_lldp = (hw->adminq.sq_last_status == ICE_AQ_RC_EPERM);
+ if (ret)
+ return ret;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {
+ return ICE_ERR_NOT_READY;
+ } else if (pi->dcbx_status == ICE_DCBX_STATUS_MULTIPLE_PEERS) {
+ }
+
+ /* Configure the LLDP MIB change event */
+ ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);
+ if (!ret)
+ pi->is_sw_lldp = false;
+
+ return ret;
+}
+
+/**
+ * ice_add_ieee_ets_common_tlv
+ * @buf: Data buffer to be populated with ice_dcb_ets_cfg data
+ * @ets_cfg: Container for ice_dcb_ets_cfg data
+ *
+ * Populate the TLV buffer with ice_dcb_ets_cfg data
+ */
+static void
+ice_add_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)
+{
+ u8 priority0, priority1;
+ u8 offset = 0;
+ int i;
+
+ /* Priority Assignment Table (4 octets)
+ * Octets:| 1 | 2 | 3 | 4 |
+ * -----------------------------------------
+ * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|
+ * -----------------------------------------
+ * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|
+ * -----------------------------------------
+ */
+ for (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {
+ priority0 = ets_cfg->prio_table[i * 2] & 0xF;
+ priority1 = ets_cfg->prio_table[i * 2 + 1] & 0xF;
+ buf[offset] = (priority0 << ICE_IEEE_ETS_PRIO_1_S) | priority1;
+ offset++;
+ }
+
+ /* TC Bandwidth Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ *
+ * TSA Assignment Table (8 octets)
+ * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
+ * ---------------------------------
+ * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|
+ * ---------------------------------
+ */
+ ice_for_each_traffic_class(i) {
+ buf[offset] = ets_cfg->tcbwtable[i];
+ buf[ICE_MAX_TRAFFIC_CLASS + offset] = ets_cfg->tsatable[i];
+ offset++;
+ }
+}
+
+/**
+ * ice_add_ieee_ets_tlv - Prepare ETS TLV in IEEE format
+ * @tlv: Fill the ETS config data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS CFG TLV
+ */
+static void
+ice_add_ieee_ets_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etscfg;
+ u8 *buf = tlv->tlvinfo;
+ u8 maxtcwilling = 0;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* First Octet post subtype
+ * --------------------------
+ * |will-|CBS | Re- | Max |
+ * |ing | |served| TCs |
+ * --------------------------
+ * |1bit | 1bit|3 bits|3bits|
+ */
+ etscfg = &dcbcfg->etscfg;
+ if (etscfg->willing)
+ maxtcwilling = BIT(ICE_IEEE_ETS_WILLING_S);
+ maxtcwilling |= etscfg->maxtcs & ICE_IEEE_ETS_MAXTC_M;
+ buf[0] = maxtcwilling;
+
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etscfg);
+}
+
+/**
+ * ice_add_ieee_etsrec_tlv - Prepare ETS Recommended TLV in IEEE format
+ * @tlv: Fill ETS Recommended TLV in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Prepare IEEE 802.1Qaz ETS REC TLV
+ */
+static void
+ice_add_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ struct ice_dcb_ets_cfg *etsrec;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_ETS_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_ETS_REC);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ etsrec = &dcbcfg->etsrec;
+
+ /* First Octet is reserved */
+ /* Begin adding at Priority Assignment Table (offset 1 in buf) */
+ ice_add_ieee_ets_common_tlv(&buf[1], etsrec);
+}
+
+/**
+ * ice_add_ieee_pfc_tlv - Prepare PFC TLV in IEEE format
+ * @tlv: Fill PFC TLV in IEEE format
+ * @dcbcfg: Local store which holds the PFC CFG data
+ *
+ * Prepare IEEE 802.1Qaz PFC CFG TLV
+ */
+static void
+ice_add_ieee_pfc_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
+{
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+ u16 typelen;
+
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
+ ICE_IEEE_PFC_TLV_LEN);
+ tlv->typelen = HTONS(typelen);
+
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_PFC_CFG);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* ----------------------------------------
+ * |will-|MBC | Re- | PFC | PFC Enable |
+ * |ing | |served| cap | |
+ * -----------------------------------------
+ * |1bit | 1bit|2 bits|4bits| 1 octet |
+ */
+ if (dcbcfg->pfc.willing)
+ buf[0] = BIT(ICE_IEEE_PFC_WILLING_S);
+
+ if (dcbcfg->pfc.mbc)
+ buf[0] |= BIT(ICE_IEEE_PFC_MBC_S);
+
+ buf[0] |= dcbcfg->pfc.pfccap & 0xF;
+ buf[1] = dcbcfg->pfc.pfcena;
+}
+
+/**
+ * ice_add_ieee_app_pri_tlv - Prepare APP TLV in IEEE format
+ * @tlv: Fill APP TLV in IEEE format
+ * @dcbcfg: Local store which holds the APP CFG data
+ *
+ * Prepare IEEE 802.1Qaz APP CFG TLV
+ */
+static void
+ice_add_ieee_app_pri_tlv(struct ice_lldp_org_tlv *tlv,
+ struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 typelen, len, offset = 0;
+ u8 priority, selector, i = 0;
+ u8 *buf = tlv->tlvinfo;
+ u32 ouisubtype;
+
+ /* No APP TLVs then just return */
+ if (dcbcfg->numapps == 0)
+ return;
+ ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
+ ICE_IEEE_SUBTYPE_APP_PRI);
+ tlv->ouisubtype = HTONL(ouisubtype);
+
+ /* Move offset to App Priority Table */
+ offset++;
+ /* Application Priority Table (3 octets)
+ * Octets:| 1 | 2 | 3 |
+ * -----------------------------------------
+ * |Priority|Rsrvd| Sel | Protocol ID |
+ * -----------------------------------------
+ * Bits:|23 21|20 19|18 16|15 0|
+ * -----------------------------------------
+ */
+ while (i < dcbcfg->numapps) {
+ priority = dcbcfg->app[i].priority & 0x7;
+ selector = dcbcfg->app[i].selector & 0x7;
+ buf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;
+ buf[offset + 1] = (dcbcfg->app[i].prot_id >> 0x8) & 0xFF;
+ buf[offset + 2] = dcbcfg->app[i].prot_id & 0xFF;
+ /* Move to next app */
+ offset += 3;
+ i++;
+ if (i >= ICE_DCBX_MAX_APPS)
+ break;
+ }
+ /* len includes size of ouisubtype + 1 reserved + 3*numapps */
+ len = sizeof(tlv->ouisubtype) + 1 + (i * 3);
+ typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) | (len & 0x1FF));
+ tlv->typelen = HTONS(typelen);
+}
+
+/**
+ * ice_add_dcb_tlv - Add all IEEE TLVs
+ * @tlv: Fill TLV data in IEEE format
+ * @dcbcfg: Local store which holds the DCB Config
+ * @tlvid: Type of IEEE TLV
+ *
+ * Add tlv information
+ */
+static void
+ice_add_dcb_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg,
+ u16 tlvid)
+{
+ switch (tlvid) {
+ case ICE_IEEE_TLV_ID_ETS_CFG:
+ ice_add_ieee_ets_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_ETS_REC:
+ ice_add_ieee_etsrec_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_PFC_CFG:
+ ice_add_ieee_pfc_tlv(tlv, dcbcfg);
+ break;
+ case ICE_IEEE_TLV_ID_APP_PRI:
+ ice_add_ieee_app_pri_tlv(tlv, dcbcfg);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * ice_dcb_cfg_to_lldp - Convert DCB configuration to MIB format
+ * @lldpmib: pointer to the HW struct
+ * @miblen: length of LLDP mib
+ * @dcbcfg: Local store which holds the DCB Config
+ *
+ * Convert the DCB configuration to MIB format
+ */
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)
+{
+ u16 len, offset = 0, tlvid = ICE_TLV_ID_START;
+ struct ice_lldp_org_tlv *tlv;
+ u16 typelen;
+
+ tlv = (struct ice_lldp_org_tlv *)lldpmib;
+ while (1) {
+ ice_add_dcb_tlv(tlv, dcbcfg, tlvid++);
+ typelen = NTOHS(tlv->typelen);
+ len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
+ if (len)
+ offset += len + 2;
+ /* END TLV or beyond LLDPDU size */
+ if (tlvid >= ICE_TLV_ID_END_OF_LLDPPDU ||
+ offset > ICE_LLDPDU_SIZE)
+ break;
+ /* Move to next TLV */
+ if (len)
+ tlv = (struct ice_lldp_org_tlv *)
+ ((char *)tlv + sizeof(tlv->typelen) + len);
+ }
+ *miblen = offset;
+}
+
+/**
+ * ice_set_dcb_cfg - Set the local LLDP MIB to FW
+ * @pi: port information structure
+ *
+ * Set DCB configuration to the Firmware
+ */
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
+{
+ u8 mib_type, *lldpmib = NULL;
+ struct ice_dcbx_cfg *dcbcfg;
+ enum ice_status ret;
+ struct ice_hw *hw;
+ u16 miblen;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+
+ hw = pi->hw;
+
+ /* update the HW local config */
+ dcbcfg = &pi->local_dcbx_cfg;
+ /* Allocate the LLDPDU */
+ lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
+ if (!lldpmib)
+ return ICE_ERR_NO_MEMORY;
+
+ mib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;
+ if (dcbcfg->app_mode == ICE_DCBX_APPS_NON_WILLING)
+ mib_type |= SET_LOCAL_MIB_TYPE_CEE_NON_WILLING;
+
+ ice_dcb_cfg_to_lldp(lldpmib, &miblen, dcbcfg);
+ ret = ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen,
+ NULL);
+
+ ice_free(hw, lldpmib);
+
+ return ret;
+}
+
+/**
+ * ice_aq_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration
+ */
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ struct ice_aqc_query_port_ets *cmd;
+ struct ice_aq_desc desc;
+ enum ice_status status;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ cmd = &desc.params.port_ets;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_port_ets);
+ cmd->port_teid = pi->root->info.node_teid;
+
+ status = ice_aq_send_cmd(pi->hw, &desc, buf, buf_size, cd);
+ return status;
+}
+
+/**
+ * ice_update_port_tc_tree_cfg - update TC tree configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ *
+ * update the SW DB with the new TC changes
+ */
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf)
+{
+ struct ice_sched_node *node, *tc_node;
+ struct ice_aqc_get_elem elem;
+ enum ice_status status = ICE_SUCCESS;
+ u32 teid1, teid2;
+ u8 i, j;
+
+ if (!pi)
+ return ICE_ERR_PARAM;
+ /* suspend the missing TC nodes */
+ for (i = 0; i < pi->root->num_children; i++) {
+ teid1 = LE32_TO_CPU(pi->root->children[i]->info.node_teid);
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid1 == teid2)
+ break;
+ }
+ if (j < ICE_MAX_TRAFFIC_CLASS)
+ continue;
+ /* TC is missing */
+ pi->root->children[i]->in_use = false;
+ }
+ /* add the new TC nodes */
+ ice_for_each_traffic_class(j) {
+ teid2 = LE32_TO_CPU(buf->tc_node_teid[j]);
+ if (teid2 == ICE_INVAL_TEID)
+ continue;
+ /* Is it already present in the tree ? */
+ for (i = 0; i < pi->root->num_children; i++) {
+ tc_node = pi->root->children[i];
+ if (!tc_node)
+ continue;
+ teid1 = LE32_TO_CPU(tc_node->info.node_teid);
+ if (teid1 == teid2) {
+ tc_node->tc_num = j;
+ tc_node->in_use = true;
+ break;
+ }
+ }
+ if (i < pi->root->num_children)
+ continue;
+ /* new TC */
+ status = ice_sched_query_elem(pi->hw, teid2, &elem);
+ if (!status)
+ status = ice_sched_add_node(pi, 1, &elem.generic[0]);
+ if (status)
+ break;
+ /* update the TC number */
+ node = ice_sched_find_node_by_teid(pi->root, teid2);
+ if (node)
+ node->tc_num = j;
+ }
+ return status;
+}
+
+/**
+ * ice_query_port_ets - query port ets configuration
+ * @pi: port information structure
+ * @buf: pointer to buffer
+ * @buf_size: buffer size in bytes
+ * @cd: pointer to command details structure or NULL
+ *
+ * query current port ets configuration and update the
+ * SW DB with the TC changes
+ */
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd)
+{
+ enum ice_status status;
+
+ ice_acquire_lock(&pi->sched_lock);
+ status = ice_aq_query_port_ets(pi, buf, buf_size, cd);
+ if (!status)
+ status = ice_update_port_tc_tree_cfg(pi, buf);
+ ice_release_lock(&pi->sched_lock);
+ return status;
+}
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
new file mode 100644
index 000000000..d922c8a29
--- /dev/null
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -0,0 +1,223 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_DCB_H_
+#define _ICE_DCB_H_
+
+#include "ice_type.h"
+
+#define ICE_DCBX_OFFLOAD_DIS 0
+#define ICE_DCBX_OFFLOAD_ENABLED 1
+
+#define ICE_DCBX_STATUS_NOT_STARTED 0
+#define ICE_DCBX_STATUS_IN_PROGRESS 1
+#define ICE_DCBX_STATUS_DONE 2
+#define ICE_DCBX_STATUS_MULTIPLE_PEERS 3
+#define ICE_DCBX_STATUS_DIS 7
+
+#define ICE_TLV_TYPE_END 0
+#define ICE_TLV_TYPE_ORG 127
+
+#define ICE_IEEE_8021QAZ_OUI 0x0080C2
+#define ICE_IEEE_SUBTYPE_ETS_CFG 9
+#define ICE_IEEE_SUBTYPE_ETS_REC 10
+#define ICE_IEEE_SUBTYPE_PFC_CFG 11
+#define ICE_IEEE_SUBTYPE_APP_PRI 12
+
+#define ICE_CEE_DCBX_OUI 0x001B21
+#define ICE_CEE_DCBX_TYPE 2
+
+#define ICE_CEE_SUBTYPE_CTRL 1
+#define ICE_CEE_SUBTYPE_PG_CFG 2
+#define ICE_CEE_SUBTYPE_PFC_CFG 3
+#define ICE_CEE_SUBTYPE_APP_PRI 4
+
+#define ICE_CEE_MAX_FEAT_TYPE 3
+#define ICE_LLDP_ADMINSTATUS_DIS 0
+#define ICE_LLDP_ADMINSTATUS_ENA_RX 1
+#define ICE_LLDP_ADMINSTATUS_ENA_TX 2
+#define ICE_LLDP_ADMINSTATUS_ENA_RXTX 3
+
+/* Defines for LLDP TLV header */
+#define ICE_LLDP_TLV_LEN_S 0
+#define ICE_LLDP_TLV_LEN_M (0x01FF << ICE_LLDP_TLV_LEN_S)
+#define ICE_LLDP_TLV_TYPE_S 9
+#define ICE_LLDP_TLV_TYPE_M (0x7F << ICE_LLDP_TLV_TYPE_S)
+#define ICE_LLDP_TLV_SUBTYPE_S 0
+#define ICE_LLDP_TLV_SUBTYPE_M (0xFF << ICE_LLDP_TLV_SUBTYPE_S)
+#define ICE_LLDP_TLV_OUI_S 8
+#define ICE_LLDP_TLV_OUI_M (0xFFFFFFUL << ICE_LLDP_TLV_OUI_S)
+
+/* Defines for IEEE ETS TLV */
+#define ICE_IEEE_ETS_MAXTC_S 0
+#define ICE_IEEE_ETS_MAXTC_M (0x7 << ICE_IEEE_ETS_MAXTC_S)
+#define ICE_IEEE_ETS_CBS_S 6
+#define ICE_IEEE_ETS_CBS_M BIT(ICE_IEEE_ETS_CBS_S)
+#define ICE_IEEE_ETS_WILLING_S 7
+#define ICE_IEEE_ETS_WILLING_M BIT(ICE_IEEE_ETS_WILLING_S)
+#define ICE_IEEE_ETS_PRIO_0_S 0
+#define ICE_IEEE_ETS_PRIO_0_M (0x7 << ICE_IEEE_ETS_PRIO_0_S)
+#define ICE_IEEE_ETS_PRIO_1_S 4
+#define ICE_IEEE_ETS_PRIO_1_M (0x7 << ICE_IEEE_ETS_PRIO_1_S)
+#define ICE_CEE_PGID_PRIO_0_S 0
+#define ICE_CEE_PGID_PRIO_0_M (0xF << ICE_CEE_PGID_PRIO_0_S)
+#define ICE_CEE_PGID_PRIO_1_S 4
+#define ICE_CEE_PGID_PRIO_1_M (0xF << ICE_CEE_PGID_PRIO_1_S)
+#define ICE_CEE_PGID_STRICT 15
+
+/* Defines for IEEE TSA types */
+#define ICE_IEEE_TSA_STRICT 0
+#define ICE_IEEE_TSA_CBS 1
+#define ICE_IEEE_TSA_ETS 2
+#define ICE_IEEE_TSA_VENDOR 255
+
+/* Defines for IEEE PFC TLV */
+#define ICE_IEEE_PFC_CAP_S 0
+#define ICE_IEEE_PFC_CAP_M (0xF << ICE_IEEE_PFC_CAP_S)
+#define ICE_IEEE_PFC_MBC_S 6
+#define ICE_IEEE_PFC_MBC_M BIT(ICE_IEEE_PFC_MBC_S)
+#define ICE_IEEE_PFC_WILLING_S 7
+#define ICE_IEEE_PFC_WILLING_M BIT(ICE_IEEE_PFC_WILLING_S)
+
+/* Defines for IEEE APP TLV */
+#define ICE_IEEE_APP_SEL_S 0
+#define ICE_IEEE_APP_SEL_M (0x7 << ICE_IEEE_APP_SEL_S)
+#define ICE_IEEE_APP_PRIO_S 5
+#define ICE_IEEE_APP_PRIO_M (0x7 << ICE_IEEE_APP_PRIO_S)
+
+/* TLV definitions for preparing MIB */
+#define ICE_TLV_ID_CHASSIS_ID 0
+#define ICE_TLV_ID_PORT_ID 1
+#define ICE_TLV_ID_TIME_TO_LIVE 2
+#define ICE_IEEE_TLV_ID_ETS_CFG 3
+#define ICE_IEEE_TLV_ID_ETS_REC 4
+#define ICE_IEEE_TLV_ID_PFC_CFG 5
+#define ICE_IEEE_TLV_ID_APP_PRI 6
+#define ICE_TLV_ID_END_OF_LLDPPDU 7
+#define ICE_TLV_ID_START ICE_IEEE_TLV_ID_ETS_CFG
+
+#define ICE_IEEE_ETS_TLV_LEN 25
+#define ICE_IEEE_PFC_TLV_LEN 6
+#define ICE_IEEE_APP_TLV_LEN 11
+
+#pragma pack(1)
+/* IEEE 802.1AB LLDP TLV structure */
+struct ice_lldp_generic_tlv {
+ __be16 typelen;
+ u8 tlvinfo[1];
+};
+
+/* IEEE 802.1AB LLDP Organization specific TLV */
+struct ice_lldp_org_tlv {
+ __be16 typelen;
+ __be32 ouisubtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack()
+
+struct ice_cee_tlv_hdr {
+ __be16 typelen;
+ u8 operver;
+ u8 maxver;
+};
+
+struct ice_cee_ctrl_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ __be32 seqno;
+ __be32 ackno;
+};
+
+struct ice_cee_feat_tlv {
+ struct ice_cee_tlv_hdr hdr;
+ u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
+#define ICE_CEE_FEAT_TLV_ENA_M 0x80
+#define ICE_CEE_FEAT_TLV_WILLING_M 0x40
+#define ICE_CEE_FEAT_TLV_ERR_M 0x20
+ u8 subtype;
+ u8 tlvinfo[1];
+};
+
+#pragma pack(1)
+struct ice_cee_app_prio {
+ __be16 protocol;
+ u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
+#define ICE_CEE_APP_SELECTOR_M 0x03
+ __be16 lower_oui;
+ u8 prio_map;
+};
+
+#pragma pack()
+
+/* TODO: The below structures related LLDP/DCBX variables
+ * and statistics are defined but need to find how to get
+ * the required information from the Firmware to use them
+ */
+
+/* IEEE 802.1AB LLDP Agent Statistics */
+struct ice_lldp_stats {
+ u64 remtablelastchangetime;
+ u64 remtableinserts;
+ u64 remtabledeletes;
+ u64 remtabledrops;
+ u64 remtableageouts;
+ u64 txframestotal;
+ u64 rxframesdiscarded;
+ u64 rxportframeerrors;
+ u64 rxportframestotal;
+ u64 rxporttlvsdiscardedtotal;
+ u64 rxporttlvsunrecognizedtotal;
+ u64 remtoomanyneighbors;
+};
+
+/* IEEE 802.1Qaz DCBX variables */
+struct ice_dcbx_variables {
+ u32 defmaxtrafficclasses;
+ u32 defprioritytcmapping;
+ u32 deftcbandwidth;
+ u32 deftsaassignment;
+};
+
+enum ice_status
+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
+ u16 buf_size, u16 *local_len, u16 *remote_len,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
+ struct ice_aqc_get_cee_dcb_cfg_resp *buff,
+ struct ice_sq_cd *cd);
+u8 ice_get_dcbx_status(struct ice_hw *hw);
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
+ struct ice_dcbx_cfg *dcbcfg);
+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);
+enum ice_status ice_init_dcb(struct ice_hw *hw);
+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);
+enum ice_status
+ice_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cmd_details);
+enum ice_status
+ice_aq_query_port_ets(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
+ struct ice_aqc_port_ets_elem *buf);
+enum ice_status
+ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent,
+ struct ice_sq_cd *cd);
+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
+ bool *dcbx_agent_status, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
+ struct ice_sq_cd *cd);
+#endif /* _ICE_DCB_H_ */
diff --git a/drivers/net/ice/base/ice_status.h b/drivers/net/ice/base/ice_status.h
index cd561b0a4..ac120fa30 100644
--- a/drivers/net/ice/base/ice_status.h
+++ b/drivers/net/ice/base/ice_status.h
@@ -13,6 +13,7 @@ enum ice_status {
ICE_ERR_PARAM = -1,
ICE_ERR_NOT_IMPL = -2,
ICE_ERR_NOT_READY = -3,
+ ICE_ERR_NOT_SUPPORTED = -4,
ICE_ERR_BAD_PTR = -5,
ICE_ERR_INVAL_SIZE = -6,
ICE_ERR_DEVICE_NOT_SUPPORTED = -8,
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 90736faa1..6a08b3d28 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -240,6 +240,9 @@ struct ice_hw_common_caps {
u32 os2bmc;
u32 valid_functions;
+ /* DCB capabilities */
+ u32 active_tc_bitmap;
+ u32 maxtc;
/* RSS related capabilities */
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
@@ -276,6 +279,7 @@ struct ice_hw_common_caps {
u8 evb_802_1_qbg; /* Edge Virtual Bridging */
u8 evb_802_1_qbh; /* Bridge Port Extension */
+ u8 dcb;
u8 iscsi;
u8 mgmt_cem;
@@ -527,7 +531,6 @@ struct ice_sched_vsi_info {
struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
};
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
/* CEE or IEEE 802.1Qaz ETS Configuration data */
struct ice_dcb_ets_cfg {
u8 willing;
@@ -580,7 +583,6 @@ struct ice_dcbx_cfg {
u8 app_mode;
#define ICE_DCBX_APPS_NON_WILLING 0x1
};
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
struct ice_port_info {
struct ice_sched_node *root; /* Root Node per Port */
@@ -601,9 +603,13 @@ struct ice_port_info {
struct ice_lock sched_lock; /* protect access to TXSched tree */
/* List contain profile ID(s) and other params per layer */
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
-#if !defined(NO_DCB_SUPPORT) || defined(ADQ_SUPPORT)
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */
-#endif /* !NO_DCB_SUPPORT || ADQ_SUPPORT */
+ /* DCBX info */
+ struct ice_dcbx_cfg remote_dcbx_cfg; /* Peer Cfg */
+ struct ice_dcbx_cfg desired_dcbx_cfg; /* CEE Desired Cfg */
+ /* LLDP/DCBX Status */
+ u8 dcbx_status;
+ u8 is_sw_lldp;
u8 lport;
#define ICE_LPORT_MASK 0xff
u8 is_vf;
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index d7f8536bc..755d2497b 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -9,6 +9,7 @@ sources = [
'ice_nvm.c',
'ice_flex_pipe.c',
'ice_flow.c',
+ 'ice_dcb.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 32/38] net/ice/base: add FDIR support
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (31 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 31/38] net/ice/base: add DCB support Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 33/38] net/ice/base: change profile priority for RSS reply Qi Zhang
` (6 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add flow director related support base code.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 13 +
drivers/net/ice/base/ice_common.c | 36 ++
drivers/net/ice/base/ice_common.h | 1 +
drivers/net/ice/base/ice_fdir.c | 742 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++++++++
drivers/net/ice/base/ice_flex_pipe.c | 232 +++++++++++
drivers/net/ice/base/ice_type.h | 55 +++
drivers/net/ice/base/meson.build | 1 +
9 files changed, 1283 insertions(+)
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 89d21334e..a3aabccf1 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -52,6 +52,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_fdir.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 4c5cf5419..d2ab9eeff 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -105,6 +105,7 @@ struct ice_aqc_list_caps_elem {
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
#define ICE_AQC_CAPS_MSIX 0x0043
+#define ICE_AQC_CAPS_FD 0x0045
#define ICE_AQC_CAPS_MAX_MTU 0x0047
u8 major_ver;
@@ -1861,6 +1862,16 @@ struct ice_aqc_get_set_rss_lut {
};
+/* Clear FD Table Command (direct, 0x0B06) */
+struct ice_aqc_clear_fd_table {
+ u8 clear_type;
+#define CL_FD_VM_VF_TYPE_VSI_IDX 1
+#define CL_FD_VM_VF_TYPE_PF_IDX 2
+ u8 rsvd;
+ __le16 vsi_index;
+ u8 reserved[12];
+};
+
@@ -2210,6 +2221,7 @@ struct ice_aq_desc {
struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
+ struct ice_aqc_clear_fd_table clear_fd_table;
struct ice_aqc_add_txqs add_txqs;
struct ice_aqc_dis_txqs dis_txqs;
struct ice_aqc_txqs_cleanup txqs_cleanup;
@@ -2415,6 +2427,7 @@ enum ice_adminq_opc {
ice_aqc_opc_set_rss_lut = 0x0B03,
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
+ ice_aqc_opc_clear_fd_table = 0x0B06,
/* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 202592710..425f76e8d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -805,6 +805,9 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
goto err_unroll_cqinit;
+ /* Set bit to enable Flow Director filters */
+ wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
+ INIT_LIST_HEAD(&hw->fdir_list_head);
ice_clear_pxe_mode(hw);
@@ -901,6 +904,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);
+ /* Obtain counter base index which would be used by flow director */
+ status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
+ if (status)
+ goto err_unroll_fltr_mgmt_struct;
return ICE_SUCCESS;
@@ -926,6 +933,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
*/
void ice_deinit_hw(struct ice_hw *hw)
{
+ ice_free_fd_res_cntr(hw, hw->fd_ctr_base);
ice_cleanup_fltr_mgmt_struct(hw);
ice_sched_cleanup_all(hw);
@@ -1980,6 +1988,34 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
"HW caps: MSIX first vector index = %d\n",
caps->msix_vector_first_id);
break;
+ case ICE_AQC_CAPS_FD:
+ {
+ u32 reg_val, val;
+
+ if (dev_p) {
+ dev_p->num_flow_director_fltr = number;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Dev.fd_fltr =%d\n",
+ dev_p->num_flow_director_fltr);
+ }
+ if (func_p) {
+ reg_val = rd32(hw, GLQF_FD_SIZE);
+ val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>
+ GLQF_FD_SIZE_FD_GSIZE_S;
+ func_p->fd_fltr_guar =
+ ice_get_num_per_func(hw, val);
+ val = (reg_val & GLQF_FD_SIZE_FD_BSIZE_M) >>
+ GLQF_FD_SIZE_FD_BSIZE_S;
+ func_p->fd_fltr_best_effort = val;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr guar= %d\n",
+ func_p->fd_fltr_guar);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr best effort=%d\n",
+ func_p->fd_fltr_best_effort);
+ }
+ break;
+ }
case ICE_AQC_CAPS_MAX_MTU:
caps->max_mtu = number;
if (dev_p)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 9665f3204..4dc43dcfe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -9,6 +9,7 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+#include "ice_fdir.h"
enum ice_fw_modes {
ICE_FW_MODE_NORMAL,
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
new file mode 100644
index 000000000..4bc8e6dcb
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -0,0 +1,742 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_fdir.h"
+
+/* These are dummy packet headers used to program flow director filters. */
+static const u8 ice_fdir_tcpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x28, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00,
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static const u8 ice_fdir_udpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x1C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x20, 0x00, 0x00, 0x40, 0x00, 0x40, 0x84,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x10,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00
+};
+
+static const u8 ice_fdir_tcpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x0C, 0x84, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x3B, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* Flow Director dummy packet table */
+static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ sizeof(ice_fdir_tcpv4_pkt),
+ ice_fdir_tcpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ sizeof(ice_fdir_udpv4_pkt),
+ ice_fdir_udpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ sizeof(ice_fdir_sctpv4_pkt),
+ ice_fdir_sctpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ sizeof(ice_fdir_ipv4_pkt),
+ ice_fdir_ipv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ sizeof(ice_fdir_tcpv6_pkt),
+ ice_fdir_tcpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ sizeof(ice_fdir_udpv6_pkt),
+ ice_fdir_udpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ sizeof(ice_fdir_sctpv6_pkt),
+ ice_fdir_sctpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ sizeof(ice_fdir_ipv6_pkt),
+ ice_fdir_ipv6_pkt,
+ },
+};
+
+#define ICE_FDIR_NUM_PKT ARRAY_SIZE(ice_fdir_pkt)
+
+/* Flow Direcotr (FD) filter program descriptor Context */
+static const struct ice_ctx_ele ice_fd_fltr_desc_ctx_info[] = {
+ /* Field Width LSB */
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, qindex, 11, 0),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_q, 1, 11),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_report, 2, 12),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_space, 2, 14),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_index, 13, 16),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_ena, 2, 29),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, evict_ena, 1, 31),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq, 3, 32),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq_prio, 3, 35),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dpu_recipe, 2, 38),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, drop, 1, 40),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_prio, 3, 41),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_mdid, 4, 44),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_val, 16, 48),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dtype, 4, 64),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, pcmd, 1, 68),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof_prio, 3, 69),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof, 6, 72),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_vsi, 10, 78),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, swap, 1, 88),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_prio, 3, 89),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_mdid, 4, 92),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid, 32, 96),
+ { 0 }
+};
+
+/**
+ * ice_set_dflt_val_fd_desc
+ * @fd_fltr_ctx: pointer to fd filter descriptor
+ */
+void
+ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
+{
+ fd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;
+ fd_fltr_ctx->fd_space = ICE_FXD_FLTR_QW0_FD_SPACE_GUAR_BEST;
+ fd_fltr_ctx->cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fd_fltr_ctx->evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_TRUE;
+ fd_fltr_ctx->toq = ICE_FXD_FLTR_QW0_TO_Q_EQUALS_QINDEX;
+ fd_fltr_ctx->toq_prio = ICE_FXD_FLTR_QW0_TO_Q_PRIO1;
+ fd_fltr_ctx->dpu_recipe = ICE_FXD_FLTR_QW0_DPU_RECIPE_DFLT;
+ fd_fltr_ctx->drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fd_fltr_ctx->flex_prio = ICE_FXD_FLTR_QW0_FLEX_PRI_NONE;
+ fd_fltr_ctx->flex_mdid = ICE_FXD_FLTR_QW0_FLEX_MDID0;
+ fd_fltr_ctx->flex_val = ICE_FXD_FLTR_QW0_FLEX_VAL0;
+ fd_fltr_ctx->dtype = ICE_TX_DESC_DTYPE_FLTR_PROG;
+ fd_fltr_ctx->desc_prof_prio = ICE_FXD_FLTR_QW1_PROF_PRIO_ZERO;
+ fd_fltr_ctx->desc_prof = ICE_FXD_FLTR_QW1_PROF_ZERO;
+ fd_fltr_ctx->swap = ICE_FXD_FLTR_QW1_SWAP_SET;
+ fd_fltr_ctx->fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ZERO;
+ fd_fltr_ctx->fdid_mdid = ICE_FXD_FLTR_QW1_FDID_MDID_FD;
+ fd_fltr_ctx->fdid = ICE_FXD_FLTR_QW1_FDID_ZERO;
+}
+
+/**
+ * ice_fdir_get_prgm_desc - set a fdir descriptor from a fdir filter struct
+ * @hw: pointer to the hardware structure
+ * @input: filter
+ * @fdesc: filter descriptor
+ * @add: if add is true, this is an add operation, false implies delete
+ */
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add)
+{
+ struct ice_fd_fltr_desc_ctx fdir_fltr_ctx = { 0 };
+
+ /* set default context info */
+ ice_set_dflt_val_fd_desc(&fdir_fltr_ctx);
+
+ /* change sideband filtering values */
+ fdir_fltr_ctx.fdid = input->fltr_id;
+ if (input->dest_ctl == ICE_FLTR_PRGM_DESC_DEST_DROP_PKT) {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;
+ fdir_fltr_ctx.qindex = 0;
+ } else {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fdir_fltr_ctx.qindex = input->q_index;
+ }
+ fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fdir_fltr_ctx.cnt_index = input->cnt_index;
+ fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi);
+ fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE;
+ fdir_fltr_ctx.toq_prio = 3;
+ fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+ ICE_FXD_FLTR_QW1_PCMD_REMOVE;
+ fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
+ fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fdir_fltr_ctx.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
+ fdir_fltr_ctx.fdid_prio = 3;
+ fdir_fltr_ctx.desc_prof = 1;
+ fdir_fltr_ctx.desc_prof_prio = 3;
+ ice_set_fd_desc_val(&fdir_fltr_ctx, fdesc);
+}
+
+/**
+ * ice_set_fd_desc_val
+ * @fd_fltr_ctx: pointer to fd filter descriptor context
+ * @fdir_desc: populated with fd filter descriptor values
+ */
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc)
+{
+ u64 ctx_buf[2] = { 0 };
+
+ ice_set_ctx((u8 *)fd_fltr_ctx, (u8 *)ctx_buf,
+ ice_fd_fltr_desc_ctx_info);
+ fdir_desc->qidx_compq_space_stat = CPU_TO_LE64(ctx_buf[0]);
+ fdir_desc->dtype_cmd_vsi_fdid = CPU_TO_LE64(ctx_buf[1]);
+}
+
+/**
+ * ice_alloc_fd_res_cntr - obtain counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ */
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_free_fd_res_cntr - Free counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index to be freed
+ */
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_alloc_fd_guar_item - allocate resource for FD guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_guar_item - Free flow director guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_alloc_fd_shrd_item - allocate resource for flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_shrd_item - Free flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_get_fdir_cnt_all - get the number of Flow Director filters
+ * @hw: hardware data structure
+ *
+ * Returns the number of filters available on device
+ */
+int ice_get_fdir_cnt_all(struct ice_hw *hw)
+{
+ return hw->func_caps.fd_fltr_guar +
+ hw->func_caps.fd_fltr_best_effort;
+}
+
+/**
+ * ice_pkt_insert_ipv6_addr - insert a be32 IPv6 address into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @addr: IPv6 address to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr)
+{
+ int idx;
+
+ for (idx = 0; idx < ICE_IPV6_ADDR_LEN_AS_U32; idx++)
+ ice_memcpy(pkt + offset + idx * sizeof(*addr), &addr[idx],
+ sizeof(*addr), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u16 - insert a be16 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 16 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u16(u8 *pkt, int offset, __be16 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u32 - insert a be32 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 32 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_fdir_get_prgm_pkt - generate a dummy packet
+ * @input: flow director filter data structure
+ * @pkt: pointer to return filter packet
+ * @frag: generate a fragment packet
+ */
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag)
+{
+ enum ice_fltr_ptype flow;
+ u16 idx;
+
+ if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ switch (input->ip.v4.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ switch (input->ip.v6.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else {
+ flow = input->flow_type;
+ }
+
+ for (idx = 0; idx < ICE_FDIR_NUM_PKT; idx++)
+ if (ice_fdir_pkt[idx].flow == flow)
+ break;
+ if (idx == ICE_FDIR_NUM_PKT)
+ return ICE_ERR_PARAM;
+ ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+
+ switch (flow) {
+ case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ if (frag)
+ pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF;
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+
+ if (input->flex_fltr)
+ ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_fdir_has_frag - does flow type have 2 ptypes
+ * @flow: flow ptype
+ *
+ * returns true is there is a fragment packet for this ptype
+ */
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow)
+{
+ if (flow == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ return true;
+ else
+ return false;
+}
+
+/**
+ * ice_fdir_find_by_idx - find filter with idx
+ * @hw: pointer to hardware structure
+ * @fltr_idx: index to find.
+ *
+ * Returns pointer to filter if found or null
+ */
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx)
+{
+ struct ice_fdir_fltr *rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found in the list */
+ if (fltr_idx == rule->fltr_id)
+ return rule;
+ if (fltr_idx < rule->fltr_id)
+ break;
+ }
+ return NULL;
+}
+
+/**
+ * ice_fdir_list_add_fltr - add a new node to the flow director filter list
+ * @hw: hardware structure
+ * @fltr: filter node to add to structure
+ */
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *fltr)
+{
+ struct ice_fdir_fltr *rule, *parent = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found or pass its spot in the list */
+ if (rule->fltr_id >= fltr->fltr_id)
+ break;
+ parent = rule;
+ }
+
+ if (parent)
+ LIST_ADD_AFTER(&fltr->fltr_node, &parent->fltr_node);
+ else
+ LIST_ADD(&fltr->fltr_node, &hw->fdir_list_head);
+}
+
+/**
+ * ice_fdir_update_cntrs - increment / decrement filter counter
+ * @hw: pointer to hardware structure
+ * @flow: filter flow type
+ * @add: true implies filters added
+ */
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add)
+{
+ int incr;
+
+ incr = (add) ? 1 : -1;
+ hw->fdir_active_fltr += incr;
+ if (flow == ICE_FLTR_PTYPE_NONF_NONE || flow >= ICE_FLTR_PTYPE_MAX)
+ ice_debug(hw, ICE_DBG_SW, "Unknown filter type %d\n", flow);
+ else
+ hw->fdir_fltr_cnt[flow] += incr;
+}
+
+/**
+ * ice_cmp_ipv6_addr - compare 2 IP v6 addresses
+ * @a: IP v6 address
+ * @b: IP v6 address
+ *
+ * Returns 0 on equal, returns non-0 if different
+ */
+static int ice_cmp_ipv6_addr(__be32 *a, __be32 *b)
+{
+ return memcmp(a, b, 4 * sizeof(__be32));
+}
+
+/**
+ * ice_fdir_comp_ipv6_rules - compare 2 filters
+ * @a: a Flow Director filter data structure
+ * @b: a Flow Director filter data structure
+ * @v6: bool true if v6 filter
+ *
+ * Returns true if the filters match
+ */
+static bool
+ice_fdir_comp_rules(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b, bool v6)
+{
+ enum ice_fltr_ptype flow_type = a->flow_type;
+
+ /* The calling function already checks that the two filters have the
+ * same flow_type.
+ */
+ if (!v6) {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.dst_port == b->ip.v4.dst_port &&
+ a->ip.v4.src_port == b->ip.v4.src_port)
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.l4_header == b->ip.v4.l4_header &&
+ a->ip.v4.proto == b->ip.v4.proto &&
+ a->ip.v4.ip_ver == b->ip.v4.ip_ver &&
+ a->ip.v4.tos == b->ip.v4.tos)
+ return true;
+ }
+ } else {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_SCTP) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port &&
+ !ice_cmp_ipv6_addr(a->ip.v6.dst_ip,
+ b->ip.v6.dst_ip) &&
+ !ice_cmp_ipv6_addr(a->ip.v6.src_ip,
+ b->ip.v6.src_ip))
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port)
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/**
+ * ice_fdir_is_dup_fltr - test if filter is already in list for PF
+ * @hw: hardware data structure
+ * @input: Flow Director filter data structure
+ *
+ * Returns true if the filter is found in the list
+ */
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input)
+{
+ enum ice_fltr_ptype flow_type;
+ struct ice_fdir_fltr *rule;
+ bool ret = false;
+
+ rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ if (rule->flow_type == input->flow_type) {
+ flow_type = input->flow_type;
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ ret = ice_fdir_comp_rules(rule, input, false);
+ else
+ ret = ice_fdir_comp_rules(rule, input, true);
+ if (ret)
+ break;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * ice_clear_vsi_fd_table - admin command to clear FD table for a VSI
+ * @hw: hardware data structure
+ * @vsi_num: vsi_num (HW VSI num)
+ *
+ * Clears FD table entries by issuing admin command (direct, 0x0B06)
+ * Must to pass valid vsi_num as returned by "AddVSI".
+ */
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_VSI_IDX;
+
+ cmd->vsi_index = CPU_TO_LE16(vsi_num);
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_clear_pf_fd_table - admin command to clear FD table for PF
+ * @hw: hardware data structure
+ *
+ * Clears FD table entries for a PF by issuing admin command (direct, 0x0B06)
+ */
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_PF_IDX;
+ /* vsi_index must be 0 to clear FD table for a PF */
+ cmd->vsi_index = CPU_TO_LE16(0);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
new file mode 100644
index 000000000..2ecb147f1
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -0,0 +1,202 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_FDIR_H_
+#define _ICE_FDIR_H_
+
+#include "ice_common.h"
+
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+ u32 fdid;
+ u16 qindex;
+ u16 cnt_index;
+ u16 fd_vsi;
+ u16 flex_val;
+ u8 comp_q;
+ u8 comp_report;
+ u8 fd_space;
+ u8 cnt_ena;
+ u8 evict_ena;
+ u8 toq;
+ u8 toq_prio;
+ u8 dpu_recipe;
+ u8 drop;
+ u8 flex_prio;
+ u8 flex_mdid;
+ u8 dtype;
+ u8 pcmd;
+ u8 desc_prof_prio;
+ u8 desc_prof;
+ u8 swap;
+ u8 fdid_prio;
+ u8 fdid_mdid;
+};
+
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
+
+#define ICE_FDIR_IP_PROTOCOLS
+#define ICE_IP_PROTO_TCP 6
+#define ICE_IP_PROTO_UDP 17
+#define ICE_IP_PROTO_SCTP 132
+#define ICE_IP_PROTO_IP 0
+#define ICE_IP_PROTO_ESP 50
+
+#define ICE_FDIR_MAX_RAW_PKT_SIZE 512
+#define ICE_FDIR_BUF_FULL_MARGIN 10
+#define ICE_FDIR_BUF_HEAD_ROOM 32
+
+/* macros for offsets into packets for flow director programming */
+#define ICE_IPV4_SRC_ADDR_OFFSET 26
+#define ICE_IPV4_DST_ADDR_OFFSET 30
+#define ICE_IPV4_TCP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_TCP_DST_PORT_OFFSET 36
+#define ICE_IPV4_UDP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_UDP_DST_PORT_OFFSET 36
+#define ICE_IPV4_SCTP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_SCTP_DST_PORT_OFFSET 36
+#define ICE_IPV4_PROTO_OFFSET 23
+#define ICE_IPV6_SRC_ADDR_OFFSET 22
+#define ICE_IPV6_DST_ADDR_OFFSET 38
+#define ICE_IPV6_TCP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_TCP_DST_PORT_OFFSET 56
+#define ICE_IPV6_UDP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_UDP_DST_PORT_OFFSET 56
+#define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_SCTP_DST_PORT_OFFSET 56
+
+#define ICE_FDIR_MAX_FLTRS 16384
+
+/* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF
+ * requests that the packet not be fragmented. MF indicates that a packet has
+ * been fragmented.
+ */
+#define ICE_FDIR_IPV4_PKT_FLAG_DF 0x20
+#define ICE_FDIR_IPV4_PKT_FLAG_MF 0x40
+
+enum ice_fltr_prgm_desc_dest {
+ ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER,
+};
+
+enum ice_fltr_prgm_desc_fd_status {
+ ICE_FLTR_PRGM_DESC_FD_STATUS_NONE,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID_4FLEX_BYTES,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
+};
+
+#define ICE_FLTR_PRGM_FLEX_WORD_SIZE sizeof(__be16)
+
+struct ice_rx_flow_userdef {
+ u16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+};
+
+struct ice_fdir_v4 {
+ __be32 dst_ip;
+ __be32 src_ip;
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header;
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tos;
+ u8 ip_ver;
+ u8 proto;
+};
+
+#define ICE_IPV6_ADDR_LEN_AS_U32 4
+
+struct ice_fdir_v6 {
+ __be32 dst_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be32 src_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header; /* next header */
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tc;
+ u8 proto;
+};
+
+struct ice_fdir_extra {
+ u8 dst_mac[ETH_ALEN]; /* dest MAC address */
+ u32 usr_def[2]; /* user data */
+ __be16 vlan_type; /* VLAN ethertype */
+ __be16 vlan_tag; /* VLAN tag info */
+};
+
+struct ice_fdir_fltr {
+ struct LIST_ENTRY_TYPE fltr_node;
+ enum ice_fltr_ptype flow_type;
+
+ union {
+ struct ice_fdir_v4 v4;
+ struct ice_fdir_v6 v6;
+ } ip, mask;
+
+ struct ice_fdir_extra ext_data;
+ struct ice_fdir_extra ext_mask;
+
+ /* flex byte filter data */
+ __be16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+
+ /* filter control */
+ u16 q_index;
+#ifdef ADQ_SUPPORT
+ u16 orig_q_index;
+#endif /* ADQ_SUPPORT */
+ u16 dest_vsi;
+ u8 dest_ctl;
+ u8 fltr_status;
+ u16 cnt_index;
+ u32 fltr_id;
+};
+
+
+/* Dummy packet filter definition structure. */
+struct ice_fdir_base_pkt {
+ enum ice_fltr_ptype flow;
+ u16 pkt_len;
+ const u8 *pkt;
+};
+
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add);
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
+enum ice_status
+ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add);
+int ice_get_fdir_cnt_all(struct ice_hw *hw);
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+enum ice_status
+ice_update_fdir_list_entry(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ u16 sw_idx);
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add);
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+#endif /* _ICE_FDIR_H_ */
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 99108d81c..37bb4cbb5 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1275,6 +1275,25 @@ void ice_free_seg(struct ice_hw *hw)
}
/**
+ * ice_init_fd_mask_regs - initialize Flow Director mask registers
+ * @hw: pointer to the HW struct
+ *
+ * This function sets up the Flow Director mask registers to allow for complete
+ * masking off of any of the 24 Field Vector words. After this call, mask 0 will
+ * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc.
+ */
+static void ice_init_fd_mask_regs(struct ice_hw *hw)
+{
+ u16 i;
+
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ wr32(hw, GLQF_FDMASK(i), i);
+ ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i,
+ GLQF_FDMASK(i), i);
+ }
+}
+
+/**
* ice_init_pkg_regs - initialize additional package registers
* @hw: pointer to the hardware structure
*/
@@ -1287,6 +1306,8 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
/* setup Switch block input mask, which is 48-bits in two parts */
wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);
+ /* setup default flow director masks */
+ ice_init_fd_mask_regs(hw);
}
/**
@@ -3783,6 +3804,205 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
}
/**
+ * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @mask_sel: mask select
+ *
+ * This function enable any of the masks selected by the mask select parameter
+ * for the profile specified.
+ */
+static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
+{
+ wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
+
+ ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
+ GLQF_FDMASK_SEL(prof_id), mask_sel);
+}
+
+#define ICE_SRC_DST_MAX_COUNT 8
+
+struct ice_fd_src_dst_pair {
+ u8 prot_id;
+ u8 count;
+ u16 off;
+};
+
+static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
+ /* These are defined in pairs */
+ { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
+ { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
+
+ { ICE_PROT_IPV4_IL, 2, 12 },
+ { ICE_PROT_IPV4_IL, 2, 16 },
+
+ { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
+ { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
+
+ { ICE_PROT_IPV6_IL, 8, 8 },
+ { ICE_PROT_IPV6_IL, 8, 24 },
+
+ { ICE_PROT_TCP_IL, 1, 0 },
+ { ICE_PROT_TCP_IL, 1, 2 },
+
+ { ICE_PROT_UDP_OF, 1, 0 },
+ { ICE_PROT_UDP_OF, 1, 2 },
+
+ { ICE_PROT_UDP_IL_OR_S, 1, 0 },
+ { ICE_PROT_UDP_IL_OR_S, 1, 2 },
+
+ { ICE_PROT_SCTP_IL, 1, 0 },
+ { ICE_PROT_SCTP_IL, 1, 2 }
+};
+
+#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
+
+/**
+ * ice_update_fd_swap - set register appropriately for a FD FV extraction
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @es: extraction sequence (length of array is determined by the block)
+ */
+static enum ice_status
+ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
+{
+ ice_declare_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
+ u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
+#define ICE_FD_FV_NOT_FOUND (-2)
+ s8 first_free = ICE_FD_FV_NOT_FOUND;
+ u8 used[ICE_MAX_FV_WORDS] = { 0 };
+ s8 orig_free, si;
+ u32 mask_sel = 0;
+ u8 i, j, k;
+
+ ice_memset(pair_list, 0, sizeof(pair_list), ICE_NONDMA_MEM);
+
+ ice_init_fd_mask_regs(hw);
+
+ /* This code assumes that the Flow Director field vectors are assigned
+ * from the end of the FV indexes working towards the zero index, that
+ * only complete fields will be included and will be consecutive, and
+ * that there are no gaps between valid indexes.
+ */
+
+ /* Determine swap fields present */
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ /* Find the first free entry, assuming right to left population.
+ * This is where we can start adding additional pairs if needed.
+ */
+ if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
+ ICE_PROT_INVALID)
+ first_free = i - 1;
+
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
+ es[i].off == ice_fd_pairs[j].off) {
+ ice_set_bit(j, pair_list);
+ pair_start[j] = i;
+ }
+ }
+ }
+
+ orig_free = first_free;
+
+ /* determine missing swap fields that need to be added */
+ for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
+ u8 bit1 = ice_is_bit_set(pair_list, i + 1);
+ u8 bit0 = ice_is_bit_set(pair_list, i);
+
+ if (bit0 ^ bit1) {
+ u8 index;
+
+ /* add the appropriate 'paired' entry */
+ if (!bit0)
+ index = i;
+ else
+ index = i + 1;
+
+ /* check for room */
+ if (first_free + 1 < ice_fd_pairs[index].count)
+ return ICE_ERR_MAX_LIMIT;
+
+ /* place in extraction sequence */
+ for (k = 0; k < ice_fd_pairs[index].count; k++) {
+ es[first_free - k].prot_id =
+ ice_fd_pairs[index].prot_id;
+ es[first_free - k].off =
+ ice_fd_pairs[index].off + (k * 2);
+
+ /* keep track of non-relevant fields */
+ mask_sel |= 1 << (first_free - k);
+ }
+
+ pair_start[index] = first_free;
+ first_free -= ice_fd_pairs[index].count;
+ }
+ }
+
+ /* fill in the swap array */
+ si = hw->blk[ICE_BLK_FD].es.fvw - 1;
+ do {
+ u8 indexes_used = 1;
+
+ /* assume flat at this index */
+#define ICE_SWAP_VALID 0x80
+ used[si] = si | ICE_SWAP_VALID;
+
+ if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
+ si -= indexes_used;
+ continue;
+ }
+
+ /* check for a swap location */
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
+ es[si].off == ice_fd_pairs[j].off) {
+ u8 idx;
+
+ /* determine the appropriate matching field */
+ idx = j + ((j % 2) ? -1 : 1);
+
+ indexes_used = ice_fd_pairs[idx].count;
+ for (k = 0; k < indexes_used; k++) {
+ used[si - k] = (pair_start[idx] - k) |
+ ICE_SWAP_VALID;
+ }
+
+ break;
+ }
+ }
+
+ si -= indexes_used;
+ } while (si >= 0);
+
+ /* for each set of 4 swap indexes, write the appropriate register */
+ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
+ u32 raw_entry = 0;
+
+ for (k = 0; k < 4; k++) {
+ u8 idx;
+
+ idx = (j * 4) + k;
+ if (used[idx])
+ raw_entry |= used[idx] << (k * 8);
+ }
+
+ /* write the appropriate register set, based on HW block */
+ wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry);
+
+ ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n",
+ prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry);
+ }
+
+ /* update the masks for this profile to be sure we ignore fields that
+ * are not relevant to our match criteria
+ */
+ ice_update_fd_mask(hw, prof_id, mask_sel);
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_add_prof - add profile
* @hw: pointer to the HW struct
* @blk: hardware block
@@ -3812,6 +4032,18 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
+ if (blk == ICE_BLK_FD) {
+ /* For Flow Director block, the extraction sequence may
+ * need to be altered in the case where there are paired
+ * fields that have no match. This is necessary because
+ * for Flow Director, src and dest fields need to paired
+ * for filter programming and these values are swapped
+ * during Tx.
+ */
+ status = ice_update_fd_swap(hw, prof_id, es);
+ if (status)
+ goto err_ice_add_prof;
+ }
/* and write new es */
ice_write_es(hw, blk, prof_id, es);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6a08b3d28..ef0b5bb52 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -164,6 +164,7 @@ enum ice_media_type {
/* Software VSI types. */
enum ice_vsi_type {
ICE_VSI_PF = 0,
+ ICE_VSI_CTRL = 3, /* equates to ICE_VSI_PF with 1 queue pair */
#ifdef ADQ_SUPPORT
ICE_VSI_CHNL = 4,
#endif /* ADQ_SUPPORT */
@@ -218,6 +219,32 @@ struct ice_phy_info {
#define ICE_MAX_NUM_MIRROR_RULES 64
+/* protocol enumeration for filters */
+enum ice_fltr_ptype {
+ /* NONE - used for undef/error */
+ ICE_FLTR_PTYPE_NONF_NONE = 0,
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ ICE_FLTR_PTYPE_FRAG_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ ICE_FLTR_PTYPE_MAX,
+};
+
+/* 6 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL + 4 ICE_VSI_CHNL */
+#define ICE_MAX_FDIR_VSI_PER_FILTER 6
+
+struct ice_fd_hw_prof {
+ struct ice_flow_seg_info *fdir_seg;
+ int cnt;
+ u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+ u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+};
+
/* Common HW capabilities for SW use */
struct ice_hw_common_caps {
/* Write CSR protection */
@@ -297,12 +324,15 @@ struct ice_hw_common_caps {
struct ice_hw_func_caps {
struct ice_hw_common_caps common_cap;
u32 guar_num_vsi;
+ u32 fd_fltr_guar; /* Number of filters guaranteed */
+ u32 fd_fltr_best_effort; /* Number of best effort filters */
};
/* Device wide capabilities */
struct ice_hw_dev_caps {
struct ice_hw_common_caps common_cap;
u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */
+ u32 num_flow_director_fltr; /* Number of FD filters available */
};
@@ -651,6 +681,7 @@ struct ice_hw {
u64 debug_mask; /* BITMAP for debug mask */
enum ice_mac_type mac_type;
+ u16 fd_ctr_base; /* FD counter base index */
/* pci info */
u16 device_id;
u16 vendor_id;
@@ -748,6 +779,19 @@ struct ice_hw {
struct ice_blk_info blk[ICE_BLK_COUNT];
struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */
struct LIST_HEAD_TYPE fl_profs[ICE_BLK_COUNT];
+ /* Flow Director filter info */
+ int fdir_active_fltr;
+
+ struct ice_lock fdir_fltr_lock; /* protect Flow Director */
+ struct LIST_HEAD_TYPE fdir_list_head;
+
+ /* Book-keeping of side-band filter count per flow-type.
+ * This is used to detect and handle input set changes for
+ * respective flow-type.
+ */
+ u16 fdir_fltr_cnt[ICE_FLTR_PTYPE_MAX];
+
+ struct ice_fd_hw_prof **fdir_prof;
};
/* Statistics collected by each port, VSI, VEB, and S-channel */
@@ -792,6 +836,11 @@ struct ice_hw_port_stats {
u64 link_xoff_rx; /* lxoffrxc */
u64 link_xon_tx; /* lxontxc */
u64 link_xoff_tx; /* lxofftxc */
+ u64 priority_xon_rx[8]; /* pxonrxc[8] */
+ u64 priority_xoff_rx[8]; /* pxoffrxc[8] */
+ u64 priority_xon_tx[8]; /* pxontxc[8] */
+ u64 priority_xoff_tx[8]; /* pxofftxc[8] */
+ u64 priority_xon_2_xoff[8]; /* pxon2offc[8] */
u64 rx_size_64; /* prc64 */
u64 rx_size_127; /* prc127 */
u64 rx_size_255; /* prc255 */
@@ -811,6 +860,12 @@ struct ice_hw_port_stats {
u64 tx_size_1522; /* ptc1522 */
u64 tx_size_big; /* ptc9522 */
u64 mac_short_pkt_dropped; /* mspdc */
+ /* flow director stats */
+ u32 fd_sb_status;
+ u64 fd_sb_match;
+#ifdef ADQ_SUPPORT
+ u64 ch_atr_match;
+#endif /* ADQ_SUPPORT */
};
enum ice_sw_fwd_act_type {
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 755d2497b..624202567 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -10,6 +10,7 @@ sources = [
'ice_flex_pipe.c',
'ice_flow.c',
'ice_dcb.c',
+ 'ice_fdir.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 32/38] net/ice/base: add FDIR support
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 32/38] net/ice/base: add FDIR support Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Add flow director related support base code.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/Makefile | 1 +
drivers/net/ice/base/ice_adminq_cmd.h | 13 +
drivers/net/ice/base/ice_common.c | 36 ++
drivers/net/ice/base/ice_common.h | 1 +
drivers/net/ice/base/ice_fdir.c | 742 ++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_fdir.h | 202 +++++++++
drivers/net/ice/base/ice_flex_pipe.c | 232 +++++++++++
drivers/net/ice/base/ice_type.h | 55 +++
drivers/net/ice/base/meson.build | 1 +
9 files changed, 1283 insertions(+)
create mode 100644 drivers/net/ice/base/ice_fdir.c
create mode 100644 drivers/net/ice/base/ice_fdir.h
diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile
index 89d21334e..a3aabccf1 100644
--- a/drivers/net/ice/Makefile
+++ b/drivers/net/ice/Makefile
@@ -52,6 +52,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_nvm.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flex_pipe.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_flow.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_dcb.c
+SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_fdir.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx.c
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 4c5cf5419..d2ab9eeff 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -105,6 +105,7 @@ struct ice_aqc_list_caps_elem {
#define ICE_AQC_CAPS_RXQS 0x0041
#define ICE_AQC_CAPS_TXQS 0x0042
#define ICE_AQC_CAPS_MSIX 0x0043
+#define ICE_AQC_CAPS_FD 0x0045
#define ICE_AQC_CAPS_MAX_MTU 0x0047
u8 major_ver;
@@ -1861,6 +1862,16 @@ struct ice_aqc_get_set_rss_lut {
};
+/* Clear FD Table Command (direct, 0x0B06) */
+struct ice_aqc_clear_fd_table {
+ u8 clear_type;
+#define CL_FD_VM_VF_TYPE_VSI_IDX 1
+#define CL_FD_VM_VF_TYPE_PF_IDX 2
+ u8 rsvd;
+ __le16 vsi_index;
+ u8 reserved[12];
+};
+
@@ -2210,6 +2221,7 @@ struct ice_aq_desc {
struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
+ struct ice_aqc_clear_fd_table clear_fd_table;
struct ice_aqc_add_txqs add_txqs;
struct ice_aqc_dis_txqs dis_txqs;
struct ice_aqc_txqs_cleanup txqs_cleanup;
@@ -2415,6 +2427,7 @@ enum ice_adminq_opc {
ice_aqc_opc_set_rss_lut = 0x0B03,
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
+ ice_aqc_opc_clear_fd_table = 0x0B06,
/* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 202592710..425f76e8d 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -805,6 +805,9 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
goto err_unroll_cqinit;
+ /* Set bit to enable Flow Director filters */
+ wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
+ INIT_LIST_HEAD(&hw->fdir_list_head);
ice_clear_pxe_mode(hw);
@@ -901,6 +904,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);
ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);
+ /* Obtain counter base index which would be used by flow director */
+ status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
+ if (status)
+ goto err_unroll_fltr_mgmt_struct;
return ICE_SUCCESS;
@@ -926,6 +933,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
*/
void ice_deinit_hw(struct ice_hw *hw)
{
+ ice_free_fd_res_cntr(hw, hw->fd_ctr_base);
ice_cleanup_fltr_mgmt_struct(hw);
ice_sched_cleanup_all(hw);
@@ -1980,6 +1988,34 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
"HW caps: MSIX first vector index = %d\n",
caps->msix_vector_first_id);
break;
+ case ICE_AQC_CAPS_FD:
+ {
+ u32 reg_val, val;
+
+ if (dev_p) {
+ dev_p->num_flow_director_fltr = number;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW caps: Dev.fd_fltr =%d\n",
+ dev_p->num_flow_director_fltr);
+ }
+ if (func_p) {
+ reg_val = rd32(hw, GLQF_FD_SIZE);
+ val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>
+ GLQF_FD_SIZE_FD_GSIZE_S;
+ func_p->fd_fltr_guar =
+ ice_get_num_per_func(hw, val);
+ val = (reg_val & GLQF_FD_SIZE_FD_BSIZE_M) >>
+ GLQF_FD_SIZE_FD_BSIZE_S;
+ func_p->fd_fltr_best_effort = val;
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr guar= %d\n",
+ func_p->fd_fltr_guar);
+ ice_debug(hw, ICE_DBG_INIT,
+ "HW:func.fd_fltr best effort=%d\n",
+ func_p->fd_fltr_best_effort);
+ }
+ break;
+ }
case ICE_AQC_CAPS_MAX_MTU:
caps->max_mtu = number;
if (dev_p)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 9665f3204..4dc43dcfe 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -9,6 +9,7 @@
#include "ice_flex_pipe.h"
#include "ice_switch.h"
+#include "ice_fdir.h"
enum ice_fw_modes {
ICE_FW_MODE_NORMAL,
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
new file mode 100644
index 000000000..4bc8e6dcb
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -0,0 +1,742 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#include "ice_common.h"
+#include "ice_fdir.h"
+
+/* These are dummy packet headers used to program flow director filters. */
+static const u8 ice_fdir_tcpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x28, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00,
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static const u8 ice_fdir_udpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x1C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x20, 0x00, 0x00, 0x40, 0x00, 0x40, 0x84,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x10,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00
+};
+
+static const u8 ice_fdir_tcpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_sctpv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x0C, 0x84, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x3B, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* Flow Director dummy packet table */
+static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ sizeof(ice_fdir_tcpv4_pkt),
+ ice_fdir_tcpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ sizeof(ice_fdir_udpv4_pkt),
+ ice_fdir_udpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ sizeof(ice_fdir_sctpv4_pkt),
+ ice_fdir_sctpv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ sizeof(ice_fdir_ipv4_pkt),
+ ice_fdir_ipv4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ sizeof(ice_fdir_tcpv6_pkt),
+ ice_fdir_tcpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ sizeof(ice_fdir_udpv6_pkt),
+ ice_fdir_udpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ sizeof(ice_fdir_sctpv6_pkt),
+ ice_fdir_sctpv6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ sizeof(ice_fdir_ipv6_pkt),
+ ice_fdir_ipv6_pkt,
+ },
+};
+
+#define ICE_FDIR_NUM_PKT ARRAY_SIZE(ice_fdir_pkt)
+
+/* Flow Direcotr (FD) filter program descriptor Context */
+static const struct ice_ctx_ele ice_fd_fltr_desc_ctx_info[] = {
+ /* Field Width LSB */
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, qindex, 11, 0),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_q, 1, 11),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_report, 2, 12),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_space, 2, 14),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_index, 13, 16),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_ena, 2, 29),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, evict_ena, 1, 31),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq, 3, 32),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq_prio, 3, 35),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dpu_recipe, 2, 38),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, drop, 1, 40),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_prio, 3, 41),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_mdid, 4, 44),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_val, 16, 48),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dtype, 4, 64),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, pcmd, 1, 68),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof_prio, 3, 69),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof, 6, 72),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_vsi, 10, 78),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, swap, 1, 88),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_prio, 3, 89),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_mdid, 4, 92),
+ ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid, 32, 96),
+ { 0 }
+};
+
+/**
+ * ice_set_dflt_val_fd_desc
+ * @fd_fltr_ctx: pointer to fd filter descriptor
+ */
+void
+ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
+{
+ fd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;
+ fd_fltr_ctx->fd_space = ICE_FXD_FLTR_QW0_FD_SPACE_GUAR_BEST;
+ fd_fltr_ctx->cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fd_fltr_ctx->evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_TRUE;
+ fd_fltr_ctx->toq = ICE_FXD_FLTR_QW0_TO_Q_EQUALS_QINDEX;
+ fd_fltr_ctx->toq_prio = ICE_FXD_FLTR_QW0_TO_Q_PRIO1;
+ fd_fltr_ctx->dpu_recipe = ICE_FXD_FLTR_QW0_DPU_RECIPE_DFLT;
+ fd_fltr_ctx->drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fd_fltr_ctx->flex_prio = ICE_FXD_FLTR_QW0_FLEX_PRI_NONE;
+ fd_fltr_ctx->flex_mdid = ICE_FXD_FLTR_QW0_FLEX_MDID0;
+ fd_fltr_ctx->flex_val = ICE_FXD_FLTR_QW0_FLEX_VAL0;
+ fd_fltr_ctx->dtype = ICE_TX_DESC_DTYPE_FLTR_PROG;
+ fd_fltr_ctx->desc_prof_prio = ICE_FXD_FLTR_QW1_PROF_PRIO_ZERO;
+ fd_fltr_ctx->desc_prof = ICE_FXD_FLTR_QW1_PROF_ZERO;
+ fd_fltr_ctx->swap = ICE_FXD_FLTR_QW1_SWAP_SET;
+ fd_fltr_ctx->fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ZERO;
+ fd_fltr_ctx->fdid_mdid = ICE_FXD_FLTR_QW1_FDID_MDID_FD;
+ fd_fltr_ctx->fdid = ICE_FXD_FLTR_QW1_FDID_ZERO;
+}
+
+/**
+ * ice_fdir_get_prgm_desc - set a fdir descriptor from a fdir filter struct
+ * @hw: pointer to the hardware structure
+ * @input: filter
+ * @fdesc: filter descriptor
+ * @add: if add is true, this is an add operation, false implies delete
+ */
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add)
+{
+ struct ice_fd_fltr_desc_ctx fdir_fltr_ctx = { 0 };
+
+ /* set default context info */
+ ice_set_dflt_val_fd_desc(&fdir_fltr_ctx);
+
+ /* change sideband filtering values */
+ fdir_fltr_ctx.fdid = input->fltr_id;
+ if (input->dest_ctl == ICE_FLTR_PRGM_DESC_DEST_DROP_PKT) {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;
+ fdir_fltr_ctx.qindex = 0;
+ } else {
+ fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;
+ fdir_fltr_ctx.qindex = input->q_index;
+ }
+ fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
+ fdir_fltr_ctx.cnt_index = input->cnt_index;
+ fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi);
+ fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE;
+ fdir_fltr_ctx.toq_prio = 3;
+ fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+ ICE_FXD_FLTR_QW1_PCMD_REMOVE;
+ fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
+ fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
+ fdir_fltr_ctx.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
+ fdir_fltr_ctx.fdid_prio = 3;
+ fdir_fltr_ctx.desc_prof = 1;
+ fdir_fltr_ctx.desc_prof_prio = 3;
+ ice_set_fd_desc_val(&fdir_fltr_ctx, fdesc);
+}
+
+/**
+ * ice_set_fd_desc_val
+ * @fd_fltr_ctx: pointer to fd filter descriptor context
+ * @fdir_desc: populated with fd filter descriptor values
+ */
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc)
+{
+ u64 ctx_buf[2] = { 0 };
+
+ ice_set_ctx((u8 *)fd_fltr_ctx, (u8 *)ctx_buf,
+ ice_fd_fltr_desc_ctx_info);
+ fdir_desc->qidx_compq_space_stat = CPU_TO_LE64(ctx_buf[0]);
+ fdir_desc->dtype_cmd_vsi_fdid = CPU_TO_LE64(ctx_buf[1]);
+}
+
+/**
+ * ice_alloc_fd_res_cntr - obtain counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ */
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_free_fd_res_cntr - Free counter resource for FD type
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index to be freed
+ */
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
+}
+
+/**
+ * ice_alloc_fd_guar_item - allocate resource for FD guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_guar_item - Free flow director guaranteed entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_alloc_fd_shrd_item - allocate resource for flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: returns counter index
+ * @num_fltr: number of filter entries to be allocated
+ */
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
+{
+ return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_free_fd_shrd_item - Free flow director shared entries
+ * @hw: pointer to the hardware structure
+ * @cntr_id: counter index that needs to be freed
+ * @num_fltr: number of filters to be freed
+ */
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
+{
+ return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
+ ICE_AQC_RES_TYPE_FLAG_DEDICATED, num_fltr,
+ cntr_id);
+}
+
+/**
+ * ice_get_fdir_cnt_all - get the number of Flow Director filters
+ * @hw: hardware data structure
+ *
+ * Returns the number of filters available on device
+ */
+int ice_get_fdir_cnt_all(struct ice_hw *hw)
+{
+ return hw->func_caps.fd_fltr_guar +
+ hw->func_caps.fd_fltr_best_effort;
+}
+
+/**
+ * ice_pkt_insert_ipv6_addr - insert a be32 IPv6 address into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @addr: IPv6 address to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr)
+{
+ int idx;
+
+ for (idx = 0; idx < ICE_IPV6_ADDR_LEN_AS_U32; idx++)
+ ice_memcpy(pkt + offset + idx * sizeof(*addr), &addr[idx],
+ sizeof(*addr), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u16 - insert a be16 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 16 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u16(u8 *pkt, int offset, __be16 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_pkt_insert_u32 - insert a be32 value into a memory buffer.
+ * @pkt: packet buffer
+ * @offset: offset into buffer
+ * @data: 32 bit value to convert and insert into pkt at offset
+ */
+static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
+{
+ ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_fdir_get_prgm_pkt - generate a dummy packet
+ * @input: flow director filter data structure
+ * @pkt: pointer to return filter packet
+ * @frag: generate a fragment packet
+ */
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag)
+{
+ enum ice_fltr_ptype flow;
+ u16 idx;
+
+ if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ switch (input->ip.v4.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ switch (input->ip.v6.proto) {
+ case ICE_IP_PROTO_TCP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
+ break;
+ case ICE_IP_PROTO_UDP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
+ break;
+ case ICE_IP_PROTO_SCTP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
+ break;
+ case ICE_IP_PROTO_IP:
+ flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+ } else {
+ flow = input->flow_type;
+ }
+
+ for (idx = 0; idx < ICE_FDIR_NUM_PKT; idx++)
+ if (ice_fdir_pkt[idx].flow == flow)
+ break;
+ if (idx == ICE_FDIR_NUM_PKT)
+ return ICE_ERR_PARAM;
+ ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+
+ switch (flow) {
+ case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ if (frag)
+ pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF;
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
+ input->ip.v4.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
+ ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+ input->ip.v6.src_port);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ break;
+ default:
+ return ICE_ERR_PARAM;
+ }
+
+ if (input->flex_fltr)
+ ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word);
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_fdir_has_frag - does flow type have 2 ptypes
+ * @flow: flow ptype
+ *
+ * returns true is there is a fragment packet for this ptype
+ */
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow)
+{
+ if (flow == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ return true;
+ else
+ return false;
+}
+
+/**
+ * ice_fdir_find_by_idx - find filter with idx
+ * @hw: pointer to hardware structure
+ * @fltr_idx: index to find.
+ *
+ * Returns pointer to filter if found or null
+ */
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx)
+{
+ struct ice_fdir_fltr *rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found in the list */
+ if (fltr_idx == rule->fltr_id)
+ return rule;
+ if (fltr_idx < rule->fltr_id)
+ break;
+ }
+ return NULL;
+}
+
+/**
+ * ice_fdir_list_add_fltr - add a new node to the flow director filter list
+ * @hw: hardware structure
+ * @fltr: filter node to add to structure
+ */
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *fltr)
+{
+ struct ice_fdir_fltr *rule, *parent = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ /* rule ID found or pass its spot in the list */
+ if (rule->fltr_id >= fltr->fltr_id)
+ break;
+ parent = rule;
+ }
+
+ if (parent)
+ LIST_ADD_AFTER(&fltr->fltr_node, &parent->fltr_node);
+ else
+ LIST_ADD(&fltr->fltr_node, &hw->fdir_list_head);
+}
+
+/**
+ * ice_fdir_update_cntrs - increment / decrement filter counter
+ * @hw: pointer to hardware structure
+ * @flow: filter flow type
+ * @add: true implies filters added
+ */
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add)
+{
+ int incr;
+
+ incr = (add) ? 1 : -1;
+ hw->fdir_active_fltr += incr;
+ if (flow == ICE_FLTR_PTYPE_NONF_NONE || flow >= ICE_FLTR_PTYPE_MAX)
+ ice_debug(hw, ICE_DBG_SW, "Unknown filter type %d\n", flow);
+ else
+ hw->fdir_fltr_cnt[flow] += incr;
+}
+
+/**
+ * ice_cmp_ipv6_addr - compare 2 IP v6 addresses
+ * @a: IP v6 address
+ * @b: IP v6 address
+ *
+ * Returns 0 on equal, returns non-0 if different
+ */
+static int ice_cmp_ipv6_addr(__be32 *a, __be32 *b)
+{
+ return memcmp(a, b, 4 * sizeof(__be32));
+}
+
+/**
+ * ice_fdir_comp_ipv6_rules - compare 2 filters
+ * @a: a Flow Director filter data structure
+ * @b: a Flow Director filter data structure
+ * @v6: bool true if v6 filter
+ *
+ * Returns true if the filters match
+ */
+static bool
+ice_fdir_comp_rules(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b, bool v6)
+{
+ enum ice_fltr_ptype flow_type = a->flow_type;
+
+ /* The calling function already checks that the two filters have the
+ * same flow_type.
+ */
+ if (!v6) {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.dst_port == b->ip.v4.dst_port &&
+ a->ip.v4.src_port == b->ip.v4.src_port)
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) {
+ if (a->ip.v4.dst_ip == b->ip.v4.dst_ip &&
+ a->ip.v4.src_ip == b->ip.v4.src_ip &&
+ a->ip.v4.l4_header == b->ip.v4.l4_header &&
+ a->ip.v4.proto == b->ip.v4.proto &&
+ a->ip.v4.ip_ver == b->ip.v4.ip_ver &&
+ a->ip.v4.tos == b->ip.v4.tos)
+ return true;
+ }
+ } else {
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV6_SCTP) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port &&
+ !ice_cmp_ipv6_addr(a->ip.v6.dst_ip,
+ b->ip.v6.dst_ip) &&
+ !ice_cmp_ipv6_addr(a->ip.v6.src_ip,
+ b->ip.v6.src_ip))
+ return true;
+ } else if (flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) {
+ if (a->ip.v6.dst_port == b->ip.v6.dst_port &&
+ a->ip.v6.src_port == b->ip.v6.src_port)
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/**
+ * ice_fdir_is_dup_fltr - test if filter is already in list for PF
+ * @hw: hardware data structure
+ * @input: Flow Director filter data structure
+ *
+ * Returns true if the filter is found in the list
+ */
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input)
+{
+ enum ice_fltr_ptype flow_type;
+ struct ice_fdir_fltr *rule;
+ bool ret = false;
+
+ rule = NULL;
+
+ LIST_FOR_EACH_ENTRY(rule, &hw->fdir_list_head, ice_fdir_fltr,
+ fltr_node) {
+ if (rule->flow_type == input->flow_type) {
+ flow_type = input->flow_type;
+ if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP ||
+ flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
+ ret = ice_fdir_comp_rules(rule, input, false);
+ else
+ ret = ice_fdir_comp_rules(rule, input, true);
+ if (ret)
+ break;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * ice_clear_vsi_fd_table - admin command to clear FD table for a VSI
+ * @hw: hardware data structure
+ * @vsi_num: vsi_num (HW VSI num)
+ *
+ * Clears FD table entries by issuing admin command (direct, 0x0B06)
+ * Must to pass valid vsi_num as returned by "AddVSI".
+ */
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_VSI_IDX;
+
+ cmd->vsi_index = CPU_TO_LE16(vsi_num);
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
+
+/**
+ * ice_clear_pf_fd_table - admin command to clear FD table for PF
+ * @hw: hardware data structure
+ *
+ * Clears FD table entries for a PF by issuing admin command (direct, 0x0B06)
+ */
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw)
+{
+ struct ice_aqc_clear_fd_table *cmd;
+ struct ice_aq_desc desc;
+
+ cmd = &desc.params.clear_fd_table;
+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_fd_table);
+ cmd->clear_type = CL_FD_VM_VF_TYPE_PF_IDX;
+ /* vsi_index must be 0 to clear FD table for a PF */
+ cmd->vsi_index = CPU_TO_LE16(0);
+
+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
new file mode 100644
index 000000000..2ecb147f1
--- /dev/null
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -0,0 +1,202 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_FDIR_H_
+#define _ICE_FDIR_H_
+
+#include "ice_common.h"
+
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+ u32 fdid;
+ u16 qindex;
+ u16 cnt_index;
+ u16 fd_vsi;
+ u16 flex_val;
+ u8 comp_q;
+ u8 comp_report;
+ u8 fd_space;
+ u8 cnt_ena;
+ u8 evict_ena;
+ u8 toq;
+ u8 toq_prio;
+ u8 dpu_recipe;
+ u8 drop;
+ u8 flex_prio;
+ u8 flex_mdid;
+ u8 dtype;
+ u8 pcmd;
+ u8 desc_prof_prio;
+ u8 desc_prof;
+ u8 swap;
+ u8 fdid_prio;
+ u8 fdid_mdid;
+};
+
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void
+ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx,
+ struct ice_fltr_desc *fdir_desc);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
+
+#define ICE_FDIR_IP_PROTOCOLS
+#define ICE_IP_PROTO_TCP 6
+#define ICE_IP_PROTO_UDP 17
+#define ICE_IP_PROTO_SCTP 132
+#define ICE_IP_PROTO_IP 0
+#define ICE_IP_PROTO_ESP 50
+
+#define ICE_FDIR_MAX_RAW_PKT_SIZE 512
+#define ICE_FDIR_BUF_FULL_MARGIN 10
+#define ICE_FDIR_BUF_HEAD_ROOM 32
+
+/* macros for offsets into packets for flow director programming */
+#define ICE_IPV4_SRC_ADDR_OFFSET 26
+#define ICE_IPV4_DST_ADDR_OFFSET 30
+#define ICE_IPV4_TCP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_TCP_DST_PORT_OFFSET 36
+#define ICE_IPV4_UDP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_UDP_DST_PORT_OFFSET 36
+#define ICE_IPV4_SCTP_SRC_PORT_OFFSET 34
+#define ICE_IPV4_SCTP_DST_PORT_OFFSET 36
+#define ICE_IPV4_PROTO_OFFSET 23
+#define ICE_IPV6_SRC_ADDR_OFFSET 22
+#define ICE_IPV6_DST_ADDR_OFFSET 38
+#define ICE_IPV6_TCP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_TCP_DST_PORT_OFFSET 56
+#define ICE_IPV6_UDP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_UDP_DST_PORT_OFFSET 56
+#define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54
+#define ICE_IPV6_SCTP_DST_PORT_OFFSET 56
+
+#define ICE_FDIR_MAX_FLTRS 16384
+
+/* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF
+ * requests that the packet not be fragmented. MF indicates that a packet has
+ * been fragmented.
+ */
+#define ICE_FDIR_IPV4_PKT_FLAG_DF 0x20
+#define ICE_FDIR_IPV4_PKT_FLAG_MF 0x40
+
+enum ice_fltr_prgm_desc_dest {
+ ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP,
+ ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER,
+};
+
+enum ice_fltr_prgm_desc_fd_status {
+ ICE_FLTR_PRGM_DESC_FD_STATUS_NONE,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID_4FLEX_BYTES,
+ ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
+};
+
+#define ICE_FLTR_PRGM_FLEX_WORD_SIZE sizeof(__be16)
+
+struct ice_rx_flow_userdef {
+ u16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+};
+
+struct ice_fdir_v4 {
+ __be32 dst_ip;
+ __be32 src_ip;
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header;
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tos;
+ u8 ip_ver;
+ u8 proto;
+};
+
+#define ICE_IPV6_ADDR_LEN_AS_U32 4
+
+struct ice_fdir_v6 {
+ __be32 dst_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be32 src_ip[ICE_IPV6_ADDR_LEN_AS_U32];
+ __be16 dst_port;
+ __be16 src_port;
+ __be32 l4_header; /* next header */
+ __be32 sec_parm_idx; /* security parameter index */
+ u8 tc;
+ u8 proto;
+};
+
+struct ice_fdir_extra {
+ u8 dst_mac[ETH_ALEN]; /* dest MAC address */
+ u32 usr_def[2]; /* user data */
+ __be16 vlan_type; /* VLAN ethertype */
+ __be16 vlan_tag; /* VLAN tag info */
+};
+
+struct ice_fdir_fltr {
+ struct LIST_ENTRY_TYPE fltr_node;
+ enum ice_fltr_ptype flow_type;
+
+ union {
+ struct ice_fdir_v4 v4;
+ struct ice_fdir_v6 v6;
+ } ip, mask;
+
+ struct ice_fdir_extra ext_data;
+ struct ice_fdir_extra ext_mask;
+
+ /* flex byte filter data */
+ __be16 flex_word;
+ u16 flex_offset;
+ u16 flex_fltr;
+
+ /* filter control */
+ u16 q_index;
+#ifdef ADQ_SUPPORT
+ u16 orig_q_index;
+#endif /* ADQ_SUPPORT */
+ u16 dest_vsi;
+ u8 dest_ctl;
+ u8 fltr_status;
+ u16 cnt_index;
+ u32 fltr_id;
+};
+
+
+/* Dummy packet filter definition structure. */
+struct ice_fdir_base_pkt {
+ enum ice_fltr_ptype flow;
+ u16 pkt_len;
+ const u8 *pkt;
+};
+
+void
+ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ struct ice_fltr_desc *fdesc, bool add);
+enum ice_status
+ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
+enum ice_status
+ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add);
+int ice_get_fdir_cnt_all(struct ice_hw *hw);
+bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+enum ice_status
+ice_update_fdir_list_entry(struct ice_hw *hw, struct ice_fdir_fltr *input,
+ u16 sw_idx);
+bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
+struct ice_fdir_fltr *
+ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
+void
+ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add);
+void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
+#endif /* _ICE_FDIR_H_ */
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 99108d81c..37bb4cbb5 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1275,6 +1275,25 @@ void ice_free_seg(struct ice_hw *hw)
}
/**
+ * ice_init_fd_mask_regs - initialize Flow Director mask registers
+ * @hw: pointer to the HW struct
+ *
+ * This function sets up the Flow Director mask registers to allow for complete
+ * masking off of any of the 24 Field Vector words. After this call, mask 0 will
+ * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc.
+ */
+static void ice_init_fd_mask_regs(struct ice_hw *hw)
+{
+ u16 i;
+
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ wr32(hw, GLQF_FDMASK(i), i);
+ ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i,
+ GLQF_FDMASK(i), i);
+ }
+}
+
+/**
* ice_init_pkg_regs - initialize additional package registers
* @hw: pointer to the hardware structure
*/
@@ -1287,6 +1306,8 @@ static void ice_init_pkg_regs(struct ice_hw *hw)
/* setup Switch block input mask, which is 48-bits in two parts */
wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);
+ /* setup default flow director masks */
+ ice_init_fd_mask_regs(hw);
}
/**
@@ -3783,6 +3804,205 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
}
/**
+ * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @mask_sel: mask select
+ *
+ * This function enable any of the masks selected by the mask select parameter
+ * for the profile specified.
+ */
+static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
+{
+ wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
+
+ ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
+ GLQF_FDMASK_SEL(prof_id), mask_sel);
+}
+
+#define ICE_SRC_DST_MAX_COUNT 8
+
+struct ice_fd_src_dst_pair {
+ u8 prot_id;
+ u8 count;
+ u16 off;
+};
+
+static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
+ /* These are defined in pairs */
+ { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
+ { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
+
+ { ICE_PROT_IPV4_IL, 2, 12 },
+ { ICE_PROT_IPV4_IL, 2, 16 },
+
+ { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
+ { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
+
+ { ICE_PROT_IPV6_IL, 8, 8 },
+ { ICE_PROT_IPV6_IL, 8, 24 },
+
+ { ICE_PROT_TCP_IL, 1, 0 },
+ { ICE_PROT_TCP_IL, 1, 2 },
+
+ { ICE_PROT_UDP_OF, 1, 0 },
+ { ICE_PROT_UDP_OF, 1, 2 },
+
+ { ICE_PROT_UDP_IL_OR_S, 1, 0 },
+ { ICE_PROT_UDP_IL_OR_S, 1, 2 },
+
+ { ICE_PROT_SCTP_IL, 1, 0 },
+ { ICE_PROT_SCTP_IL, 1, 2 }
+};
+
+#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
+
+/**
+ * ice_update_fd_swap - set register appropriately for a FD FV extraction
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ * @es: extraction sequence (length of array is determined by the block)
+ */
+static enum ice_status
+ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
+{
+ ice_declare_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
+ u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
+#define ICE_FD_FV_NOT_FOUND (-2)
+ s8 first_free = ICE_FD_FV_NOT_FOUND;
+ u8 used[ICE_MAX_FV_WORDS] = { 0 };
+ s8 orig_free, si;
+ u32 mask_sel = 0;
+ u8 i, j, k;
+
+ ice_memset(pair_list, 0, sizeof(pair_list), ICE_NONDMA_MEM);
+
+ ice_init_fd_mask_regs(hw);
+
+ /* This code assumes that the Flow Director field vectors are assigned
+ * from the end of the FV indexes working towards the zero index, that
+ * only complete fields will be included and will be consecutive, and
+ * that there are no gaps between valid indexes.
+ */
+
+ /* Determine swap fields present */
+ for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
+ /* Find the first free entry, assuming right to left population.
+ * This is where we can start adding additional pairs if needed.
+ */
+ if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
+ ICE_PROT_INVALID)
+ first_free = i - 1;
+
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
+ es[i].off == ice_fd_pairs[j].off) {
+ ice_set_bit(j, pair_list);
+ pair_start[j] = i;
+ }
+ }
+ }
+
+ orig_free = first_free;
+
+ /* determine missing swap fields that need to be added */
+ for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
+ u8 bit1 = ice_is_bit_set(pair_list, i + 1);
+ u8 bit0 = ice_is_bit_set(pair_list, i);
+
+ if (bit0 ^ bit1) {
+ u8 index;
+
+ /* add the appropriate 'paired' entry */
+ if (!bit0)
+ index = i;
+ else
+ index = i + 1;
+
+ /* check for room */
+ if (first_free + 1 < ice_fd_pairs[index].count)
+ return ICE_ERR_MAX_LIMIT;
+
+ /* place in extraction sequence */
+ for (k = 0; k < ice_fd_pairs[index].count; k++) {
+ es[first_free - k].prot_id =
+ ice_fd_pairs[index].prot_id;
+ es[first_free - k].off =
+ ice_fd_pairs[index].off + (k * 2);
+
+ /* keep track of non-relevant fields */
+ mask_sel |= 1 << (first_free - k);
+ }
+
+ pair_start[index] = first_free;
+ first_free -= ice_fd_pairs[index].count;
+ }
+ }
+
+ /* fill in the swap array */
+ si = hw->blk[ICE_BLK_FD].es.fvw - 1;
+ do {
+ u8 indexes_used = 1;
+
+ /* assume flat at this index */
+#define ICE_SWAP_VALID 0x80
+ used[si] = si | ICE_SWAP_VALID;
+
+ if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
+ si -= indexes_used;
+ continue;
+ }
+
+ /* check for a swap location */
+ for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+ if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
+ es[si].off == ice_fd_pairs[j].off) {
+ u8 idx;
+
+ /* determine the appropriate matching field */
+ idx = j + ((j % 2) ? -1 : 1);
+
+ indexes_used = ice_fd_pairs[idx].count;
+ for (k = 0; k < indexes_used; k++) {
+ used[si - k] = (pair_start[idx] - k) |
+ ICE_SWAP_VALID;
+ }
+
+ break;
+ }
+ }
+
+ si -= indexes_used;
+ } while (si >= 0);
+
+ /* for each set of 4 swap indexes, write the appropriate register */
+ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
+ u32 raw_entry = 0;
+
+ for (k = 0; k < 4; k++) {
+ u8 idx;
+
+ idx = (j * 4) + k;
+ if (used[idx])
+ raw_entry |= used[idx] << (k * 8);
+ }
+
+ /* write the appropriate register set, based on HW block */
+ wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry);
+
+ ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n",
+ prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry);
+ }
+
+ /* update the masks for this profile to be sure we ignore fields that
+ * are not relevant to our match criteria
+ */
+ ice_update_fd_mask(hw, prof_id, mask_sel);
+
+ return ICE_SUCCESS;
+}
+
+/**
* ice_add_prof - add profile
* @hw: pointer to the HW struct
* @blk: hardware block
@@ -3812,6 +4032,18 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
status = ice_alloc_prof_id(hw, blk, &prof_id);
if (status)
goto err_ice_add_prof;
+ if (blk == ICE_BLK_FD) {
+ /* For Flow Director block, the extraction sequence may
+ * need to be altered in the case where there are paired
+ * fields that have no match. This is necessary because
+ * for Flow Director, src and dest fields need to paired
+ * for filter programming and these values are swapped
+ * during Tx.
+ */
+ status = ice_update_fd_swap(hw, prof_id, es);
+ if (status)
+ goto err_ice_add_prof;
+ }
/* and write new es */
ice_write_es(hw, blk, prof_id, es);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 6a08b3d28..ef0b5bb52 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -164,6 +164,7 @@ enum ice_media_type {
/* Software VSI types. */
enum ice_vsi_type {
ICE_VSI_PF = 0,
+ ICE_VSI_CTRL = 3, /* equates to ICE_VSI_PF with 1 queue pair */
#ifdef ADQ_SUPPORT
ICE_VSI_CHNL = 4,
#endif /* ADQ_SUPPORT */
@@ -218,6 +219,32 @@ struct ice_phy_info {
#define ICE_MAX_NUM_MIRROR_RULES 64
+/* protocol enumeration for filters */
+enum ice_fltr_ptype {
+ /* NONE - used for undef/error */
+ ICE_FLTR_PTYPE_NONF_NONE = 0,
+ ICE_FLTR_PTYPE_NONF_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+ ICE_FLTR_PTYPE_FRAG_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
+ ICE_FLTR_PTYPE_NONF_IPV6_OTHER,
+ ICE_FLTR_PTYPE_MAX,
+};
+
+/* 6 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL + 4 ICE_VSI_CHNL */
+#define ICE_MAX_FDIR_VSI_PER_FILTER 6
+
+struct ice_fd_hw_prof {
+ struct ice_flow_seg_info *fdir_seg;
+ int cnt;
+ u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+ u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+};
+
/* Common HW capabilities for SW use */
struct ice_hw_common_caps {
/* Write CSR protection */
@@ -297,12 +324,15 @@ struct ice_hw_common_caps {
struct ice_hw_func_caps {
struct ice_hw_common_caps common_cap;
u32 guar_num_vsi;
+ u32 fd_fltr_guar; /* Number of filters guaranteed */
+ u32 fd_fltr_best_effort; /* Number of best effort filters */
};
/* Device wide capabilities */
struct ice_hw_dev_caps {
struct ice_hw_common_caps common_cap;
u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */
+ u32 num_flow_director_fltr; /* Number of FD filters available */
};
@@ -651,6 +681,7 @@ struct ice_hw {
u64 debug_mask; /* BITMAP for debug mask */
enum ice_mac_type mac_type;
+ u16 fd_ctr_base; /* FD counter base index */
/* pci info */
u16 device_id;
u16 vendor_id;
@@ -748,6 +779,19 @@ struct ice_hw {
struct ice_blk_info blk[ICE_BLK_COUNT];
struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */
struct LIST_HEAD_TYPE fl_profs[ICE_BLK_COUNT];
+ /* Flow Director filter info */
+ int fdir_active_fltr;
+
+ struct ice_lock fdir_fltr_lock; /* protect Flow Director */
+ struct LIST_HEAD_TYPE fdir_list_head;
+
+ /* Book-keeping of side-band filter count per flow-type.
+ * This is used to detect and handle input set changes for
+ * respective flow-type.
+ */
+ u16 fdir_fltr_cnt[ICE_FLTR_PTYPE_MAX];
+
+ struct ice_fd_hw_prof **fdir_prof;
};
/* Statistics collected by each port, VSI, VEB, and S-channel */
@@ -792,6 +836,11 @@ struct ice_hw_port_stats {
u64 link_xoff_rx; /* lxoffrxc */
u64 link_xon_tx; /* lxontxc */
u64 link_xoff_tx; /* lxofftxc */
+ u64 priority_xon_rx[8]; /* pxonrxc[8] */
+ u64 priority_xoff_rx[8]; /* pxoffrxc[8] */
+ u64 priority_xon_tx[8]; /* pxontxc[8] */
+ u64 priority_xoff_tx[8]; /* pxofftxc[8] */
+ u64 priority_xon_2_xoff[8]; /* pxon2offc[8] */
u64 rx_size_64; /* prc64 */
u64 rx_size_127; /* prc127 */
u64 rx_size_255; /* prc255 */
@@ -811,6 +860,12 @@ struct ice_hw_port_stats {
u64 tx_size_1522; /* ptc1522 */
u64 tx_size_big; /* ptc9522 */
u64 mac_short_pkt_dropped; /* mspdc */
+ /* flow director stats */
+ u32 fd_sb_status;
+ u64 fd_sb_match;
+#ifdef ADQ_SUPPORT
+ u64 ch_atr_match;
+#endif /* ADQ_SUPPORT */
};
enum ice_sw_fwd_act_type {
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 755d2497b..624202567 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -10,6 +10,7 @@ sources = [
'ice_flex_pipe.c',
'ice_flow.c',
'ice_dcb.c',
+ 'ice_fdir.c',
]
error_cflags = ['-Wno-unused-value',
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 33/38] net/ice/base: change profile priority for RSS reply
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (32 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 32/38] net/ice/base: add FDIR support Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 34/38] net/ice/base: fix duplicate resource allocations Qi Zhang
` (5 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
1. Add call to replay RSS configurations
2. Add RSS configurations to end of list and not the head to avoid
inversion on replay.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 5 ++++-
drivers/net/ice/base/ice_flow.c | 3 ++-
drivers/net/ice/base/ice_osdep.h | 16 ++++++++++++++++
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 425f76e8d..74f925c03 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3854,7 +3854,10 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
if (status)
return status;
}
-
+ /* Replay per VSI all RSS configurations */
+ status = ice_replay_rss_cfg(hw, vsi_handle);
+ if (status)
+ return status;
/* Replay per VSI all filters */
status = ice_replay_vsi_all_fltr(hw, vsi_handle);
if (!status)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 03a324d49..428002c28 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1672,7 +1672,8 @@ ice_add_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle,
rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match;
rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs;
- LIST_ADD(&rss_cfg->l_entry, &hw->vsi_ctx[vsi_handle]->rss_list_head);
+ LIST_ADD_TAIL(&rss_cfg->l_entry,
+ &hw->vsi_ctx[vsi_handle]->rss_list_head);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 252c8f4e7..560e36c1b 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -462,6 +462,22 @@ LIST_HEAD(ice_list_head, ice_list_entry);
#define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
#define LIST_ADD_AFTER(entry, list_entry) \
LIST_INSERT_AFTER(list_entry, entry, next)
+
+static inline void list_add_tail(struct ice_list_entry *entry,
+ struct ice_list_head *head)
+{
+ struct ice_list_entry *tail = head->lh_first;
+
+ if (tail == NULL) {
+ LIST_INSERT_HEAD(head, entry, next);
+ return;
+ }
+ while (tail->next.le_next != NULL)
+ tail = tail->next.le_next;
+ LIST_INSERT_AFTER(tail, entry, next);
+}
+
+#define LIST_ADD_TAIL(entry, head) list_add_tail(entry, head)
#define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
for ((pos) = (head)->lh_first ? \
container_of((head)->lh_first, struct type, member) : \
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 33/38] net/ice/base: change profile priority for RSS reply
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 33/38] net/ice/base: change profile priority for RSS reply Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
1. Add call to replay RSS configurations
2. Add RSS configurations to end of list and not the head to avoid
inversion on replay.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 5 ++++-
drivers/net/ice/base/ice_flow.c | 3 ++-
drivers/net/ice/base/ice_osdep.h | 16 ++++++++++++++++
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 425f76e8d..74f925c03 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -3854,7 +3854,10 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
if (status)
return status;
}
-
+ /* Replay per VSI all RSS configurations */
+ status = ice_replay_rss_cfg(hw, vsi_handle);
+ if (status)
+ return status;
/* Replay per VSI all filters */
status = ice_replay_vsi_all_fltr(hw, vsi_handle);
if (!status)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 03a324d49..428002c28 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1672,7 +1672,8 @@ ice_add_rss_vsi_ctx(struct ice_hw *hw, u16 vsi_handle,
rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match;
rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs;
- LIST_ADD(&rss_cfg->l_entry, &hw->vsi_ctx[vsi_handle]->rss_list_head);
+ LIST_ADD_TAIL(&rss_cfg->l_entry,
+ &hw->vsi_ctx[vsi_handle]->rss_list_head);
return ICE_SUCCESS;
}
diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 252c8f4e7..560e36c1b 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -462,6 +462,22 @@ LIST_HEAD(ice_list_head, ice_list_entry);
#define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
#define LIST_ADD_AFTER(entry, list_entry) \
LIST_INSERT_AFTER(list_entry, entry, next)
+
+static inline void list_add_tail(struct ice_list_entry *entry,
+ struct ice_list_head *head)
+{
+ struct ice_list_entry *tail = head->lh_first;
+
+ if (tail == NULL) {
+ LIST_INSERT_HEAD(head, entry, next);
+ return;
+ }
+ while (tail->next.le_next != NULL)
+ tail = tail->next.le_next;
+ LIST_INSERT_AFTER(tail, entry, next);
+}
+
+#define LIST_ADD_TAIL(entry, head) list_add_tail(entry, head)
#define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
for ((pos) = (head)->lh_first ? \
container_of((head)->lh_first, struct type, member) : \
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 34/38] net/ice/base: fix duplicate resource allocations
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (33 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 33/38] net/ice/base: change profile priority for RSS reply Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 35/38] net/ice/base: fix minor issues Qi Zhang
` (4 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
This patch ensure that TCAM allocations made by a newly added VSIG
that has the same characteristic list of an existing VSIG are removed.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 85 +++++++++++++++++-------------------
1 file changed, 41 insertions(+), 44 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 37bb4cbb5..c9d8730d2 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2302,21 +2302,23 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- /* remove all vsis associated with this VSIG XLT2 entry */
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
-
- vsi_cur->vsig = ICE_DEFAULT_VSIG;
- vsi_cur->changed = 1;
- vsi_cur->next_vsi = NULL;
- vsi_cur = tmp;
- } while (vsi_cur);
-
- /* NULL terminate head of vsi list */
- hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ /* If the VSIG has at least 1 VSI then iterate through the
+ * list and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ /* remove all vsis associated with this VSIG XLT2 entry */
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+
+ vsi_cur->vsig = ICE_DEFAULT_VSIG;
+ vsi_cur->changed = 1;
+ vsi_cur->next_vsi = NULL;
+ vsi_cur = tmp;
+ } while (vsi_cur);
+
+ /* NULL terminate head of VSI list */
+ hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ }
/* free characteristic list */
LIST_FOR_EACH_ENTRY_SAFE(del, dtmp,
@@ -4267,36 +4269,32 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/* Move all VSIS associated with this VSIG to the default VSIG */
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
- struct ice_chs_chg *p;
-
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_vsig;
+ /* If the VSIG has at least 1 VSI then iterate through the list
+ * and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+ struct ice_chs_chg *p;
- p->type = ICE_VSIG_REM;
- p->orig_vsig = vsig;
- p->vsig = ICE_DEFAULT_VSIG;
- p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
+ p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
+ if (!p)
+ return ICE_ERR_NO_MEMORY;
- LIST_ADD(&p->list_entry, chg);
+ p->type = ICE_VSIG_REM;
+ p->orig_vsig = vsig;
+ p->vsig = ICE_DEFAULT_VSIG;
+ p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
- status = ice_vsig_free(hw, blk, vsig);
- if (status)
- return status;
+ LIST_ADD(&p->list_entry, chg);
- vsi_cur = tmp;
- } while (vsi_cur);
+ vsi_cur = tmp;
+ } while (vsi_cur);
+ }
- return ICE_SUCCESS;
+ status = ice_vsig_free(hw, blk, vsig);
-err_ice_rem_vsig:
- /* the caller will free up the change list */
- return ICE_ERR_NO_MEMORY;
+ return status;
}
/**
@@ -4493,7 +4491,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA);
- LIST_ADD(&p->list, lst);
+ LIST_ADD_TAIL(&p->list, lst);
}
return ICE_SUCCESS;
@@ -5000,14 +4998,13 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/* search for an existing VSIG with an exact charc match */
status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
if (!status) {
- /* found an exact match */
- /* move vsi to the VSIG that matches */
+ /* move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
- /* remove original VSIG if we just moved the only VSI
- * from it
+ /* VSI has been moved out of or_vsig. If the or_vsig had
+ * only that VSI it is now empty and can be removed.
*/
if (only_vsi) {
status = ice_rem_vsig(hw, blk, or_vsig, &chg);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 34/38] net/ice/base: fix duplicate resource allocations
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 34/38] net/ice/base: fix duplicate resource allocations Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Vignesh Sridhar
This patch ensure that TCAM allocations made by a newly added VSIG
that has the same characteristic list of an existing VSIG are removed.
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 85 +++++++++++++++++-------------------
1 file changed, 41 insertions(+), 44 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 37bb4cbb5..c9d8730d2 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2302,21 +2302,23 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- /* remove all vsis associated with this VSIG XLT2 entry */
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
-
- vsi_cur->vsig = ICE_DEFAULT_VSIG;
- vsi_cur->changed = 1;
- vsi_cur->next_vsi = NULL;
- vsi_cur = tmp;
- } while (vsi_cur);
-
- /* NULL terminate head of vsi list */
- hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ /* If the VSIG has at least 1 VSI then iterate through the
+ * list and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ /* remove all vsis associated with this VSIG XLT2 entry */
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+
+ vsi_cur->vsig = ICE_DEFAULT_VSIG;
+ vsi_cur->changed = 1;
+ vsi_cur->next_vsi = NULL;
+ vsi_cur = tmp;
+ } while (vsi_cur);
+
+ /* NULL terminate head of VSI list */
+ hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
+ }
/* free characteristic list */
LIST_FOR_EACH_ENTRY_SAFE(del, dtmp,
@@ -4267,36 +4269,32 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
/* Move all VSIS associated with this VSIG to the default VSIG */
vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
- if (!vsi_cur)
- return ICE_ERR_CFG;
-
- do {
- struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
- struct ice_chs_chg *p;
-
- p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
- goto err_ice_rem_vsig;
+ /* If the VSIG has at least 1 VSI then iterate through the list
+ * and remove the VSIs before deleting the group.
+ */
+ if (vsi_cur) {
+ do {
+ struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
+ struct ice_chs_chg *p;
- p->type = ICE_VSIG_REM;
- p->orig_vsig = vsig;
- p->vsig = ICE_DEFAULT_VSIG;
- p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
+ p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
+ if (!p)
+ return ICE_ERR_NO_MEMORY;
- LIST_ADD(&p->list_entry, chg);
+ p->type = ICE_VSIG_REM;
+ p->orig_vsig = vsig;
+ p->vsig = ICE_DEFAULT_VSIG;
+ p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
- status = ice_vsig_free(hw, blk, vsig);
- if (status)
- return status;
+ LIST_ADD(&p->list_entry, chg);
- vsi_cur = tmp;
- } while (vsi_cur);
+ vsi_cur = tmp;
+ } while (vsi_cur);
+ }
- return ICE_SUCCESS;
+ status = ice_vsig_free(hw, blk, vsig);
-err_ice_rem_vsig:
- /* the caller will free up the change list */
- return ICE_ERR_NO_MEMORY;
+ return status;
}
/**
@@ -4493,7 +4491,7 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA);
- LIST_ADD(&p->list, lst);
+ LIST_ADD_TAIL(&p->list, lst);
}
return ICE_SUCCESS;
@@ -5000,14 +4998,13 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
/* search for an existing VSIG with an exact charc match */
status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
if (!status) {
- /* found an exact match */
- /* move vsi to the VSIG that matches */
+ /* move VSI to the VSIG that matches */
status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
if (status)
goto err_ice_add_prof_id_flow;
- /* remove original VSIG if we just moved the only VSI
- * from it
+ /* VSI has been moved out of or_vsig. If the or_vsig had
+ * only that VSI it is now empty and can be removed.
*/
if (only_vsi) {
status = ice_rem_vsig(hw, blk, or_vsig, &chg);
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 35/38] net/ice/base: fix minor issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (34 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 34/38] net/ice/base: fix duplicate resource allocations Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 36/38] net/ice/base: increase prototol offset size Qi Zhang
` (3 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. clean flow entry's action structure after remove it.
2. initialized priority when add a new flow entry
3. remove RSS configuration before deleting the flow profile.
Fixes: aa1cd410fa64 ("net/ice/base: add flow module")
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flow.c | 13 ++++++++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c9d8730d2..e4d0b8c0f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2467,7 +2467,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < es->count; i++) {
off = i * es->fvw;
- if (memcmp(&es->t[off], fv, es->fvw * 2))
+ if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
continue;
*prof_id = i;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 428002c28..98727cfeb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -910,8 +910,11 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
if (entry->entry)
ice_free(hw, entry->entry);
- if (entry->acts)
+ if (entry->acts) {
ice_free(hw, entry->acts);
+ entry->acts = NULL;
+ entry->acts_cnt = 0;
+ }
ice_free(hw, entry);
@@ -1306,6 +1309,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
e->id = entry_id;
e->vsi_handle = vsi_handle;
e->prof = prof;
+ e->priority = prio;
switch (blk) {
case ICE_BLK_RSS:
@@ -1852,11 +1856,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
if (status)
goto out;
+ /* Remove RSS configuration from VSI context before deleting
+ * the flow profile.
+ */
+ ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
+
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI))
status = ice_flow_rem_prof_sync(hw, blk, prof);
- ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
-
out:
ice_free(hw, segs);
return status;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 35/38] net/ice/base: fix minor issues
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 35/38] net/ice/base: fix minor issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
1. clean flow entry's action structure after remove it.
2. initialized priority when add a new flow entry
3. remove RSS configuration before deleting the flow profile.
Fixes: aa1cd410fa64 ("net/ice/base: add flow module")
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flow.c | 13 ++++++++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index c9d8730d2..e4d0b8c0f 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2467,7 +2467,7 @@ ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,
for (i = 0; i < es->count; i++) {
off = i * es->fvw;
- if (memcmp(&es->t[off], fv, es->fvw * 2))
+ if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
continue;
*prof_id = i;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 428002c28..98727cfeb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -910,8 +910,11 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)
if (entry->entry)
ice_free(hw, entry->entry);
- if (entry->acts)
+ if (entry->acts) {
ice_free(hw, entry->acts);
+ entry->acts = NULL;
+ entry->acts_cnt = 0;
+ }
ice_free(hw, entry);
@@ -1306,6 +1309,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
e->id = entry_id;
e->vsi_handle = vsi_handle;
e->prof = prof;
+ e->priority = prio;
switch (blk) {
case ICE_BLK_RSS:
@@ -1852,11 +1856,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
if (status)
goto out;
+ /* Remove RSS configuration from VSI context before deleting
+ * the flow profile.
+ */
+ ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
+
if (!ice_is_any_bit_set(prof->vsis, ICE_MAX_VSI))
status = ice_flow_rem_prof_sync(hw, blk, prof);
- ice_rem_rss_cfg_vsi_ctx(hw, vsi_handle, prof);
-
out:
ice_free(hw, segs);
return status;
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 36/38] net/ice/base: increase prototol offset size
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (35 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 35/38] net/ice/base: fix minor issues Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 37/38] net/ice/base: revert the workaround for resource allocation Qi Zhang
` (2 subsequent siblings)
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
OS package's format is changed, field vector's protocol offset size is
changed from 8 bit to 16 bit. So base code also need to align to this, or
PMD will not be able to load OS package correctly.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_type.h | 8 +++++++-
drivers/net/ice/base/ice_flow.c | 7 +++++--
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 365f33390..f259e1371 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -5,12 +5,18 @@
#ifndef _ICE_FLEX_TYPE_H_
#define _ICE_FLEX_TYPE_H_
+#define ICE_FV_OFFSET_INVAL 0x1FF
+
+#pragma pack(1)
/* Extraction Sequence (Field Vector) Table */
struct ice_fv_word {
u8 prot_id;
- u8 off; /* Offset within the protocol header */
+ u16 off; /* Offset within the protocol header */
+ u8 resvrd;
};
+#pragma pack()
+
#define ICE_MAX_FV_WORDS 48
struct ice_fv {
struct ice_fv_word ew[ICE_MAX_FV_WORDS];
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 98727cfeb..be819e0e9 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -516,7 +516,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
struct ice_flow_fld_info *flds;
u16 cnt, ese_bits, i;
s16 adj = 0;
- u8 off;
+ u16 off;
flds = params->prof->segs[seg].fields;
@@ -956,7 +956,10 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
return ICE_ERR_NO_MEMORY;
/* initialize extraction sequence to all invalid (0xff) */
- ice_memset(params.es, 0xff, sizeof(params.es), ICE_NONDMA_MEM);
+ for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
+ params.es[i].prot_id = ICE_PROT_INVALID;
+ params.es[i].off = ICE_FV_OFFSET_INVAL;
+ }
params.blk = blk;
params.prof->id = prof_id;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index bad925c8c..f0c74a348 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -174,7 +174,7 @@ enum ice_flow_priority {
struct ice_flow_seg_xtrct {
u8 prot_id; /* Protocol ID of extracted header field */
- u8 off; /* Starting offset of the field in header in bytes */
+ u16 off; /* Starting offset of the field in header in bytes */
u8 idx; /* Index of FV entry used */
u8 disp; /* Displacement of field in bits fr. FV entry's start */
};
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 6b3bd6542..e572dd320 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -223,7 +223,7 @@ struct ice_prot_lkup_ext {
u16 prot_type;
u8 n_val_words;
/* create a buffer to hold max words per recipe */
- u8 field_off[ICE_MAX_CHAIN_WORDS];
+ u16 field_off[ICE_MAX_CHAIN_WORDS];
struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 36/38] net/ice/base: increase prototol offset size
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 36/38] net/ice/base: increase prototol offset size Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
OS package's format is changed, field vector's protocol offset size is
changed from 8 bit to 16 bit. So base code also need to align to this, or
PMD will not be able to load OS package correctly.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_flex_type.h | 8 +++++++-
drivers/net/ice/base/ice_flow.c | 7 +++++--
drivers/net/ice/base/ice_flow.h | 2 +-
drivers/net/ice/base/ice_protocol_type.h | 2 +-
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 365f33390..f259e1371 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -5,12 +5,18 @@
#ifndef _ICE_FLEX_TYPE_H_
#define _ICE_FLEX_TYPE_H_
+#define ICE_FV_OFFSET_INVAL 0x1FF
+
+#pragma pack(1)
/* Extraction Sequence (Field Vector) Table */
struct ice_fv_word {
u8 prot_id;
- u8 off; /* Offset within the protocol header */
+ u16 off; /* Offset within the protocol header */
+ u8 resvrd;
};
+#pragma pack()
+
#define ICE_MAX_FV_WORDS 48
struct ice_fv {
struct ice_fv_word ew[ICE_MAX_FV_WORDS];
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 98727cfeb..be819e0e9 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -516,7 +516,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
struct ice_flow_fld_info *flds;
u16 cnt, ese_bits, i;
s16 adj = 0;
- u8 off;
+ u16 off;
flds = params->prof->segs[seg].fields;
@@ -956,7 +956,10 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
return ICE_ERR_NO_MEMORY;
/* initialize extraction sequence to all invalid (0xff) */
- ice_memset(params.es, 0xff, sizeof(params.es), ICE_NONDMA_MEM);
+ for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
+ params.es[i].prot_id = ICE_PROT_INVALID;
+ params.es[i].off = ICE_FV_OFFSET_INVAL;
+ }
params.blk = blk;
params.prof->id = prof_id;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index bad925c8c..f0c74a348 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -174,7 +174,7 @@ enum ice_flow_priority {
struct ice_flow_seg_xtrct {
u8 prot_id; /* Protocol ID of extracted header field */
- u8 off; /* Starting offset of the field in header in bytes */
+ u16 off; /* Starting offset of the field in header in bytes */
u8 idx; /* Index of FV entry used */
u8 disp; /* Displacement of field in bits fr. FV entry's start */
};
diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 6b3bd6542..e572dd320 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -223,7 +223,7 @@ struct ice_prot_lkup_ext {
u16 prot_type;
u8 n_val_words;
/* create a buffer to hold max words per recipe */
- u8 field_off[ICE_MAX_CHAIN_WORDS];
+ u16 field_off[ICE_MAX_CHAIN_WORDS];
struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 37/38] net/ice/base: revert the workaround for resource allocation
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (36 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 36/38] net/ice/base: increase prototol offset size Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 38/38] net/ice/base: rework on bit ops Qi Zhang
2019-03-25 7:07 ` [dpdk-dev] [PATCH v4 00/38] ice share code update Zhang, Qi Z
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Revert the workaround for allocating TCAM and FV entries to align
with latest firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 11 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_flex_pipe.c | 235 ++---------------------------------
drivers/net/ice/base/ice_flex_type.h | 2 -
4 files changed, 17 insertions(+), 233 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 74f925c03..3d2e5f347 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1786,11 +1786,11 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
* @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
- * @sh: shared if true, dedicated if false
+ * @btm: allocate from bottom
* @res: pointer to array that will receive the resources
*/
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
{
struct ice_aqc_alloc_free_res_elem *buf;
enum ice_status status;
@@ -1804,8 +1804,11 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
/* Prepare buffer to allocate resource. */
buf->num_elems = CPU_TO_LE16(num);
- buf->res_type = CPU_TO_LE16(type | (sh ? ICE_AQC_RES_TYPE_FLAG_SHARED :
- ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+ buf->res_type = CPU_TO_LE16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED |
+ ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX);
+ if (btm)
+ buf->res_type |= CPU_TO_LE16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM);
+
status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
ice_aqc_opc_alloc_res, NULL);
if (status)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 4dc43dcfe..e8f2ce9d8 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -41,7 +41,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout);
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res);
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
enum ice_status
ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index e4d0b8c0f..14e632fab 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2536,199 +2536,6 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_workaround_get_res_blk - determine the block from a resource type
- * @type: type of resource
- * @blk: pointer to a enum that will receive the block type
- * @tcam: pointer to variable that will be set to true for a TCAM resource type
- */
-static enum
-ice_status ice_workaround_get_res_blk(u16 type, enum ice_block *blk, bool *tcam)
-{
- /* just need to support TCAM entries and Profile IDs for now */
- *tcam = false;
-
- switch (type) {
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_SW;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM:
- *blk = ICE_BLK_ACL;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM:
- *blk = ICE_BLK_FD;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_RSS;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_PE;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_SW;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID:
- *blk = ICE_BLK_ACL;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID:
- *blk = ICE_BLK_FD;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_RSS;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_PE;
- break;
- default:
- return ICE_ERR_PARAM;
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_alloc_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource
- * @num: number of resources to allocate
- * @res: pointer to array that will receive the resources
- */
-static enum ice_status
-ice_alloc_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- u16 count = 0;
- bool tcam;
- u16 first;
- u16 last;
- u16 max;
- u16 i;
-
-/* Number of PFs we support with this workaround */
-#define ICE_WA_PF_COUNT 4
-#define ICE_WA_1ST_TCAM 4
-#define ICE_WA_1ST_FV 4
-
- /* Only allow our supported PFs */
- if (hw->pf_id >= ICE_WA_PF_COUNT)
- return ICE_ERR_AQ_ERROR;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* range of entries based on PF */
- max = hw->blk[blk].prof.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* Profile IDs - start at non-zero index for PROF ID TCAM table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_TCAM;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].prof.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].prof.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- } else {
- /* range of entries based on PF */
- max = hw->blk[blk].es.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* FV index - start at non-zero index for Field vector table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_FV;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].es.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].es.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_free_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource to free
- * @num: number of resources
- * @res: array of resource ids to free
- */
-static enum ice_status
-ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- bool tcam = false;
- u16 i;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* TCAM entries */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].prof.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- }
- }
-
- } else {
- /* Profile IDs */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].es.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- }
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
* ice_alloc_tcam_ent - allocate hardware TCAM entry
* @hw: pointer to the HW struct
* @blk: the block to allocate the TCAM for
@@ -2745,7 +2552,7 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_alloc_res_workaround(hw, res_type, 1, tcam_idx);
+ return ice_alloc_hw_res(hw, res_type, 1, true, tcam_idx);
}
/**
@@ -2764,7 +2571,7 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tcam_idx);
+ return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
}
/**
@@ -2786,7 +2593,7 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- status = ice_alloc_res_workaround(hw, res_type, 1, &get_prof);
+ status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
if (!status)
*prof_id = (u8)get_prof;
@@ -2810,15 +2617,7 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tmp_prof_id);
- /* The following code is a WORKAROUND until DCR 076 is available.
- * DCR 076 - Update to Profile ID TCAM Resource Allocation
- *
- * Once the DCR 076 changes are available in FW, this code can be
- * restored. Original code:
- *
- * return ice_free_res(hw, res_type, 1, &tmp_prof_id);
- */
+ return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
}
/**
@@ -3125,8 +2924,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
LIST_FOR_EACH_ENTRY_SAFE(del, tmp, &hw->blk[blk].es.prof_map,
ice_prof_map, list) {
- LIST_DEL(&del->list);
- ice_free(hw, del);
+ ice_rem_prof(hw, blk, del->profile_cookie);
}
}
@@ -3168,9 +2966,6 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].prof_redir.t);
ice_free(hw, hw->blk[i].es.t);
ice_free(hw, hw->blk[i].es.ref_count);
-
- ice_free(hw, hw->blk[i].es.resource_used_hack);
- ice_free(hw, hw->blk[i].prof.resource_used_hack);
ice_free(hw, hw->blk[i].es.written);
}
@@ -3347,18 +3142,6 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
if (!es->ref_count)
goto err;
- es->resource_used_hack = (u8 *)
- ice_calloc(hw, hw->blk[i].es.count, sizeof(u8));
-
- if (!es->resource_used_hack)
- goto err;
-
- prof->resource_used_hack = (u8 *)ice_calloc(hw, prof->count,
- sizeof(u8));
-
- if (!prof->resource_used_hack)
- goto err;
-
INIT_LIST_HEAD(&es->prof_map);
/* Now that tables are allocated, read in package data */
@@ -4390,13 +4173,13 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
if (!pmap)
return ICE_ERR_DOES_NOT_EXIST;
- status = ice_free_prof_id(hw, blk, pmap->prof_id);
-
+ /* remove all flows with this profile */
+ status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
- /* remove all flows with this profile */
- status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
+ /* remove profile */
+ status = ice_free_prof_id(hw, blk, pmap->prof_id);
if (status)
return status;
/* dereference profile, and possibly remove */
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index f259e1371..f2a5f27e7 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -507,7 +507,6 @@ struct ice_es {
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
- u8 *resource_used_hack; /* hack for testing */
};
/* PTYPE Group management */
@@ -660,7 +659,6 @@ struct ice_prof_tcam {
u16 max_prof_id;
u8 cdid_bits; /* # cdid bits to use in key, 0, 2, 4, or 8 */
struct ice_prof_tcam_entry *t;
- u8 *resource_used_hack;
};
struct ice_prof_redir {
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 37/38] net/ice/base: revert the workaround for resource allocation
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 37/38] net/ice/base: revert the workaround for resource allocation Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang
Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang, Dan Nowlin
Revert the workaround for allocating TCAM and FV entries to align
with latest firmware.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_common.c | 11 +-
drivers/net/ice/base/ice_common.h | 2 +-
drivers/net/ice/base/ice_flex_pipe.c | 235 ++---------------------------------
drivers/net/ice/base/ice_flex_type.h | 2 -
4 files changed, 17 insertions(+), 233 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 74f925c03..3d2e5f347 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1786,11 +1786,11 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
* @hw: pointer to the HW struct
* @type: type of resource
* @num: number of resources to allocate
- * @sh: shared if true, dedicated if false
+ * @btm: allocate from bottom
* @res: pointer to array that will receive the resources
*/
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
{
struct ice_aqc_alloc_free_res_elem *buf;
enum ice_status status;
@@ -1804,8 +1804,11 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res)
/* Prepare buffer to allocate resource. */
buf->num_elems = CPU_TO_LE16(num);
- buf->res_type = CPU_TO_LE16(type | (sh ? ICE_AQC_RES_TYPE_FLAG_SHARED :
- ICE_AQC_RES_TYPE_FLAG_DEDICATED));
+ buf->res_type = CPU_TO_LE16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED |
+ ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX);
+ if (btm)
+ buf->res_type |= CPU_TO_LE16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM);
+
status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
ice_aqc_opc_alloc_res, NULL);
if (status)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 4dc43dcfe..e8f2ce9d8 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -41,7 +41,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout);
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
enum ice_status
-ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res);
+ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
enum ice_status
ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
enum ice_status
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index e4d0b8c0f..14e632fab 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2536,199 +2536,6 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
}
/**
- * ice_workaround_get_res_blk - determine the block from a resource type
- * @type: type of resource
- * @blk: pointer to a enum that will receive the block type
- * @tcam: pointer to variable that will be set to true for a TCAM resource type
- */
-static enum
-ice_status ice_workaround_get_res_blk(u16 type, enum ice_block *blk, bool *tcam)
-{
- /* just need to support TCAM entries and Profile IDs for now */
- *tcam = false;
-
- switch (type) {
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_SW;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM:
- *blk = ICE_BLK_ACL;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM:
- *blk = ICE_BLK_FD;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_RSS;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_TCAM:
- *blk = ICE_BLK_PE;
- *tcam = true;
- break;
- case ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_SW;
- break;
- case ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID:
- *blk = ICE_BLK_ACL;
- break;
- case ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID:
- *blk = ICE_BLK_FD;
- break;
- case ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_RSS;
- break;
- case ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_PROFID:
- *blk = ICE_BLK_PE;
- break;
- default:
- return ICE_ERR_PARAM;
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_alloc_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource
- * @num: number of resources to allocate
- * @res: pointer to array that will receive the resources
- */
-static enum ice_status
-ice_alloc_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- u16 count = 0;
- bool tcam;
- u16 first;
- u16 last;
- u16 max;
- u16 i;
-
-/* Number of PFs we support with this workaround */
-#define ICE_WA_PF_COUNT 4
-#define ICE_WA_1ST_TCAM 4
-#define ICE_WA_1ST_FV 4
-
- /* Only allow our supported PFs */
- if (hw->pf_id >= ICE_WA_PF_COUNT)
- return ICE_ERR_AQ_ERROR;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* range of entries based on PF */
- max = hw->blk[blk].prof.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* Profile IDs - start at non-zero index for PROF ID TCAM table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_TCAM;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].prof.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].prof.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- } else {
- /* range of entries based on PF */
- max = hw->blk[blk].es.count / ICE_WA_PF_COUNT;
- first = max * hw->pf_id;
- last = first + max;
-
- /* FV index - start at non-zero index for Field vector table
- * The first few entries are for bypass, default and errors
- * (only relevant for PF 0)
- */
- first += hw->pf_id ? 0 : ICE_WA_1ST_FV;
-
- for (i = first; i < last && count < num; i++) {
- if (!hw->blk[blk].es.resource_used_hack[i]) {
- res[count++] = i;
- hw->blk[blk].es.resource_used_hack[i] = true;
- }
- }
-
- /* handle failure case */
- if (count < num) {
- for (i = 0; i < count; i++) {
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- res[i] = 0;
- }
-
- return ICE_ERR_AQ_ERROR;
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
- * ice_free_res_workaround
- * @hw: pointer to the hw struct
- * @type: type of resource to free
- * @num: number of resources
- * @res: array of resource ids to free
- */
-static enum ice_status
-ice_free_res_workaround(struct ice_hw *hw, u16 type, u16 num, u16 *res)
-{
- enum ice_block blk;
- bool tcam = false;
- u16 i;
-
- if (ice_workaround_get_res_blk(type, &blk, &tcam))
- return ICE_ERR_AQ_ERROR;
-
- if (tcam) {
- /* TCAM entries */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].prof.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].prof.resource_used_hack[res[i]] =
- false;
- }
- }
-
- } else {
- /* Profile IDs */
- for (i = 0; i < num; i++) {
- if (res[i] < hw->blk[blk].es.count) {
- u16 idx = res[i];
-
- ice_free_hw_res(hw, type, 1, &idx);
- hw->blk[blk].es.resource_used_hack[res[i]] =
- false;
- }
- }
- }
-
- return ICE_SUCCESS;
-}
-
-/**
* ice_alloc_tcam_ent - allocate hardware TCAM entry
* @hw: pointer to the HW struct
* @blk: the block to allocate the TCAM for
@@ -2745,7 +2552,7 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_alloc_res_workaround(hw, res_type, 1, tcam_idx);
+ return ice_alloc_hw_res(hw, res_type, 1, true, tcam_idx);
}
/**
@@ -2764,7 +2571,7 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
if (!ice_tcam_ent_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tcam_idx);
+ return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
}
/**
@@ -2786,7 +2593,7 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- status = ice_alloc_res_workaround(hw, res_type, 1, &get_prof);
+ status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
if (!status)
*prof_id = (u8)get_prof;
@@ -2810,15 +2617,7 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
if (!ice_prof_id_rsrc_type(blk, &res_type))
return ICE_ERR_PARAM;
- return ice_free_res_workaround(hw, res_type, 1, &tmp_prof_id);
- /* The following code is a WORKAROUND until DCR 076 is available.
- * DCR 076 - Update to Profile ID TCAM Resource Allocation
- *
- * Once the DCR 076 changes are available in FW, this code can be
- * restored. Original code:
- *
- * return ice_free_res(hw, res_type, 1, &tmp_prof_id);
- */
+ return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
}
/**
@@ -3125,8 +2924,7 @@ static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)
LIST_FOR_EACH_ENTRY_SAFE(del, tmp, &hw->blk[blk].es.prof_map,
ice_prof_map, list) {
- LIST_DEL(&del->list);
- ice_free(hw, del);
+ ice_rem_prof(hw, blk, del->profile_cookie);
}
}
@@ -3168,9 +2966,6 @@ void ice_free_hw_tbls(struct ice_hw *hw)
ice_free(hw, hw->blk[i].prof_redir.t);
ice_free(hw, hw->blk[i].es.t);
ice_free(hw, hw->blk[i].es.ref_count);
-
- ice_free(hw, hw->blk[i].es.resource_used_hack);
- ice_free(hw, hw->blk[i].prof.resource_used_hack);
ice_free(hw, hw->blk[i].es.written);
}
@@ -3347,18 +3142,6 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
if (!es->ref_count)
goto err;
- es->resource_used_hack = (u8 *)
- ice_calloc(hw, hw->blk[i].es.count, sizeof(u8));
-
- if (!es->resource_used_hack)
- goto err;
-
- prof->resource_used_hack = (u8 *)ice_calloc(hw, prof->count,
- sizeof(u8));
-
- if (!prof->resource_used_hack)
- goto err;
-
INIT_LIST_HEAD(&es->prof_map);
/* Now that tables are allocated, read in package data */
@@ -4390,13 +4173,13 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
if (!pmap)
return ICE_ERR_DOES_NOT_EXIST;
- status = ice_free_prof_id(hw, blk, pmap->prof_id);
-
+ /* remove all flows with this profile */
+ status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
if (status)
return status;
- /* remove all flows with this profile */
- status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
+ /* remove profile */
+ status = ice_free_prof_id(hw, blk, pmap->prof_id);
if (status)
return status;
/* dereference profile, and possibly remove */
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index f259e1371..f2a5f27e7 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -507,7 +507,6 @@ struct ice_es {
u8 reverse; /* set to true to reverse FV order */
struct LIST_HEAD_TYPE prof_map;
struct ice_fv_word *t;
- u8 *resource_used_hack; /* hack for testing */
};
/* PTYPE Group management */
@@ -660,7 +659,6 @@ struct ice_prof_tcam {
u16 max_prof_id;
u8 cdid_bits; /* # cdid bits to use in key, 0, 2, 4, or 8 */
struct ice_prof_tcam_entry *t;
- u8 *resource_used_hack;
};
struct ice_prof_redir {
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 38/38] net/ice/base: rework on bit ops
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (37 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 37/38] net/ice/base: revert the workaround for resource allocation Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 7:07 ` [dpdk-dev] [PATCH v4 00/38] ice share code update Zhang, Qi Z
39 siblings, 1 reply; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Move all bit ops related functions from ice_osdep.h into ice_bitops.h.
Also remove the limitation that bitmap can only be 64 bits in
ice_set_bit and ice_clear_bit.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_bitops.h | 361 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_osdep.h | 168 ------------------
drivers/net/ice/base/ice_type.h | 1 +
3 files changed, 362 insertions(+), 168 deletions(-)
create mode 100644 drivers/net/ice/base/ice_bitops.h
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
new file mode 100644
index 000000000..f52713021
--- /dev/null
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -0,0 +1,361 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_BITOPS_H_
+#define _ICE_BITOPS_H_
+
+/* Define the size of the bitmap chunk */
+typedef u32 ice_bitmap_t;
+
+
+/* Number of bits per bitmap chunk */
+#define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t))
+/* Determine which chunk a bit belongs in */
+#define BIT_CHUNK(nr) ((nr) / BITS_PER_CHUNK)
+/* How many chunks are required to store this many bits */
+#define BITS_TO_CHUNKS(sz) DIVIDE_AND_ROUND_UP((sz), BITS_PER_CHUNK)
+/* Which bit inside a chunk this bit corresponds to */
+#define BIT_IN_CHUNK(nr) ((nr) % BITS_PER_CHUNK)
+/* How many bits are valid in the last chunk, assumes nr > 0 */
+#define LAST_CHUNK_BITS(nr) ((((nr) - 1) % BITS_PER_CHUNK) + 1)
+/* Generate a bitmask of valid bits in the last chunk, assumes nr > 0 */
+#define LAST_CHUNK_MASK(nr) (((ice_bitmap_t)~0) >> \
+ (BITS_PER_CHUNK - LAST_CHUNK_BITS(nr)))
+
+#define ice_declare_bitmap(A, sz) \
+ ice_bitmap_t A[BITS_TO_CHUNKS(sz)]
+
+static inline bool ice_is_bit_set_internal(u16 nr, const ice_bitmap_t *bitmap)
+{
+ return !!(*bitmap & BIT(nr));
+}
+
+/*
+ * If atomic version of the bitops are required, each specific OS
+ * implementation will need to implement OS/platform specific atomic
+ * version of the functions below:
+ *
+ * ice_clear_bit_internal
+ * ice_set_bit_internal
+ * ice_test_and_clear_bit_internal
+ * ice_test_and_set_bit_internal
+ *
+ * and define macro ICE_ATOMIC_BITOPS to overwrite the default non-atomic
+ * implementation.
+ */
+static inline void ice_clear_bit_internal(u16 nr, ice_bitmap_t *bitmap)
+{
+ *bitmap &= ~BIT(nr);
+}
+
+static inline void ice_set_bit_internal(u16 nr, ice_bitmap_t *bitmap)
+{
+ *bitmap |= BIT(nr);
+}
+
+static inline bool ice_test_and_clear_bit_internal(u16 nr,
+ ice_bitmap_t *bitmap)
+{
+ if (ice_is_bit_set_internal(nr, bitmap)) {
+ ice_clear_bit_internal(nr, bitmap);
+ return true;
+ }
+ return false;
+}
+
+static inline bool ice_test_and_set_bit_internal(u16 nr, ice_bitmap_t *bitmap)
+{
+ if (ice_is_bit_set_internal(nr, bitmap))
+ return true;
+
+ ice_set_bit_internal(nr, bitmap);
+ return false;
+}
+
+/**
+ * ice_is_bit_set - Check state of a bit in a bitmap
+ * @bitmap: the bitmap to check
+ * @nr: the bit to check
+ *
+ * Returns true if bit nr of bitmap is set. False otherwise. Assumes that nr
+ * is less than the size of the bitmap.
+ */
+static inline bool ice_is_bit_set(const ice_bitmap_t *bitmap, u16 nr)
+{
+ return ice_is_bit_set_internal(BIT_IN_CHUNK(nr),
+ &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_clear_bit - Clear a bit in a bitmap
+ * @bitmap: the bitmap to change
+ * @nr: the bit to change
+ *
+ * Clears the bit nr in bitmap. Assumes that nr is less than the size of the
+ * bitmap.
+ */
+static inline void ice_clear_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ ice_clear_bit_internal(BIT_IN_CHUNK(nr), &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_set_bit - Set a bit in a bitmap
+ * @bitmap: the bitmap to change
+ * @nr: the bit to change
+ *
+ * Sets the bit nr in bitmap. Assumes that nr is less than the size of the
+ * bitmap.
+ */
+static inline void ice_set_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ ice_set_bit_internal(BIT_IN_CHUNK(nr), &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_test_and_clear_bit - Atomically clear a bit and return the old bit value
+ * @nr: the bit to change
+ * @bitmap: the bitmap to change
+ *
+ * Check and clear the bit nr in bitmap. Assumes that nr is less than the size
+ * of the bitmap.
+ */
+static inline bool
+ice_test_and_clear_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ return ice_test_and_clear_bit_internal(BIT_IN_CHUNK(nr),
+ &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_test_and_set_bit - Atomically set a bit and return the old bit value
+ * @nr: the bit to change
+ * @bitmap: the bitmap to change
+ *
+ * Check and set the bit nr in bitmap. Assumes that nr is less than the size of
+ * the bitmap.
+ */
+static inline bool
+ice_test_and_set_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ return ice_test_and_set_bit_internal(BIT_IN_CHUNK(nr),
+ &bitmap[BIT_CHUNK(nr)]);
+}
+
+/* ice_zero_bitmap - set bits of bitmap to zero.
+ * @bmp: bitmap to set zeros
+ * @size: Size of the bitmaps in bits
+ *
+ * This function sets bits of a bitmap to zero.
+ */
+static inline void ice_zero_bitmap(ice_bitmap_t *bmp, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ bmp[i] = 0;
+ /* For the last chunk, we want to take care of not to modify bits
+ * outside the size boundary. ~mask take care of all the bits outside
+ * the boundary.
+ */
+ mask = LAST_CHUNK_MASK(size);
+ bmp[i] &= ~mask;
+}
+
+/**
+ * ice_and_bitmap - bitwise AND 2 bitmaps and store result in dst bitmap
+ * @dst: Destination bitmap that receive the result of the operation
+ * @bmp1: The first bitmap to intersect
+ * @bmp2: The second bitmap to intersect wit the first
+ * @size: Size of the bitmaps in bits
+ *
+ * This function performs a bitwise AND on two "source" bitmaps of the same size
+ * and stores the result to "dst" bitmap. The "dst" bitmap must be of the same
+ * size as the "source" bitmaps to avoid buffer overflows. This function returns
+ * a non-zero value if at least one bit location from both "source" bitmaps is
+ * non-zero.
+ */
+static inline int
+ice_and_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
+ const ice_bitmap_t *bmp2, u16 size)
+{
+ ice_bitmap_t res = 0, mask;
+ u16 i;
+
+ /* Handle all but the last chunk */
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++) {
+ dst[i] = bmp1[i] & bmp2[i];
+ res |= dst[i];
+ }
+
+ /* We want to take care not to modify any bits outside of the bitmap
+ * size, even in the destination bitmap. Thus, we won't directly
+ * assign the last bitmap, but instead use a bitmask to ensure we only
+ * modify bits which are within the size, and leave any bits above the
+ * size value alone.
+ */
+ mask = LAST_CHUNK_MASK(size);
+ dst[i] &= ~mask;
+ dst[i] |= (bmp1[i] & bmp2[i]) & mask;
+ res |= dst[i] & mask;
+
+ return res != 0;
+}
+
+/**
+ * ice_or_bitmap - bitwise OR 2 bitmaps and store result in dst bitmap
+ * @dst: Destination bitmap that receive the result of the operation
+ * @bmp1: The first bitmap to intersect
+ * @bmp2: The second bitmap to intersect wit the first
+ * @size: Size of the bitmaps in bits
+ *
+ * This function performs a bitwise OR on two "source" bitmaps of the same size
+ * and stores the result to "dst" bitmap. The "dst" bitmap must be of the same
+ * size as the "source" bitmaps to avoid buffer overflows.
+ */
+static inline void
+ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
+ const ice_bitmap_t *bmp2, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ dst[i] = bmp1[i] | bmp2[i];
+
+ /* We want to only OR bits within the size. Furthermore, we also do
+ * not want to modify destination bits which are beyond the specified
+ * size. Use a bitmask to ensure that we only modify the bits that are
+ * within the specified size.
+ */
+ mask = LAST_CHUNK_MASK(size);
+ dst[i] &= ~mask;
+ dst[i] |= (bmp1[i] | bmp2[i]) & mask;
+}
+
+/**
+ * ice_find_next_bit - Find the index of the next set bit of a bitmap
+ * @bitmap: the bitmap to scan
+ * @size: the size in bits of the bitmap
+ * @offset: the offset to start at
+ *
+ * Scans the bitmap and returns the index of the first set bit which is equal
+ * to or after the specified offset. Will return size if no bits are set.
+ */
+static inline u16
+ice_find_next_bit(const ice_bitmap_t *bitmap, u16 size, u16 offset)
+{
+ u16 i, j;
+
+ if (offset >= size)
+ return size;
+
+ /* Since the starting position may not be directly on a chunk
+ * boundary, we need to be careful to handle the first chunk specially
+ */
+ i = BIT_CHUNK(offset);
+ if (bitmap[i] != 0) {
+ u16 off = i * BITS_PER_CHUNK;
+
+ for (j = offset % BITS_PER_CHUNK; j < BITS_PER_CHUNK; j++) {
+ if (ice_is_bit_set(bitmap, off + j))
+ return min(size, (u16)(off + j));
+ }
+ }
+
+ /* Now we handle the remaining chunks, if any */
+ for (i++; i < BITS_TO_CHUNKS(size); i++) {
+ if (bitmap[i] != 0) {
+ u16 off = i * BITS_PER_CHUNK;
+
+ for (j = 0; j < BITS_PER_CHUNK; j++) {
+ if (ice_is_bit_set(bitmap, off + j))
+ return min(size, (u16)(off + j));
+ }
+ }
+ }
+ return size;
+}
+
+/**
+ * ice_find_first_bit - Find the index of the first set bit of a bitmap
+ * @bitmap: the bitmap to scan
+ * @size: the size in bits of the bitmap
+ *
+ * Scans the bitmap and returns the index of the first set bit. Will return
+ * size if no bits are set.
+ */
+static inline u16 ice_find_first_bit(const ice_bitmap_t *bitmap, u16 size)
+{
+ return ice_find_next_bit(bitmap, size, 0);
+}
+
+/**
+ * ice_is_any_bit_set - Return true of any bit in the bitmap is set
+ * @bitmap: the bitmap to check
+ * @size: the size of the bitmap
+ *
+ * Equivalent to checking if ice_find_first_bit returns a value less than the
+ * bitmap size.
+ */
+static inline bool ice_is_any_bit_set(ice_bitmap_t *bitmap, u16 size)
+{
+ return ice_find_first_bit(bitmap, size) < size;
+}
+
+/**
+ * ice_cp_bitmap - copy bitmaps.
+ * @dst: bitmap destination
+ * @src: bitmap to copy from
+ * @size: Size of the bitmaps in bits
+ *
+ * This function copy bitmap from src to dst.
+ */
+static inline void ice_cp_bitmap(ice_bitmap_t *dst, ice_bitmap_t *src, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ dst[i] = src[i];
+
+ /* We want to only copy bits within the size.*/
+ mask = LAST_CHUNK_MASK(size);
+ dst[i] &= ~mask;
+ dst[i] |= src[i] & mask;
+}
+
+/**
+ * ice_cmp_bitmaps - compares two bitmaps.
+ * @bmp1: the bitmap to compare
+ * @bmp2: the bitmap to compare with bmp1
+ * @size: Size of the bitmaps in bits
+ *
+ * This function compares two bitmaps, and returns result as true or false.
+ */
+static inline bool
+ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ if (bmp1[i] != bmp2[i])
+ return false;
+
+ /* We want to only compare bits within the size.*/
+ mask = LAST_CHUNK_MASK(size);
+ if ((bmp1[i] & mask) != (bmp2[i] & mask))
+ return false;
+
+ return true;
+}
+
+
+#endif /* _ICE_BITOPS_H_ */
diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 560e36c1b..d2d9238c7 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -147,95 +147,6 @@ static inline uint32_t ice_read_addr(volatile void *addr)
#define div64_long(n, d) ((n) / (d))
#define BITS_PER_BYTE 8
-typedef u32 ice_bitmap_t;
-#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
-#define BITS_TO_CHUNKS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(ice_bitmap_t))
-#define ice_declare_bitmap(name, bits) \
- ice_bitmap_t name[BITS_TO_CHUNKS(bits)]
-
-#define BITS_CHUNK_MASK(nr) (((ice_bitmap_t)~0) >> \
- ((BITS_PER_BYTE * sizeof(ice_bitmap_t)) - \
- (((nr) - 1) % (BITS_PER_BYTE * sizeof(ice_bitmap_t)) \
- + 1)))
-#define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t))
-#define BIT_CHUNK(nr) ((nr) / BITS_PER_CHUNK)
-#define BIT_IN_CHUNK(nr) BIT((nr) % BITS_PER_CHUNK)
-
-static inline bool ice_is_bit_set(const ice_bitmap_t *bitmap, u16 nr)
-{
- return !!(bitmap[BIT_CHUNK(nr)] & BIT_IN_CHUNK(nr));
-}
-
-#define ice_and_bitmap(d, b1, b2, sz) \
- ice_intersect_bitmaps((u8 *)d, (u8 *)b1, (const u8 *)b2, (u16)sz)
-static inline int
-ice_intersect_bitmaps(u8 *dst, const u8 *bmp1, const u8 *bmp2, u16 sz)
-{
- u32 res = 0;
- int cnt;
- u16 i;
-
- /* Utilize 32-bit operations */
- cnt = (sz % BITS_PER_BYTE) ?
- (sz / BITS_PER_BYTE) + 1 : sz / BITS_PER_BYTE;
- for (i = 0; i < cnt / 4; i++) {
- ((u32 *)dst)[i] = ((const u32 *)bmp1)[i] &
- ((const u32 *)bmp2)[i];
- res |= ((u32 *)dst)[i];
- }
-
- for (i *= 4; i < cnt; i++) {
- if ((sz % 8 == 0) || (i + 1 < cnt)) {
- dst[i] = bmp1[i] & bmp2[i];
- } else {
- /* Remaining bits that do not occupy the whole byte */
- u8 mask = ~0u >> (8 - (sz % 8));
-
- dst[i] = bmp1[i] & bmp2[i] & mask;
- }
-
- res |= dst[i];
- }
-
- return res != 0;
-}
-
-static inline int ice_find_first_bit(ice_bitmap_t *name, u16 size)
-{
- u16 i;
-
- for (i = 0; i < BITS_PER_BYTE * (size / BITS_PER_BYTE); i++)
- if (ice_is_bit_set(name, i))
- return i;
- return size;
-}
-
-static inline int ice_find_next_bit(ice_bitmap_t *name, u16 size, u16 bits)
-{
- u16 i;
-
- for (i = bits; i < BITS_PER_BYTE * (size / BITS_PER_BYTE); i++)
- if (ice_is_bit_set(name, i))
- return i;
- return bits;
-}
-
-#define for_each_set_bit(bit, addr, size) \
- for ((bit) = ice_find_first_bit((addr), (size)); \
- (bit) < (size); \
- (bit) = ice_find_next_bit((addr), (size), (bit) + 1))
-
-static inline bool ice_is_any_bit_set(ice_bitmap_t *bitmap, u32 bits)
-{
- u32 max_index = BITS_TO_CHUNKS(bits);
- u32 i;
-
- for (i = 0; i < max_index; i++) {
- if (bitmap[i])
- return true;
- }
- return false;
-}
/* memory allocation tracking */
struct ice_dma_mem {
@@ -273,85 +184,6 @@ struct ice_virt_mem {
#define HTONS(a) rte_cpu_to_be_16(a)
#define HTONL(a) rte_cpu_to_be_32(a)
-static inline void
-ice_set_bit(unsigned int nr, volatile ice_bitmap_t *addr)
-{
- __sync_fetch_and_or(addr, (1UL << nr));
-}
-
-static inline void
-ice_clear_bit(unsigned int nr, volatile ice_bitmap_t *addr)
-{
- __sync_fetch_and_and(addr, (0UL << nr));
-}
-
-static inline void
-ice_zero_bitmap(ice_bitmap_t *bmp, u16 size)
-{
- unsigned long mask;
- u16 i;
-
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- bmp[i] = 0;
- mask = BITS_CHUNK_MASK(size);
- bmp[i] &= ~mask;
-}
-
-static inline void
-ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
- const ice_bitmap_t *bmp2, u16 size)
-{
- unsigned long mask;
- u16 i;
-
- /* Handle all but last chunk*/
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- dst[i] = bmp1[i] | bmp2[i];
-
- /* We want to only OR bits within the size. Furthermore, we also do
- * not want to modify destination bits which are beyond the specified
- * size. Use a bitmask to ensure that we only modify the bits that are
- * within the specified size.
- */
- mask = BITS_CHUNK_MASK(size);
- dst[i] &= ~mask;
- dst[i] |= (bmp1[i] | bmp2[i]) & mask;
-}
-
-static inline void ice_cp_bitmap(ice_bitmap_t *dst, ice_bitmap_t *src, u16 size)
-{
- ice_bitmap_t mask;
- u16 i;
-
- /* Handle all but last chunk*/
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- dst[i] = src[i];
-
- /* We want to only copy bits within the size.*/
- mask = BITS_CHUNK_MASK(size);
- dst[i] &= ~mask;
- dst[i] |= src[i] & mask;
-}
-
-static inline bool
-ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
-{
- ice_bitmap_t mask;
- u16 i;
-
- /* Handle all but last chunk*/
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- if (bmp1[i] != bmp2[i])
- return false;
-
- /* We want to only compare bits within the size.*/
- mask = BITS_CHUNK_MASK(size);
- if ((bmp1[i] & mask) != (bmp2[i] & mask))
- return false;
-
- return true;
-}
-
/* SW spinlock */
struct ice_lock {
rte_spinlock_t spinlock;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index ef0b5bb52..b0bdec2df 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -26,6 +26,7 @@
#include "ice_hw_autogen.h"
#include "ice_devids.h"
#include "ice_osdep.h"
+#include "ice_bitops.h" /* Must come before ice_controlq.h */
#include "ice_controlq.h"
#include "ice_lan_tx_rx.h"
#include "ice_flex_type.h"
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* [dpdk-dev] [PATCH v4 38/38] net/ice/base: rework on bit ops
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 38/38] net/ice/base: rework on bit ops Qi Zhang
@ 2019-03-25 5:44 ` Qi Zhang
0 siblings, 0 replies; 213+ messages in thread
From: Qi Zhang @ 2019-03-25 5:44 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, paul.m.stillwell.jr, ferruh.yigit, Qi Zhang
Move all bit ops related functions from ice_osdep.h into ice_bitops.h.
Also remove the limitation that bitmap can only be 64 bits in
ice_set_bit and ice_clear_bit.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
drivers/net/ice/base/ice_bitops.h | 361 ++++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_osdep.h | 168 ------------------
drivers/net/ice/base/ice_type.h | 1 +
3 files changed, 362 insertions(+), 168 deletions(-)
create mode 100644 drivers/net/ice/base/ice_bitops.h
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
new file mode 100644
index 000000000..f52713021
--- /dev/null
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -0,0 +1,361 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2019
+ */
+
+#ifndef _ICE_BITOPS_H_
+#define _ICE_BITOPS_H_
+
+/* Define the size of the bitmap chunk */
+typedef u32 ice_bitmap_t;
+
+
+/* Number of bits per bitmap chunk */
+#define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t))
+/* Determine which chunk a bit belongs in */
+#define BIT_CHUNK(nr) ((nr) / BITS_PER_CHUNK)
+/* How many chunks are required to store this many bits */
+#define BITS_TO_CHUNKS(sz) DIVIDE_AND_ROUND_UP((sz), BITS_PER_CHUNK)
+/* Which bit inside a chunk this bit corresponds to */
+#define BIT_IN_CHUNK(nr) ((nr) % BITS_PER_CHUNK)
+/* How many bits are valid in the last chunk, assumes nr > 0 */
+#define LAST_CHUNK_BITS(nr) ((((nr) - 1) % BITS_PER_CHUNK) + 1)
+/* Generate a bitmask of valid bits in the last chunk, assumes nr > 0 */
+#define LAST_CHUNK_MASK(nr) (((ice_bitmap_t)~0) >> \
+ (BITS_PER_CHUNK - LAST_CHUNK_BITS(nr)))
+
+#define ice_declare_bitmap(A, sz) \
+ ice_bitmap_t A[BITS_TO_CHUNKS(sz)]
+
+static inline bool ice_is_bit_set_internal(u16 nr, const ice_bitmap_t *bitmap)
+{
+ return !!(*bitmap & BIT(nr));
+}
+
+/*
+ * If atomic version of the bitops are required, each specific OS
+ * implementation will need to implement OS/platform specific atomic
+ * version of the functions below:
+ *
+ * ice_clear_bit_internal
+ * ice_set_bit_internal
+ * ice_test_and_clear_bit_internal
+ * ice_test_and_set_bit_internal
+ *
+ * and define macro ICE_ATOMIC_BITOPS to overwrite the default non-atomic
+ * implementation.
+ */
+static inline void ice_clear_bit_internal(u16 nr, ice_bitmap_t *bitmap)
+{
+ *bitmap &= ~BIT(nr);
+}
+
+static inline void ice_set_bit_internal(u16 nr, ice_bitmap_t *bitmap)
+{
+ *bitmap |= BIT(nr);
+}
+
+static inline bool ice_test_and_clear_bit_internal(u16 nr,
+ ice_bitmap_t *bitmap)
+{
+ if (ice_is_bit_set_internal(nr, bitmap)) {
+ ice_clear_bit_internal(nr, bitmap);
+ return true;
+ }
+ return false;
+}
+
+static inline bool ice_test_and_set_bit_internal(u16 nr, ice_bitmap_t *bitmap)
+{
+ if (ice_is_bit_set_internal(nr, bitmap))
+ return true;
+
+ ice_set_bit_internal(nr, bitmap);
+ return false;
+}
+
+/**
+ * ice_is_bit_set - Check state of a bit in a bitmap
+ * @bitmap: the bitmap to check
+ * @nr: the bit to check
+ *
+ * Returns true if bit nr of bitmap is set. False otherwise. Assumes that nr
+ * is less than the size of the bitmap.
+ */
+static inline bool ice_is_bit_set(const ice_bitmap_t *bitmap, u16 nr)
+{
+ return ice_is_bit_set_internal(BIT_IN_CHUNK(nr),
+ &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_clear_bit - Clear a bit in a bitmap
+ * @bitmap: the bitmap to change
+ * @nr: the bit to change
+ *
+ * Clears the bit nr in bitmap. Assumes that nr is less than the size of the
+ * bitmap.
+ */
+static inline void ice_clear_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ ice_clear_bit_internal(BIT_IN_CHUNK(nr), &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_set_bit - Set a bit in a bitmap
+ * @bitmap: the bitmap to change
+ * @nr: the bit to change
+ *
+ * Sets the bit nr in bitmap. Assumes that nr is less than the size of the
+ * bitmap.
+ */
+static inline void ice_set_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ ice_set_bit_internal(BIT_IN_CHUNK(nr), &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_test_and_clear_bit - Atomically clear a bit and return the old bit value
+ * @nr: the bit to change
+ * @bitmap: the bitmap to change
+ *
+ * Check and clear the bit nr in bitmap. Assumes that nr is less than the size
+ * of the bitmap.
+ */
+static inline bool
+ice_test_and_clear_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ return ice_test_and_clear_bit_internal(BIT_IN_CHUNK(nr),
+ &bitmap[BIT_CHUNK(nr)]);
+}
+
+/**
+ * ice_test_and_set_bit - Atomically set a bit and return the old bit value
+ * @nr: the bit to change
+ * @bitmap: the bitmap to change
+ *
+ * Check and set the bit nr in bitmap. Assumes that nr is less than the size of
+ * the bitmap.
+ */
+static inline bool
+ice_test_and_set_bit(u16 nr, ice_bitmap_t *bitmap)
+{
+ return ice_test_and_set_bit_internal(BIT_IN_CHUNK(nr),
+ &bitmap[BIT_CHUNK(nr)]);
+}
+
+/* ice_zero_bitmap - set bits of bitmap to zero.
+ * @bmp: bitmap to set zeros
+ * @size: Size of the bitmaps in bits
+ *
+ * This function sets bits of a bitmap to zero.
+ */
+static inline void ice_zero_bitmap(ice_bitmap_t *bmp, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ bmp[i] = 0;
+ /* For the last chunk, we want to take care of not to modify bits
+ * outside the size boundary. ~mask take care of all the bits outside
+ * the boundary.
+ */
+ mask = LAST_CHUNK_MASK(size);
+ bmp[i] &= ~mask;
+}
+
+/**
+ * ice_and_bitmap - bitwise AND 2 bitmaps and store result in dst bitmap
+ * @dst: Destination bitmap that receive the result of the operation
+ * @bmp1: The first bitmap to intersect
+ * @bmp2: The second bitmap to intersect wit the first
+ * @size: Size of the bitmaps in bits
+ *
+ * This function performs a bitwise AND on two "source" bitmaps of the same size
+ * and stores the result to "dst" bitmap. The "dst" bitmap must be of the same
+ * size as the "source" bitmaps to avoid buffer overflows. This function returns
+ * a non-zero value if at least one bit location from both "source" bitmaps is
+ * non-zero.
+ */
+static inline int
+ice_and_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
+ const ice_bitmap_t *bmp2, u16 size)
+{
+ ice_bitmap_t res = 0, mask;
+ u16 i;
+
+ /* Handle all but the last chunk */
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++) {
+ dst[i] = bmp1[i] & bmp2[i];
+ res |= dst[i];
+ }
+
+ /* We want to take care not to modify any bits outside of the bitmap
+ * size, even in the destination bitmap. Thus, we won't directly
+ * assign the last bitmap, but instead use a bitmask to ensure we only
+ * modify bits which are within the size, and leave any bits above the
+ * size value alone.
+ */
+ mask = LAST_CHUNK_MASK(size);
+ dst[i] &= ~mask;
+ dst[i] |= (bmp1[i] & bmp2[i]) & mask;
+ res |= dst[i] & mask;
+
+ return res != 0;
+}
+
+/**
+ * ice_or_bitmap - bitwise OR 2 bitmaps and store result in dst bitmap
+ * @dst: Destination bitmap that receive the result of the operation
+ * @bmp1: The first bitmap to intersect
+ * @bmp2: The second bitmap to intersect wit the first
+ * @size: Size of the bitmaps in bits
+ *
+ * This function performs a bitwise OR on two "source" bitmaps of the same size
+ * and stores the result to "dst" bitmap. The "dst" bitmap must be of the same
+ * size as the "source" bitmaps to avoid buffer overflows.
+ */
+static inline void
+ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
+ const ice_bitmap_t *bmp2, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ dst[i] = bmp1[i] | bmp2[i];
+
+ /* We want to only OR bits within the size. Furthermore, we also do
+ * not want to modify destination bits which are beyond the specified
+ * size. Use a bitmask to ensure that we only modify the bits that are
+ * within the specified size.
+ */
+ mask = LAST_CHUNK_MASK(size);
+ dst[i] &= ~mask;
+ dst[i] |= (bmp1[i] | bmp2[i]) & mask;
+}
+
+/**
+ * ice_find_next_bit - Find the index of the next set bit of a bitmap
+ * @bitmap: the bitmap to scan
+ * @size: the size in bits of the bitmap
+ * @offset: the offset to start at
+ *
+ * Scans the bitmap and returns the index of the first set bit which is equal
+ * to or after the specified offset. Will return size if no bits are set.
+ */
+static inline u16
+ice_find_next_bit(const ice_bitmap_t *bitmap, u16 size, u16 offset)
+{
+ u16 i, j;
+
+ if (offset >= size)
+ return size;
+
+ /* Since the starting position may not be directly on a chunk
+ * boundary, we need to be careful to handle the first chunk specially
+ */
+ i = BIT_CHUNK(offset);
+ if (bitmap[i] != 0) {
+ u16 off = i * BITS_PER_CHUNK;
+
+ for (j = offset % BITS_PER_CHUNK; j < BITS_PER_CHUNK; j++) {
+ if (ice_is_bit_set(bitmap, off + j))
+ return min(size, (u16)(off + j));
+ }
+ }
+
+ /* Now we handle the remaining chunks, if any */
+ for (i++; i < BITS_TO_CHUNKS(size); i++) {
+ if (bitmap[i] != 0) {
+ u16 off = i * BITS_PER_CHUNK;
+
+ for (j = 0; j < BITS_PER_CHUNK; j++) {
+ if (ice_is_bit_set(bitmap, off + j))
+ return min(size, (u16)(off + j));
+ }
+ }
+ }
+ return size;
+}
+
+/**
+ * ice_find_first_bit - Find the index of the first set bit of a bitmap
+ * @bitmap: the bitmap to scan
+ * @size: the size in bits of the bitmap
+ *
+ * Scans the bitmap and returns the index of the first set bit. Will return
+ * size if no bits are set.
+ */
+static inline u16 ice_find_first_bit(const ice_bitmap_t *bitmap, u16 size)
+{
+ return ice_find_next_bit(bitmap, size, 0);
+}
+
+/**
+ * ice_is_any_bit_set - Return true of any bit in the bitmap is set
+ * @bitmap: the bitmap to check
+ * @size: the size of the bitmap
+ *
+ * Equivalent to checking if ice_find_first_bit returns a value less than the
+ * bitmap size.
+ */
+static inline bool ice_is_any_bit_set(ice_bitmap_t *bitmap, u16 size)
+{
+ return ice_find_first_bit(bitmap, size) < size;
+}
+
+/**
+ * ice_cp_bitmap - copy bitmaps.
+ * @dst: bitmap destination
+ * @src: bitmap to copy from
+ * @size: Size of the bitmaps in bits
+ *
+ * This function copy bitmap from src to dst.
+ */
+static inline void ice_cp_bitmap(ice_bitmap_t *dst, ice_bitmap_t *src, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ dst[i] = src[i];
+
+ /* We want to only copy bits within the size.*/
+ mask = LAST_CHUNK_MASK(size);
+ dst[i] &= ~mask;
+ dst[i] |= src[i] & mask;
+}
+
+/**
+ * ice_cmp_bitmaps - compares two bitmaps.
+ * @bmp1: the bitmap to compare
+ * @bmp2: the bitmap to compare with bmp1
+ * @size: Size of the bitmaps in bits
+ *
+ * This function compares two bitmaps, and returns result as true or false.
+ */
+static inline bool
+ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
+{
+ ice_bitmap_t mask;
+ u16 i;
+
+ /* Handle all but last chunk*/
+ for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ if (bmp1[i] != bmp2[i])
+ return false;
+
+ /* We want to only compare bits within the size.*/
+ mask = LAST_CHUNK_MASK(size);
+ if ((bmp1[i] & mask) != (bmp2[i] & mask))
+ return false;
+
+ return true;
+}
+
+
+#endif /* _ICE_BITOPS_H_ */
diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 560e36c1b..d2d9238c7 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -147,95 +147,6 @@ static inline uint32_t ice_read_addr(volatile void *addr)
#define div64_long(n, d) ((n) / (d))
#define BITS_PER_BYTE 8
-typedef u32 ice_bitmap_t;
-#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
-#define BITS_TO_CHUNKS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(ice_bitmap_t))
-#define ice_declare_bitmap(name, bits) \
- ice_bitmap_t name[BITS_TO_CHUNKS(bits)]
-
-#define BITS_CHUNK_MASK(nr) (((ice_bitmap_t)~0) >> \
- ((BITS_PER_BYTE * sizeof(ice_bitmap_t)) - \
- (((nr) - 1) % (BITS_PER_BYTE * sizeof(ice_bitmap_t)) \
- + 1)))
-#define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t))
-#define BIT_CHUNK(nr) ((nr) / BITS_PER_CHUNK)
-#define BIT_IN_CHUNK(nr) BIT((nr) % BITS_PER_CHUNK)
-
-static inline bool ice_is_bit_set(const ice_bitmap_t *bitmap, u16 nr)
-{
- return !!(bitmap[BIT_CHUNK(nr)] & BIT_IN_CHUNK(nr));
-}
-
-#define ice_and_bitmap(d, b1, b2, sz) \
- ice_intersect_bitmaps((u8 *)d, (u8 *)b1, (const u8 *)b2, (u16)sz)
-static inline int
-ice_intersect_bitmaps(u8 *dst, const u8 *bmp1, const u8 *bmp2, u16 sz)
-{
- u32 res = 0;
- int cnt;
- u16 i;
-
- /* Utilize 32-bit operations */
- cnt = (sz % BITS_PER_BYTE) ?
- (sz / BITS_PER_BYTE) + 1 : sz / BITS_PER_BYTE;
- for (i = 0; i < cnt / 4; i++) {
- ((u32 *)dst)[i] = ((const u32 *)bmp1)[i] &
- ((const u32 *)bmp2)[i];
- res |= ((u32 *)dst)[i];
- }
-
- for (i *= 4; i < cnt; i++) {
- if ((sz % 8 == 0) || (i + 1 < cnt)) {
- dst[i] = bmp1[i] & bmp2[i];
- } else {
- /* Remaining bits that do not occupy the whole byte */
- u8 mask = ~0u >> (8 - (sz % 8));
-
- dst[i] = bmp1[i] & bmp2[i] & mask;
- }
-
- res |= dst[i];
- }
-
- return res != 0;
-}
-
-static inline int ice_find_first_bit(ice_bitmap_t *name, u16 size)
-{
- u16 i;
-
- for (i = 0; i < BITS_PER_BYTE * (size / BITS_PER_BYTE); i++)
- if (ice_is_bit_set(name, i))
- return i;
- return size;
-}
-
-static inline int ice_find_next_bit(ice_bitmap_t *name, u16 size, u16 bits)
-{
- u16 i;
-
- for (i = bits; i < BITS_PER_BYTE * (size / BITS_PER_BYTE); i++)
- if (ice_is_bit_set(name, i))
- return i;
- return bits;
-}
-
-#define for_each_set_bit(bit, addr, size) \
- for ((bit) = ice_find_first_bit((addr), (size)); \
- (bit) < (size); \
- (bit) = ice_find_next_bit((addr), (size), (bit) + 1))
-
-static inline bool ice_is_any_bit_set(ice_bitmap_t *bitmap, u32 bits)
-{
- u32 max_index = BITS_TO_CHUNKS(bits);
- u32 i;
-
- for (i = 0; i < max_index; i++) {
- if (bitmap[i])
- return true;
- }
- return false;
-}
/* memory allocation tracking */
struct ice_dma_mem {
@@ -273,85 +184,6 @@ struct ice_virt_mem {
#define HTONS(a) rte_cpu_to_be_16(a)
#define HTONL(a) rte_cpu_to_be_32(a)
-static inline void
-ice_set_bit(unsigned int nr, volatile ice_bitmap_t *addr)
-{
- __sync_fetch_and_or(addr, (1UL << nr));
-}
-
-static inline void
-ice_clear_bit(unsigned int nr, volatile ice_bitmap_t *addr)
-{
- __sync_fetch_and_and(addr, (0UL << nr));
-}
-
-static inline void
-ice_zero_bitmap(ice_bitmap_t *bmp, u16 size)
-{
- unsigned long mask;
- u16 i;
-
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- bmp[i] = 0;
- mask = BITS_CHUNK_MASK(size);
- bmp[i] &= ~mask;
-}
-
-static inline void
-ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
- const ice_bitmap_t *bmp2, u16 size)
-{
- unsigned long mask;
- u16 i;
-
- /* Handle all but last chunk*/
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- dst[i] = bmp1[i] | bmp2[i];
-
- /* We want to only OR bits within the size. Furthermore, we also do
- * not want to modify destination bits which are beyond the specified
- * size. Use a bitmask to ensure that we only modify the bits that are
- * within the specified size.
- */
- mask = BITS_CHUNK_MASK(size);
- dst[i] &= ~mask;
- dst[i] |= (bmp1[i] | bmp2[i]) & mask;
-}
-
-static inline void ice_cp_bitmap(ice_bitmap_t *dst, ice_bitmap_t *src, u16 size)
-{
- ice_bitmap_t mask;
- u16 i;
-
- /* Handle all but last chunk*/
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- dst[i] = src[i];
-
- /* We want to only copy bits within the size.*/
- mask = BITS_CHUNK_MASK(size);
- dst[i] &= ~mask;
- dst[i] |= src[i] & mask;
-}
-
-static inline bool
-ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
-{
- ice_bitmap_t mask;
- u16 i;
-
- /* Handle all but last chunk*/
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
- if (bmp1[i] != bmp2[i])
- return false;
-
- /* We want to only compare bits within the size.*/
- mask = BITS_CHUNK_MASK(size);
- if ((bmp1[i] & mask) != (bmp2[i] & mask))
- return false;
-
- return true;
-}
-
/* SW spinlock */
struct ice_lock {
rte_spinlock_t spinlock;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index ef0b5bb52..b0bdec2df 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -26,6 +26,7 @@
#include "ice_hw_autogen.h"
#include "ice_devids.h"
#include "ice_osdep.h"
+#include "ice_bitops.h" /* Must come before ice_controlq.h */
#include "ice_controlq.h"
#include "ice_lan_tx_rx.h"
#include "ice_flex_type.h"
--
2.13.6
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
` (38 preceding siblings ...)
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 38/38] net/ice/base: rework on bit ops Qi Zhang
@ 2019-03-25 7:07 ` Zhang, Qi Z
2019-03-25 7:07 ` Zhang, Qi Z
2019-03-31 17:06 ` Thomas Monjalon
39 siblings, 2 replies; 213+ messages in thread
From: Zhang, Qi Z @ 2019-03-25 7:07 UTC (permalink / raw)
To: Lu, Wenzhuo, Yang, Qiming; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Monday, March 25, 2019 1:44 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH v4 00/38] ice share code update.
>
> Sync to latest kernel driver, main changes:
> 1. add DCB/FDIR support.
> 2. add more APIs in switch module.
> 3. code clean and bug fix.
>
> v4:
> - revert the fix for UDP PTYPE setup (PATCH 38/38 on v3) since its invalid.
> - move bit ops to dedicate file and remove the 64 bit limitation of bitmap.
> - improved commit log.
>
> v3:
> - fix software queue handle parsing in ice_ena_vsi_txq and
> ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
> fail during device reconfigure.
> - Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
> cause IPv4 TCP RSS does not work at some situation.
>
> v2:
> - Enhanced the commit log
> - Add missing fixed line.
>
> Qi Zhang (38):
> net/ice/base: add switch resource allocation and free
> net/ice/base: improve comments
> net/ice/base: add two helper functions
> net/ice/base: add helper macros
> net/ice/base: allow package copy to be used after resets
> net/ice/base: clean code
> net/ice/base: declare functions as external
> net/ice/base: add more APIs in switch module
> net/ice/base: add VSI queue context framework
> net/ice/base: add APIs to add remove ethertype filter
> net/ice/base: add APIs to get allocated resources
> net/ice/base: add APIs to alloc/free resource counter
> net/ice/base: add APIs to get VSI promiscuous mode
> net/ice/base: add MAC filter with marker and counter
> net/ice/base: add two helper functions for flow management
> net/ice/base: fix minor issues
> net/ice/base: update macros
> net/ice/base: clean code
> net/ice/base: enable VSI queue context
> net/ice/base: ensure only valid bits are set
> net/ice/base: enhance get link status command
> net/ice/base: add RSS key related macro and structures
> net/ice/base: do not write TCAM entries back
> net/ice/base: remove local VSIG allocations
> net/ice/base: fix minor issues
> net/ice/base: update copyright time
> net/ice/base: fix Klockwork analysis reported issues
> net/ice/base: return config error without queue to disable
> net/ice/base: add function to check FW recovery mode
> net/ice/base: change profile id reference counting
> net/ice/base: add DCB support
> net/ice/base: add FDIR support
> net/ice/base: change profile priority for RSS reply
> net/ice/base: fix duplicate resource allocations
> net/ice/base: fix minor issues
> net/ice/base: increase prototol offset size
> net/ice/base: revert the workaround for resource allocation
> net/ice/base: rework on bit ops
>
> drivers/net/ice/Makefile | 2 +
> drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
> drivers/net/ice/base/ice_alloc.h | 2 +-
> drivers/net/ice/base/ice_bitops.h | 361 +++++
> drivers/net/ice/base/ice_common.c | 650 ++++++--
> drivers/net/ice/base/ice_common.h | 36 +-
> drivers/net/ice/base/ice_controlq.c | 10 +-
> drivers/net/ice/base/ice_controlq.h | 2 +-
> drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
> drivers/net/ice/base/ice_dcb.h | 223 +++
> drivers/net/ice/base/ice_devids.h | 2 +-
> drivers/net/ice/base/ice_fdir.c | 742 +++++++++
> drivers/net/ice/base/ice_fdir.h | 202 +++
> drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
> drivers/net/ice/base/ice_flex_pipe.h | 4 +-
> drivers/net/ice/base/ice_flex_type.h | 19 +-
> drivers/net/ice/base/ice_flow.c | 224 +--
> drivers/net/ice/base/ice_flow.h | 22 +-
> drivers/net/ice/base/ice_hw_autogen.h | 2 +-
> drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
> drivers/net/ice/base/ice_nvm.c | 17 +-
> drivers/net/ice/base/ice_osdep.h | 184 +--
> drivers/net/ice/base/ice_protocol_type.h | 8 +-
> drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
> drivers/net/ice/base/ice_sched.c | 2563
> +++++++++++++++---------------
> drivers/net/ice/base/ice_sched.h | 34 +-
> drivers/net/ice/base/ice_status.h | 3 +-
> drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
> drivers/net/ice/base/ice_switch.h | 109 +-
> drivers/net/ice/base/ice_type.h | 120 +-
> drivers/net/ice/base/meson.build | 2 +
> drivers/net/ice/ice_rxtx.c | 13 +-
> 32 files changed, 7474 insertions(+), 2531 deletions(-) create mode 100644
> drivers/net/ice/base/ice_bitops.h create mode 100644
> drivers/net/ice/base/ice_dcb.c create mode 100644
> drivers/net/ice/base/ice_dcb.h create mode 100644
> drivers/net/ice/base/ice_fdir.c create mode 100644
> drivers/net/ice/base/ice_fdir.h
>
> --
> 2.13.6
Applied to dpdk-next-net-intel.
Thanks
Qi
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-03-25 7:07 ` [dpdk-dev] [PATCH v4 00/38] ice share code update Zhang, Qi Z
@ 2019-03-25 7:07 ` Zhang, Qi Z
2019-03-31 17:06 ` Thomas Monjalon
1 sibling, 0 replies; 213+ messages in thread
From: Zhang, Qi Z @ 2019-03-25 7:07 UTC (permalink / raw)
To: Lu, Wenzhuo, Yang, Qiming; +Cc: dev, Stillwell Jr, Paul M, Yigit, Ferruh
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Monday, March 25, 2019 1:44 PM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH v4 00/38] ice share code update.
>
> Sync to latest kernel driver, main changes:
> 1. add DCB/FDIR support.
> 2. add more APIs in switch module.
> 3. code clean and bug fix.
>
> v4:
> - revert the fix for UDP PTYPE setup (PATCH 38/38 on v3) since its invalid.
> - move bit ops to dedicate file and remove the 64 bit limitation of bitmap.
> - improved commit log.
>
> v3:
> - fix software queue handle parsing in ice_ena_vsi_txq and
> ice_dis_vsi_txq (PATCH 19/38) which will cause Tx queue setup
> fail during device reconfigure.
> - Add new fix for UDP PTYPE setup. (PATCH 38/38), which will
> cause IPv4 TCP RSS does not work at some situation.
>
> v2:
> - Enhanced the commit log
> - Add missing fixed line.
>
> Qi Zhang (38):
> net/ice/base: add switch resource allocation and free
> net/ice/base: improve comments
> net/ice/base: add two helper functions
> net/ice/base: add helper macros
> net/ice/base: allow package copy to be used after resets
> net/ice/base: clean code
> net/ice/base: declare functions as external
> net/ice/base: add more APIs in switch module
> net/ice/base: add VSI queue context framework
> net/ice/base: add APIs to add remove ethertype filter
> net/ice/base: add APIs to get allocated resources
> net/ice/base: add APIs to alloc/free resource counter
> net/ice/base: add APIs to get VSI promiscuous mode
> net/ice/base: add MAC filter with marker and counter
> net/ice/base: add two helper functions for flow management
> net/ice/base: fix minor issues
> net/ice/base: update macros
> net/ice/base: clean code
> net/ice/base: enable VSI queue context
> net/ice/base: ensure only valid bits are set
> net/ice/base: enhance get link status command
> net/ice/base: add RSS key related macro and structures
> net/ice/base: do not write TCAM entries back
> net/ice/base: remove local VSIG allocations
> net/ice/base: fix minor issues
> net/ice/base: update copyright time
> net/ice/base: fix Klockwork analysis reported issues
> net/ice/base: return config error without queue to disable
> net/ice/base: add function to check FW recovery mode
> net/ice/base: change profile id reference counting
> net/ice/base: add DCB support
> net/ice/base: add FDIR support
> net/ice/base: change profile priority for RSS reply
> net/ice/base: fix duplicate resource allocations
> net/ice/base: fix minor issues
> net/ice/base: increase prototol offset size
> net/ice/base: revert the workaround for resource allocation
> net/ice/base: rework on bit ops
>
> drivers/net/ice/Makefile | 2 +
> drivers/net/ice/base/ice_adminq_cmd.h | 515 +++++-
> drivers/net/ice/base/ice_alloc.h | 2 +-
> drivers/net/ice/base/ice_bitops.h | 361 +++++
> drivers/net/ice/base/ice_common.c | 650 ++++++--
> drivers/net/ice/base/ice_common.h | 36 +-
> drivers/net/ice/base/ice_controlq.c | 10 +-
> drivers/net/ice/base/ice_controlq.h | 2 +-
> drivers/net/ice/base/ice_dcb.c | 1393 ++++++++++++++++
> drivers/net/ice/base/ice_dcb.h | 223 +++
> drivers/net/ice/base/ice_devids.h | 2 +-
> drivers/net/ice/base/ice_fdir.c | 742 +++++++++
> drivers/net/ice/base/ice_fdir.h | 202 +++
> drivers/net/ice/base/ice_flex_pipe.c | 1075 +++++++------
> drivers/net/ice/base/ice_flex_pipe.h | 4 +-
> drivers/net/ice/base/ice_flex_type.h | 19 +-
> drivers/net/ice/base/ice_flow.c | 224 +--
> drivers/net/ice/base/ice_flow.h | 22 +-
> drivers/net/ice/base/ice_hw_autogen.h | 2 +-
> drivers/net/ice/base/ice_lan_tx_rx.h | 149 +-
> drivers/net/ice/base/ice_nvm.c | 17 +-
> drivers/net/ice/base/ice_osdep.h | 184 +--
> drivers/net/ice/base/ice_protocol_type.h | 8 +-
> drivers/net/ice/base/ice_sbq_cmd.h | 2 +-
> drivers/net/ice/base/ice_sched.c | 2563
> +++++++++++++++---------------
> drivers/net/ice/base/ice_sched.h | 34 +-
> drivers/net/ice/base/ice_status.h | 3 +-
> drivers/net/ice/base/ice_switch.c | 1315 ++++++++++++++-
> drivers/net/ice/base/ice_switch.h | 109 +-
> drivers/net/ice/base/ice_type.h | 120 +-
> drivers/net/ice/base/meson.build | 2 +
> drivers/net/ice/ice_rxtx.c | 13 +-
> 32 files changed, 7474 insertions(+), 2531 deletions(-) create mode 100644
> drivers/net/ice/base/ice_bitops.h create mode 100644
> drivers/net/ice/base/ice_dcb.c create mode 100644
> drivers/net/ice/base/ice_dcb.h create mode 100644
> drivers/net/ice/base/ice_fdir.c create mode 100644
> drivers/net/ice/base/ice_fdir.h
>
> --
> 2.13.6
Applied to dpdk-next-net-intel.
Thanks
Qi
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-03-25 7:07 ` [dpdk-dev] [PATCH v4 00/38] ice share code update Zhang, Qi Z
2019-03-25 7:07 ` Zhang, Qi Z
@ 2019-03-31 17:06 ` Thomas Monjalon
2019-03-31 17:06 ` Thomas Monjalon
2019-04-01 5:42 ` Zhang, Qi Z
1 sibling, 2 replies; 213+ messages in thread
From: Thomas Monjalon @ 2019-03-31 17:06 UTC (permalink / raw)
To: Zhang, Qi Z
Cc: dev, Lu, Wenzhuo, Yang, Qiming, Stillwell Jr, Paul M, Yigit,
Ferruh, cathal.ohare, john.mcnamara
25/03/2019 08:07, Zhang, Qi Z:
> > Sync to latest kernel driver, main changes:
> > 1. add DCB/FDIR support.
> > 2. add more APIs in switch module.
> > 3. code clean and bug fix.
> >
> > Qi Zhang (38):
> > net/ice/base: add switch resource allocation and free
> > net/ice/base: improve comments
> > net/ice/base: add two helper functions
> > net/ice/base: add helper macros
> > net/ice/base: allow package copy to be used after resets
> > net/ice/base: clean code
> > net/ice/base: declare functions as external
> > net/ice/base: add more APIs in switch module
> > net/ice/base: add VSI queue context framework
> > net/ice/base: add APIs to add remove ethertype filter
> > net/ice/base: add APIs to get allocated resources
> > net/ice/base: add APIs to alloc/free resource counter
> > net/ice/base: add APIs to get VSI promiscuous mode
> > net/ice/base: add MAC filter with marker and counter
> > net/ice/base: add two helper functions for flow management
> > net/ice/base: fix minor issues
> > net/ice/base: update macros
> > net/ice/base: clean code
> > net/ice/base: enable VSI queue context
> > net/ice/base: ensure only valid bits are set
> > net/ice/base: enhance get link status command
> > net/ice/base: add RSS key related macro and structures
> > net/ice/base: do not write TCAM entries back
> > net/ice/base: remove local VSIG allocations
> > net/ice/base: fix minor issues
> > net/ice/base: update copyright time
> > net/ice/base: fix Klockwork analysis reported issues
> > net/ice/base: return config error without queue to disable
> > net/ice/base: add function to check FW recovery mode
> > net/ice/base: change profile id reference counting
> > net/ice/base: add DCB support
> > net/ice/base: add FDIR support
> > net/ice/base: change profile priority for RSS reply
> > net/ice/base: fix duplicate resource allocations
> > net/ice/base: fix minor issues
> > net/ice/base: increase prototol offset size
> > net/ice/base: revert the workaround for resource allocation
> > net/ice/base: rework on bit ops
>
> Applied to dpdk-next-net-intel.
>
> Thanks
> Qi
3 commits have the title "fix minor issues",
that's a funny performance.
When the ice PMD will enter in a serious phase,
you should write some real commit titles
and explain what are the fixed issues.
For DPDK 19.05, I guess it's fine because ice PMD
is not going to be really used soon, right?
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-03-31 17:06 ` Thomas Monjalon
@ 2019-03-31 17:06 ` Thomas Monjalon
2019-04-01 5:42 ` Zhang, Qi Z
1 sibling, 0 replies; 213+ messages in thread
From: Thomas Monjalon @ 2019-03-31 17:06 UTC (permalink / raw)
To: Zhang, Qi Z
Cc: dev, Lu, Wenzhuo, Yang, Qiming, Stillwell Jr, Paul M, Yigit,
Ferruh, cathal.ohare, john.mcnamara
25/03/2019 08:07, Zhang, Qi Z:
> > Sync to latest kernel driver, main changes:
> > 1. add DCB/FDIR support.
> > 2. add more APIs in switch module.
> > 3. code clean and bug fix.
> >
> > Qi Zhang (38):
> > net/ice/base: add switch resource allocation and free
> > net/ice/base: improve comments
> > net/ice/base: add two helper functions
> > net/ice/base: add helper macros
> > net/ice/base: allow package copy to be used after resets
> > net/ice/base: clean code
> > net/ice/base: declare functions as external
> > net/ice/base: add more APIs in switch module
> > net/ice/base: add VSI queue context framework
> > net/ice/base: add APIs to add remove ethertype filter
> > net/ice/base: add APIs to get allocated resources
> > net/ice/base: add APIs to alloc/free resource counter
> > net/ice/base: add APIs to get VSI promiscuous mode
> > net/ice/base: add MAC filter with marker and counter
> > net/ice/base: add two helper functions for flow management
> > net/ice/base: fix minor issues
> > net/ice/base: update macros
> > net/ice/base: clean code
> > net/ice/base: enable VSI queue context
> > net/ice/base: ensure only valid bits are set
> > net/ice/base: enhance get link status command
> > net/ice/base: add RSS key related macro and structures
> > net/ice/base: do not write TCAM entries back
> > net/ice/base: remove local VSIG allocations
> > net/ice/base: fix minor issues
> > net/ice/base: update copyright time
> > net/ice/base: fix Klockwork analysis reported issues
> > net/ice/base: return config error without queue to disable
> > net/ice/base: add function to check FW recovery mode
> > net/ice/base: change profile id reference counting
> > net/ice/base: add DCB support
> > net/ice/base: add FDIR support
> > net/ice/base: change profile priority for RSS reply
> > net/ice/base: fix duplicate resource allocations
> > net/ice/base: fix minor issues
> > net/ice/base: increase prototol offset size
> > net/ice/base: revert the workaround for resource allocation
> > net/ice/base: rework on bit ops
>
> Applied to dpdk-next-net-intel.
>
> Thanks
> Qi
3 commits have the title "fix minor issues",
that's a funny performance.
When the ice PMD will enter in a serious phase,
you should write some real commit titles
and explain what are the fixed issues.
For DPDK 19.05, I guess it's fine because ice PMD
is not going to be really used soon, right?
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-03-31 17:06 ` Thomas Monjalon
2019-03-31 17:06 ` Thomas Monjalon
@ 2019-04-01 5:42 ` Zhang, Qi Z
2019-04-01 5:42 ` Zhang, Qi Z
1 sibling, 1 reply; 213+ messages in thread
From: Zhang, Qi Z @ 2019-04-01 5:42 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, Lu, Wenzhuo, Yang, Qiming, Stillwell Jr, Paul M, Yigit,
Ferruh, O'Hare, Cathal, Mcnamara, John
> -----Original Message-----
> From: Thomas Monjalon [mailto:thomas@monjalon.net]
> Sent: Monday, April 1, 2019 1:06 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>;
> Yigit, Ferruh <ferruh.yigit@intel.com>; O'Hare, Cathal <cathal.ohare@intel.com>;
> Mcnamara, John <john.mcnamara@intel.com>
> Subject: Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
>
> 25/03/2019 08:07, Zhang, Qi Z:
> > > Sync to latest kernel driver, main changes:
> > > 1. add DCB/FDIR support.
> > > 2. add more APIs in switch module.
> > > 3. code clean and bug fix.
> > >
> > > Qi Zhang (38):
> > > net/ice/base: add switch resource allocation and free
> > > net/ice/base: improve comments
> > > net/ice/base: add two helper functions
> > > net/ice/base: add helper macros
> > > net/ice/base: allow package copy to be used after resets
> > > net/ice/base: clean code
> > > net/ice/base: declare functions as external
> > > net/ice/base: add more APIs in switch module
> > > net/ice/base: add VSI queue context framework
> > > net/ice/base: add APIs to add remove ethertype filter
> > > net/ice/base: add APIs to get allocated resources
> > > net/ice/base: add APIs to alloc/free resource counter
> > > net/ice/base: add APIs to get VSI promiscuous mode
> > > net/ice/base: add MAC filter with marker and counter
> > > net/ice/base: add two helper functions for flow management
> > > net/ice/base: fix minor issues
> > > net/ice/base: update macros
> > > net/ice/base: clean code
> > > net/ice/base: enable VSI queue context
> > > net/ice/base: ensure only valid bits are set
> > > net/ice/base: enhance get link status command
> > > net/ice/base: add RSS key related macro and structures
> > > net/ice/base: do not write TCAM entries back
> > > net/ice/base: remove local VSIG allocations
> > > net/ice/base: fix minor issues
> > > net/ice/base: update copyright time
> > > net/ice/base: fix Klockwork analysis reported issues
> > > net/ice/base: return config error without queue to disable
> > > net/ice/base: add function to check FW recovery mode
> > > net/ice/base: change profile id reference counting
> > > net/ice/base: add DCB support
> > > net/ice/base: add FDIR support
> > > net/ice/base: change profile priority for RSS reply
> > > net/ice/base: fix duplicate resource allocations
> > > net/ice/base: fix minor issues
> > > net/ice/base: increase prototol offset size
> > > net/ice/base: revert the workaround for resource allocation
> > > net/ice/base: rework on bit ops
> >
> > Applied to dpdk-next-net-intel.
> >
> > Thanks
> > Qi
>
> 3 commits have the title "fix minor issues", that's a funny performance.
> When the ice PMD will enter in a serious phase, you should write some real
> commit titles and explain what are the fixed issues.
> For DPDK 19.05, I guess it's fine because ice PMD is not going to be really used
> soon, right?
Yes, the share code in 19.05 can be regarded as an initial version, the commit log is not quite sensitive for developers.
Thanks to forgive this rough, this will not happen in our following share code update :)
>
^ permalink raw reply [flat|nested] 213+ messages in thread
* Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
2019-04-01 5:42 ` Zhang, Qi Z
@ 2019-04-01 5:42 ` Zhang, Qi Z
0 siblings, 0 replies; 213+ messages in thread
From: Zhang, Qi Z @ 2019-04-01 5:42 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, Lu, Wenzhuo, Yang, Qiming, Stillwell Jr, Paul M, Yigit,
Ferruh, O'Hare, Cathal, Mcnamara, John
> -----Original Message-----
> From: Thomas Monjalon [mailto:thomas@monjalon.net]
> Sent: Monday, April 1, 2019 1:06 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>;
> Yigit, Ferruh <ferruh.yigit@intel.com>; O'Hare, Cathal <cathal.ohare@intel.com>;
> Mcnamara, John <john.mcnamara@intel.com>
> Subject: Re: [dpdk-dev] [PATCH v4 00/38] ice share code update.
>
> 25/03/2019 08:07, Zhang, Qi Z:
> > > Sync to latest kernel driver, main changes:
> > > 1. add DCB/FDIR support.
> > > 2. add more APIs in switch module.
> > > 3. code clean and bug fix.
> > >
> > > Qi Zhang (38):
> > > net/ice/base: add switch resource allocation and free
> > > net/ice/base: improve comments
> > > net/ice/base: add two helper functions
> > > net/ice/base: add helper macros
> > > net/ice/base: allow package copy to be used after resets
> > > net/ice/base: clean code
> > > net/ice/base: declare functions as external
> > > net/ice/base: add more APIs in switch module
> > > net/ice/base: add VSI queue context framework
> > > net/ice/base: add APIs to add remove ethertype filter
> > > net/ice/base: add APIs to get allocated resources
> > > net/ice/base: add APIs to alloc/free resource counter
> > > net/ice/base: add APIs to get VSI promiscuous mode
> > > net/ice/base: add MAC filter with marker and counter
> > > net/ice/base: add two helper functions for flow management
> > > net/ice/base: fix minor issues
> > > net/ice/base: update macros
> > > net/ice/base: clean code
> > > net/ice/base: enable VSI queue context
> > > net/ice/base: ensure only valid bits are set
> > > net/ice/base: enhance get link status command
> > > net/ice/base: add RSS key related macro and structures
> > > net/ice/base: do not write TCAM entries back
> > > net/ice/base: remove local VSIG allocations
> > > net/ice/base: fix minor issues
> > > net/ice/base: update copyright time
> > > net/ice/base: fix Klockwork analysis reported issues
> > > net/ice/base: return config error without queue to disable
> > > net/ice/base: add function to check FW recovery mode
> > > net/ice/base: change profile id reference counting
> > > net/ice/base: add DCB support
> > > net/ice/base: add FDIR support
> > > net/ice/base: change profile priority for RSS reply
> > > net/ice/base: fix duplicate resource allocations
> > > net/ice/base: fix minor issues
> > > net/ice/base: increase prototol offset size
> > > net/ice/base: revert the workaround for resource allocation
> > > net/ice/base: rework on bit ops
> >
> > Applied to dpdk-next-net-intel.
> >
> > Thanks
> > Qi
>
> 3 commits have the title "fix minor issues", that's a funny performance.
> When the ice PMD will enter in a serious phase, you should write some real
> commit titles and explain what are the fixed issues.
> For DPDK 19.05, I guess it's fine because ice PMD is not going to be really used
> soon, right?
Yes, the share code in 19.05 can be regarded as an initial version, the commit log is not quite sensitive for developers.
Thanks to forgive this rough, this will not happen in our following share code update :)
>
^ permalink raw reply [flat|nested] 213+ messages in thread
end of thread, other threads:[~2019-04-01 5:42 UTC | newest]
Thread overview: 213+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-28 5:56 [dpdk-dev] [PATCH 00/37] share code update Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 02/37] net/ice/base: improve comments Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 03/37] net/ice/base: add two helper functions Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 04/37] net/ice/base: add helper macros Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 05/37] net/ice/base: allow package copy to be used after resets Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 06/37] net/ice/base: code clean Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 07/37] net/ice/base: declare functions as external Qi Zhang
2019-03-01 10:30 ` Ferruh Yigit
2019-03-04 7:24 ` Zhang, Qi Z
2019-02-28 5:56 ` [dpdk-dev] [PATCH 08/37] net/ice/base: add more APIs in switch module Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 09/37] net/ice/base: add VSI queue context framework Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 10/37] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 11/37] net/ice/base: add APIs to get allocated resources Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 12/37] net/ice/base: add APIs to alloc/free VLAN resource counter Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 13/37] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 14/37] net/ice/base: add MAC filter with marker and counter Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 15/37] net/ice/base: add two helper functions for flow management Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 16/37] net/ice/base: minor fix Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 17/37] net/ice/base: update macros Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 18/37] net/ice/base: code clean Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 19/37] net/ice/base: enable VSI queue context Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 20/37] net/ice/base: ensure only valid bits are set Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 21/37] net/ice/base: enhance get link status command Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 22/37] net/ice/base: add RSS key related macro and structures Qi Zhang
2019-02-28 16:54 ` Greenwalt, Paul
2019-02-28 5:56 ` [dpdk-dev] [PATCH 23/37] net/ice/base: do not write TCAM entries back Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 24/37] net/ice/base: remove local VSIG allocations Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 25/37] net/ice/base: minor fix Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 26/37] net/ice/base: update copyright time Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 27/37] net/ice/base: resolve static analysis reported issues Qi Zhang
2019-03-01 10:36 ` Ferruh Yigit
2019-03-04 1:54 ` Zhang, Qi Z
2019-02-28 5:56 ` [dpdk-dev] [PATCH 28/37] net/ice/base: return config error without queue to disable Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 29/37] net/ice/base: add function to check FW recovery mode Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 30/37] net/ice/base: change profile id reference counting Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 31/37] net/ice/base: add DCB support Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 32/37] net/ice/base: add FDIR support Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 33/37] net/ice/base: change profile priority for RSS reply Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 34/37] net/ice/base: remove duplicate resource allocations Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 35/37] net/ice/base: minor fix Qi Zhang
2019-02-28 5:56 ` [dpdk-dev] [PATCH 36/37] net/ice/base: increase prototol offset size Qi Zhang
2019-03-01 11:19 ` Ferruh Yigit
2019-03-04 6:03 ` Zhang, Qi Z
2019-02-28 5:56 ` [dpdk-dev] [PATCH 37/37] net/ice/base: revert the workaround for resource allocation Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 00/37] ice share code update Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 01/37] net/ice/base: add switch resource allocation and free Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 02/37] net/ice/base: improve comments Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 03/37] net/ice/base: add two helper functions Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 04/37] net/ice/base: add helper macros Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 05/37] net/ice/base: allow package copy to be used after resets Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 06/37] net/ice/base: code clean Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 07/37] net/ice/base: declare functions as external Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 08/37] net/ice/base: add more APIs in switch module Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 09/37] net/ice/base: add VSI queue context framework Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 10/37] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 11/37] net/ice/base: add APIs to get allocated resources Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 12/37] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 13/37] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 14/37] net/ice/base: add MAC filter with marker and counter Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 15/37] net/ice/base: add two helper functions for flow management Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 16/37] net/ice/base: minor fix Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 17/37] net/ice/base: update macros Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 18/37] net/ice/base: code clean Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 19/37] net/ice/base: enable VSI queue context Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 20/37] net/ice/base: ensure only valid bits are set Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 21/37] net/ice/base: enhance get link status command Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 22/37] net/ice/base: add RSS key related macro and structures Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 23/37] net/ice/base: do not write TCAM entries back Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 24/37] net/ice/base: remove local VSIG allocations Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 25/37] net/ice/base: minor fix Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 26/37] net/ice/base: update copyright time Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 27/37] net/ice/base: fix static analysis reported issues Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 28/37] net/ice/base: return config error without queue to disable Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 29/37] net/ice/base: add function to check FW recovery mode Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 30/37] net/ice/base: change profile id reference counting Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 31/37] net/ice/base: add DCB support Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 32/37] net/ice/base: add FDIR support Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 33/37] net/ice/base: change profile priority for RSS reply Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 34/37] net/ice/base: fix duplicate resource allocations Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 35/37] net/ice/base: minor fix Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 36/37] net/ice/base: increase prototol offset size Qi Zhang
2019-03-07 12:58 ` [dpdk-dev] [PATCH v2 37/37] net/ice/base: revert the workaround for resource allocation Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
2019-03-15 0:46 ` Yang, Qiming
2019-03-15 0:46 ` Yang, Qiming
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 02/38] net/ice/base: improve comments Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 03/38] net/ice/base: add two helper functions Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 04/38] net/ice/base: add helper macros Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 05/38] net/ice/base: allow package copy to be used after resets Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 06/38] net/ice/base: code clean Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 07/38] net/ice/base: declare functions as external Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 08/38] net/ice/base: add more APIs in switch module Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 09/38] net/ice/base: add VSI queue context framework Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 10/38] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 11/38] net/ice/base: add APIs to get allocated resources Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 12/38] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 13/38] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 14/38] net/ice/base: add MAC filter with marker and counter Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 15/38] net/ice/base: add two helper functions for flow management Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 16/38] net/ice/base: minor fix Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 17/38] net/ice/base: update macros Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 18/38] net/ice/base: code clean Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 19/38] net/ice/base: enable VSI queue context Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 20/38] net/ice/base: ensure only valid bits are set Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 21/38] net/ice/base: enhance get link status command Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 22/38] net/ice/base: add RSS key related macro and structures Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 23/38] net/ice/base: do not write TCAM entries back Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 24/38] net/ice/base: remove local VSIG allocations Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 25/38] net/ice/base: minor fix Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 26/38] net/ice/base: update copyright time Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 27/38] net/ice/base: fix static analysis reported issues Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 28/38] net/ice/base: return config error without queue to disable Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 29/38] net/ice/base: add function to check FW recovery mode Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 30/38] net/ice/base: change profile id reference counting Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 31/38] net/ice/base: add DCB support Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 32/38] net/ice/base: add FDIR support Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 33/38] net/ice/base: change profile priority for RSS reply Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 34/38] net/ice/base: fix duplicate resource allocations Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 35/38] net/ice/base: minor fix Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 36/38] net/ice/base: increase prototol offset size Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 37/38] net/ice/base: revert the workaround for resource allocation Qi Zhang
2019-03-11 7:04 ` [dpdk-dev] [PATCH v3 38/38] net/ice/base: fix set UDP PTYPEs Qi Zhang
2019-03-11 7:27 ` Zhang, Qi Z
2019-03-18 8:37 ` [dpdk-dev] [PATCH v3 00/38] ice share code update Yang, Qiming
2019-03-18 8:37 ` Yang, Qiming
2019-03-19 3:28 ` Lu, Wenzhuo
2019-03-19 3:28 ` Lu, Wenzhuo
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 " Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 01/38] net/ice/base: add switch resource allocation and free Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 02/38] net/ice/base: improve comments Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 03/38] net/ice/base: add two helper functions Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 04/38] net/ice/base: add helper macros Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 05/38] net/ice/base: allow package copy to be used after resets Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 06/38] net/ice/base: clean code Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 07/38] net/ice/base: declare functions as external Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 08/38] net/ice/base: add more APIs in switch module Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 09/38] net/ice/base: add VSI queue context framework Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 10/38] net/ice/base: add APIs to add remove ethertype filter Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 11/38] net/ice/base: add APIs to get allocated resources Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 12/38] net/ice/base: add APIs to alloc/free resource counter Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 13/38] net/ice/base: add APIs to get VSI promiscuous mode Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 14/38] net/ice/base: add MAC filter with marker and counter Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 15/38] net/ice/base: add two helper functions for flow management Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 16/38] net/ice/base: fix minor issues Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 17/38] net/ice/base: update macros Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 18/38] net/ice/base: clean code Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 19/38] net/ice/base: enable VSI queue context Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 20/38] net/ice/base: ensure only valid bits are set Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 21/38] net/ice/base: enhance get link status command Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 22/38] net/ice/base: add RSS key related macro and structures Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 23/38] net/ice/base: do not write TCAM entries back Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 24/38] net/ice/base: remove local VSIG allocations Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 25/38] net/ice/base: fix minor issues Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 26/38] net/ice/base: update copyright time Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 27/38] net/ice/base: fix Klockwork analysis reported issues Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 28/38] net/ice/base: return config error without queue to disable Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 29/38] net/ice/base: add function to check FW recovery mode Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 30/38] net/ice/base: change profile id reference counting Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 31/38] net/ice/base: add DCB support Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 32/38] net/ice/base: add FDIR support Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 33/38] net/ice/base: change profile priority for RSS reply Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 34/38] net/ice/base: fix duplicate resource allocations Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 35/38] net/ice/base: fix minor issues Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 36/38] net/ice/base: increase prototol offset size Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 37/38] net/ice/base: revert the workaround for resource allocation Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 5:44 ` [dpdk-dev] [PATCH v4 38/38] net/ice/base: rework on bit ops Qi Zhang
2019-03-25 5:44 ` Qi Zhang
2019-03-25 7:07 ` [dpdk-dev] [PATCH v4 00/38] ice share code update Zhang, Qi Z
2019-03-25 7:07 ` Zhang, Qi Z
2019-03-31 17:06 ` Thomas Monjalon
2019-03-31 17:06 ` Thomas Monjalon
2019-04-01 5:42 ` Zhang, Qi Z
2019-04-01 5:42 ` Zhang, Qi Z
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