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charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190326091539.BA7ncxz8Fxp2oTYc24KVh-wh82OPtukgdfwNZhg094g@z> +Idan Werpoler. From: Pradeep Satyanarayana Sent: Sunday, March 24, 2019 7:38 PM To: Shahaf Shuler Cc: bruce.richardson@intel.com; Chao Zhu ; Deke= l Peled ; dev@dpdk.org; David Christensen ; honnappa.nagarahalli@arm.com; konstantin.ananyev@intel.com; ola.liljedah= l@arm.com; Ori Kam ; Thomas Monjalon ; David Wilder ; Yongseok Koh Subject: RE: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER Shahaf Shuler > wrote on = 03/23/2019 11:37:42 PM: > From: Shahaf Shuler > > To: "pradeep@us.ibm.com" >, Thomas Monjalon > > > Cc: "bruce.richardson@intel.com" >, Chao > Zhu >, Deke= l Peled >, > "dev@dpdk.org" >, = David Christensen >, > "honnappa.nagarahalli@arm.com" >, > "konstantin.ananyev@intel.com" >, > "ola.liljedahl@arm.com" >, Ori Kam > >, David Wilder >, Yongseok Koh > > > Date: 03/23/2019 11:37 PM > Subject: RE: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER > > Pradeep, > > Pradeep Satyanarayana wrote on Saturday, March 23, 2019 12:58 AM > >Thomas Monjalon > wrote = on 03/22/2019 10:51:17 AM: > >> Date: 03/22/2019 10:51 AM > >> Subject: Re: [PATCH] eal/ppc: remove fix of memory barrier for IBM POW= ER > >> > >> 22/03/2019 16:30, Pradeep Satyanarayana: > >> > Thomas Monjalon > wr= ote on 03/22/2019 01:49:03 AM: > >> > > 22/03/2019 02:40, Pradeep Satyanarayana: > >> > > > - rte_[rw]mb (general memory barrier) --> should be lwsync > >> > > > >> > > This is what may be discussed. > >> > > The assumption is that the general memory barrier should cover > >> > > all cases (CPU caches, SMP and I/O). > >> > > That's why we think it should "sync" for Power. > >> > > >> > In that case, at a minimum we must de-link rte_smp_[rw]mb from rte_[= rw]mb > >> > and retain it as lwsync. Agreed? > >> > >> I have no clue about what is needed for SMP barrier in Power. > >> As long as it works as expected, no problem. > >> > > > >We will try that out and report back here, later next week > > Till then, i think there are 2 orthogonal issues: > 1. ppc rte_wmb is incorrect > 2. ppc rte_smp_[rw]mb may be improved. > > for #1 the current patch from Dekel seems to be OK. do you agree? > for #2 i guess you will check and come back w/ patch/answer? That has been the line of thinking. However, we need to do some extensive t= esting to confirm that it all holds up. Thanks Pradeep pradeep@us.ibm.com