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DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR04MB6606; H:VE1PR04MB6365.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 2hO7EWhcScKait2sITwRHBx2HlqpDoTTiWqTe1T986P2+AuSSJfC47TkqXveV6GiAzq9Rg/UTusy7mGfbDzWIrDYgkqEyZQ1uE4Xgq5saM6tyd3Phoszgw7iL8ELWcdatr+mE+UwhsaswHxfWVNgSqBWC0b8rGPCuBIAiZbed4BrPlRu0L80HlLRKj42yrr8OLW/AHQxjDOQ1mlgSEH37QFK8E7HcFp/uWxkBV/S+HcQ8madU6goYp8BofV6SN0q5tWSFNCvqBf3xaGZ5UT1lF/EKFbRQIWrK4LP1ZqsTpodz033YAKoF+DD/vHGIVukCfGWs16ib1gRptsvIFo2sAnA3C+27GBOc+2q3fyx6rKZhqgTwchmKPKbHB7wW+t+iqFELOydEJ2gXBTV4VZWTfZEdlDL1ZqHTRMEg80ud3k= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 154e5638-d5c6-45d6-2714-08d6bc14850b X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Apr 2019 11:22:44.1575 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB6606 Subject: [dpdk-dev] [PATCH 10/13] net/enetc: enable Rx-Tx queue start/stop feature X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190408112244.55uJuqpQA-SHOsiU1axlf62OySjkRxpAilFeMHOBX7k@z> Rx and Tx queue start-stop and deferred queue start features enabled. Signed-off-by: Gagandeep Singh --- doc/guides/nics/enetc.rst | 2 + doc/guides/nics/features/enetc.ini | 1 + drivers/net/enetc/enetc_ethdev.c | 185 ++++++++++++++++++++++++++-------= ---- 3 files changed, 134 insertions(+), 54 deletions(-) diff --git a/doc/guides/nics/enetc.rst b/doc/guides/nics/enetc.rst index eeb0752..26d61f6 100644 --- a/doc/guides/nics/enetc.rst +++ b/doc/guides/nics/enetc.rst @@ -50,6 +50,8 @@ ENETC Features - Promiscuous - Multicast - Jumbo packets +- Queue Start/Stop +- Deferred Queue Start =20 NIC Driver (PMD) ~~~~~~~~~~~~~~~~ diff --git a/doc/guides/nics/features/enetc.ini b/doc/guides/nics/features/= enetc.ini index 0eed2cb..bd901fa 100644 --- a/doc/guides/nics/features/enetc.ini +++ b/doc/guides/nics/features/enetc.ini @@ -11,6 +11,7 @@ Promiscuous mode =3D Y Allmulticast mode =3D Y MTU update =3D Y Jumbo frame =3D Y +Queue start/stop =3D Y Linux VFIO =3D Y ARMv8 =3D Y Usage doc =3D Y diff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_eth= dev.c index 4428678..db23276 100644 --- a/drivers/net/enetc/enetc_ethdev.c +++ b/drivers/net/enetc/enetc_ethdev.c @@ -203,7 +203,6 @@ enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring) { int idx =3D tx_ring->index; - uint32_t tbmr; phys_addr_t bd_address; =20 bd_address =3D (phys_addr_t) @@ -215,9 +214,6 @@ enetc_txbdr_wr(hw, idx, ENETC_TBLENR, ENETC_RTBLENR_LEN(tx_ring->bd_count)); =20 - tbmr =3D ENETC_TBMR_EN; - /* enable ring */ - enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr); enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0); enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0); tx_ring->tcir =3D (void *)((size_t)hw->reg + @@ -227,16 +223,22 @@ } =20 static int -enetc_alloc_tx_resources(struct rte_eth_dev *dev, - uint16_t queue_idx, - uint16_t nb_desc) +enetc_tx_queue_setup(struct rte_eth_dev *dev, + uint16_t queue_idx, + uint16_t nb_desc, + unsigned int socket_id __rte_unused, + const struct rte_eth_txconf *tx_conf) { - int err; + int err =3D 0; struct enetc_bdr *tx_ring; struct rte_eth_dev_data *data =3D dev->data; struct enetc_eth_adapter *priv =3D ENETC_DEV_PRIVATE(data->dev_private); =20 + PMD_INIT_FUNC_TRACE(); + if (nb_desc > MAX_BD_COUNT) + return -1; + tx_ring =3D rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0); if (tx_ring =3D=3D NULL) { ENETC_PMD_ERR("Failed to allocate TX ring memory"); @@ -253,6 +255,17 @@ enetc_setup_txbdr(&priv->hw.hw, tx_ring); data->tx_queues[queue_idx] =3D tx_ring; =20 + if (!tx_conf->tx_deferred_start) { + /* enable ring */ + enetc_txbdr_wr(&priv->hw.hw, tx_ring->index, + ENETC_TBMR, ENETC_TBMR_EN); + dev->data->tx_queue_state[tx_ring->index] =3D + RTE_ETH_QUEUE_STATE_STARTED; + } else { + dev->data->tx_queue_state[tx_ring->index] =3D + RTE_ETH_QUEUE_STATE_STOPPED; + } + return 0; fail: rte_free(tx_ring); @@ -260,24 +273,6 @@ return err; } =20 -static int -enetc_tx_queue_setup(struct rte_eth_dev *dev, - uint16_t queue_idx, - uint16_t nb_desc, - unsigned int socket_id __rte_unused, - const struct rte_eth_txconf *tx_conf __rte_unused) -{ - int err =3D 0; - - PMD_INIT_FUNC_TRACE(); - if (nb_desc > MAX_BD_COUNT) - return -1; - - err =3D enetc_alloc_tx_resources(dev, queue_idx, nb_desc); - - return err; -} - static void enetc_tx_queue_release(void *txq) { @@ -367,23 +362,27 @@ buf_size =3D (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) - RTE_PKTMBUF_HEADROOM); enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size); - /* enable ring */ - enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN); enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0); } =20 static int -enetc_alloc_rx_resources(struct rte_eth_dev *dev, - uint16_t rx_queue_id, - uint16_t nb_rx_desc, - struct rte_mempool *mb_pool) +enetc_rx_queue_setup(struct rte_eth_dev *dev, + uint16_t rx_queue_id, + uint16_t nb_rx_desc, + unsigned int socket_id __rte_unused, + const struct rte_eth_rxconf *rx_conf, + struct rte_mempool *mb_pool) { - int err; + int err =3D 0; struct enetc_bdr *rx_ring; struct rte_eth_dev_data *data =3D dev->data; struct enetc_eth_adapter *adapter =3D ENETC_DEV_PRIVATE(data->dev_private); =20 + PMD_INIT_FUNC_TRACE(); + if (nb_rx_desc > MAX_BD_COUNT) + return -1; + rx_ring =3D rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0); if (rx_ring =3D=3D NULL) { ENETC_PMD_ERR("Failed to allocate RX ring memory"); @@ -400,6 +399,17 @@ enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool); data->rx_queues[rx_queue_id] =3D rx_ring; =20 + if (!rx_conf->rx_deferred_start) { + /* enable ring */ + enetc_rxbdr_wr(&adapter->hw.hw, rx_ring->index, ENETC_RBMR, + ENETC_RBMR_EN); + dev->data->rx_queue_state[rx_ring->index] =3D + RTE_ETH_QUEUE_STATE_STARTED; + } else { + dev->data->rx_queue_state[rx_ring->index] =3D + RTE_ETH_QUEUE_STATE_STOPPED; + } + return 0; fail: rte_free(rx_ring); @@ -407,27 +417,6 @@ return err; } =20 -static int -enetc_rx_queue_setup(struct rte_eth_dev *dev, - uint16_t rx_queue_id, - uint16_t nb_rx_desc, - unsigned int socket_id __rte_unused, - const struct rte_eth_rxconf *rx_conf __rte_unused, - struct rte_mempool *mb_pool) -{ - int err =3D 0; - - PMD_INIT_FUNC_TRACE(); - if (nb_rx_desc > MAX_BD_COUNT) - return -1; - - err =3D enetc_alloc_rx_resources(dev, rx_queue_id, - nb_rx_desc, - mb_pool); - - return err; -} - static void enetc_rx_queue_release(void *rxq) { @@ -666,6 +655,90 @@ int enetc_stats_get(struct rte_eth_dev *dev, return 0; } =20 +static int +enetc_rx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) +{ + struct enetc_eth_adapter *priv =3D + ENETC_DEV_PRIVATE(dev->data->dev_private); + struct enetc_bdr *rx_ring; + uint32_t rx_data; + + rx_ring =3D dev->data->rx_queues[qidx]; + if (dev->data->rx_queue_state[qidx] =3D=3D RTE_ETH_QUEUE_STATE_STOPPED) { + rx_data =3D enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index, + ENETC_RBMR); + rx_data =3D rx_data | ENETC_RBMR_EN; + enetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR, + rx_data); + dev->data->rx_queue_state[qidx] =3D RTE_ETH_QUEUE_STATE_STARTED; + } + + return 0; +} + +static int +enetc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) +{ + struct enetc_eth_adapter *priv =3D + ENETC_DEV_PRIVATE(dev->data->dev_private); + struct enetc_bdr *rx_ring; + uint32_t rx_data; + + rx_ring =3D dev->data->rx_queues[qidx]; + if (dev->data->rx_queue_state[qidx] =3D=3D RTE_ETH_QUEUE_STATE_STARTED) { + rx_data =3D enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index, + ENETC_RBMR); + rx_data =3D rx_data & (~ENETC_RBMR_EN); + enetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR, + rx_data); + dev->data->rx_queue_state[qidx] =3D RTE_ETH_QUEUE_STATE_STOPPED; + } + + return 0; +} + +static int +enetc_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) +{ + struct enetc_eth_adapter *priv =3D + ENETC_DEV_PRIVATE(dev->data->dev_private); + struct enetc_bdr *tx_ring; + uint32_t tx_data; + + tx_ring =3D dev->data->tx_queues[qidx]; + if (dev->data->tx_queue_state[qidx] =3D=3D RTE_ETH_QUEUE_STATE_STOPPED) { + tx_data =3D enetc_txbdr_rd(&priv->hw.hw, tx_ring->index, + ENETC_TBMR); + tx_data =3D tx_data | ENETC_TBMR_EN; + enetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR, + tx_data); + dev->data->tx_queue_state[qidx] =3D RTE_ETH_QUEUE_STATE_STARTED; + } + + return 0; +} + +static int +enetc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) +{ + struct enetc_eth_adapter *priv =3D + ENETC_DEV_PRIVATE(dev->data->dev_private); + struct enetc_bdr *tx_ring; + uint32_t tx_data; + + tx_ring =3D dev->data->tx_queues[qidx]; + if (dev->data->tx_queue_state[qidx] =3D=3D RTE_ETH_QUEUE_STATE_STARTED) { + tx_data =3D enetc_txbdr_rd(&priv->hw.hw, tx_ring->index, + ENETC_TBMR); + tx_data =3D tx_data & (~ENETC_TBMR_EN); + enetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR, + tx_data); + dev->data->tx_queue_state[qidx] =3D RTE_ETH_QUEUE_STATE_STOPPED; + } + + return 0; +} + /* * The set of PCI devices this driver supports */ @@ -691,8 +764,12 @@ int enetc_stats_get(struct rte_eth_dev *dev, .dev_infos_get =3D enetc_dev_infos_get, .mtu_set =3D enetc_mtu_set, .rx_queue_setup =3D enetc_rx_queue_setup, + .rx_queue_start =3D enetc_rx_queue_start, + .rx_queue_stop =3D enetc_rx_queue_stop, .rx_queue_release =3D enetc_rx_queue_release, .tx_queue_setup =3D enetc_tx_queue_setup, + .tx_queue_start =3D enetc_tx_queue_start, + .tx_queue_stop =3D enetc_tx_queue_stop, .tx_queue_release =3D enetc_tx_queue_release, .dev_supported_ptypes_get =3D enetc_supported_ptypes_get, }; --=20 1.9.1