From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 595D71B41B for ; Sat, 13 Apr 2019 01:25:11 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from yskoh@mellanox.com) with ESMTPS (AES256-SHA encrypted); 13 Apr 2019 02:25:10 +0300 Received: from mtibiz05-l.mti.labs.mlnx. (mtibiz05-l.mti.labs.mlnx [10.20.10.109]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3CNOrWK006596; Sat, 13 Apr 2019 02:25:08 +0300 From: Yongseok Koh To: bruce.richardson@intel.com, jerinj@marvell.com, pbhagavatula@marvell.com, shahafs@mellanox.com Cc: dev@dpdk.org, thomas@monjalon.net, gavin.hu@arm.com, Honnappa.Nagarahalli@arm.com Date: Fri, 12 Apr 2019 16:24:50 -0700 Message-Id: <20190412232451.30197-6-yskoh@mellanox.com> X-Mailer: git-send-email 2.21.0.196.g041f5ea In-Reply-To: <20190412232451.30197-1-yskoh@mellanox.com> References: <20190412232451.30197-1-yskoh@mellanox.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH 5/6] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Apr 2019 23:25:12 -0000 Per armv8 crypto extension support, make build always enable it by default as long as compiler supports the feature while meson build only enables it for 'default' machine of generic armv8 architecture. For example, specifying '-mcpu=cortex-a72' doesn't enable it but '+crypto' is required in order to enable the feature. It is also known that not all the armv8 platforms have the crypto extension. For example, Mellanox BlueField has a variant which doesn't have it. If crypto enabled binary runs on such a platform, rte_eal_init() fails. Therefore, an option to control this feature is necessary. It is still enabled by default but can be selectively disabled by vendors. Signed-off-by: Yongseok Koh --- config/arm/meson.build | 16 +++++++++------- config/common_armv8a_linux | 1 + drivers/crypto/armv8/Makefile | 4 ++++ meson_options.txt | 2 ++ mk/machine/armv8a/rte.vars.mk | 4 ++++ 5 files changed, 20 insertions(+), 7 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 73c581948c..762d222ed5 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -7,6 +7,8 @@ march_opt = '-march=@0@'.format(machine) arm_force_native_march = false +crypto_flag = get_option('enable_armv8_crypto') ? '+crypto' : '' + flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file @@ -70,14 +72,14 @@ flags_octeontx2_extra = [ ['RTE_USE_C11_MEM_MODEL', true]] machine_args_generic = [ - ['default', ['-march=armv8-a+crc+crypto']], + ['default', ['-march=armv8-a+crc' + crypto_flag]], ['native', ['-march=native']], - ['0xd03', ['-mcpu=cortex-a53']], - ['0xd04', ['-mcpu=cortex-a35']], - ['0xd07', ['-mcpu=cortex-a57']], - ['0xd08', ['-mcpu=cortex-a72'], flags_cortex_a72_extra], - ['0xd09', ['-mcpu=cortex-a73']], - ['0xd0a', ['-mcpu=cortex-a75']]] + ['0xd03', ['-mcpu=cortex-a53' + crypto_flag]], + ['0xd04', ['-mcpu=cortex-a35' + crypto_flag]], + ['0xd07', ['-mcpu=cortex-a57' + crypto_flag]], + ['0xd08', ['-mcpu=cortex-a72' + crypto_flag], flags_cortex_a72_extra], + ['0xd09', ['-mcpu=cortex-a73' + crypto_flag]], + ['0xd0a', ['-mcpu=cortex-a75' + crypto_flag]]] machine_args_cavium = [ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], diff --git a/config/common_armv8a_linux b/config/common_armv8a_linux index 72091de1c7..0efa3e2eb2 100644 --- a/config/common_armv8a_linux +++ b/config/common_armv8a_linux @@ -5,6 +5,7 @@ #include "common_linux" CONFIG_RTE_MACHINE="armv8a" +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=y CONFIG_RTE_ARCH="arm64" CONFIG_RTE_ARCH_ARM64=y diff --git a/drivers/crypto/armv8/Makefile b/drivers/crypto/armv8/Makefile index f71f6b14a4..867a5206cf 100644 --- a/drivers/crypto/armv8/Makefile +++ b/drivers/crypto/armv8/Makefile @@ -4,6 +4,10 @@ include $(RTE_SDK)/mk/rte.vars.mk +ifneq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) +$(error "Please enable CONFIG_RTE_ENABLE_ARMV8_CRYPTO") +endif + ifneq ($(MAKECMDGOALS),clean) ifneq ($(MAKECMDGOALS),config) ifeq ($(ARMV8_CRYPTO_LIB_PATH),) diff --git a/meson_options.txt b/meson_options.txt index 16d9f92c65..4ca09771de 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -4,6 +4,8 @@ option('allow_invalid_socket_id', type: 'boolean', value: false, description: 'allow out-of-range NUMA socket id\'s for platforms that don\'t report the value correctly') option('drivers_install_subdir', type: 'string', value: 'dpdk/pmds-', description: 'Subdirectory of libdir where to install PMDs. Defaults to using a versioned subdirectory.') +option('enable_armv8_crypto', type: 'boolean', value: true, + description: 'enable armv8 crypto extension') option('enable_docs', type: 'boolean', value: false, description: 'build documentation') option('enable_kmods', type: 'boolean', value: true, diff --git a/mk/machine/armv8a/rte.vars.mk b/mk/machine/armv8a/rte.vars.mk index 8252efbb7b..4893d01a2d 100644 --- a/mk/machine/armv8a/rte.vars.mk +++ b/mk/machine/armv8a/rte.vars.mk @@ -28,4 +28,8 @@ # CPU_LDFLAGS = # CPU_ASFLAGS = +ifeq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) MACHINE_CFLAGS += -march=armv8-a+crc+crypto +else +MACHINE_CFLAGS += -march=armv8-a+crc +endif -- 2.21.0.196.g041f5ea From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 9CEE8A0096 for ; Sat, 13 Apr 2019 01:25:39 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1FEF11B3FC; Sat, 13 Apr 2019 01:25:20 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 595D71B41B for ; Sat, 13 Apr 2019 01:25:11 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from yskoh@mellanox.com) with ESMTPS (AES256-SHA encrypted); 13 Apr 2019 02:25:10 +0300 Received: from mtibiz05-l.mti.labs.mlnx. (mtibiz05-l.mti.labs.mlnx [10.20.10.109]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3CNOrWK006596; Sat, 13 Apr 2019 02:25:08 +0300 From: Yongseok Koh To: bruce.richardson@intel.com, jerinj@marvell.com, pbhagavatula@marvell.com, shahafs@mellanox.com Cc: dev@dpdk.org, thomas@monjalon.net, gavin.hu@arm.com, Honnappa.Nagarahalli@arm.com Date: Fri, 12 Apr 2019 16:24:50 -0700 Message-Id: <20190412232451.30197-6-yskoh@mellanox.com> X-Mailer: git-send-email 2.21.0.196.g041f5ea In-Reply-To: <20190412232451.30197-1-yskoh@mellanox.com> References: <20190412232451.30197-1-yskoh@mellanox.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH 5/6] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Content-Type: text/plain; charset="UTF-8" Message-ID: <20190412232450.TlbgPLJ0VwhwboS_-Qzoje7j8BUy3wL-8XqpeBh44oo@z> Per armv8 crypto extension support, make build always enable it by default as long as compiler supports the feature while meson build only enables it for 'default' machine of generic armv8 architecture. For example, specifying '-mcpu=cortex-a72' doesn't enable it but '+crypto' is required in order to enable the feature. It is also known that not all the armv8 platforms have the crypto extension. For example, Mellanox BlueField has a variant which doesn't have it. If crypto enabled binary runs on such a platform, rte_eal_init() fails. Therefore, an option to control this feature is necessary. It is still enabled by default but can be selectively disabled by vendors. Signed-off-by: Yongseok Koh --- config/arm/meson.build | 16 +++++++++------- config/common_armv8a_linux | 1 + drivers/crypto/armv8/Makefile | 4 ++++ meson_options.txt | 2 ++ mk/machine/armv8a/rte.vars.mk | 4 ++++ 5 files changed, 20 insertions(+), 7 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 73c581948c..762d222ed5 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -7,6 +7,8 @@ march_opt = '-march=@0@'.format(machine) arm_force_native_march = false +crypto_flag = get_option('enable_armv8_crypto') ? '+crypto' : '' + flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file @@ -70,14 +72,14 @@ flags_octeontx2_extra = [ ['RTE_USE_C11_MEM_MODEL', true]] machine_args_generic = [ - ['default', ['-march=armv8-a+crc+crypto']], + ['default', ['-march=armv8-a+crc' + crypto_flag]], ['native', ['-march=native']], - ['0xd03', ['-mcpu=cortex-a53']], - ['0xd04', ['-mcpu=cortex-a35']], - ['0xd07', ['-mcpu=cortex-a57']], - ['0xd08', ['-mcpu=cortex-a72'], flags_cortex_a72_extra], - ['0xd09', ['-mcpu=cortex-a73']], - ['0xd0a', ['-mcpu=cortex-a75']]] + ['0xd03', ['-mcpu=cortex-a53' + crypto_flag]], + ['0xd04', ['-mcpu=cortex-a35' + crypto_flag]], + ['0xd07', ['-mcpu=cortex-a57' + crypto_flag]], + ['0xd08', ['-mcpu=cortex-a72' + crypto_flag], flags_cortex_a72_extra], + ['0xd09', ['-mcpu=cortex-a73' + crypto_flag]], + ['0xd0a', ['-mcpu=cortex-a75' + crypto_flag]]] machine_args_cavium = [ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], diff --git a/config/common_armv8a_linux b/config/common_armv8a_linux index 72091de1c7..0efa3e2eb2 100644 --- a/config/common_armv8a_linux +++ b/config/common_armv8a_linux @@ -5,6 +5,7 @@ #include "common_linux" CONFIG_RTE_MACHINE="armv8a" +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=y CONFIG_RTE_ARCH="arm64" CONFIG_RTE_ARCH_ARM64=y diff --git a/drivers/crypto/armv8/Makefile b/drivers/crypto/armv8/Makefile index f71f6b14a4..867a5206cf 100644 --- a/drivers/crypto/armv8/Makefile +++ b/drivers/crypto/armv8/Makefile @@ -4,6 +4,10 @@ include $(RTE_SDK)/mk/rte.vars.mk +ifneq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) +$(error "Please enable CONFIG_RTE_ENABLE_ARMV8_CRYPTO") +endif + ifneq ($(MAKECMDGOALS),clean) ifneq ($(MAKECMDGOALS),config) ifeq ($(ARMV8_CRYPTO_LIB_PATH),) diff --git a/meson_options.txt b/meson_options.txt index 16d9f92c65..4ca09771de 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -4,6 +4,8 @@ option('allow_invalid_socket_id', type: 'boolean', value: false, description: 'allow out-of-range NUMA socket id\'s for platforms that don\'t report the value correctly') option('drivers_install_subdir', type: 'string', value: 'dpdk/pmds-', description: 'Subdirectory of libdir where to install PMDs. Defaults to using a versioned subdirectory.') +option('enable_armv8_crypto', type: 'boolean', value: true, + description: 'enable armv8 crypto extension') option('enable_docs', type: 'boolean', value: false, description: 'build documentation') option('enable_kmods', type: 'boolean', value: true, diff --git a/mk/machine/armv8a/rte.vars.mk b/mk/machine/armv8a/rte.vars.mk index 8252efbb7b..4893d01a2d 100644 --- a/mk/machine/armv8a/rte.vars.mk +++ b/mk/machine/armv8a/rte.vars.mk @@ -28,4 +28,8 @@ # CPU_LDFLAGS = # CPU_ASFLAGS = +ifeq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) MACHINE_CFLAGS += -march=armv8-a+crc+crypto +else +MACHINE_CFLAGS += -march=armv8-a+crc +endif -- 2.21.0.196.g041f5ea