From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from dpdk.org (dpdk.org [92.243.14.124])
	by dpdk.space (Postfix) with ESMTP id 1C4A7A0096
	for <public@inbox.dpdk.org>; Sat, 13 Apr 2019 09:22:56 +0200 (CEST)
Received: from [92.243.14.124] (localhost [127.0.0.1])
	by dpdk.org (Postfix) with ESMTP id DA7231B1CE;
	Sat, 13 Apr 2019 09:22:55 +0200 (CEST)
Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com
 [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 93F051B146
 for <dev@dpdk.org>; Sat, 13 Apr 2019 09:22:54 +0200 (CEST)
Received: from pps.filterd (m0045849.ppops.net [127.0.0.1])
 by mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id
 x3D7K2Ph022531; Sat, 13 Apr 2019 00:22:50 -0700
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;
 h=from : to : cc :
 subject : date : message-id : references : in-reply-to : content-type :
 content-transfer-encoding : mime-version; s=pfpt0818;
 bh=8rINjH36pateWMgdWw3J+R0tXQtdSBQI91/Ci3p0y+g=;
 b=ihH5rCiPNEcFc40fqnSSGY2VVOjH6w9Rn+j4zT38RucT+Rei4ltcSW2CMe2e+OXK3Nnk
 ijLUEKQHMO0uKwvSNyeNsLKuBXXJv1mQTOVl1NvsbKw2pvWeShdxc8LsPI/PGw3oB15V
 0zMEOef2uwMC8nat7zoKeMO2nD//t2blPz+QwuZUbdu5aNSdHABbDf2jWKUkbmVtdK42
 6h9NONnY2pp4WN9oqYcW2VHvUKCQeOSaFqnIBOuR6TXX0qeTFWrg87kya8pGy6uVMRMW
 HuUQHYoKppk0QPxrPQRiDpCHeC0s+7nSX5hG75NiQ135s6Rhwy5hYa1H2IvjTjTA85wV SQ== 
Received: from sc-exch03.marvell.com ([199.233.58.183])
 by mx0a-0016f401.pphosted.com with ESMTP id 2rtxxta8xy-1
 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);
 Sat, 13 Apr 2019 00:22:50 -0700
Received: from SC-EXCH04.marvell.com (10.93.176.84) by SC-EXCH03.marvell.com
 (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sat, 13 Apr
 2019 00:22:49 -0700
Received: from NAM05-CO1-obe.outbound.protection.outlook.com (104.47.48.52) by
 SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server
 (TLS) id
 15.0.1367.3 via Frontend Transport; Sat, 13 Apr 2019 00:22:49 -0700
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
 d=marvell.onmicrosoft.com; s=selector1-marvell-com;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
 bh=8rINjH36pateWMgdWw3J+R0tXQtdSBQI91/Ci3p0y+g=;
 b=sUhXdgr5Q9oxYo6AmtmLIxzWEsYnwp1y64iMKUD03Fw3tJ7QR2Wzn/xJc0pESUE6h9OuS0BopSIE8mFObjq/Z1XTIwCpOWyICx4fx2PEmAk1oVOUwJfafQys+aRF5XH7/0MVFlKwLJSvP3MfYOq52e/k+ZHkj2xj7EPS4BcxOr8=
Received: from BYAPR18MB2424.namprd18.prod.outlook.com (20.179.91.149) by
 BYAPR18MB2918.namprd18.prod.outlook.com (20.179.59.19) with Microsoft SMTP
 Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id
 15.20.1792.14; Sat, 13 Apr 2019 07:22:47 +0000
Received: from BYAPR18MB2424.namprd18.prod.outlook.com
 ([fe80::6dd3:c056:b23b:ab4e]) by BYAPR18MB2424.namprd18.prod.outlook.com
 ([fe80::6dd3:c056:b23b:ab4e%7]) with mapi id 15.20.1771.019; Sat, 13 Apr 2019
 07:22:46 +0000
From: Jerin Jacob Kollanukkaran <jerinj@marvell.com>
To: Yongseok Koh <yskoh@mellanox.com>, "bruce.richardson@intel.com"
 <bruce.richardson@intel.com>, Pavan Nikhilesh Bhagavatula
 <pbhagavatula@marvell.com>, "shahafs@mellanox.com" <shahafs@mellanox.com>
CC: "dev@dpdk.org" <dev@dpdk.org>, "thomas@monjalon.net" <thomas@monjalon.net>,
 "gavin.hu@arm.com" <gavin.hu@arm.com>,
 "Honnappa.Nagarahalli@arm.com" <Honnappa.Nagarahalli@arm.com>
Thread-Topic: [EXT] [PATCH 5/6] build: add option for armv8 crypto extension
Thread-Index: AQHU8YcCJBMTHcCzhkWYreJI0p1ieaY5q2zg
Date: Sat, 13 Apr 2019 07:22:46 +0000
Message-ID:
 <BYAPR18MB2424A615C597E9F8549F770BC8290@BYAPR18MB2424.namprd18.prod.outlook.com>
References: <20190412232451.30197-1-yskoh@mellanox.com>
 <20190412232451.30197-6-yskoh@mellanox.com>
In-Reply-To: <20190412232451.30197-6-yskoh@mellanox.com>
Accept-Language: en-US
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-originating-ip: [122.182.194.144]
x-ms-publictraffictype: Email
x-ms-office365-filtering-correlation-id: 316ee081-1613-4478-cad9-08d6bfe0d3fa
x-microsoft-antispam: BCL:0; PCL:0;
 RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600139)(711020)(4605104)(2017052603328)(7193020);
 SRVR:BYAPR18MB2918; 
x-ms-traffictypediagnostic: BYAPR18MB2918:
x-microsoft-antispam-prvs: <BYAPR18MB291836E28CF0A5A0BBD4C418C8290@BYAPR18MB2918.namprd18.prod.outlook.com>
x-forefront-prvs: 00064751B6
x-forefront-antispam-report: SFV:NSPM;
 SFS:(10009020)(366004)(39860400002)(136003)(346002)(396003)(376002)(189003)(199004)(13464003)(6506007)(86362001)(8936002)(99286004)(8676002)(2501003)(7736002)(102836004)(53546011)(110136005)(316002)(54906003)(81156014)(229853002)(7696005)(26005)(33656002)(71200400001)(71190400001)(256004)(14444005)(74316002)(4326008)(76176011)(5660300002)(11346002)(14454004)(486006)(476003)(81166006)(478600001)(97736004)(68736007)(6246003)(55016002)(446003)(305945005)(53936002)(2906002)(25786009)(6436002)(186003)(105586002)(66066001)(3846002)(6116002)(106356001)(9686003)(52536014);
 DIR:OUT; SFP:1101; SCL:1; SRVR:BYAPR18MB2918;
 H:BYAPR18MB2424.namprd18.prod.outlook.com; FPR:; SPF:None; LANG:en;
 PTR:InfoNoRecords; MX:1; A:1; 
received-spf: None (protection.outlook.com: marvell.com does not designate
 permitted sender hosts)
x-ms-exchange-senderadcheck: 1
x-microsoft-antispam-message-info: ra3ETTaILj9dKZOszO50Eg5frk5eqOn9kzE2SGD7EyoZjz8B5h+0XK5M9byblRZSVf51CkcfbfN3jEfxrsZLwdPcLAODiJsiGfjC/nXYK5pNR3fWbGa8J6EqX1ZnWcUQ1h100iOPsU7S3My8UR92Y0JiU8Z8/tNEIq3ryiQ5wP+PdpyNdm4AtiuaflKmngytsK0iyp/EOqOCC17B4AYsk9OtAMbLHcWmtf4j5Sfvx2oGmzbT5sUKq04zpiOBm88n51zTKyE791yUvNFjcTn5zeMLn1fAzjWVEVnhFJGQ6lVTGItKAFupb2DOgP4x0K3YK8Ken9GhjRD+Yv3BGp65Kn2JBM3O96mLm0UQqsvLUDc92zn3fVezUt6UhK0XcQpihT4gI6nseykktNtVKaX77NCTDSXkdMNCQ1QpzGwvSPM=
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: 316ee081-1613-4478-cad9-08d6bfe0d3fa
X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Apr 2019 07:22:46.7800 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR18MB2918
X-OriginatorOrg: marvell.com
X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, ,
 definitions=2019-04-13_02:, , signatures=0
Subject: Re: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 crypto
	extension
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Sender: "dev" <dev-bounces@dpdk.org>
Message-ID: <20190413072246.TMtPM7DJ2ktD5q4ifaLipR7NtNIuIMJkwjVJgHXZ8oI@z>

> -----Original Message-----
> From: Yongseok Koh <yskoh@mellanox.com>
> Sent: Saturday, April 13, 2019 4:55 AM
> To: bruce.richardson@intel.com; Jerin Jacob Kollanukkaran
> <jerinj@marvell.com>; Pavan Nikhilesh Bhagavatula
> <pbhagavatula@marvell.com>; shahafs@mellanox.com
> Cc: dev@dpdk.org; thomas@monjalon.net; gavin.hu@arm.com;
> Honnappa.Nagarahalli@arm.com
> Subject: [EXT] [PATCH 5/6] build: add option for armv8 crypto extension
>=20
>  CONFIG_RTE_MACHINE=3D"armv8a"
> +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dy

This approach is not scalable. Even, it is not good for BlueField as you=20
you need to maintain two images.

Unlike other CPU flags, arm64's crypto cpu flag is really _optional_.
Access to crypto instructions is always at under runtime check.
See the following in rte_armv8_pmd.c


	/* Check CPU for support for AES instruction set */
	if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
		ARMV8_CRYPTO_LOG_ERR(
			"AES instructions not supported by CPU");
		return -EFAULT;
	}

	/* Check CPU for support for SHA instruction set */
	if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA1) ||
	    !rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA2)) {
		ARMV8_CRYPTO_LOG_ERR(
			"SHA1/SHA2 instructions not supported by CPU");
		return -EFAULT;
	}

So In order to avoid one more config flags specific to armv8 in meson and m=
akefile build infra
And avoid the need for 6/6 patch. IMO,
# Introduce optional CPU flag scheme in eal. Treat armv8 crypto as optional=
 flag
# Skip the eal init check for optional flag.

Do you see any issues with that approach?