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PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 13kSIgGZEOL/t18EcUWdcsS1FirdvCJ88jVnkx75PpJ0m2efl5YuuF2X/OoOgrNLIw5EYlFrd9uHGVj+bosZETAuQXZqhZskEEnT6Ub1OdS0/0MJxZL90vv4kvCLpoDIQnF4NC/FU6k7ljPfC83bI/hV6qxOeBYw5fG2EJfokX/awn7jWWBz59ulKdFIILR7Bu6rvAKndsv9YLkYrokiZSZqYA+0H78pt6bp3olzT56PPdniWMnvhNnJn2wmMDiTap/fNQYs3YfTkOQPeGxkHN8dqaSJUYKsdiWxdECY/JFg6tHCgvdVM9s1mcShig2qLiwh7gDNUph2AFCKr7bpBrPvKpXWShHjeFwFHtrsYNzXnCQYN15fUC9GyC1CTfpR3FOLEKoiVnIitzFCMgVMwIqojHguh7BLrXas3oxPMgA= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: fada7c72-95b8-4de6-0367-08d6c3ba6bbf X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Apr 2019 04:57:55.7216 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR05MB3140 Subject: Re: [dpdk-dev] [PATCH 6/9] net/mlx5: add transfer attribute to matcher X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190418045755.LhiLRWxIyT6lpZKrEeZLyJpbJv-DeT4xSqskGEqgmFE@z> Hi Yongseok, PSB > -----Original Message----- > From: Yongseok Koh > Sent: Thursday, April 18, 2019 3:39 AM > To: Ori Kam > Cc: Shahaf Shuler ; Matan Azrad > ; Slava Ovsiienko ; Moti > Haimovsky ; dev@dpdk.org > Subject: Re: [PATCH 6/9] net/mlx5: add transfer attribute to matcher >=20 > On Sun, Apr 14, 2019 at 09:12:34PM +0000, Ori Kam wrote: > > In current implementation the DV steering supported only NIC steering. > > This commit adds the transfer attribute in order to create a matcher > > on the FDB tabels. > > > > Signed-off-by: Ori Kam > > --- > > drivers/net/mlx5/mlx5_flow.c | 1 + > > drivers/net/mlx5/mlx5_flow.h | 2 ++ > > drivers/net/mlx5/mlx5_flow_dv.c | 22 ++++++++++++++++++---- > > 3 files changed, 21 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.= c > > index 83abc14..9fd5096 100644 > > --- a/drivers/net/mlx5/mlx5_flow.c > > +++ b/drivers/net/mlx5/mlx5_flow.c > > @@ -2095,6 +2095,7 @@ uint32_t mlx5_flow_adjust_priority(struct > rte_eth_dev *dev, int32_t priority, > > flow =3D rte_calloc(__func__, 1, flow_size, 0); > > flow->drv_type =3D flow_get_drv_type(dev, attr); > > flow->ingress =3D attr->ingress; > > + flow->transfer =3D attr->transfer; > > assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && > > flow->drv_type < MLX5_FLOW_TYPE_MAX); > > flow->queue =3D (void *)(flow + 1); > > diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.= h > > index 85954c2..9d72024 100644 > > --- a/drivers/net/mlx5/mlx5_flow.h > > +++ b/drivers/net/mlx5/mlx5_flow.h > > @@ -210,6 +210,7 @@ struct mlx5_flow_dv_matcher { > > uint16_t crc; /**< CRC of key. */ > > uint16_t priority; /**< Priority of matcher. */ > > uint8_t egress; /**< Egress matcher. */ > > + uint8_t transfer; /**< 1 if the flow is E-Switch flow. */ >=20 > egress and transfer can be bit fields? Those come from rte_flow_attr but = I don't > understand why it needs to be uint8_t individually. >=20 You are correct but since the egress was already defined like this I didn't= want to add my code differently. I don't care to change the new code to bit mask and in later patch (after t= his release) modify also the egress; > > uint32_t group; /**< The matcher group. */ > > struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */ > > }; > > @@ -382,6 +383,7 @@ struct rte_flow { > > struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */ > > uint8_t ingress; /**< 1 if the flow is ingress. */ > > uint32_t group; /**< The group index. */ > > + uint8_t transfer; /**< 1 if the flow is E-Switch flow. */ >=20 > Bit-field? >=20 Same as above comment to keep with the ingress variable. > Just out of curiosity, flow->ingress vs matcher->egress, why? > rte_flow_attr has both ingress and egress because a flow can be applied f= or > both > directions. But, in mlx5 PMD, it looks exclusive - !ingress =3D=3D egress= vice > versa. Then, I don't understand why one has ingress and the other one has > egress even wasting bits. >=20 First I agree it is confusing. But it doesn't waste bits since in any case = we must store a bit in each structure.=20 In any case I think I also should put it in my future commites. > > }; > > > > typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, > > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > b/drivers/net/mlx5/mlx5_flow_dv.c > > index e66ee34..b4ca9ca 100644 > > --- a/drivers/net/mlx5/mlx5_flow_dv.c > > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > > @@ -3203,6 +3203,8 @@ struct field_modify_info modify_tcp[] =3D { > > * Table id to use. > > * @param[in] egress > > * Direction of the table. > > + * @param[in] transfer > > + * E-Switch or Nic flow.. >=20 > Redundant periods (..) > Nic -> NIC >=20 Will fix. >=20 > Thanks, > Yongseok >=20 > > * @param[out] error > > * pointer to error structure. > > * > > @@ -3212,6 +3214,7 @@ struct field_modify_info modify_tcp[] =3D { > > static struct mlx5_flow_tbl_resource * > > flow_dv_tbl_resource_get(struct rte_eth_dev *dev, > > uint32_t table_id, uint8_t egress, > > + uint8_t transfer, > > struct rte_flow_error *error) > > { > > struct mlx5_priv *priv =3D dev->data->dev_private; > > @@ -3219,7 +3222,12 @@ struct field_modify_info modify_tcp[] =3D { > > struct mlx5_flow_tbl_resource *tbl; > > > > #ifdef HAVE_MLX5DV_DR > > - if (egress) { > > + if (transfer) { > > + tbl =3D &sh->fdb_tbl[table_id]; > > + if (!tbl->obj) > > + tbl->obj =3D mlx5_glue->dr_create_flow_tbl > > + (sh->fdb_ns, table_id); > > + } else if (egress) { > > tbl =3D &sh->tx_tbl[table_id]; > > if (!tbl->obj) > > tbl->obj =3D mlx5_glue->dr_create_flow_tbl > > @@ -3241,7 +3249,9 @@ struct field_modify_info modify_tcp[] =3D { > > #else > > (void)error; > > (void)tbl; > > - if (egress) > > + if (transfer) > > + return &sh->fdb_tbl[table_id]; > > + else if (egress) > > return &sh->tx_tbl[table_id]; > > else > > return &sh->rx_tbl[table_id]; > > @@ -3306,6 +3316,7 @@ struct field_modify_info modify_tcp[] =3D { > > matcher->priority =3D=3D cache_matcher->priority && > > matcher->egress =3D=3D cache_matcher->egress && > > matcher->group =3D=3D cache_matcher->group && > > + matcher->transfer =3D=3D cache_matcher->transfer && > > !memcmp((const void *)matcher->mask.buf, > > (const void *)cache_matcher->mask.buf, > > cache_matcher->mask.size)) { > > @@ -3327,7 +3338,8 @@ struct field_modify_info modify_tcp[] =3D { > > > RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, > > "cannot allocate matcher memory"); > > tbl =3D flow_dv_tbl_resource_get(dev, matcher->group * > MLX5_GROUP_FACTOR, > > - matcher->egress, error); > > + matcher->egress, matcher->transfer, > > + error); > > if (!tbl) { > > rte_free(cache_matcher); > > return rte_flow_error_set(error, ENOMEM, > > @@ -3654,7 +3666,8 @@ struct field_modify_info modify_tcp[] =3D { > > jump_data =3D action->conf; > > tbl =3D flow_dv_tbl_resource_get(dev, jump_data->group > * > > MLX5_GROUP_FACTOR, > > - attr->egress, error); > > + attr->egress, > > + attr->transfer, error); > > if (!tbl) > > return rte_flow_error_set > > (error, errno, > > @@ -3882,6 +3895,7 @@ struct field_modify_info modify_tcp[] =3D { > > matcher.priority); > > matcher.egress =3D attr->egress; > > matcher.group =3D attr->group; > > + matcher.transfer =3D attr->transfer; > > if (flow_dv_matcher_register(dev, &matcher, dev_flow, error)) > > return -rte_errno; > > return 0; > > -- > > 1.8.3.1 > >