From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 72CFDA0AC5 for ; Fri, 3 May 2019 11:57:30 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 77A0A324D; Fri, 3 May 2019 11:57:29 +0200 (CEST) Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130051.outbound.protection.outlook.com [40.107.13.51]) by dpdk.org (Postfix) with ESMTP id 3E621316B for ; Fri, 3 May 2019 11:57:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=a4JWDWdNkd2OCwaSS9GLinBEJCYYPkFengyrfGoQfLc=; b=Vb21K8EMy9I7xpliw+GX9I9MxEW08tpV9HEx90hM+pJ8MPPCQguw2aCaqZmPTIwbCTit7zdZ2AAM0ZYGvZ35hC1AJyJo6M5QJkWqie2LFvBs5cJaCu4hYTqYkcgP4Sa0IR0equxGBZ/SVmpdHhr0T23YsQAlWUvCAyXX7m6i674= Received: from DB3PR0502MB3980.eurprd05.prod.outlook.com (52.134.72.27) by DB3PR0502MB3964.eurprd05.prod.outlook.com (52.134.65.161) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1856.10; Fri, 3 May 2019 09:57:24 +0000 Received: from DB3PR0502MB3980.eurprd05.prod.outlook.com ([fe80::e8d5:4aff:902d:6e98]) by DB3PR0502MB3980.eurprd05.prod.outlook.com ([fe80::e8d5:4aff:902d:6e98%5]) with mapi id 15.20.1856.008; Fri, 3 May 2019 09:57:24 +0000 From: Yongseok Koh To: Honnappa Nagarahalli CC: "jerinj@marvell.com" , Shahaf Shuler , Thomas Monjalon , "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "Gavin Hu (Arm Technology China)" , nd Thread-Topic: [PATCH 1/2] build: add option for armv8 crypto extension Thread-Index: AQHVAJ1jFjSOyak/l0SpncZMuk1966ZXU6IAgAFzvwCAAGSQgA== Date: Fri, 3 May 2019 09:57:24 +0000 Message-ID: <20190503095714.GC2510@mtidpdk.mti.labs.mlnx> References: <20190502015806.41497-1-yskoh@mellanox.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR06CA0044.namprd06.prod.outlook.com (2603:10b6:a03:14b::21) To DB3PR0502MB3980.eurprd05.prod.outlook.com (2603:10a6:8:10::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0502MB3964; H:DB3PR0502MB3980.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 8cN9KF2/kk3OJmrF4v9fF+08KvOXzpBFynmIMafwBDlndV7N0WlLe84q48ZsHexb9FDziPsckkyyGGrH/V95HaHRpkqdcPlxpuM/EKDaPG9ThqNjCac7Sq4s9yZHe794JaAZSjLD7mesg5ln+QWsK2caNZ1BMfaB0K0Ht/WK+jkZ7w8j0imE+2NpZVJ+5jXU62L5WgG7zltUkNwcxMXdgcZaHYY0TDvc//xLmxUeMxtyT78iQUigFjp3E8v00kAFa15QXg2rPGHKEaRFqSxvYiabT1hsJTGS/8gGwy93YHGDy728ZsqbJsQ0fI8ey0Ile0b1op971DNC1jkJLW/GOpotFvAaTDd1sdBRQLQDR7r5qmFJXNjt1/zR0sv+SjNqS/rLOG5xNtPFc/HjVllhpvpIasx4F68XQHWGD5PXOCM= Content-Type: text/plain; charset="UTF-8" Content-ID: <6997A0F0CEDB854BB5A5C65EA0676350@eurprd05.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 346196fa-7071-4974-c60c-08d6cfadbe0d X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 09:57:24.7181 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB3964 Subject: Re: [dpdk-dev] [PATCH 1/2] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190503095724.Qda-wVuAKNdiAJNQvYoInkuYgell3DYsPqX7ZF-84jw@z> On Fri, May 03, 2019 at 03:57:20AM +0000, Honnappa Nagarahalli wrote: > > > On May 1, 2019, at 9:13 PM, Honnappa Nagarahalli > > wrote: > > > > > >> Per armv8 crypto extension support, make build always enable it by > > >> default as long as compiler supports the feature while meson build > > >> only enables it for 'default' machine of generic armv8 architecture. > > >> For example, specifying '- mcpu=3Dcortex-a72' doesn't enable it but > > >> '+crypto' is required in order to enable the feature. > > >> > > >> It is also known that not all the armv8 platforms have the crypto ex= tension. > > >> For example, Mellanox BlueField has a variant which doesn't have it. > > >> If crypto enabled binary runs on such a platform, rte_eal_init() fai= ls. > > >> > > >> Therefore, an option to control this feature is necessary. It is > > >> still enabled by default but can be selectively disabled by vendors. > > > The distro/binary portable image needs to be built without crypto. On= ly the > > crypto drivers need to be built with crypto and at run time we need to = hook > > up the correct function pointers. So, IMO, by default crypto should be > > disabled and should be enabled in specific target machine configs. > >=20 > > I make it enabled by default simply because I don't want to change the > > current behavior, no breakage. > Good point. I don't know how to handle it either. But, the current distro > package will not work on BlueField as it is built with crypto enabled. So= , > IMO, we should consider it as bug. You may probably know, cpu w/o crypto is related to the export licenses. Sometimes, vendor has to disable it when exporting in certain conditions. A= nd as BlueField is still in early stage, we don't mind much existing distro packa= ges not being able to run on such parts (BlueField having no crypto). > > I also want to hear from others. Jerin, Thomas? > >=20 > > >> > > >> Signed-off-by: Yongseok Koh > > >> --- > > >> config/arm/meson.build | 16 +++++++++------- > > >> config/common_armv8a_linux | 1 + > > >> drivers/crypto/armv8/Makefile | 4 ++++ > > >> meson_options.txt | 2 ++ > > >> mk/machine/armv8a/rte.vars.mk | 4 ++++ > > >> 5 files changed, 20 insertions(+), 7 deletions(-) > > >> > > >> diff --git a/config/arm/meson.build b/config/arm/meson.build index > > >> 7fa6ed3105..3b53842d08 100644 > > >> --- a/config/arm/meson.build > > >> +++ b/config/arm/meson.build > > >> @@ -8,6 +8,8 @@ march_opt =3D '-march=3D@0@'.format(machine) > > >> arm_force_native_march =3D false arm_force_default_march =3D (machi= ne =3D=3D > > >> 'default') > > >> > > >> +crypto_flag =3D get_option('enable_armv8_crypto') ? '+crypto' : '' > > >> + > > >> flags_common_default =3D [ > > >> # Accelarate rte_memcpy. Be sure to run unit test > > >> (memcpy_perf_autotest) > > >> # to determine the best threshold in code. Refer to notes in source > > >> file @@ -74,14 +76,14 @@ flags_octeontx2_extra =3D [ > > >> ['RTE_USE_C11_MEM_MODEL', true]] > > >> > > >> machine_args_generic =3D [ > > >> - ['default', ['-march=3Darmv8-a+crc+crypto']], > > >> + ['default', ['-march=3Darmv8-a+crc' + crypto_flag]], > > >> ['native', ['-march=3Dnative']], > > >> - ['0xd03', ['-mcpu=3Dcortex-a53']], > > >> - ['0xd04', ['-mcpu=3Dcortex-a35']], > > >> - ['0xd07', ['-mcpu=3Dcortex-a57']], > > >> - ['0xd08', ['-mcpu=3Dcortex-a72']], > > >> - ['0xd09', ['-mcpu=3Dcortex-a73']], > > >> - ['0xd0a', ['-mcpu=3Dcortex-a75']]] > > >> + ['0xd03', ['-mcpu=3Dcortex-a53' + crypto_flag]], > > >> + ['0xd04', ['-mcpu=3Dcortex-a35' + crypto_flag]], > > >> + ['0xd07', ['-mcpu=3Dcortex-a57' + crypto_flag]], > > >> + ['0xd08', ['-mcpu=3Dcortex-a72' + crypto_flag]], > > >> + ['0xd09', ['-mcpu=3Dcortex-a73' + crypto_flag]], > > >> + ['0xd0a', ['-mcpu=3Dcortex-a75' + crypto_flag]]] > > >> > > >> machine_args_cavium =3D [ > > >> ['default', ['-march=3Darmv8-a+crc+crypto','-mcpu=3Dthunderx']], > > >> diff --git a/config/common_armv8a_linux b/config/common_armv8a_linux > > >> index 72091de1c7..0efa3e2eb2 100644 > > >> --- a/config/common_armv8a_linux > > >> +++ b/config/common_armv8a_linux > > >> @@ -5,6 +5,7 @@ > > >> #include "common_linux" > > >> > > >> CONFIG_RTE_MACHINE=3D"armv8a" > > >> +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dy > > >> > > >> CONFIG_RTE_ARCH=3D"arm64" > > >> CONFIG_RTE_ARCH_ARM64=3Dy > > >> diff --git a/drivers/crypto/armv8/Makefile > > >> b/drivers/crypto/armv8/Makefile index f71f6b14a4..867a5206cf 100644 > > >> --- a/drivers/crypto/armv8/Makefile > > >> +++ b/drivers/crypto/armv8/Makefile > > >> @@ -4,6 +4,10 @@ > > >> > > >> include $(RTE_SDK)/mk/rte.vars.mk > > >> > > >> +ifneq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) > > >> +$(error "Please enable CONFIG_RTE_ENABLE_ARMV8_CRYPTO") endif > > >> + > > >> ifneq ($(MAKECMDGOALS),clean) > > >> ifneq ($(MAKECMDGOALS),config) > > >> ifeq ($(ARMV8_CRYPTO_LIB_PATH),) > > >> diff --git a/meson_options.txt b/meson_options.txt index > > >> 16d9f92c65..4ca09771de 100644 > > >> --- a/meson_options.txt > > >> +++ b/meson_options.txt > > >> @@ -4,6 +4,8 @@ option('allow_invalid_socket_id', type: 'boolean', v= alue: > > >> false, > > >> description: 'allow out-of-range NUMA socket id\'s for platforms > > >> that don\'t report the value correctly') option('drivers_install_su= bdir', type: > > >> 'string', value: 'dpdk/pmds-', > > >> description: 'Subdirectory of libdir where to install PMDs. Default= s > > >> to using a versioned subdirectory.') > > >> +option('enable_armv8_crypto', type: 'boolean', value: true, > > >> + description: 'enable armv8 crypto extension') > > >> option('enable_docs', type: 'boolean', value: false, > > >> description: 'build documentation') > > >> option('enable_kmods', type: 'boolean', value: true, diff --git > > >> a/mk/machine/armv8a/rte.vars.mk b/mk/machine/armv8a/rte.vars.mk > > index > > >> 8252efbb7b..4893d01a2d 100644 > > >> --- a/mk/machine/armv8a/rte.vars.mk > > >> +++ b/mk/machine/armv8a/rte.vars.mk > > >> @@ -28,4 +28,8 @@ > > >> # CPU_LDFLAGS =3D > > >> # CPU_ASFLAGS =3D > > >> > > >> +ifeq ($(CONFIG_RTE_ENABLE_ARMV8_CRYPTO),y) > > >> MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc+crypto > > >> +else > > >> +MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc endif > > >> -- > > >> 2.11.0 > > > >=20